1 /* 2 * ppmc7xx.h 3 * --------- 4 * 5 * Wind River PPMC 7xx/74xx board configuration file. 6 * 7 * By Richard Danter (richard.danter@windriver.com) 8 * Copyright (C) 2005 Wind River Systems 9 */ 10 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #define CONFIG_PPMC7XX 16 17 18 /*=================================================================== 19 * 20 * User configurable settings - Modify to your preference 21 * 22 *=================================================================== 23 */ 24 25 /* 26 * Debug 27 * 28 * DEBUG - Define this is you want extra debug info 29 * GTREGREAD - Required to build with debug 30 * do_bdinfo - Required to build with debug 31 */ 32 33 #ifdef DEBUG 34 #define GTREGREAD(x) 0xFFFFFFFF 35 #define do_bdinfo(a,b,c,d) 36 #endif 37 38 /* 39 * CPU type 40 * 41 * CONFIG_7xx - We have a 750 or 755 CPU 42 * CONFIG_74xx - We have a 7400 CPU 43 * CONFIG_ALTIVEC - We have altivec enabled CPU (only 7400) 44 * CONFIG_BUS_CLK - System bus clock in Hz 45 */ 46 47 #define CONFIG_7xx 48 #undef CONFIG_74xx 49 #undef CONFIG_ALTIVEC 50 #define CONFIG_BUS_CLK 66000000 51 52 53 /* 54 * Monitor configuration 55 * 56 * List of command sets to include in shell 57 * 58 * The following command sets have been tested and known to work: 59 * 60 * CMD_CACHE - Cache control commands 61 * CMD_MEMORY - Memory display, change and test commands 62 * CMD_FLASH - Erase and program flash 63 * CMD_ENV - Environment commands 64 * CMD_RUN - Run commands stored in env vars 65 * CMD_ELF - Load ELF files 66 * CMD_NET - Networking/file download commands 67 * CMD_PIN - ICMP Echo Request command 68 * CMD_PCI - PCI Bus scanning command 69 */ 70 71 /* 72 * BOOTP options 73 */ 74 #define CONFIG_BOOTP_BOOTFILESIZE 75 #define CONFIG_BOOTP_BOOTPATH 76 #define CONFIG_BOOTP_GATEWAY 77 #define CONFIG_BOOTP_HOSTNAME 78 79 80 /* 81 * Command line configuration. 82 */ 83 #include <config_cmd_default.h> 84 85 #define CONFIG_CMD_FLASH 86 #define CONFIG_CMD_SAVEENV 87 #define CONFIG_CMD_RUN 88 #define CONFIG_CMD_ELF 89 #define CONFIG_CMD_NET 90 #define CONFIG_CMD_PING 91 #define CONFIG_CMD_PCI 92 93 #undef CONFIG_CMD_KGDB 94 95 96 /* 97 * Serial configuration 98 * 99 * CONFIG_CONS_INDEX - Serial console port number (COM1) 100 * CONFIG_BAUDRATE - Serial speed 101 */ 102 103 #define CONFIG_CONS_INDEX 1 104 #define CONFIG_BAUDRATE 9600 105 106 107 /* 108 * PCI config 109 * 110 * CONFIG_PCI - Enable PCI bus 111 * CONFIG_PCI_PNP - Enable Plug & Play support 112 * CONFIG_PCI_SCAN_SHOW - Enable display of devices at startup 113 */ 114 115 #define CONFIG_PCI 116 #define CONFIG_PCI_PNP 117 #undef CONFIG_PCI_SCAN_SHOW 118 119 120 /* 121 * Network config 122 * 123 * CONFIG_NET_MULTI - Support for multiple network interfaces 124 * CONFIG_EEPRO100 - Intel 8255x Ethernet Controller 125 * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM 126 */ 127 128 #define CONFIG_NET_MULTI 129 #define CONFIG_EEPRO100 130 #define CONFIG_EEPRO100_SROM_WRITE 131 132 133 /* 134 * Enable extra init functions 135 * 136 * CONFIG_MISC_INIT_F - Call pre-relocation init functions 137 * CONFIG_MISC_INIT_R - Call post relocation init functions 138 */ 139 140 #undef CONFIG_MISC_INIT_F 141 #define CONFIG_MISC_INIT_R 142 143 144 /* 145 * Boot config 146 * 147 * CONFIG_BOOTCOMMAND - Command(s) to execute to auto-boot 148 * CONFIG_BOOTDELAY - How long to wait before auto-boot (in sec) 149 */ 150 151 #define CONFIG_BOOTCOMMAND \ 152 "bootp;" \ 153 "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \ 154 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \ 155 "bootm" 156 #define CONFIG_BOOTDELAY 5 157 158 159 /*=================================================================== 160 * 161 * Board configuration settings - You should not need to modify these 162 * 163 *=================================================================== 164 */ 165 166 167 /* 168 * Memory map 169 * 170 * This board runs in a standard CHRP (Map-B) configuration. 171 * 172 * Type Start End Size Width Chip Sel 173 * ----------- ----------- ----------- ------- ------- -------- 174 * SDRAM 0x00000000 0x04000000 64MB 64b SDRAMCS0 175 * User LED's 0x78000000 RCS3 176 * UART 0x7C000000 RCS2 177 * Mailbox 0xFF000000 RCS1 178 * Flash 0xFFC00000 0xFFFFFFFF 4MB 64b RCS0 179 * 180 * Flash sectors are laid out as follows. 181 * 182 * Sector Start End Size Comments 183 * ------- ----------- ----------- ------- ----------- 184 * 0 0xFFC00000 0xFFC3FFFF 256KB 185 * 1 0xFFC40000 0xFFC7FFFF 256KB 186 * 2 0xFFC80000 0xFFCBFFFF 256KB 187 * 3 0xFFCC0000 0xFFCFFFFF 256KB 188 * 4 0xFFD00000 0xFFD3FFFF 256KB 189 * 5 0xFFD40000 0xFFD7FFFF 256KB 190 * 6 0xFFD80000 0xFFDBFFFF 256KB 191 * 7 0xFFDC0000 0xFFDFFFFF 256KB 192 * 8 0xFFE00000 0xFFE3FFFF 256KB 193 * 9 0xFFE40000 0xFFE7FFFF 256KB 194 * 10 0xFFE80000 0xFFEBFFFF 256KB 195 * 11 0xFFEC0000 0xFFEFFFFF 256KB 196 * 12 0xFFF00000 0xFFF3FFFF 256KB U-Boot code here 197 * 13 0xFFF40000 0xFFF7FFFF 256KB 198 * 14 0xFFF80000 0xFFFBFFFF 256KB 199 * 15 0xFFFC0000 0xFFFDFFFF 128KB 200 * 16 0xFFFE0000 0xFFFE7FFF 32KB U-Boot env vars here 201 * 17 0xFFFE8000 0xFFFEFFFF 32KB U-Boot backup copy of env vars here 202 * 18 0xFFFF0000 0xFFFFFFFF 64KB 203 */ 204 205 206 /* 207 * SDRAM config - see memory map details above. 208 * 209 * CONFIG_SYS_SDRAM_BASE - Start address of SDRAM, this _must_ be zero! 210 * CONFIG_SYS_SDRAM_SIZE - Total size of contiguous SDRAM bank(s) 211 */ 212 213 #define CONFIG_SYS_SDRAM_BASE 0x00000000 214 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 215 216 217 /* 218 * Flash config - see memory map details above. 219 * 220 * CONFIG_SYS_FLASH_BASE - Start address of flash memory 221 * CONFIG_SYS_FLASH_SIZE - Total size of contiguous flash mem 222 * CONFIG_SYS_FLASH_ERASE_TOUT - Erase timeout in ms 223 * CONFIG_SYS_FLASH_WRITE_TOUT - Write timeout in ms 224 * CONFIG_SYS_MAX_FLASH_BANKS - Number of banks of flash on board 225 * CONFIG_SYS_MAX_FLASH_SECT - Number of sectors in a bank 226 */ 227 228 #define CONFIG_SYS_FLASH_BASE 0xFFC00000 229 #define CONFIG_SYS_FLASH_SIZE 0x00400000 230 #define CONFIG_SYS_FLASH_ERASE_TOUT 250000 231 #define CONFIG_SYS_FLASH_WRITE_TOUT 5000 232 #define CONFIG_SYS_MAX_FLASH_BANKS 1 233 #define CONFIG_SYS_MAX_FLASH_SECT 19 234 235 236 /* 237 * Monitor config - see memory map details above 238 * 239 * CONFIG_SYS_MONITOR_BASE - Base address of monitor code 240 * CONFIG_SYS_MALLOC_LEN - Size of malloc pool (128KB) 241 */ 242 243 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE 244 #define CONFIG_SYS_MALLOC_LEN 0x20000 245 246 247 /* 248 * Command shell settings 249 * 250 * CONFIG_SYS_BARGSIZE - Boot Argument buffer size 251 * CONFIG_SYS_BOOTMAPSZ - Size of app's mapped RAM at boot (Linux=8MB) 252 * CONFIG_SYS_CBSIZE - Console Buffer (input) size 253 * CONFIG_SYS_LOAD_ADDR - Default load address 254 * CONFIG_SYS_LONGHELP - Provide more detailed help 255 * CONFIG_SYS_MAXARGS - Number of args accepted by monitor commands 256 * CONFIG_SYS_MEMTEST_START - Start address of test to run on RAM 257 * CONFIG_SYS_MEMTEST_END - End address of RAM test 258 * CONFIG_SYS_PBSIZE - Print Buffer (output) size 259 * CONFIG_SYS_PROMPT - Prompt string 260 */ 261 262 #define CONFIG_SYS_BARGSIZE 1024 263 #define CONFIG_SYS_BOOTMAPSZ 0x800000 264 #define CONFIG_SYS_CBSIZE 1024 265 #define CONFIG_SYS_LOAD_ADDR 0x100000 266 #define CONFIG_SYS_LONGHELP 267 #define CONFIG_SYS_MAXARGS 16 268 #define CONFIG_SYS_MEMTEST_START 0x00040000 269 #define CONFIG_SYS_MEMTEST_END 0x00040100 270 #define CONFIG_SYS_PBSIZE 1024 271 #define CONFIG_SYS_PROMPT "=> " 272 273 274 /* 275 * Environment config - see memory map details above 276 * 277 * CONFIG_ENV_IS_IN_FLASH - The env variables are stored in flash 278 * CONFIG_ENV_ADDR - Address of the sector containing env vars 279 * CONFIG_ENV_SIZE - Ammount of RAM for env vars (used to save RAM, 4KB) 280 * CONFIG_ENV_SECT_SIZE - Size of sector containing env vars (32KB) 281 */ 282 283 #define CONFIG_ENV_IS_IN_FLASH 1 284 #define CONFIG_ENV_ADDR 0xFFFE0000 285 #define CONFIG_ENV_SIZE 0x1000 286 #define CONFIG_ENV_ADDR_REDUND 0xFFFE8000 287 #define CONFIG_ENV_SIZE_REDUND 0x1000 288 #define CONFIG_ENV_SECT_SIZE 0x8000 289 290 291 /* 292 * Initial RAM config 293 * 294 * Since the main system RAM is initialised very early, we place the INIT_RAM 295 * in the main system RAM just above the exception vectors. The contents are 296 * copied to top of RAM by the init code. 297 * 298 * CONFIG_SYS_INIT_RAM_ADDR - Address of Init RAM, above exception vect 299 * CONFIG_SYS_INIT_RAM_END - Size of Init RAM 300 * CONFIG_SYS_GBL_DATA_SIZE - Ammount of RAM to reserve for global data 301 * CONFIG_SYS_GBL_DATA_OFFSET - Start of global data, top of stack 302 */ 303 304 #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000) 305 #define CONFIG_SYS_INIT_RAM_END 0x4000 306 #define CONFIG_SYS_GBL_DATA_SIZE 128 307 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 308 309 310 /* 311 * Initial BAT config 312 * 313 * BAT0 - System SDRAM 314 * BAT1 - LED's and Serial Port 315 * BAT2 - PCI Memory 316 * BAT3 - PCI I/O including Flash Memory 317 */ 318 319 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) 320 #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_64M | BATU_VS | BATU_VP) 321 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L 322 #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U 323 324 #define CONFIG_SYS_IBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT) 325 #define CONFIG_SYS_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP) 326 #define CONFIG_SYS_DBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 327 #define CONFIG_SYS_DBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP) 328 329 #define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT) 330 #define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) 331 #define CONFIG_SYS_DBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 332 #define CONFIG_SYS_DBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) 333 334 #define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT) 335 #define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) 336 #define CONFIG_SYS_DBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 337 #define CONFIG_SYS_DBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) 338 339 340 /* 341 * Cache config 342 * 343 * CONFIG_SYS_CACHELINE_SIZE - Size of a cache line (CPU specific) 344 * CONFIG_SYS_L2 - L2 cache enabled if defined 345 * L2_INIT - L2 cache init flags 346 * L2_ENABLE - L2 cache enable flags 347 */ 348 349 #define CONFIG_SYS_CACHELINE_SIZE 32 350 #undef CONFIG_SYS_L2 351 #define L2_INIT 0 352 #define L2_ENABLE 0 353 354 355 /* 356 * Clocks config 357 * 358 * CONFIG_SYS_BUS_HZ - Bus clock frequency in Hz 359 * CONFIG_SYS_BUS_CLK - As above (?) 360 * CONFIG_SYS_HZ - Decrementer freq in Hz 361 */ 362 363 #define CONFIG_SYS_BUS_HZ CONFIG_BUS_CLK 364 #define CONFIG_SYS_BUS_CLK CONFIG_BUS_CLK 365 #define CONFIG_SYS_HZ 1000 366 367 368 /* 369 * Serial port config 370 * 371 * CONFIG_SYS_BAUDRATE_TABLE - List of valid baud rates 372 * CONFIG_SYS_NS16550 - Include the NS16550 driver 373 * CONFIG_SYS_NS16550_SERIAL - Include the serial (wrapper) driver 374 * CONFIG_SYS_NS16550_CLK - Frequency of reference clock 375 * CONFIG_SYS_NS16550_REG_SIZE - 64-bit accesses to 8-bit port 376 * CONFIG_SYS_NS16550_COM1 - Base address of 1st serial port 377 */ 378 379 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 380 #define CONFIG_SYS_NS16550 381 #define CONFIG_SYS_NS16550_SERIAL 382 #define CONFIG_SYS_NS16550_CLK 3686400 383 #define CONFIG_SYS_NS16550_REG_SIZE -8 384 #define CONFIG_SYS_NS16550_COM1 0x7C000000 385 386 387 /* 388 * PCI Config - Address Map B (CHRP) 389 */ 390 391 #define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000 392 #define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000 393 #define CONFIG_SYS_PCI_MEMORY_SIZE 0x40000000 394 #define CONFIG_SYS_PCI_MEM_BUS 0x80000000 395 #define CONFIG_SYS_PCI_MEM_PHYS 0x80000000 396 #define CONFIG_SYS_PCI_MEM_SIZE 0x7D000000 397 #define CONFIG_SYS_ISA_MEM_BUS 0x00000000 398 #define CONFIG_SYS_ISA_MEM_PHYS 0xFD000000 399 #define CONFIG_SYS_ISA_MEM_SIZE 0x01000000 400 #define CONFIG_SYS_PCI_IO_BUS 0x00800000 401 #define CONFIG_SYS_PCI_IO_PHYS 0xFE800000 402 #define CONFIG_SYS_PCI_IO_SIZE 0x00400000 403 #define CONFIG_SYS_ISA_IO_BUS 0x00000000 404 #define CONFIG_SYS_ISA_IO_PHYS 0xFE000000 405 #define CONFIG_SYS_ISA_IO_SIZE 0x00800000 406 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_ISA_IO_PHYS 407 #define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_PHYS 408 #define CONFIG_SYS_60X_PCI_IO_OFFSET CONFIG_SYS_ISA_IO_PHYS 409 410 411 /* 412 * Extra init functions 413 * 414 * CONFIG_SYS_BOARD_ASM_INIT - Call assembly init code 415 */ 416 417 #define CONFIG_SYS_BOARD_ASM_INIT 418 419 420 /* 421 * Boot flags 422 * 423 * BOOTFLAG_COLD - Indicates a power-on boot 424 * BOOTFLAG_WARM - Indicates a software reset 425 */ 426 427 #define BOOTFLAG_COLD 0x01 428 #define BOOTFLAG_WARM 0x02 429 430 431 #endif /* __CONFIG_H */ 432