1 #ifndef _HERMON_H 2 #define _HERMON_H 3 4 /** @file 5 * 6 * Mellanox Hermon Infiniband HCA driver 7 * 8 */ 9 10 FILE_LICENCE ( GPL2_OR_LATER ); 11 12 #include <stdint.h> 13 #include <ipxe/uaccess.h> 14 #include <ipxe/ib_packet.h> 15 #include <ipxe/bofm.h> 16 #include <ipxe/nvsvpd.h> 17 #include <ipxe/nvo.h> 18 #include "mlx_bitops.h" 19 #include "MT25408_PRM.h" 20 21 /* 22 * Hardware constants 23 * 24 */ 25 26 /* Ports in existence */ 27 #define HERMON_MAX_PORTS 2 28 #define HERMON_PORT_BASE 1 29 30 /* PCI BARs */ 31 #define HERMON_PCI_CONFIG_BAR PCI_BASE_ADDRESS_0 32 #define HERMON_PCI_CONFIG_BAR_SIZE 0x100000 33 #define HERMON_PCI_UAR_BAR PCI_BASE_ADDRESS_2 34 35 /* Device reset */ 36 #define HERMON_RESET_OFFSET 0x0f0010 37 #define HERMON_RESET_MAGIC 0x01000000UL 38 #define HERMON_RESET_WAIT_TIME_MS 1000 39 40 /* Work queue entry and completion queue entry opcodes */ 41 #define HERMON_OPCODE_NOP 0x00 42 #define HERMON_OPCODE_SEND 0x0a 43 #define HERMON_OPCODE_RECV_ERROR 0xfe 44 #define HERMON_OPCODE_SEND_ERROR 0xff 45 46 /* HCA command register opcodes */ 47 #define HERMON_HCR_QUERY_DEV_CAP 0x0003 48 #define HERMON_HCR_QUERY_FW 0x0004 49 #define HERMON_HCR_INIT_HCA 0x0007 50 #define HERMON_HCR_CLOSE_HCA 0x0008 51 #define HERMON_HCR_INIT_PORT 0x0009 52 #define HERMON_HCR_CLOSE_PORT 0x000a 53 #define HERMON_HCR_SET_PORT 0x000c 54 #define HERMON_HCR_SW2HW_MPT 0x000d 55 #define HERMON_HCR_WRITE_MTT 0x0011 56 #define HERMON_HCR_MAP_EQ 0x0012 57 #define HERMON_HCR_SW2HW_EQ 0x0013 58 #define HERMON_HCR_HW2SW_EQ 0x0014 59 #define HERMON_HCR_QUERY_EQ 0x0015 60 #define HERMON_HCR_SW2HW_CQ 0x0016 61 #define HERMON_HCR_HW2SW_CQ 0x0017 62 #define HERMON_HCR_QUERY_CQ 0x0018 63 #define HERMON_HCR_RST2INIT_QP 0x0019 64 #define HERMON_HCR_INIT2RTR_QP 0x001a 65 #define HERMON_HCR_RTR2RTS_QP 0x001b 66 #define HERMON_HCR_RTS2RTS_QP 0x001c 67 #define HERMON_HCR_2RST_QP 0x0021 68 #define HERMON_HCR_QUERY_QP 0x0022 69 #define HERMON_HCR_CONF_SPECIAL_QP 0x0023 70 #define HERMON_HCR_MAD_IFC 0x0024 71 #define HERMON_HCR_READ_MCG 0x0025 72 #define HERMON_HCR_WRITE_MCG 0x0026 73 #define HERMON_HCR_MGID_HASH 0x0027 74 #define HERMON_HCR_MOD_STAT_CFG 0x0034 75 #define HERMON_HCR_QUERY_PORT 0x0043 76 #define HERMON_HCR_SENSE_PORT 0x004d 77 #define HERMON_HCR_RUN_FW 0x0ff6 78 #define HERMON_HCR_DISABLE_LAM 0x0ff7 79 #define HERMON_HCR_ENABLE_LAM 0x0ff8 80 #define HERMON_HCR_UNMAP_ICM 0x0ff9 81 #define HERMON_HCR_MAP_ICM 0x0ffa 82 #define HERMON_HCR_UNMAP_ICM_AUX 0x0ffb 83 #define HERMON_HCR_MAP_ICM_AUX 0x0ffc 84 #define HERMON_HCR_SET_ICM_SIZE 0x0ffd 85 #define HERMON_HCR_UNMAP_FA 0x0ffe 86 #define HERMON_HCR_MAP_FA 0x0fff 87 88 /* Service types */ 89 #define HERMON_ST_RC 0x00 90 #define HERMON_ST_UD 0x03 91 #define HERMON_ST_MLX 0x07 92 93 /* Port types */ 94 #define HERMON_PORT_TYPE_UNKNOWN 0 95 #define HERMON_PORT_TYPE_IB 1 96 #define HERMON_PORT_TYPE_ETH 2 97 98 /* MTUs */ 99 #define HERMON_MTU_2048 0x04 100 #define HERMON_MTU_ETH 0x07 101 102 #define HERMON_INVALID_LKEY 0x00000100UL 103 104 #define HERMON_PAGE_SIZE ( ( size_t ) 4096 ) 105 106 #define HERMON_DB_POST_SND_OFFSET 0x14 107 #define HERMON_DB_EQ_OFFSET(_eqn) \ 108 ( 0x800 + HERMON_PAGE_SIZE * ( (_eqn) / 4 ) + 0x08 * ( (_eqn) % 4 ) ) 109 110 #define HERMON_QP_OPT_PARAM_PM_STATE 0x00000400UL 111 #define HERMON_QP_OPT_PARAM_QKEY 0x00000020UL 112 #define HERMON_QP_OPT_PARAM_ALT_PATH 0x00000001UL 113 114 #define HERMON_MAP_EQ ( 0UL << 31 ) 115 #define HERMON_UNMAP_EQ ( 1UL << 31 ) 116 117 #define HERMON_SET_PORT_GENERAL_PARAM 0x0000 118 #define HERMON_SET_PORT_RECEIVE_QP 0x0100 119 #define HERMON_SET_PORT_MAC_TABLE 0x0200 120 #define HERMON_SET_PORT_VLAN_TABLE 0x0300 121 #define HERMON_SET_PORT_PRIORITY_TABLE 0x0400 122 #define HERMON_SET_PORT_GID_TABLE 0x0500 123 124 #define HERMON_EV_PORT_STATE_CHANGE 0x09 125 126 #define HERMON_SCHED_QP0 0x3f 127 #define HERMON_SCHED_DEFAULT 0x83 128 129 #define HERMON_LOG_MULTICAST_HASH_SIZE 7 130 131 #define HERMON_PM_STATE_ARMED 0x00 132 #define HERMON_PM_STATE_REARM 0x01 133 #define HERMON_PM_STATE_MIGRATED 0x03 134 135 #define HERMON_RETRY_MAX 0x07 136 137 #define HERMON_MOD_STAT_CFG_SET 0x01 138 #define HERMON_MOD_STAT_CFG_QUERY 0x03 139 140 #define HERMON_VPD_FIELD( port ) \ 141 PCI_VPD_FIELD ( PCI_VPD_TAG_RW, 'V', ( '5' + (port) - 1 ) ) 142 143 /* 144 * Datatypes that seem to be missing from the autogenerated documentation 145 * 146 */ 147 struct hermonprm_mgm_hash_st { 148 pseudo_bit_t reserved0[0x00020]; 149 /* -------------- */ 150 pseudo_bit_t hash[0x00010]; 151 pseudo_bit_t reserved1[0x00010]; 152 } __attribute__ (( packed )); 153 154 struct hermonprm_mcg_entry_st { 155 struct hermonprm_mcg_hdr_st hdr; 156 struct hermonprm_mcg_qp_dw_st qp[8]; 157 } __attribute__ (( packed )); 158 159 struct hermonprm_cq_db_record_st { 160 pseudo_bit_t update_ci[0x00018]; 161 pseudo_bit_t reserved0[0x00008]; 162 /* -------------- */ 163 pseudo_bit_t arm_ci[0x00018]; 164 pseudo_bit_t cmd[0x00003]; 165 pseudo_bit_t reserved1[0x00001]; 166 pseudo_bit_t cmd_sn[0x00002]; 167 pseudo_bit_t reserved2[0x00002]; 168 } __attribute__ (( packed )); 169 170 struct hermonprm_send_db_register_st { 171 pseudo_bit_t reserved[0x00008]; 172 pseudo_bit_t qn[0x00018]; 173 } __attribute__ (( packed )); 174 175 struct hermonprm_event_db_register_st { 176 pseudo_bit_t ci[0x00018]; 177 pseudo_bit_t reserver[0x00007]; 178 pseudo_bit_t a[0x00001]; 179 } __attribute__ (( packed )); 180 181 struct hermonprm_scalar_parameter_st { 182 pseudo_bit_t value_hi[0x00020]; 183 /* -------------- */ 184 pseudo_bit_t value[0x00020]; 185 } __attribute__ (( packed )); 186 187 struct hermonprm_event_mask_st { 188 pseudo_bit_t reserved0[0x00020]; 189 /* -------------- */ 190 pseudo_bit_t completion[0x00001]; 191 pseudo_bit_t path_migration_succeeded[0x00001]; 192 pseudo_bit_t communication_established[0x00001]; 193 pseudo_bit_t send_queue_drained[0x00001]; 194 pseudo_bit_t cq_error[0x00001]; 195 pseudo_bit_t wq_catastrophe[0x00001]; 196 pseudo_bit_t qpc_catastrophe[0x00001]; 197 pseudo_bit_t path_migration_failed[0x00001]; 198 pseudo_bit_t internal_error[0x00001]; 199 pseudo_bit_t port_state_change[0x00001]; 200 pseudo_bit_t command_done[0x00001]; 201 pseudo_bit_t fexch_error[0x00001]; 202 pseudo_bit_t reserved1[0x00004]; 203 pseudo_bit_t wq_invalid_request[0x00001]; 204 pseudo_bit_t wq_access_violation[0x00001]; 205 pseudo_bit_t srq_catastrophe[0x00001]; 206 pseudo_bit_t srq_last_wqe[0x00001]; 207 pseudo_bit_t srq_rq_limit[0x00001]; 208 pseudo_bit_t gpio[0x00001]; 209 pseudo_bit_t clientreregister[0x00001]; 210 pseudo_bit_t reserved2[0x00009]; 211 } __attribute__ (( packed )); 212 213 struct hermonprm_port_state_change_event_st { 214 pseudo_bit_t reserved[0x00020]; 215 /* -------------- */ 216 struct hermonprm_port_state_change_st data; 217 } __attribute__ (( packed )); 218 219 struct hermonprm_sense_port_st { 220 pseudo_bit_t reserved0[0x00020]; 221 /* -------------- */ 222 pseudo_bit_t port_type[0x00002]; 223 pseudo_bit_t reserved1[0x0001e]; 224 } __attribute__ (( packed )); 225 226 struct hermonprm_set_port_ib_st { 227 pseudo_bit_t rqk[0x00001]; 228 pseudo_bit_t rcm[0x00001]; 229 pseudo_bit_t reserved0[0x00002]; 230 pseudo_bit_t vl_cap[0x00004]; 231 pseudo_bit_t reserved1[0x00004]; 232 pseudo_bit_t mtu_cap[0x00004]; 233 pseudo_bit_t g0[0x00001]; 234 pseudo_bit_t ng[0x00001]; 235 pseudo_bit_t sig[0x00001]; 236 pseudo_bit_t mg[0x00001]; 237 pseudo_bit_t mp[0x00001]; 238 pseudo_bit_t mvc[0x00001]; 239 pseudo_bit_t mmc[0x00001]; 240 pseudo_bit_t reserved2[0x00004]; 241 pseudo_bit_t lws[0x00001]; 242 pseudo_bit_t lss[0x00001]; 243 pseudo_bit_t reserved3[0x00003]; 244 /* -------------- */ 245 pseudo_bit_t capability_mask[0x00020]; 246 /* -------------- */ 247 pseudo_bit_t system_image_guid_h[0x00020]; 248 /* -------------- */ 249 pseudo_bit_t system_image_guid_l[0x00020]; 250 /* -------------- */ 251 pseudo_bit_t guid0_h[0x00020]; 252 /* -------------- */ 253 pseudo_bit_t guid0_l[0x00020]; 254 /* -------------- */ 255 pseudo_bit_t node_guid_h[0x00020]; 256 /* -------------- */ 257 pseudo_bit_t node_guid_l[0x00020]; 258 /* -------------- */ 259 pseudo_bit_t egress_sniff_qpn[0x00018]; 260 pseudo_bit_t egress_sniff_mode[0x00002]; 261 pseudo_bit_t reserved4[0x00006]; 262 /* -------------- */ 263 pseudo_bit_t ingress_sniff_qpn[0x00018]; 264 pseudo_bit_t ingress_sniff_mode[0x00002]; 265 pseudo_bit_t reserved5[0x00006]; 266 /* -------------- */ 267 pseudo_bit_t max_gid[0x00010]; 268 pseudo_bit_t max_pkey[0x00010]; 269 /* -------------- */ 270 pseudo_bit_t reserved6[0x00020]; 271 /* -------------- */ 272 pseudo_bit_t reserved7[0x00020]; 273 /* -------------- */ 274 pseudo_bit_t reserved8[0x00020]; 275 /* -------------- */ 276 pseudo_bit_t reserved9[0x00020]; 277 /* -------------- */ 278 pseudo_bit_t reserved10[0x00020]; 279 /* -------------- */ 280 pseudo_bit_t reserved11[0x00020]; 281 /* -------------- */ 282 pseudo_bit_t reserved12[0x00020]; 283 /* -------------- */ 284 pseudo_bit_t reserved13[0x00020]; 285 /* -------------- */ 286 pseudo_bit_t reserved14[0x00020]; 287 /* -------------- */ 288 pseudo_bit_t reserved15[0x00020]; 289 /* -------------- */ 290 pseudo_bit_t reserved16[0x00020]; 291 /* -------------- */ 292 pseudo_bit_t reserved17[0x00020]; 293 /* -------------- */ 294 pseudo_bit_t reserved18[0x00020]; 295 /* -------------- */ 296 pseudo_bit_t reserved19[0x00020]; 297 /* -------------- */ 298 pseudo_bit_t reserved20[0x00020]; 299 /* -------------- */ 300 pseudo_bit_t reserved21[0x00020]; 301 /* -------------- */ 302 pseudo_bit_t reserved22[0x00020]; 303 /* -------------- */ 304 pseudo_bit_t link_width_supported[0x00004]; 305 pseudo_bit_t link_speed_supported[0x00004]; 306 pseudo_bit_t reserved23[0x00018]; 307 /* -------------- */ 308 } __attribute__ (( packed )); 309 310 struct hermonprm_query_port_cap_st { 311 pseudo_bit_t eth_mtu[0x00010]; 312 pseudo_bit_t ib_mtu[0x00004]; 313 pseudo_bit_t reserved0[0x00004]; 314 pseudo_bit_t ib[0x00001]; 315 pseudo_bit_t eth[0x00001]; 316 pseudo_bit_t reserved1[0x00005]; 317 pseudo_bit_t link_state[0x00001]; 318 /* -------------- */ 319 pseudo_bit_t log_max_pkey[0x00004]; 320 pseudo_bit_t log_max_gid[0x00004]; 321 pseudo_bit_t ib_port_width[0x00004]; 322 pseudo_bit_t reserved2[0x00004]; 323 pseudo_bit_t eth_link_speed[0x00004]; 324 pseudo_bit_t reserved3[0x00004]; 325 pseudo_bit_t ib_link_speed[0x00004]; 326 pseudo_bit_t reserved4[0x00004]; 327 /* -------------- */ 328 pseudo_bit_t max_vl_ib[0x00004]; 329 pseudo_bit_t reserved5[0x00004]; 330 pseudo_bit_t log_max_mac[0x00004]; 331 pseudo_bit_t log_max_vlan[0x00004]; 332 pseudo_bit_t reserved6[0x00010]; 333 /* -------------- */ 334 pseudo_bit_t reserved7[0x00020]; 335 /* -------------- */ 336 pseudo_bit_t mac_47_32[0x00010]; 337 pseudo_bit_t reserved8[0x00010]; 338 /* -------------- */ 339 pseudo_bit_t mac_31_0[0x00020]; 340 /* -------------- */ 341 pseudo_bit_t vendor_oui[0x00018]; 342 pseudo_bit_t transceiver_type[0x00008]; 343 /* -------------- */ 344 pseudo_bit_t reserved9[0x00010]; 345 pseudo_bit_t wavelength[0x00010]; 346 /* -------------- */ 347 pseudo_bit_t transceiver_code_hi[0x00020]; 348 /* -------------- */ 349 pseudo_bit_t transceiver_code_lo[0x00020]; 350 /* -------------- */ 351 pseudo_bit_t reserved10[0x000c0]; 352 } __attribute__ (( packed )); 353 354 struct hermonprm_set_port_general_context_st { 355 pseudo_bit_t v_mtu[0x00001]; 356 pseudo_bit_t v_pprx[0x00001]; 357 pseudo_bit_t v_pptx[0x00001]; 358 pseudo_bit_t reserved0[0x0001d]; 359 /* -------------- */ 360 pseudo_bit_t mtu[0x00010]; 361 pseudo_bit_t reserved1[0x00010]; 362 /* -------------- */ 363 pseudo_bit_t reserved2[0x00010]; 364 pseudo_bit_t pfctx[0x00008]; 365 pseudo_bit_t reserved3[0x00007]; 366 pseudo_bit_t pptx[0x00001]; 367 /* -------------- */ 368 pseudo_bit_t reserved4[0x00010]; 369 pseudo_bit_t pfcrx[0x00008]; 370 pseudo_bit_t reserved5[0x00007]; 371 pseudo_bit_t pprx[0x00001]; 372 /* -------------- */ 373 } __attribute__ (( packed )); 374 375 struct hermonprm_set_port_rqp_calc_st { 376 pseudo_bit_t base_qpn[0x00018]; 377 pseudo_bit_t reserved0[0x00008]; 378 /* -------------- */ 379 pseudo_bit_t n_p[0x00002]; 380 pseudo_bit_t reserved1[0x00006]; 381 pseudo_bit_t n_v[0x00003]; 382 pseudo_bit_t reserved2[0x00005]; 383 pseudo_bit_t n_m[0x00004]; 384 pseudo_bit_t reserved3[0x0000c]; 385 /* -------------- */ 386 pseudo_bit_t mac_miss_index[0x00008]; 387 pseudo_bit_t reserved4[0x00018]; 388 /* -------------- */ 389 pseudo_bit_t vlan_miss_index[0x00007]; 390 pseudo_bit_t reserved5[0x00008]; 391 pseudo_bit_t intra_miss[0x00001]; 392 pseudo_bit_t no_vlan_index[0x00007]; 393 pseudo_bit_t reserved6[0x00008]; 394 pseudo_bit_t intra_no_vlan[0x00001]; 395 /* -------------- */ 396 pseudo_bit_t no_vlan_prio[0x00003]; 397 pseudo_bit_t reserved7[0x0001d]; 398 /* -------------- */ 399 pseudo_bit_t promisc_qpn[0x00018]; 400 pseudo_bit_t reserved8[0x00007]; 401 pseudo_bit_t en_uc_promisc[0x00001]; 402 /* -------------- */ 403 pseudo_bit_t def_mcast_qpn[0x00018]; 404 pseudo_bit_t reserved9[0x00005]; 405 pseudo_bit_t mc_by_vlan[0x00001]; 406 pseudo_bit_t mc_promisc_mode[0x00002]; 407 /* -------------- */ 408 pseudo_bit_t reserved10[0x00020]; 409 /* -------------- */ 410 } __attribute__ (( packed )); 411 412 struct hermonprm_set_port_mac_table_st { 413 pseudo_bit_t mac_h[0x00010]; 414 pseudo_bit_t reserved0[0x0000f]; 415 pseudo_bit_t v[0x00001]; 416 /* -------------- */ 417 pseudo_bit_t mac_l[0x00020]; 418 /* -------------- */ 419 } __attribute__ (( packed )); 420 421 struct hermonprm_set_port_vlan_st { 422 pseudo_bit_t vlan_id[0x0000c]; 423 pseudo_bit_t reserved0[0x00012]; 424 pseudo_bit_t intra[0x00001]; 425 pseudo_bit_t v[0x00001]; 426 /* -------------- */ 427 } __attribute__ (( packed )); 428 429 struct hermonprm_mod_stat_cfg_input_mod_st { 430 pseudo_bit_t offset[0x00008]; 431 pseudo_bit_t portnum[0x00008]; 432 pseudo_bit_t xnum[0x00004]; 433 pseudo_bit_t linkspeed[0x00003]; 434 pseudo_bit_t autoneg[0x00001]; 435 pseudo_bit_t reserved[0x00004]; 436 pseudo_bit_t setup_mode[0x00004]; 437 } __attribute__ (( packed )); 438 439 /* 440 * Wrapper structures for hardware datatypes 441 * 442 */ 443 444 struct MLX_DECLARE_STRUCT ( hermonprm_completion_queue_context ); 445 struct MLX_DECLARE_STRUCT ( hermonprm_completion_queue_entry ); 446 struct MLX_DECLARE_STRUCT ( hermonprm_completion_with_error ); 447 struct MLX_DECLARE_STRUCT ( hermonprm_cq_db_record ); 448 struct MLX_DECLARE_STRUCT ( hermonprm_eqc ); 449 struct MLX_DECLARE_STRUCT ( hermonprm_event_db_register ); 450 struct MLX_DECLARE_STRUCT ( hermonprm_event_mask ); 451 struct MLX_DECLARE_STRUCT ( hermonprm_event_queue_entry ); 452 struct MLX_DECLARE_STRUCT ( hermonprm_hca_command_register ); 453 struct MLX_DECLARE_STRUCT ( hermonprm_init_hca ); 454 struct MLX_DECLARE_STRUCT ( hermonprm_mad_ifc ); 455 struct MLX_DECLARE_STRUCT ( hermonprm_mcg_entry ); 456 struct MLX_DECLARE_STRUCT ( hermonprm_mgm_hash ); 457 struct MLX_DECLARE_STRUCT ( hermonprm_mod_stat_cfg ); 458 struct MLX_DECLARE_STRUCT ( hermonprm_mod_stat_cfg_input_mod ); 459 struct MLX_DECLARE_STRUCT ( hermonprm_mpt ); 460 struct MLX_DECLARE_STRUCT ( hermonprm_mtt ); 461 struct MLX_DECLARE_STRUCT ( hermonprm_port_state_change_event ); 462 struct MLX_DECLARE_STRUCT ( hermonprm_qp_db_record ); 463 struct MLX_DECLARE_STRUCT ( hermonprm_qp_ee_state_transitions ); 464 struct MLX_DECLARE_STRUCT ( hermonprm_query_dev_cap ); 465 struct MLX_DECLARE_STRUCT ( hermonprm_query_fw ); 466 struct MLX_DECLARE_STRUCT ( hermonprm_query_port_cap ); 467 struct MLX_DECLARE_STRUCT ( hermonprm_queue_pair_ee_context_entry ); 468 struct MLX_DECLARE_STRUCT ( hermonprm_scalar_parameter ); 469 struct MLX_DECLARE_STRUCT ( hermonprm_sense_port ); 470 struct MLX_DECLARE_STRUCT ( hermonprm_send_db_register ); 471 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_ib ); 472 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_general_context ); 473 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_mac_table ); 474 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_rqp_calc ); 475 struct MLX_DECLARE_STRUCT ( hermonprm_set_port_vlan ); 476 struct MLX_DECLARE_STRUCT ( hermonprm_ud_address_vector ); 477 struct MLX_DECLARE_STRUCT ( hermonprm_virtual_physical_mapping ); 478 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ctrl_mlx ); 479 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ctrl_send ); 480 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_data_ptr ); 481 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ud ); 482 483 /* 484 * Composite hardware datatypes 485 * 486 */ 487 488 struct hermonprm_write_mtt { 489 struct hermonprm_scalar_parameter mtt_base_addr; 490 struct hermonprm_scalar_parameter reserved; 491 struct hermonprm_mtt mtt; 492 } __attribute__ (( packed )); 493 494 #define HERMON_MAX_GATHER 2 495 496 struct hermonprm_ud_send_wqe { 497 struct hermonprm_wqe_segment_ctrl_send ctrl; 498 struct hermonprm_wqe_segment_ud ud; 499 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER]; 500 } __attribute__ (( packed )); 501 502 struct hermonprm_mlx_send_wqe { 503 struct hermonprm_wqe_segment_ctrl_mlx ctrl; 504 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER]; 505 uint8_t headers[IB_MAX_HEADER_SIZE]; 506 } __attribute__ (( packed )); 507 508 struct hermonprm_rc_send_wqe { 509 struct hermonprm_wqe_segment_ctrl_send ctrl; 510 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER]; 511 } __attribute__ (( packed )); 512 513 struct hermonprm_eth_send_wqe { 514 struct hermonprm_wqe_segment_ctrl_send ctrl; 515 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER]; 516 } __attribute__ (( packed )); 517 518 #define HERMON_MAX_SCATTER 2 519 520 struct hermonprm_recv_wqe { 521 struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_SCATTER]; 522 } __attribute__ (( packed )); 523 524 union hermonprm_completion_entry { 525 struct hermonprm_completion_queue_entry normal; 526 struct hermonprm_completion_with_error error; 527 } __attribute__ (( packed )); 528 529 union hermonprm_event_entry { 530 struct hermonprm_event_queue_entry generic; 531 struct hermonprm_port_state_change_event port_state_change; 532 } __attribute__ (( packed )); 533 534 union hermonprm_doorbell_register { 535 struct hermonprm_send_db_register send; 536 struct hermonprm_event_db_register event; 537 uint32_t dword[1]; 538 } __attribute__ (( packed )); 539 540 union hermonprm_mad { 541 struct hermonprm_mad_ifc ifc; 542 union ib_mad mad; 543 } __attribute__ (( packed )); 544 545 union hermonprm_set_port { 546 struct hermonprm_set_port_ib ib; 547 struct hermonprm_set_port_general_context general; 548 struct hermonprm_set_port_rqp_calc rqp_calc; 549 struct hermonprm_set_port_mac_table mac_table[128]; 550 struct hermonprm_set_port_vlan vlan; 551 } __attribute__ (( packed )); 552 553 /* 554 * iPXE-specific definitions 555 * 556 */ 557 558 /** Hermon device capabilitiess */ 559 struct hermon_dev_cap { 560 /** CMPT entry size */ 561 size_t cmpt_entry_size; 562 /** Number of reserved QPs */ 563 unsigned int reserved_qps; 564 /** QP context entry size */ 565 size_t qpc_entry_size; 566 /** Alternate path context entry size */ 567 size_t altc_entry_size; 568 /** Auxiliary context entry size */ 569 size_t auxc_entry_size; 570 /** Number of reserved SRQs */ 571 unsigned int reserved_srqs; 572 /** SRQ context entry size */ 573 size_t srqc_entry_size; 574 /** Number of reserved CQs */ 575 unsigned int reserved_cqs; 576 /** CQ context entry size */ 577 size_t cqc_entry_size; 578 /** Number of reserved EQs */ 579 unsigned int reserved_eqs; 580 /** EQ context entry size */ 581 size_t eqc_entry_size; 582 /** Number of reserved MTTs */ 583 unsigned int reserved_mtts; 584 /** MTT entry size */ 585 size_t mtt_entry_size; 586 /** Number of reserved MRWs */ 587 unsigned int reserved_mrws; 588 /** DMPT entry size */ 589 size_t dmpt_entry_size; 590 /** Number of reserved UARs */ 591 unsigned int reserved_uars; 592 /** Number of ports */ 593 unsigned int num_ports; 594 /** Dual-port different protocol */ 595 int dpdp; 596 }; 597 598 /** Number of cMPT entries of each type */ 599 #define HERMON_CMPT_MAX_ENTRIES ( 1 << 24 ) 600 601 /** Hermon ICM memory map entry */ 602 struct hermon_icm_map { 603 /** Offset (virtual address within ICM) */ 604 uint64_t offset; 605 /** Length */ 606 size_t len; 607 }; 608 609 /** Discontiguous regions within Hermon ICM */ 610 enum hermon_icm_map_regions { 611 HERMON_ICM_QP_CMPT = 0, 612 HERMON_ICM_SRQ_CMPT, 613 HERMON_ICM_CQ_CMPT, 614 HERMON_ICM_EQ_CMPT, 615 HERMON_ICM_OTHER, 616 HERMON_ICM_NUM_REGIONS 617 }; 618 619 /** UAR page for doorbell accesses 620 * 621 * Pages 0-127 are reserved for event queue doorbells only, so we use 622 * page 128. 623 */ 624 #define HERMON_UAR_NON_EQ_PAGE 128 625 626 /** Maximum number of allocatable MTT entries 627 * 628 * This is a policy decision, not a device limit. 629 */ 630 #define HERMON_MAX_MTTS 64 631 632 /** A Hermon MTT descriptor */ 633 struct hermon_mtt { 634 /** MTT offset */ 635 unsigned int mtt_offset; 636 /** Number of pages */ 637 unsigned int num_pages; 638 /** MTT base address */ 639 unsigned int mtt_base_addr; 640 /** Offset within page */ 641 unsigned int page_offset; 642 }; 643 644 /** Alignment of Hermon send work queue entries */ 645 #define HERMON_SEND_WQE_ALIGN 128 646 647 /** A Hermon send work queue entry */ 648 union hermon_send_wqe { 649 struct hermonprm_wqe_segment_ctrl_send ctrl; 650 struct hermonprm_ud_send_wqe ud; 651 struct hermonprm_mlx_send_wqe mlx; 652 struct hermonprm_rc_send_wqe rc; 653 struct hermonprm_eth_send_wqe eth; 654 uint8_t force_align[HERMON_SEND_WQE_ALIGN]; 655 } __attribute__ (( packed )); 656 657 /** A Hermon send work queue */ 658 struct hermon_send_work_queue { 659 /** Number of work queue entries, including headroom 660 * 661 * Hermon requires us to leave unused space within the send 662 * WQ, so we create a send WQ with more entries than are 663 * requested in the create_qp() call. 664 */ 665 unsigned int num_wqes; 666 /** Work queue entries */ 667 union hermon_send_wqe *wqe; 668 /** Size of work queue */ 669 size_t wqe_size; 670 /** Doorbell register */ 671 void *doorbell; 672 }; 673 674 /** Alignment of Hermon receive work queue entries */ 675 #define HERMON_RECV_WQE_ALIGN 16 676 677 /** A Hermon receive work queue entry */ 678 union hermon_recv_wqe { 679 struct hermonprm_recv_wqe recv; 680 uint8_t force_align[HERMON_RECV_WQE_ALIGN]; 681 } __attribute__ (( packed )); 682 683 /** A Hermon receive work queue */ 684 struct hermon_recv_work_queue { 685 /** Work queue entries */ 686 union hermon_recv_wqe *wqe; 687 /** Size of work queue */ 688 size_t wqe_size; 689 /** GRH buffers (if applicable) */ 690 struct ib_global_route_header *grh; 691 /** Size of GRH buffers */ 692 size_t grh_size; 693 /** Doorbell record */ 694 struct hermonprm_qp_db_record *doorbell; 695 }; 696 697 /** Number of special queue pairs */ 698 #define HERMON_NUM_SPECIAL_QPS 8 699 700 /** Number of queue pairs reserved for the "special QP" block 701 * 702 * The special QPs must be within a contiguous block aligned on its 703 * own size. 704 */ 705 #define HERMON_RSVD_SPECIAL_QPS ( ( HERMON_NUM_SPECIAL_QPS << 1 ) - 1 ) 706 707 /** Maximum number of allocatable queue pairs 708 * 709 * This is a policy decision, not a device limit. 710 */ 711 #define HERMON_MAX_QPS 8 712 713 /** Queue pair number randomisation mask */ 714 #define HERMON_QPN_RANDOM_MASK 0xfff000 715 716 /** Hermon queue pair state */ 717 enum hermon_queue_pair_state { 718 HERMON_QP_ST_RST = 0, 719 HERMON_QP_ST_INIT, 720 HERMON_QP_ST_RTR, 721 HERMON_QP_ST_RTS, 722 }; 723 724 /** A Hermon queue pair */ 725 struct hermon_queue_pair { 726 /** Work queue buffer */ 727 void *wqe; 728 /** Size of work queue buffer */ 729 size_t wqe_size; 730 /** MTT descriptor */ 731 struct hermon_mtt mtt; 732 /** Send work queue */ 733 struct hermon_send_work_queue send; 734 /** Receive work queue */ 735 struct hermon_recv_work_queue recv; 736 /** Queue state */ 737 enum hermon_queue_pair_state state; 738 }; 739 740 /** Maximum number of allocatable completion queues 741 * 742 * This is a policy decision, not a device limit. 743 */ 744 #define HERMON_MAX_CQS 8 745 746 /** A Hermon completion queue */ 747 struct hermon_completion_queue { 748 /** Completion queue entries */ 749 union hermonprm_completion_entry *cqe; 750 /** Size of completion queue */ 751 size_t cqe_size; 752 /** MTT descriptor */ 753 struct hermon_mtt mtt; 754 /** Doorbell record */ 755 struct hermonprm_cq_db_record *doorbell; 756 }; 757 758 /** Maximum number of allocatable event queues 759 * 760 * This is a policy decision, not a device limit. 761 */ 762 #define HERMON_MAX_EQS 8 763 764 /** A Hermon event queue */ 765 struct hermon_event_queue { 766 /** Event queue entries */ 767 union hermonprm_event_entry *eqe; 768 /** Size of event queue */ 769 size_t eqe_size; 770 /** MTT descriptor */ 771 struct hermon_mtt mtt; 772 /** Event queue number */ 773 unsigned long eqn; 774 /** Next event queue entry index */ 775 unsigned long next_idx; 776 /** Doorbell register */ 777 void *doorbell; 778 }; 779 780 /** Number of event queue entries 781 * 782 * This is a policy decision. 783 */ 784 #define HERMON_NUM_EQES 8 785 786 /** A Hermon resource bitmask */ 787 typedef uint32_t hermon_bitmask_t; 788 789 /** Size of a hermon resource bitmask */ 790 #define HERMON_BITMASK_SIZE(max_entries) \ 791 ( ( (max_entries) + ( 8 * sizeof ( hermon_bitmask_t ) ) - 1 ) / \ 792 ( 8 * sizeof ( hermon_bitmask_t ) ) ) 793 794 struct hermon; 795 struct hermon_port; 796 797 /** A Hermon port type */ 798 struct hermon_port_type { 799 /** Register port 800 * 801 * @v hermon Hermon device 802 * @v port Hermon port 803 * @ret rc Return status code 804 */ 805 int ( * register_dev ) ( struct hermon *hermon, 806 struct hermon_port *port ); 807 /** Port state changed 808 * 809 * @v hermon Hermon device 810 * @v port Hermon port 811 * @v link_up Link is up 812 */ 813 void ( * state_change ) ( struct hermon *hermon, 814 struct hermon_port *port, 815 int link_up ); 816 /** Unregister port 817 * 818 * @v hermon Hermon device 819 * @v port Hermon port 820 */ 821 void ( * unregister_dev ) ( struct hermon *hermon, 822 struct hermon_port *port ); 823 }; 824 825 /** A Hermon port */ 826 struct hermon_port { 827 /** Infiniband device */ 828 struct ib_device *ibdev; 829 /** Network device */ 830 struct net_device *netdev; 831 /** Ethernet completion queue */ 832 struct ib_completion_queue *eth_cq; 833 /** Ethernet queue pair */ 834 struct ib_queue_pair *eth_qp; 835 /** Port type */ 836 struct hermon_port_type *type; 837 /** Non-volatile option storage */ 838 struct nvo_block nvo; 839 }; 840 841 /** A Hermon device */ 842 struct hermon { 843 /** PCI device */ 844 struct pci_device *pci; 845 /** PCI configuration registers */ 846 void *config; 847 /** PCI user Access Region */ 848 void *uar; 849 850 /** Command toggle */ 851 unsigned int toggle; 852 /** Command input mailbox */ 853 void *mailbox_in; 854 /** Command output mailbox */ 855 void *mailbox_out; 856 857 /** Device open request counter */ 858 unsigned int open_count; 859 860 /** Firmware size */ 861 size_t firmware_len; 862 /** Firmware area in external memory 863 * 864 * This is allocated when first needed, and freed only on 865 * final teardown, in order to avoid memory map changes at 866 * runtime. 867 */ 868 userptr_t firmware_area; 869 /** ICM map */ 870 struct hermon_icm_map icm_map[HERMON_ICM_NUM_REGIONS]; 871 /** ICM size */ 872 size_t icm_len; 873 /** ICM AUX size */ 874 size_t icm_aux_len; 875 /** ICM area 876 * 877 * This is allocated when first needed, and freed only on 878 * final teardown, in order to avoid memory map changes at 879 * runtime. 880 */ 881 userptr_t icm; 882 883 /** Event queue */ 884 struct hermon_event_queue eq; 885 /** Unrestricted LKey 886 * 887 * Used to get unrestricted memory access. 888 */ 889 unsigned long lkey; 890 891 /** Completion queue in-use bitmask */ 892 hermon_bitmask_t cq_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_CQS ) ]; 893 /** Queue pair in-use bitmask */ 894 hermon_bitmask_t qp_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_QPS ) ]; 895 /** MTT entry in-use bitmask */ 896 hermon_bitmask_t mtt_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_MTTS ) ]; 897 898 /** Device capabilities */ 899 struct hermon_dev_cap cap; 900 /** Special QPN base */ 901 unsigned long special_qpn_base; 902 /** QPN base */ 903 unsigned long qpn_base; 904 905 /** Non-volatile storage in PCI VPD */ 906 struct nvs_vpd_device nvsvpd; 907 908 /** Ports */ 909 struct hermon_port port[HERMON_MAX_PORTS]; 910 911 /** BOFM device */ 912 struct bofm_device bofm; 913 }; 914 915 /** Global protection domain */ 916 #define HERMON_GLOBAL_PD 0x123456 917 918 /** Memory key prefix */ 919 #define HERMON_MKEY_PREFIX 0x77000000UL 920 921 /* 922 * HCA commands 923 * 924 */ 925 926 #define HERMON_HCR_BASE 0x80680 927 #define HERMON_HCR_REG(x) ( HERMON_HCR_BASE + 4 * (x) ) 928 #define HERMON_HCR_MAX_WAIT_MS 2000 929 #define HERMON_MBOX_ALIGN 4096 930 #define HERMON_MBOX_SIZE 1024 931 932 /* HCA command is split into 933 * 934 * bits 11:0 Opcode 935 * bit 12 Input uses mailbox 936 * bit 13 Output uses mailbox 937 * bits 22:14 Input parameter length (in dwords) 938 * bits 31:23 Output parameter length (in dwords) 939 * 940 * Encoding the information in this way allows us to cut out several 941 * parameters to the hermon_command() call. 942 */ 943 #define HERMON_HCR_IN_MBOX 0x00001000UL 944 #define HERMON_HCR_OUT_MBOX 0x00002000UL 945 #define HERMON_HCR_OPCODE( _command ) ( (_command) & 0xfff ) 946 #define HERMON_HCR_IN_LEN( _command ) ( ( (_command) >> 12 ) & 0x7fc ) 947 #define HERMON_HCR_OUT_LEN( _command ) ( ( (_command) >> 21 ) & 0x7fc ) 948 949 /** Build HCR command from component parts */ 950 #define HERMON_HCR_INOUT_CMD( _opcode, _in_mbox, _in_len, \ 951 _out_mbox, _out_len ) \ 952 ( (_opcode) | \ 953 ( (_in_mbox) ? HERMON_HCR_IN_MBOX : 0 ) | \ 954 ( ( (_in_len) / 4 ) << 14 ) | \ 955 ( (_out_mbox) ? HERMON_HCR_OUT_MBOX : 0 ) | \ 956 ( ( (_out_len) / 4 ) << 23 ) ) 957 958 #define HERMON_HCR_IN_CMD( _opcode, _in_mbox, _in_len ) \ 959 HERMON_HCR_INOUT_CMD ( _opcode, _in_mbox, _in_len, 0, 0 ) 960 961 #define HERMON_HCR_OUT_CMD( _opcode, _out_mbox, _out_len ) \ 962 HERMON_HCR_INOUT_CMD ( _opcode, 0, 0, _out_mbox, _out_len ) 963 964 #define HERMON_HCR_VOID_CMD( _opcode ) \ 965 HERMON_HCR_INOUT_CMD ( _opcode, 0, 0, 0, 0 ) 966 967 #endif /* _HERMON_H */ 968