1 /*
2  * linux/arch/powerpc/kernel/traps.c
3  *
4  * Copyright 2007 Freescale Semiconductor.
5  * Copyright (C) 2003 Motorola
6  * Modified by Xianghua Xiao(x.xiao@motorola.com)
7  *
8  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
9  *
10  * Modified by Cort Dougan (cort@cs.nmt.edu)
11  * and Paul Mackerras (paulus@cs.anu.edu.au)
12  *
13  * (C) Copyright 2000
14  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
15  *
16  * See file CREDITS for list of people who contributed to this
17  * project.
18  *
19  * This program is free software; you can redistribute it and/or
20  * modify it under the terms of the GNU General Public License as
21  * published by the Free Software Foundation; either version 2 of
22  * the License, or (at your option) any later version.
23  *
24  * This program is distributed in the hope that it will be useful,
25  * but WITHOUT ANY WARRANTY; without even the implied warranty of
26  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
27  * GNU General Public License for more details.
28  *
29  * You should have received a copy of the GNU General Public License
30  * along with this program; if not, write to the Free Software
31  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32  * MA 02111-1307 USA
33  */
34 
35 /*
36  * This file handles the architecture-dependent parts of hardware exceptions
37  */
38 
39 #include <common.h>
40 #include <command.h>
41 #include <kgdb.h>
42 #include <asm/processor.h>
43 
44 DECLARE_GLOBAL_DATA_PTR;
45 
46 /* Returns 0 if exception not found and fixup otherwise.  */
47 extern unsigned long search_exception_table(unsigned long);
48 
49 /*
50  * End of addressable memory.  This may be less than the actual
51  * amount of memory on the system if we're unable to keep all
52  * the memory mapped in.
53  */
54 extern ulong get_effective_memsize(void);
55 #define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize())
56 
set_tsr(unsigned long val)57 static __inline__ void set_tsr(unsigned long val)
58 {
59 	asm volatile("mtspr 0x150, %0" : : "r" (val));
60 }
61 
get_esr(void)62 static __inline__ unsigned long get_esr(void)
63 {
64 	unsigned long val;
65 	asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
66 	return val;
67 }
68 
69 #define ESR_MCI 0x80000000
70 #define ESR_PIL 0x08000000
71 #define ESR_PPR 0x04000000
72 #define ESR_PTR 0x02000000
73 #define ESR_DST 0x00800000
74 #define ESR_DIZ 0x00400000
75 #define ESR_U0F 0x00008000
76 
77 #if defined(CONFIG_CMD_BEDBUG)
78 extern void do_bedbug_breakpoint(struct pt_regs *);
79 #endif
80 
81 /*
82  * Trap & Exception support
83  */
84 
85 void
print_backtrace(unsigned long * sp)86 print_backtrace(unsigned long *sp)
87 {
88 	int cnt = 0;
89 	unsigned long i;
90 
91 	printf("Call backtrace: ");
92 	while (sp) {
93 		if ((uint)sp > END_OF_MEM)
94 			break;
95 
96 		i = sp[1];
97 		if (cnt++ % 7 == 0)
98 			printf("\n");
99 		printf("%08lX ", i);
100 		if (cnt > 32) break;
101 		sp = (unsigned long *)*sp;
102 	}
103 	printf("\n");
104 }
105 
show_regs(struct pt_regs * regs)106 void show_regs(struct pt_regs * regs)
107 {
108 	int i;
109 
110 	printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
111 	       regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
112 	printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
113 	       regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
114 	       regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
115 	       regs->msr&MSR_IR ? 1 : 0,
116 	       regs->msr&MSR_DR ? 1 : 0);
117 
118 	printf("\n");
119 	for (i = 0;  i < 32;  i++) {
120 		if ((i % 8) == 0)
121 		{
122 			printf("GPR%02d: ", i);
123 		}
124 
125 		printf("%08lX ", regs->gpr[i]);
126 		if ((i % 8) == 7)
127 		{
128 			printf("\n");
129 		}
130 	}
131 }
132 
133 
134 void
_exception(int signr,struct pt_regs * regs)135 _exception(int signr, struct pt_regs *regs)
136 {
137 	show_regs(regs);
138 	print_backtrace((unsigned long *)regs->gpr[1]);
139 	panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
140 }
141 
142 void
CritcalInputException(struct pt_regs * regs)143 CritcalInputException(struct pt_regs *regs)
144 {
145 	panic("Critical Input Exception");
146 }
147 
148 int machinecheck_count = 0;
149 int machinecheck_error = 0;
150 void
MachineCheckException(struct pt_regs * regs)151 MachineCheckException(struct pt_regs *regs)
152 {
153 	unsigned long fixup;
154 	unsigned int mcsr, mcsrr0, mcsrr1, mcar;
155 
156 	/* Probing PCI using config cycles cause this exception
157 	 * when a device is not present.  Catch it and return to
158 	 * the PCI exception handler.
159 	 */
160 	if ((fixup = search_exception_table(regs->nip)) != 0) {
161 		regs->nip = fixup;
162 		return;
163 	}
164 
165 	mcsrr0 = mfspr(SPRN_MCSRR0);
166 	mcsrr1 = mfspr(SPRN_MCSRR1);
167 	mcsr = mfspr(SPRN_MCSR);
168 	mcar = mfspr(SPRN_MCAR);
169 
170 	machinecheck_count++;
171 	machinecheck_error=1;
172 
173 #if defined(CONFIG_CMD_KGDB)
174 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
175 		return;
176 #endif
177 
178 	printf("Machine check in kernel mode.\n");
179 	printf("Caused by (from mcsr): ");
180 	printf("mcsr = 0x%08x\n", mcsr);
181 	if (mcsr & 0x80000000)
182 		printf("Machine check input pin\n");
183 	if (mcsr & 0x40000000)
184 		printf("Instruction cache parity error\n");
185 	if (mcsr & 0x20000000)
186 		printf("Data cache push parity error\n");
187 	if (mcsr & 0x10000000)
188 		printf("Data cache parity error\n");
189 	if (mcsr & 0x00000080)
190 		printf("Bus instruction address error\n");
191 	if (mcsr & 0x00000040)
192 		printf("Bus Read address error\n");
193 	if (mcsr & 0x00000020)
194 		printf("Bus Write address error\n");
195 	if (mcsr & 0x00000010)
196 		printf("Bus Instruction data bus error\n");
197 	if (mcsr & 0x00000008)
198 		printf("Bus Read data bus error\n");
199 	if (mcsr & 0x00000004)
200 		printf("Bus Write bus error\n");
201 	if (mcsr & 0x00000002)
202 		printf("Bus Instruction parity error\n");
203 	if (mcsr & 0x00000001)
204 		printf("Bus Read parity error\n");
205 
206 	show_regs(regs);
207 	printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
208 	       mcsr, mcsrr0, mcsrr1, mcar);
209 	print_backtrace((unsigned long *)regs->gpr[1]);
210 	if (machinecheck_count > 10) {
211 		panic("machine check count too high\n");
212 	}
213 
214 	if (machinecheck_count > 1) {
215 		regs->nip += 4; /* skip offending instruction */
216 		printf("Skipping current instr, Returning to 0x%08lx\n",
217 		       regs->nip);
218 	} else {
219 		printf("Returning back to 0x%08lx\n",regs->nip);
220 	}
221 }
222 
223 void
AlignmentException(struct pt_regs * regs)224 AlignmentException(struct pt_regs *regs)
225 {
226 #if defined(CONFIG_CMD_KGDB)
227 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
228 		return;
229 #endif
230 
231 	show_regs(regs);
232 	print_backtrace((unsigned long *)regs->gpr[1]);
233 	panic("Alignment Exception");
234 }
235 
236 void
ProgramCheckException(struct pt_regs * regs)237 ProgramCheckException(struct pt_regs *regs)
238 {
239 	long esr_val;
240 
241 #if defined(CONFIG_CMD_KGDB)
242 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
243 		return;
244 #endif
245 
246 	show_regs(regs);
247 
248 	esr_val = get_esr();
249 	if( esr_val & ESR_PIL )
250 		printf( "** Illegal Instruction **\n" );
251 	else if( esr_val & ESR_PPR )
252 		printf( "** Privileged Instruction **\n" );
253 	else if( esr_val & ESR_PTR )
254 		printf( "** Trap Instruction **\n" );
255 
256 	print_backtrace((unsigned long *)regs->gpr[1]);
257 	panic("Program Check Exception");
258 }
259 
260 void
PITException(struct pt_regs * regs)261 PITException(struct pt_regs *regs)
262 {
263 	/*
264 	 * Reset PIT interrupt
265 	 */
266 	set_tsr(0x0c000000);
267 
268 	/*
269 	 * Call timer_interrupt routine in interrupts.c
270 	 */
271 	timer_interrupt(NULL);
272 }
273 
274 
275 void
UnknownException(struct pt_regs * regs)276 UnknownException(struct pt_regs *regs)
277 {
278 #if defined(CONFIG_CMD_KGDB)
279 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
280 		return;
281 #endif
282 
283 	printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
284 	       regs->nip, regs->msr, regs->trap);
285 	_exception(0, regs);
286 }
287 
288 void
ExtIntException(struct pt_regs * regs)289 ExtIntException(struct pt_regs *regs)
290 {
291 	volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
292 
293 	uint vect;
294 
295 #if defined(CONFIG_CMD_KGDB)
296 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
297 		return;
298 #endif
299 
300 	printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
301 	       regs->nip, regs->msr, regs->trap);
302 	vect = pic->iack0;
303 	printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect);
304 	show_regs(regs);
305 	print_backtrace((unsigned long *)regs->gpr[1]);
306 }
307 
308 void
DebugException(struct pt_regs * regs)309 DebugException(struct pt_regs *regs)
310 {
311 	printf("Debugger trap at @ %lx\n", regs->nip );
312 	show_regs(regs);
313 #if defined(CONFIG_CMD_BEDBUG)
314 	do_bedbug_breakpoint( regs );
315 #endif
316 }
317 
318 /* Probe an address by reading.	 If not present, return -1, otherwise
319  * return 0.
320  */
321 int
addr_probe(uint * addr)322 addr_probe(uint *addr)
323 {
324 	return 0;
325 }
326