1 /*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002 (440 port)
6 * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
7 *
8 * (C) Copyright 2003 (440GX port)
9 * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
10 *
11 * (C) Copyright 2008 (PPC440X05 port for Virtex 5 FX)
12 * Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
13 * Work supported by Qtechnology (htpp://qtec.com)
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34 #include <common.h>
35 #include <watchdog.h>
36 #include <command.h>
37 #include <asm/processor.h>
38 #include <asm/interrupt.h>
39 #include <ppc4xx.h>
40 #include <ppc_asm.tmpl>
41 #include <commproc.h>
42
43 DECLARE_GLOBAL_DATA_PTR;
44
45 /*
46 * CPM interrupt vector functions.
47 */
48 struct irq_action {
49 interrupt_handler_t *handler;
50 void *arg;
51 int count;
52 };
53 static struct irq_action irq_vecs[IRQ_MAX];
54
55 #if defined(CONFIG_440)
56
57 /* SPRN changed in 440 */
set_evpr(unsigned long val)58 static __inline__ void set_evpr(unsigned long val)
59 {
60 asm volatile("mtspr 0x03f,%0" : : "r" (val));
61 }
62
63 #else /* !defined(CONFIG_440) */
64
set_pit(unsigned long val)65 static __inline__ void set_pit(unsigned long val)
66 {
67 asm volatile("mtpit %0" : : "r" (val));
68 }
69
70
set_tcr(unsigned long val)71 static __inline__ void set_tcr(unsigned long val)
72 {
73 asm volatile("mttcr %0" : : "r" (val));
74 }
75
76
set_evpr(unsigned long val)77 static __inline__ void set_evpr(unsigned long val)
78 {
79 asm volatile("mtevpr %0" : : "r" (val));
80 }
81 #endif /* defined(CONFIG_440 */
82
interrupt_init_cpu(unsigned * decrementer_count)83 int interrupt_init_cpu (unsigned *decrementer_count)
84 {
85 int vec;
86 unsigned long val;
87
88 /* decrementer is automatically reloaded */
89 *decrementer_count = 0;
90
91 /*
92 * Mark all irqs as free
93 */
94 for (vec = 0; vec < IRQ_MAX; vec++) {
95 irq_vecs[vec].handler = NULL;
96 irq_vecs[vec].arg = NULL;
97 irq_vecs[vec].count = 0;
98 }
99
100 #ifdef CONFIG_4xx
101 /*
102 * Init PIT
103 */
104 #if defined(CONFIG_440)
105 val = mfspr( SPRN_TCR );
106 val &= (~0x04400000); /* clear DIS & ARE */
107 mtspr( SPRN_TCR, val );
108 mtspr( SPRN_DEC, 0 ); /* Prevent exception after TSR clear*/
109 mtspr( SPRN_DECAR, 0 ); /* clear reload */
110 mtspr( SPRN_TSR, 0x08000000 ); /* clear DEC status */
111 val = gd->bd->bi_intfreq/1000; /* 1 msec */
112 mtspr( SPRN_DECAR, val ); /* Set auto-reload value */
113 mtspr( SPRN_DEC, val ); /* Set inital val */
114 #else
115 set_pit(gd->bd->bi_intfreq / 1000);
116 #endif
117 #endif /* CONFIG_4xx */
118
119 #ifdef CONFIG_ADCIOP
120 /*
121 * Init PIT
122 */
123 set_pit(66000);
124 #endif
125
126 /*
127 * Enable PIT
128 */
129 val = mfspr(SPRN_TCR);
130 val |= 0x04400000;
131 mtspr(SPRN_TCR, val);
132
133 /*
134 * Set EVPR to 0
135 */
136 set_evpr(0x00000000);
137
138 /*
139 * Call uic or xilinx_irq pic_enable
140 */
141 pic_enable();
142
143 return (0);
144 }
145
timer_interrupt_cpu(struct pt_regs * regs)146 void timer_interrupt_cpu(struct pt_regs *regs)
147 {
148 /* nothing to do here */
149 return;
150 }
151
interrupt_run_handler(int vec)152 void interrupt_run_handler(int vec)
153 {
154 irq_vecs[vec].count++;
155
156 if (irq_vecs[vec].handler != NULL) {
157 /* call isr */
158 (*irq_vecs[vec].handler) (irq_vecs[vec].arg);
159 } else {
160 pic_irq_disable(vec);
161 printf("Masking bogus interrupt vector %d\n", vec);
162 }
163
164 pic_irq_ack(vec);
165 return;
166 }
167
irq_install_handler(int vec,interrupt_handler_t * handler,void * arg)168 void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg)
169 {
170 /*
171 * Print warning when replacing with a different irq vector
172 */
173 if ((irq_vecs[vec].handler != NULL) && (irq_vecs[vec].handler != handler)) {
174 printf("Interrupt vector %d: handler 0x%x replacing 0x%x\n",
175 vec, (uint) handler, (uint) irq_vecs[vec].handler);
176 }
177 irq_vecs[vec].handler = handler;
178 irq_vecs[vec].arg = arg;
179
180 pic_irq_enable(vec);
181 return;
182 }
183
irq_free_handler(int vec)184 void irq_free_handler(int vec)
185 {
186 debug("Free interrupt for vector %d ==> %p\n",
187 vec, irq_vecs[vec].handler);
188
189 pic_irq_disable(vec);
190
191 irq_vecs[vec].handler = NULL;
192 irq_vecs[vec].arg = NULL;
193 return;
194 }
195
196 #if defined(CONFIG_CMD_IRQ)
do_irqinfo(cmd_tbl_t * cmdtp,int flag,int argc,char * argv[])197 int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
198 {
199 int vec;
200
201 printf ("Interrupt-Information:\n");
202 printf ("Nr Routine Arg Count\n");
203
204 for (vec = 0; vec < IRQ_MAX; vec++) {
205 if (irq_vecs[vec].handler != NULL) {
206 printf ("%02d %08lx %08lx %d\n",
207 vec,
208 (ulong)irq_vecs[vec].handler,
209 (ulong)irq_vecs[vec].arg,
210 irq_vecs[vec].count);
211 }
212 }
213
214 return 0;
215 }
216 #endif
217