1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2020 Marvell International Ltd.
4  *
5  * This file contains defines for the ILK interface
6  */
7 
8 #ifndef __CVMX_ILK_H__
9 #define __CVMX_ILK_H__
10 
11 /* CSR typedefs have been moved to cvmx-ilk-defs.h */
12 
13 /*
14  * Note: this macro must match the first ilk port in the ipd_port_map_68xx[]
15  * and ipd_port_map_78xx[] arrays.
16  */
CVMX_ILK_GBL_BASE(void)17 static inline int CVMX_ILK_GBL_BASE(void)
18 {
19 	if (OCTEON_IS_MODEL(OCTEON_CN68XX))
20 		return 5;
21 	if (OCTEON_IS_MODEL(OCTEON_CN78XX))
22 		return 6;
23 	return -1;
24 }
25 
CVMX_ILK_QLM_BASE(void)26 static inline int CVMX_ILK_QLM_BASE(void)
27 {
28 	if (OCTEON_IS_MODEL(OCTEON_CN68XX))
29 		return 1;
30 	if (OCTEON_IS_MODEL(OCTEON_CN78XX))
31 		return 4;
32 	return -1;
33 }
34 
35 typedef struct {
36 	int intf_en : 1;
37 	int la_mode : 1;
38 	int reserved : 14; /* unused */
39 	int lane_speed : 16;
40 	/* add more here */
41 } cvmx_ilk_intf_t;
42 
43 #define CVMX_NUM_ILK_INTF 2
CVMX_ILK_MAX_LANES(void)44 static inline int CVMX_ILK_MAX_LANES(void)
45 {
46 	if (OCTEON_IS_MODEL(OCTEON_CN68XX))
47 		return 8;
48 	if (OCTEON_IS_MODEL(OCTEON_CN78XX))
49 		return 16;
50 	return -1;
51 }
52 
53 extern unsigned short cvmx_ilk_lane_mask[CVMX_MAX_NODES][CVMX_NUM_ILK_INTF];
54 
55 typedef struct {
56 	unsigned int pipe;
57 	unsigned int chan;
58 } cvmx_ilk_pipe_chan_t;
59 
60 #define CVMX_ILK_MAX_PIPES 45
61 /* Max number of channels allowed */
62 #define CVMX_ILK_MAX_CHANS 256
63 
64 extern int cvmx_ilk_chans[CVMX_MAX_NODES][CVMX_NUM_ILK_INTF];
65 
66 typedef struct {
67 	unsigned int chan;
68 	unsigned int pknd;
69 } cvmx_ilk_chan_pknd_t;
70 
71 #define CVMX_ILK_MAX_PKNDS 16 /* must be <45 */
72 
73 typedef struct {
74 	int *chan_list; /* for discrete channels. or, must be null */
75 	unsigned int num_chans;
76 
77 	unsigned int chan_start; /* for continuous channels */
78 	unsigned int chan_end;
79 	unsigned int chan_step;
80 
81 	unsigned int clr_on_rd;
82 } cvmx_ilk_stats_ctrl_t;
83 
84 #define CVMX_ILK_MAX_CAL      288
85 #define CVMX_ILK_MAX_CAL_IDX  (CVMX_ILK_MAX_CAL / 8)
86 #define CVMX_ILK_TX_MIN_CAL   1
87 #define CVMX_ILK_RX_MIN_CAL   1
88 #define CVMX_ILK_CAL_GRP_SZ   8
89 #define CVMX_ILK_PIPE_BPID_SZ 7
90 #define CVMX_ILK_ENT_CTRL_SZ  2
91 #define CVMX_ILK_RX_FIFO_WM   0x200
92 
93 typedef enum { PIPE_BPID = 0, LINK, XOFF, XON } cvmx_ilk_cal_ent_ctrl_t;
94 
95 typedef struct {
96 	unsigned char pipe_bpid;
97 	cvmx_ilk_cal_ent_ctrl_t ent_ctrl;
98 } cvmx_ilk_cal_entry_t;
99 
100 typedef enum { CVMX_ILK_LPBK_DISA = 0, CVMX_ILK_LPBK_ENA } cvmx_ilk_lpbk_ena_t;
101 
102 typedef enum { CVMX_ILK_LPBK_INT = 0, CVMX_ILK_LPBK_EXT } cvmx_ilk_lpbk_mode_t;
103 
104 /**
105  * This header is placed in front of all received ILK look-aside mode packets
106  */
107 typedef union {
108 	u64 u64;
109 
110 	struct {
111 		u32 reserved_63_57 : 7;	  /* bits 63...57 */
112 		u32 nsp_cmd : 5;	  /* bits 56...52 */
113 		u32 nsp_flags : 4;	  /* bits 51...48 */
114 		u32 nsp_grp_id_upper : 6; /* bits 47...42 */
115 		u32 reserved_41_40 : 2;	  /* bits 41...40 */
116 		/* Protocol type, 1 for LA mode packet */
117 		u32 la_mode : 1;	  /* bit  39      */
118 		u32 nsp_grp_id_lower : 2; /* bits 38...37 */
119 		u32 nsp_xid_upper : 4;	  /* bits 36...33 */
120 		/* ILK channel number, 0 or 1 */
121 		u32 ilk_channel : 1;   /* bit  32      */
122 		u32 nsp_xid_lower : 8; /* bits 31...24 */
123 		/* Unpredictable, may be any value */
124 		u32 reserved_23_0 : 24; /* bits 23...0  */
125 	} s;
126 } cvmx_ilk_la_nsp_compact_hdr_t;
127 
128 typedef struct cvmx_ilk_LA_mode_struct {
129 	int ilk_LA_mode;
130 	int ilk_LA_mode_cal_ena;
131 } cvmx_ilk_LA_mode_t;
132 
133 extern cvmx_ilk_LA_mode_t cvmx_ilk_LA_mode[CVMX_NUM_ILK_INTF];
134 
135 int cvmx_ilk_use_la_mode(int interface, int channel);
136 int cvmx_ilk_start_interface(int interface, unsigned short num_lanes);
137 int cvmx_ilk_start_interface_la(int interface, unsigned char num_lanes);
138 int cvmx_ilk_set_pipe(int interface, int pipe_base, unsigned int pipe_len);
139 int cvmx_ilk_tx_set_channel(int interface, cvmx_ilk_pipe_chan_t *pch, unsigned int num_chs);
140 int cvmx_ilk_rx_set_pknd(int interface, cvmx_ilk_chan_pknd_t *chpknd, unsigned int num_pknd);
141 int cvmx_ilk_enable(int interface);
142 int cvmx_ilk_disable(int interface);
143 int cvmx_ilk_get_intf_ena(int interface);
144 int cvmx_ilk_get_chan_info(int interface, unsigned char **chans, unsigned char *num_chan);
145 cvmx_ilk_la_nsp_compact_hdr_t cvmx_ilk_enable_la_header(int ipd_port, int mode);
146 void cvmx_ilk_show_stats(int interface, cvmx_ilk_stats_ctrl_t *pstats);
147 int cvmx_ilk_cal_setup_rx(int interface, int cal_depth, cvmx_ilk_cal_entry_t *pent, int hi_wm,
148 			  unsigned char cal_ena);
149 int cvmx_ilk_cal_setup_tx(int interface, int cal_depth, cvmx_ilk_cal_entry_t *pent,
150 			  unsigned char cal_ena);
151 int cvmx_ilk_lpbk(int interface, cvmx_ilk_lpbk_ena_t enable, cvmx_ilk_lpbk_mode_t mode);
152 int cvmx_ilk_la_mode_enable_rx_calendar(int interface);
153 
154 #endif /* __CVMX_ILK_H__ */
155