1 
2 /*============================================================================
3 
4 This C source file is part of TestFloat, Release 3e, a package of programs for
5 testing the correctness of floating-point arithmetic complying with the IEEE
6 Standard for Floating-Point, by John R. Hauser.
7 
8 Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
9 University of California.  All rights reserved.
10 
11 Redistribution and use in source and binary forms, with or without
12 modification, are permitted provided that the following conditions are met:
13 
14  1. Redistributions of source code must retain the above copyright notice,
15     this list of conditions, and the following disclaimer.
16 
17  2. Redistributions in binary form must reproduce the above copyright notice,
18     this list of conditions, and the following disclaimer in the documentation
19     and/or other materials provided with the distribution.
20 
21  3. Neither the name of the University nor the names of its contributors may
22     be used to endorse or promote products derived from this software without
23     specific prior written permission.
24 
25 THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
26 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
28 DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
29 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
31 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 
36 =============================================================================*/
37 
38 #include <stdbool.h>
39 #include "platform.h"
40 #include "functions.h"
41 
42 #define RNEVEN ROUND_NEAR_EVEN
43 #define RMINM  ROUND_MINMAG
44 #define RMIN   ROUND_MIN
45 #define RMAX   ROUND_MAX
46 #define RNMAXM ROUND_NEAR_MAXMAG
47 
48 const struct standardFunctionInfo standardFunctionInfos[] = {
49     /*------------------------------------------------------------------------
50     *------------------------------------------------------------------------*/
51 #ifdef FLOAT16
52     { "ui32_to_f16",    UI32_TO_F16,    0, 0 },
53 #endif
54     { "ui32_to_f32",    UI32_TO_F32,    0, 0 },
55 #ifdef FLOAT64
56     { "ui32_to_f64",    UI32_TO_F64,    0, 0 },
57 #endif
58 #ifdef EXTFLOAT80
59     { "ui32_to_extF80", UI32_TO_EXTF80, 0, 0 },
60 #endif
61 #ifdef FLOAT128
62     { "ui32_to_f128",   UI32_TO_F128,   0, 0 },
63 #endif
64 #ifdef FLOAT16
65     { "ui64_to_f16",    UI64_TO_F16,    0, 0 },
66 #endif
67     { "ui64_to_f32",    UI64_TO_F32,    0, 0 },
68 #ifdef FLOAT64
69     { "ui64_to_f64",    UI64_TO_F64,    0, 0 },
70 #endif
71 #ifdef EXTFLOAT80
72     { "ui64_to_extF80", UI64_TO_EXTF80, 0, 0 },
73 #endif
74 #ifdef FLOAT128
75     { "ui64_to_f128",   UI64_TO_F128,   0, 0 },
76 #endif
77 #ifdef FLOAT16
78     { "i32_to_f16",     I32_TO_F16,     0, 0 },
79 #endif
80     { "i32_to_f32",     I32_TO_F32,     0, 0 },
81 #ifdef FLOAT64
82     { "i32_to_f64",     I32_TO_F64,     0, 0 },
83 #endif
84 #ifdef EXTFLOAT80
85     { "i32_to_extF80",  I32_TO_EXTF80,  0, 0 },
86 #endif
87 #ifdef FLOAT128
88     { "i32_to_f128",    I32_TO_F128,    0, 0 },
89 #endif
90 #ifdef FLOAT16
91     { "i64_to_f16",     I64_TO_F16,     0, 0 },
92 #endif
93     { "i64_to_f32",     I64_TO_F32,     0, 0 },
94 #ifdef FLOAT64
95     { "i64_to_f64",     I64_TO_F64,     0, 0 },
96 #endif
97 #ifdef EXTFLOAT80
98     { "i64_to_extF80",  I64_TO_EXTF80,  0, 0 },
99 #endif
100 #ifdef FLOAT128
101     { "i64_to_f128",    I64_TO_F128,    0, 0 },
102 #endif
103     /*------------------------------------------------------------------------
104     *------------------------------------------------------------------------*/
105 #ifdef FLOAT16
106     { "f16_to_ui32_r_near_even",         F16_TO_UI32,         RNEVEN, false },
107     { "f16_to_ui32_r_minMag",            F16_TO_UI32,         RMINM,  false },
108     { "f16_to_ui32_r_min",               F16_TO_UI32,         RMIN,   false },
109     { "f16_to_ui32_r_max",               F16_TO_UI32,         RMAX,   false },
110     { "f16_to_ui32_r_near_maxMag",       F16_TO_UI32,         RNMAXM, false },
111     { "f16_to_ui64_r_near_even",         F16_TO_UI64,         RNEVEN, false },
112     { "f16_to_ui64_r_minMag",            F16_TO_UI64,         RMINM,  false },
113     { "f16_to_ui64_r_min",               F16_TO_UI64,         RMIN,   false },
114     { "f16_to_ui64_r_max",               F16_TO_UI64,         RMAX,   false },
115     { "f16_to_ui64_r_near_maxMag",       F16_TO_UI64,         RNMAXM, false },
116     { "f16_to_i32_r_near_even",          F16_TO_I32,          RNEVEN, false },
117     { "f16_to_i32_r_minMag",             F16_TO_I32,          RMINM,  false },
118     { "f16_to_i32_r_min",                F16_TO_I32,          RMIN,   false },
119     { "f16_to_i32_r_max",                F16_TO_I32,          RMAX,   false },
120     { "f16_to_i32_r_near_maxMag",        F16_TO_I32,          RNMAXM, false },
121     { "f16_to_i64_r_near_even",          F16_TO_I64,          RNEVEN, false },
122     { "f16_to_i64_r_minMag",             F16_TO_I64,          RMINM,  false },
123     { "f16_to_i64_r_min",                F16_TO_I64,          RMIN,   false },
124     { "f16_to_i64_r_max",                F16_TO_I64,          RMAX,   false },
125     { "f16_to_i64_r_near_maxMag",        F16_TO_I64,          RNMAXM, false },
126     { "f16_to_ui32_rx_near_even",        F16_TO_UI32,         RNEVEN, true  },
127     { "f16_to_ui32_rx_minMag",           F16_TO_UI32,         RMINM,  true  },
128     { "f16_to_ui32_rx_min",              F16_TO_UI32,         RMIN,   true  },
129     { "f16_to_ui32_rx_max",              F16_TO_UI32,         RMAX,   true  },
130     { "f16_to_ui32_rx_near_maxMag",      F16_TO_UI32,         RNMAXM, true  },
131     { "f16_to_ui64_rx_near_even",        F16_TO_UI64,         RNEVEN, true  },
132     { "f16_to_ui64_rx_minMag",           F16_TO_UI64,         RMINM,  true  },
133     { "f16_to_ui64_rx_min",              F16_TO_UI64,         RMIN,   true  },
134     { "f16_to_ui64_rx_max",              F16_TO_UI64,         RMAX,   true  },
135     { "f16_to_ui64_rx_near_maxMag",      F16_TO_UI64,         RNMAXM, true  },
136     { "f16_to_i32_rx_near_even",         F16_TO_I32,          RNEVEN, true  },
137     { "f16_to_i32_rx_minMag",            F16_TO_I32,          RMINM,  true  },
138     { "f16_to_i32_rx_min",               F16_TO_I32,          RMIN,   true  },
139     { "f16_to_i32_rx_max",               F16_TO_I32,          RMAX,   true  },
140     { "f16_to_i32_rx_near_maxMag",       F16_TO_I32,          RNMAXM, true  },
141     { "f16_to_i64_rx_near_even",         F16_TO_I64,          RNEVEN, true  },
142     { "f16_to_i64_rx_minMag",            F16_TO_I64,          RMINM,  true  },
143     { "f16_to_i64_rx_min",               F16_TO_I64,          RMIN,   true  },
144     { "f16_to_i64_rx_max",               F16_TO_I64,          RMAX,   true  },
145     { "f16_to_i64_rx_near_maxMag",       F16_TO_I64,          RNMAXM, true  },
146     { "f16_to_f32",                      F16_TO_F32,          0,      0     },
147 #ifdef FLOAT64
148     { "f16_to_f64",                      F16_TO_F64,          0,      0     },
149 #endif
150 #ifdef EXTFLOAT80
151     { "f16_to_extF80",                   F16_TO_EXTF80,       0,      0     },
152 #endif
153 #ifdef FLOAT128
154     { "f16_to_f128",                     F16_TO_F128,         0,      0     },
155 #endif
156     { "f16_roundToInt_r_near_even",      F16_ROUNDTOINT,      RNEVEN, false },
157     { "f16_roundToInt_r_minMag",         F16_ROUNDTOINT,      RMINM,  false },
158     { "f16_roundToInt_r_min",            F16_ROUNDTOINT,      RMIN,   false },
159     { "f16_roundToInt_r_max",            F16_ROUNDTOINT,      RMAX,   false },
160     { "f16_roundToInt_r_near_maxMag",    F16_ROUNDTOINT,      RNMAXM, false },
161     { "f16_roundToInt_x",                F16_ROUNDTOINT,      0,      true  },
162     { "f16_add",                         F16_ADD,             0,      0     },
163     { "f16_sub",                         F16_SUB,             0,      0     },
164     { "f16_mul",                         F16_MUL,             0,      0     },
165     { "f16_mulAdd",                      F16_MULADD,          0,      0     },
166     { "f16_div",                         F16_DIV,             0,      0     },
167     { "f16_rem",                         F16_REM,             0,      0     },
168     { "f16_sqrt",                        F16_SQRT,            0,      0     },
169     { "f16_eq",                          F16_EQ,              0,      0     },
170     { "f16_le",                          F16_LE,              0,      0     },
171     { "f16_lt",                          F16_LT,              0,      0     },
172     { "f16_eq_signaling",                F16_EQ_SIGNALING,    0,      0     },
173     { "f16_le_quiet",                    F16_LE_QUIET,        0,      0     },
174     { "f16_lt_quiet",                    F16_LT_QUIET,        0,      0     },
175 #endif
176     /*------------------------------------------------------------------------
177     *------------------------------------------------------------------------*/
178     { "f32_to_ui32_r_near_even",         F32_TO_UI32,         RNEVEN, false },
179     { "f32_to_ui32_r_minMag",            F32_TO_UI32,         RMINM,  false },
180     { "f32_to_ui32_r_min",               F32_TO_UI32,         RMIN,   false },
181     { "f32_to_ui32_r_max",               F32_TO_UI32,         RMAX,   false },
182     { "f32_to_ui32_r_near_maxMag",       F32_TO_UI32,         RNMAXM, false },
183     { "f32_to_ui64_r_near_even",         F32_TO_UI64,         RNEVEN, false },
184     { "f32_to_ui64_r_minMag",            F32_TO_UI64,         RMINM,  false },
185     { "f32_to_ui64_r_min",               F32_TO_UI64,         RMIN,   false },
186     { "f32_to_ui64_r_max",               F32_TO_UI64,         RMAX,   false },
187     { "f32_to_ui64_r_near_maxMag",       F32_TO_UI64,         RNMAXM, false },
188     { "f32_to_i32_r_near_even",          F32_TO_I32,          RNEVEN, false },
189     { "f32_to_i32_r_minMag",             F32_TO_I32,          RMINM,  false },
190     { "f32_to_i32_r_min",                F32_TO_I32,          RMIN,   false },
191     { "f32_to_i32_r_max",                F32_TO_I32,          RMAX,   false },
192     { "f32_to_i32_r_near_maxMag",        F32_TO_I32,          RNMAXM, false },
193     { "f32_to_i64_r_near_even",          F32_TO_I64,          RNEVEN, false },
194     { "f32_to_i64_r_minMag",             F32_TO_I64,          RMINM,  false },
195     { "f32_to_i64_r_min",                F32_TO_I64,          RMIN,   false },
196     { "f32_to_i64_r_max",                F32_TO_I64,          RMAX,   false },
197     { "f32_to_i64_r_near_maxMag",        F32_TO_I64,          RNMAXM, false },
198     { "f32_to_ui32_rx_near_even",        F32_TO_UI32,         RNEVEN, true  },
199     { "f32_to_ui32_rx_minMag",           F32_TO_UI32,         RMINM,  true  },
200     { "f32_to_ui32_rx_min",              F32_TO_UI32,         RMIN,   true  },
201     { "f32_to_ui32_rx_max",              F32_TO_UI32,         RMAX,   true  },
202     { "f32_to_ui32_rx_near_maxMag",      F32_TO_UI32,         RNMAXM, true  },
203     { "f32_to_ui64_rx_near_even",        F32_TO_UI64,         RNEVEN, true  },
204     { "f32_to_ui64_rx_minMag",           F32_TO_UI64,         RMINM,  true  },
205     { "f32_to_ui64_rx_min",              F32_TO_UI64,         RMIN,   true  },
206     { "f32_to_ui64_rx_max",              F32_TO_UI64,         RMAX,   true  },
207     { "f32_to_ui64_rx_near_maxMag",      F32_TO_UI64,         RNMAXM, true  },
208     { "f32_to_i32_rx_near_even",         F32_TO_I32,          RNEVEN, true  },
209     { "f32_to_i32_rx_minMag",            F32_TO_I32,          RMINM,  true  },
210     { "f32_to_i32_rx_min",               F32_TO_I32,          RMIN,   true  },
211     { "f32_to_i32_rx_max",               F32_TO_I32,          RMAX,   true  },
212     { "f32_to_i32_rx_near_maxMag",       F32_TO_I32,          RNMAXM, true  },
213     { "f32_to_i64_rx_near_even",         F32_TO_I64,          RNEVEN, true  },
214     { "f32_to_i64_rx_minMag",            F32_TO_I64,          RMINM,  true  },
215     { "f32_to_i64_rx_min",               F32_TO_I64,          RMIN,   true  },
216     { "f32_to_i64_rx_max",               F32_TO_I64,          RMAX,   true  },
217     { "f32_to_i64_rx_near_maxMag",       F32_TO_I64,          RNMAXM, true  },
218 #ifdef FLOAT16
219     { "f32_to_f16",                      F32_TO_F16,          0,      0     },
220 #endif
221 #ifdef FLOAT64
222     { "f32_to_f64",                      F32_TO_F64,          0,      0     },
223 #endif
224 #ifdef EXTFLOAT80
225     { "f32_to_extF80",                   F32_TO_EXTF80,       0,      0     },
226 #endif
227 #ifdef FLOAT128
228     { "f32_to_f128",                     F32_TO_F128,         0,      0     },
229 #endif
230     { "f32_roundToInt_r_near_even",      F32_ROUNDTOINT,      RNEVEN, false },
231     { "f32_roundToInt_r_minMag",         F32_ROUNDTOINT,      RMINM,  false },
232     { "f32_roundToInt_r_min",            F32_ROUNDTOINT,      RMIN,   false },
233     { "f32_roundToInt_r_max",            F32_ROUNDTOINT,      RMAX,   false },
234     { "f32_roundToInt_r_near_maxMag",    F32_ROUNDTOINT,      RNMAXM, false },
235     { "f32_roundToInt_x",                F32_ROUNDTOINT,      0,      true  },
236     { "f32_add",                         F32_ADD,             0,      0     },
237     { "f32_sub",                         F32_SUB,             0,      0     },
238     { "f32_mul",                         F32_MUL,             0,      0     },
239     { "f32_mulAdd",                      F32_MULADD,          0,      0     },
240     { "f32_div",                         F32_DIV,             0,      0     },
241     { "f32_rem",                         F32_REM,             0,      0     },
242     { "f32_sqrt",                        F32_SQRT,            0,      0     },
243     { "f32_eq",                          F32_EQ,              0,      0     },
244     { "f32_le",                          F32_LE,              0,      0     },
245     { "f32_lt",                          F32_LT,              0,      0     },
246     { "f32_eq_signaling",                F32_EQ_SIGNALING,    0,      0     },
247     { "f32_le_quiet",                    F32_LE_QUIET,        0,      0     },
248     { "f32_lt_quiet",                    F32_LT_QUIET,        0,      0     },
249     /*------------------------------------------------------------------------
250     *------------------------------------------------------------------------*/
251 #ifdef FLOAT64
252     { "f64_to_ui32_r_near_even",         F64_TO_UI32,         RNEVEN, false },
253     { "f64_to_ui32_r_minMag",            F64_TO_UI32,         RMINM,  false },
254     { "f64_to_ui32_r_min",               F64_TO_UI32,         RMIN,   false },
255     { "f64_to_ui32_r_max",               F64_TO_UI32,         RMAX,   false },
256     { "f64_to_ui32_r_near_maxMag",       F64_TO_UI32,         RNMAXM, false },
257     { "f64_to_ui64_r_near_even",         F64_TO_UI64,         RNEVEN, false },
258     { "f64_to_ui64_r_minMag",            F64_TO_UI64,         RMINM,  false },
259     { "f64_to_ui64_r_min",               F64_TO_UI64,         RMIN,   false },
260     { "f64_to_ui64_r_max",               F64_TO_UI64,         RMAX,   false },
261     { "f64_to_ui64_r_near_maxMag",       F64_TO_UI64,         RNMAXM, false },
262     { "f64_to_i32_r_near_even",          F64_TO_I32,          RNEVEN, false },
263     { "f64_to_i32_r_minMag",             F64_TO_I32,          RMINM,  false },
264     { "f64_to_i32_r_min",                F64_TO_I32,          RMIN,   false },
265     { "f64_to_i32_r_max",                F64_TO_I32,          RMAX,   false },
266     { "f64_to_i32_r_near_maxMag",        F64_TO_I32,          RNMAXM, false },
267     { "f64_to_i64_r_near_even",          F64_TO_I64,          RNEVEN, false },
268     { "f64_to_i64_r_minMag",             F64_TO_I64,          RMINM,  false },
269     { "f64_to_i64_r_min",                F64_TO_I64,          RMIN,   false },
270     { "f64_to_i64_r_max",                F64_TO_I64,          RMAX,   false },
271     { "f64_to_i64_r_near_maxMag",        F64_TO_I64,          RNMAXM, false },
272     { "f64_to_ui32_rx_near_even",        F64_TO_UI32,         RNEVEN, true  },
273     { "f64_to_ui32_rx_minMag",           F64_TO_UI32,         RMINM,  true  },
274     { "f64_to_ui32_rx_min",              F64_TO_UI32,         RMIN,   true  },
275     { "f64_to_ui32_rx_max",              F64_TO_UI32,         RMAX,   true  },
276     { "f64_to_ui32_rx_near_maxMag",      F64_TO_UI32,         RNMAXM, true  },
277     { "f64_to_ui64_rx_near_even",        F64_TO_UI64,         RNEVEN, true  },
278     { "f64_to_ui64_rx_minMag",           F64_TO_UI64,         RMINM,  true  },
279     { "f64_to_ui64_rx_min",              F64_TO_UI64,         RMIN,   true  },
280     { "f64_to_ui64_rx_max",              F64_TO_UI64,         RMAX,   true  },
281     { "f64_to_ui64_rx_near_maxMag",      F64_TO_UI64,         RNMAXM, true  },
282     { "f64_to_i32_rx_near_even",         F64_TO_I32,          RNEVEN, true  },
283     { "f64_to_i32_rx_minMag",            F64_TO_I32,          RMINM,  true  },
284     { "f64_to_i32_rx_min",               F64_TO_I32,          RMIN,   true  },
285     { "f64_to_i32_rx_max",               F64_TO_I32,          RMAX,   true  },
286     { "f64_to_i32_rx_near_maxMag",       F64_TO_I32,          RNMAXM, true  },
287     { "f64_to_i64_rx_near_even",         F64_TO_I64,          RNEVEN, true  },
288     { "f64_to_i64_rx_minMag",            F64_TO_I64,          RMINM,  true  },
289     { "f64_to_i64_rx_min",               F64_TO_I64,          RMIN,   true  },
290     { "f64_to_i64_rx_max",               F64_TO_I64,          RMAX,   true  },
291     { "f64_to_i64_rx_near_maxMag",       F64_TO_I64,          RNMAXM, true  },
292 #ifdef FLOAT16
293     { "f64_to_f16",                      F64_TO_F16,          0,      0     },
294 #endif
295     { "f64_to_f32",                      F64_TO_F32,          0,      0     },
296 #ifdef EXTFLOAT80
297     { "f64_to_extF80",                   F64_TO_EXTF80,       0,      0     },
298 #endif
299 #ifdef FLOAT128
300     { "f64_to_f128",                     F64_TO_F128,         0,      0     },
301 #endif
302     { "f64_roundToInt_r_near_even",      F64_ROUNDTOINT,      RNEVEN, false },
303     { "f64_roundToInt_r_minMag",         F64_ROUNDTOINT,      RMINM,  false },
304     { "f64_roundToInt_r_min",            F64_ROUNDTOINT,      RMIN,   false },
305     { "f64_roundToInt_r_max",            F64_ROUNDTOINT,      RMAX,   false },
306     { "f64_roundToInt_r_near_maxMag",    F64_ROUNDTOINT,      RNMAXM, false },
307     { "f64_roundToInt_x",                F64_ROUNDTOINT,      0,      true  },
308     { "f64_add",                         F64_ADD,             0,      0     },
309     { "f64_sub",                         F64_SUB,             0,      0     },
310     { "f64_mul",                         F64_MUL,             0,      0     },
311     { "f64_mulAdd",                      F64_MULADD,          0,      0     },
312     { "f64_div",                         F64_DIV,             0,      0     },
313     { "f64_rem",                         F64_REM,             0,      0     },
314     { "f64_sqrt",                        F64_SQRT,            0,      0     },
315     { "f64_eq",                          F64_EQ,              0,      0     },
316     { "f64_le",                          F64_LE,              0,      0     },
317     { "f64_lt",                          F64_LT,              0,      0     },
318     { "f64_eq_signaling",                F64_EQ_SIGNALING,    0,      0     },
319     { "f64_le_quiet",                    F64_LE_QUIET,        0,      0     },
320     { "f64_lt_quiet",                    F64_LT_QUIET,        0,      0     },
321 #endif
322     /*------------------------------------------------------------------------
323     *------------------------------------------------------------------------*/
324 #ifdef EXTFLOAT80
325     { "extF80_to_ui32_r_near_even",      EXTF80_TO_UI32,      RNEVEN, false },
326     { "extF80_to_ui32_r_minMag",         EXTF80_TO_UI32,      RMINM,  false },
327     { "extF80_to_ui32_r_min",            EXTF80_TO_UI32,      RMIN,   false },
328     { "extF80_to_ui32_r_max",            EXTF80_TO_UI32,      RMAX,   false },
329     { "extF80_to_ui32_r_near_maxMag",    EXTF80_TO_UI32,      RNMAXM, false },
330     { "extF80_to_ui64_r_near_even",      EXTF80_TO_UI64,      RNEVEN, false },
331     { "extF80_to_ui64_r_minMag",         EXTF80_TO_UI64,      RMINM,  false },
332     { "extF80_to_ui64_r_min",            EXTF80_TO_UI64,      RMIN,   false },
333     { "extF80_to_ui64_r_max",            EXTF80_TO_UI64,      RMAX,   false },
334     { "extF80_to_ui64_r_near_maxMag",    EXTF80_TO_UI64,      RNMAXM, false },
335     { "extF80_to_i32_r_near_even",       EXTF80_TO_I32,       RNEVEN, false },
336     { "extF80_to_i32_r_minMag",          EXTF80_TO_I32,       RMINM,  false },
337     { "extF80_to_i32_r_min",             EXTF80_TO_I32,       RMIN,   false },
338     { "extF80_to_i32_r_max",             EXTF80_TO_I32,       RMAX,   false },
339     { "extF80_to_i32_r_near_maxMag",     EXTF80_TO_I32,       RNMAXM, false },
340     { "extF80_to_i64_r_near_even",       EXTF80_TO_I64,       RNEVEN, false },
341     { "extF80_to_i64_r_minMag",          EXTF80_TO_I64,       RMINM,  false },
342     { "extF80_to_i64_r_min",             EXTF80_TO_I64,       RMIN,   false },
343     { "extF80_to_i64_r_max",             EXTF80_TO_I64,       RMAX,   false },
344     { "extF80_to_i64_r_near_maxMag",     EXTF80_TO_I64,       RNMAXM, false },
345     { "extF80_to_ui32_rx_near_even",     EXTF80_TO_UI32,      RNEVEN, true  },
346     { "extF80_to_ui32_rx_minMag",        EXTF80_TO_UI32,      RMINM,  true  },
347     { "extF80_to_ui32_rx_min",           EXTF80_TO_UI32,      RMIN,   true  },
348     { "extF80_to_ui32_rx_max",           EXTF80_TO_UI32,      RMAX,   true  },
349     { "extF80_to_ui32_rx_near_maxMag",   EXTF80_TO_UI32,      RNMAXM, true  },
350     { "extF80_to_ui64_rx_near_even",     EXTF80_TO_UI64,      RNEVEN, true  },
351     { "extF80_to_ui64_rx_minMag",        EXTF80_TO_UI64,      RMINM,  true  },
352     { "extF80_to_ui64_rx_min",           EXTF80_TO_UI64,      RMIN,   true  },
353     { "extF80_to_ui64_rx_max",           EXTF80_TO_UI64,      RMAX,   true  },
354     { "extF80_to_ui64_rx_near_maxMag",   EXTF80_TO_UI64,      RNMAXM, true  },
355     { "extF80_to_i32_rx_near_even",      EXTF80_TO_I32,       RNEVEN, true  },
356     { "extF80_to_i32_rx_minMag",         EXTF80_TO_I32,       RMINM,  true  },
357     { "extF80_to_i32_rx_min",            EXTF80_TO_I32,       RMIN,   true  },
358     { "extF80_to_i32_rx_max",            EXTF80_TO_I32,       RMAX,   true  },
359     { "extF80_to_i32_rx_near_maxMag",    EXTF80_TO_I32,       RNMAXM, true  },
360     { "extF80_to_i64_rx_near_even",      EXTF80_TO_I64,       RNEVEN, true  },
361     { "extF80_to_i64_rx_minMag",         EXTF80_TO_I64,       RMINM,  true  },
362     { "extF80_to_i64_rx_min",            EXTF80_TO_I64,       RMIN,   true  },
363     { "extF80_to_i64_rx_max",            EXTF80_TO_I64,       RMAX,   true  },
364     { "extF80_to_i64_rx_near_maxMag",    EXTF80_TO_I64,       RNMAXM, true  },
365 #ifdef FLOAT16
366     { "extF80_to_f16",                   EXTF80_TO_F16,       0,      0     },
367 #endif
368     { "extF80_to_f32",                   EXTF80_TO_F32,       0,      0     },
369 #ifdef FLOAT64
370     { "extF80_to_f64",                   EXTF80_TO_F64,       0,      0     },
371 #endif
372 #ifdef FLOAT128
373     { "extF80_to_f128",                  EXTF80_TO_F128,      0,      0     },
374 #endif
375     { "extF80_roundToInt_r_near_even",   EXTF80_ROUNDTOINT,   RNEVEN, false },
376     { "extF80_roundToInt_r_minMag",      EXTF80_ROUNDTOINT,   RMINM,  false },
377     { "extF80_roundToInt_r_min",         EXTF80_ROUNDTOINT,   RMIN,   false },
378     { "extF80_roundToInt_r_max",         EXTF80_ROUNDTOINT,   RMAX,   false },
379     { "extF80_roundToInt_r_near_maxMag", EXTF80_ROUNDTOINT,   RNMAXM, false },
380     { "extF80_roundToInt_x",             EXTF80_ROUNDTOINT,   0,      true  },
381     { "extF80_add",                      EXTF80_ADD,          0,      0     },
382     { "extF80_sub",                      EXTF80_SUB,          0,      0     },
383     { "extF80_mul",                      EXTF80_MUL,          0,      0     },
384     { "extF80_div",                      EXTF80_DIV,          0,      0     },
385     { "extF80_rem",                      EXTF80_REM,          0,      0     },
386     { "extF80_sqrt",                     EXTF80_SQRT,         0,      0     },
387     { "extF80_eq",                       EXTF80_EQ,           0,      0     },
388     { "extF80_le",                       EXTF80_LE,           0,      0     },
389     { "extF80_lt",                       EXTF80_LT,           0,      0     },
390     { "extF80_eq_signaling",             EXTF80_EQ_SIGNALING, 0,      0     },
391     { "extF80_le_quiet",                 EXTF80_LE_QUIET,     0,      0     },
392     { "extF80_lt_quiet",                 EXTF80_LT_QUIET,     0,      0     },
393 #endif
394     /*------------------------------------------------------------------------
395     *------------------------------------------------------------------------*/
396 #ifdef FLOAT128
397     { "f128_to_ui32_r_near_even",        F128_TO_UI32,        RNEVEN, false },
398     { "f128_to_ui32_r_minMag",           F128_TO_UI32,        RMINM,  false },
399     { "f128_to_ui32_r_min",              F128_TO_UI32,        RMIN,   false },
400     { "f128_to_ui32_r_max",              F128_TO_UI32,        RMAX,   false },
401     { "f128_to_ui32_r_near_maxMag",      F128_TO_UI32,        RNMAXM, false },
402     { "f128_to_ui64_r_near_even",        F128_TO_UI64,        RNEVEN, false },
403     { "f128_to_ui64_r_minMag",           F128_TO_UI64,        RMINM,  false },
404     { "f128_to_ui64_r_min",              F128_TO_UI64,        RMIN,   false },
405     { "f128_to_ui64_r_max",              F128_TO_UI64,        RMAX,   false },
406     { "f128_to_ui64_r_near_maxMag",      F128_TO_UI64,        RNMAXM, false },
407     { "f128_to_i32_r_near_even",         F128_TO_I32,         RNEVEN, false },
408     { "f128_to_i32_r_minMag",            F128_TO_I32,         RMINM,  false },
409     { "f128_to_i32_r_min",               F128_TO_I32,         RMIN,   false },
410     { "f128_to_i32_r_max",               F128_TO_I32,         RMAX,   false },
411     { "f128_to_i32_r_near_maxMag",       F128_TO_I32,         RNMAXM, false },
412     { "f128_to_i64_r_near_even",         F128_TO_I64,         RNEVEN, false },
413     { "f128_to_i64_r_minMag",            F128_TO_I64,         RMINM,  false },
414     { "f128_to_i64_r_min",               F128_TO_I64,         RMIN,   false },
415     { "f128_to_i64_r_max",               F128_TO_I64,         RMAX,   false },
416     { "f128_to_i64_r_near_maxMag",       F128_TO_I64,         RNMAXM, false },
417     { "f128_to_ui32_rx_near_even",       F128_TO_UI32,        RNEVEN, true  },
418     { "f128_to_ui32_rx_minMag",          F128_TO_UI32,        RMINM,  true  },
419     { "f128_to_ui32_rx_min",             F128_TO_UI32,        RMIN,   true  },
420     { "f128_to_ui32_rx_max",             F128_TO_UI32,        RMAX,   true  },
421     { "f128_to_ui32_rx_near_maxMag",     F128_TO_UI32,        RNMAXM, true  },
422     { "f128_to_ui64_rx_near_even",       F128_TO_UI64,        RNEVEN, true  },
423     { "f128_to_ui64_rx_minMag",          F128_TO_UI64,        RMINM,  true  },
424     { "f128_to_ui64_rx_min",             F128_TO_UI64,        RMIN,   true  },
425     { "f128_to_ui64_rx_max",             F128_TO_UI64,        RMAX,   true  },
426     { "f128_to_ui64_rx_near_maxMag",     F128_TO_UI64,        RNMAXM, true  },
427     { "f128_to_i32_rx_near_even",        F128_TO_I32,         RNEVEN, true  },
428     { "f128_to_i32_rx_minMag",           F128_TO_I32,         RMINM,  true  },
429     { "f128_to_i32_rx_min",              F128_TO_I32,         RMIN,   true  },
430     { "f128_to_i32_rx_max",              F128_TO_I32,         RMAX,   true  },
431     { "f128_to_i32_rx_near_maxMag",      F128_TO_I32,         RNMAXM, true  },
432     { "f128_to_i64_rx_near_even",        F128_TO_I64,         RNEVEN, true  },
433     { "f128_to_i64_rx_minMag",           F128_TO_I64,         RMINM,  true  },
434     { "f128_to_i64_rx_min",              F128_TO_I64,         RMIN,   true  },
435     { "f128_to_i64_rx_max",              F128_TO_I64,         RMAX,   true  },
436     { "f128_to_i64_rx_near_maxMag",      F128_TO_I64,         RNMAXM, true  },
437 #ifdef FLOAT16
438     { "f128_to_f16",                     F128_TO_F16,         0,      0     },
439 #endif
440     { "f128_to_f32",                     F128_TO_F32,         0,      0     },
441 #ifdef FLOAT64
442     { "f128_to_f64",                     F128_TO_F64,         0,      0     },
443 #endif
444 #ifdef EXTFLOAT80
445     { "f128_to_extF80",                  F128_TO_EXTF80,      0,      0     },
446 #endif
447     { "f128_roundToInt_r_near_even",     F128_ROUNDTOINT,     RNEVEN, false },
448     { "f128_roundToInt_r_minMag",        F128_ROUNDTOINT,     RMINM,  false },
449     { "f128_roundToInt_r_min",           F128_ROUNDTOINT,     RMIN,   false },
450     { "f128_roundToInt_r_max",           F128_ROUNDTOINT,     RMAX,   false },
451     { "f128_roundToInt_r_near_maxMag",   F128_ROUNDTOINT,     RNMAXM, false },
452     { "f128_roundToInt_x",               F128_ROUNDTOINT,     0,      true  },
453     { "f128_add",                        F128_ADD,            0,      0     },
454     { "f128_sub",                        F128_SUB,            0,      0     },
455     { "f128_mul",                        F128_MUL,            0,      0     },
456     { "f128_mulAdd",                     F128_MULADD,         0,      0     },
457     { "f128_div",                        F128_DIV,            0,      0     },
458     { "f128_rem",                        F128_REM,            0,      0     },
459     { "f128_sqrt",                       F128_SQRT,           0,      0     },
460     { "f128_eq",                         F128_EQ,             0,      0     },
461     { "f128_le",                         F128_LE,             0,      0     },
462     { "f128_lt",                         F128_LT,             0,      0     },
463     { "f128_eq_signaling",               F128_EQ_SIGNALING,   0,      0     },
464     { "f128_le_quiet",                   F128_LE_QUIET,       0,      0     },
465     { "f128_lt_quiet",                   F128_LT_QUIET,       0,      0     },
466 #endif
467     /*------------------------------------------------------------------------
468     *------------------------------------------------------------------------*/
469     { 0, 0, 0, 0 }
470 };
471 
472