1 /*
2 * (C) Copyright 2006-2008
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21 #include <common.h>
22 #include <nand.h>
23 #include <asm/io.h>
24
25 #define CONFIG_SYS_NAND_READ_DELAY \
26 { volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
27
28 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
29
30 #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
31 /*
32 * NAND command for small page NAND devices (512)
33 */
nand_command(struct mtd_info * mtd,int block,int page,int offs,u8 cmd)34 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
35 {
36 struct nand_chip *this = mtd->priv;
37 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
38
39 if (this->dev_ready)
40 while (!this->dev_ready(mtd))
41 ;
42 else
43 CONFIG_SYS_NAND_READ_DELAY;
44
45 /* Begin command latch cycle */
46 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
47 /* Set ALE and clear CLE to start address cycle */
48 /* Column address */
49 this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
50 this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
51 this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
52 NAND_CTRL_ALE); /* A[24:17] */
53 #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
54 /* One more address cycle for devices > 32MiB */
55 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
56 NAND_CTRL_ALE); /* A[28:25] */
57 #endif
58 /* Latch in address */
59 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
60
61 /*
62 * Wait a while for the data to be ready
63 */
64 if (this->dev_ready)
65 while (!this->dev_ready(mtd))
66 ;
67 else
68 CONFIG_SYS_NAND_READ_DELAY;
69
70 return 0;
71 }
72 #else
73 /*
74 * NAND command for large page NAND devices (2k)
75 */
nand_command(struct mtd_info * mtd,int block,int page,int offs,u8 cmd)76 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
77 {
78 struct nand_chip *this = mtd->priv;
79 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
80
81 if (this->dev_ready)
82 while (!this->dev_ready(mtd))
83 ;
84 else
85 CONFIG_SYS_NAND_READ_DELAY;
86
87 /* Emulate NAND_CMD_READOOB */
88 if (cmd == NAND_CMD_READOOB) {
89 offs += CONFIG_SYS_NAND_PAGE_SIZE;
90 cmd = NAND_CMD_READ0;
91 }
92
93 /* Begin command latch cycle */
94 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
95 /* Set ALE and clear CLE to start address cycle */
96 /* Column address */
97 this->cmd_ctrl(mtd, offs & 0xff,
98 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
99 this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
100 /* Row address */
101 this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
102 this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff),
103 NAND_CTRL_ALE); /* A[27:20] */
104 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
105 /* One more address cycle for devices > 128MiB */
106 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
107 NAND_CTRL_ALE); /* A[31:28] */
108 #endif
109 /* Latch in address */
110 this->cmd_ctrl(mtd, NAND_CMD_READSTART,
111 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
112 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
113
114 /*
115 * Wait a while for the data to be ready
116 */
117 if (this->dev_ready)
118 while (!this->dev_ready(mtd))
119 ;
120 else
121 CONFIG_SYS_NAND_READ_DELAY;
122
123 return 0;
124 }
125 #endif
126
nand_is_bad_block(struct mtd_info * mtd,int block)127 static int nand_is_bad_block(struct mtd_info *mtd, int block)
128 {
129 struct nand_chip *this = mtd->priv;
130
131 nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
132
133 /*
134 * Read one byte
135 */
136 if (readb(this->IO_ADDR_R) != 0xff)
137 return 1;
138
139 return 0;
140 }
141
nand_read_page(struct mtd_info * mtd,int block,int page,uchar * dst)142 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
143 {
144 struct nand_chip *this = mtd->priv;
145 u_char *ecc_calc;
146 u_char *ecc_code;
147 u_char *oob_data;
148 int i;
149 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
150 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
151 int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
152 uint8_t *p = dst;
153 int stat;
154
155 nand_command(mtd, block, page, 0, NAND_CMD_READ0);
156
157 /* No malloc available for now, just use some temporary locations
158 * in SDRAM
159 */
160 ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
161 ecc_code = ecc_calc + 0x100;
162 oob_data = ecc_calc + 0x200;
163
164 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
165 this->ecc.hwctl(mtd, NAND_ECC_READ);
166 this->read_buf(mtd, p, eccsize);
167 this->ecc.calculate(mtd, p, &ecc_calc[i]);
168 }
169 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
170
171 /* Pick the ECC bytes out of the oob data */
172 for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
173 ecc_code[i] = oob_data[nand_ecc_pos[i]];
174
175 eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
176 p = dst;
177
178 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
179 /* No chance to do something with the possible error message
180 * from correct_data(). We just hope that all possible errors
181 * are corrected by this routine.
182 */
183 stat = this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
184 }
185
186 return 0;
187 }
188
nand_load(struct mtd_info * mtd,unsigned int offs,unsigned int uboot_size,uchar * dst)189 static int nand_load(struct mtd_info *mtd, unsigned int offs,
190 unsigned int uboot_size, uchar *dst)
191 {
192 unsigned int block, lastblock;
193 unsigned int page;
194
195 /*
196 * offs has to be aligned to a page address!
197 */
198 block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
199 lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
200 page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
201
202 while (block <= lastblock) {
203 if (!nand_is_bad_block(mtd, block)) {
204 /*
205 * Skip bad blocks
206 */
207 while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
208 nand_read_page(mtd, block, page, dst);
209 dst += CONFIG_SYS_NAND_PAGE_SIZE;
210 page++;
211 }
212
213 page = 0;
214 } else {
215 lastblock++;
216 }
217
218 block++;
219 }
220
221 return 0;
222 }
223
224 /*
225 * The main entry for NAND booting. It's necessary that SDRAM is already
226 * configured and available since this code loads the main U-Boot image
227 * from NAND into SDRAM and starts it from there.
228 */
nand_boot(void)229 void nand_boot(void)
230 {
231 struct nand_chip nand_chip;
232 nand_info_t nand_info;
233 int ret;
234 __attribute__((noreturn)) void (*uboot)(void);
235
236 /*
237 * Init board specific nand support
238 */
239 nand_info.priv = &nand_chip;
240 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
241 nand_chip.dev_ready = NULL; /* preset to NULL */
242 board_nand_init(&nand_chip);
243
244 if (nand_chip.select_chip)
245 nand_chip.select_chip(&nand_info, 0);
246
247 /*
248 * Load U-Boot image from NAND into RAM
249 */
250 ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
251 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
252
253 #ifdef CONFIG_NAND_ENV_DST
254 nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
255 (uchar *)CONFIG_NAND_ENV_DST);
256
257 #ifdef CONFIG_ENV_OFFSET_REDUND
258 nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
259 (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
260 #endif
261 #endif
262
263 if (nand_chip.select_chip)
264 nand_chip.select_chip(&nand_info, -1);
265
266 /*
267 * Jump to U-Boot image
268 */
269 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
270 (*uboot)();
271 }
272