1 /* i1401_defs.h: IBM 1401 simulator definitions
2 
3    Copyright (c) 1993-2010, Robert M. Supnik
4 
5    Permission is hereby granted, free of charge, to any person obtaining a
6    copy of this software and associated documentation files (the "Software"),
7    to deal in the Software without restriction, including without limitation
8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
9    and/or sell copies of the Software, and to permit persons to whom the
10    Software is furnished to do so, subject to the following conditions:
11 
12    The above copyright notice and this permission notice shall be included in
13    all copies or substantial portions of the Software.
14 
15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18    ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 
22    Except as contained in this notice, the name of Robert M Supnik shall not be
23    used in advertising or otherwise to promote the sale, use or other dealings
24    in this Software without prior written authorization from Robert M Supnik.
25 
26    06-JUl-10    RMS     Added overlap indicator definitions
27    22-May-10    RMS     Added check for 64b definitions
28    11-Jul-08    RMS     Added IO mode flag for boot (from Bob Abeles)
29    28-Jun-07    RMS     Defined character code for tape mark
30    14-Nov-04    RMS     Added column binary support
31    27-Oct-04    RMS     Added maximum instruction length
32    16-Mar-03    RMS     Fixed mnemonic for MCS
33    03-Jun-02    RMS     Added 1311 support
34    14-Apr-99    RMS     Converted t_addr to unsigned
35 
36    This simulator is based on the 1401 simulator written by Len Fehskens
37    with assistance from Sarah Lee Harris and Bob Supnik. This one's for
38    you, Len.  I am grateful to Paul Pierce and Charles Owen for their help
39    in answering questions, gathering source material, and debugging.
40 */
41 
42 #ifndef _I1401_DEFS_H_
43 #define _I1401_DEFS_H_  0
44 
45 #include "sim_defs.h"
46 
47 #if defined(USE_INT64) || defined(USE_ADDR64)
48 #error "1401 does not support 64b values!"
49 #endif
50 
51 /* Simulator stop codes */
52 
53 #define STOP_NXI        1                               /* unimpl instr */
54 #define STOP_NXM        2                               /* non-exist mem */
55 #define STOP_NXD        3                               /* non-exist dev */
56 #define STOP_NOWM       4                               /* no WM under op */
57 #define STOP_INVA       5                               /* invalid A addr */
58 #define STOP_INVB       6                               /* invalid B addr */
59 #define STOP_INVL       7                               /* invalid length */
60 #define STOP_INVM       8                               /* invalid modifier */
61 #define STOP_INVBR      9                               /* invalid branch */
62 #define STOP_IBKPT      10                              /* breakpoint */
63 #define STOP_HALT       11                              /* halt */
64 #define STOP_INVMTU     12                              /* invalid MT unit */
65 #define STOP_MTZ        13                              /* MT zero lnt rec */
66 #define STOP_MTL        14                              /* MT write lock */
67 #define STOP_CCT        15                              /* inv CCT channel */
68 #define STOP_NOCD       16                              /* no cards left */
69 #define STOP_WRAP       17                              /* AS, BS mem wrap */
70 #define STOP_IOC        18                              /* I/O check */
71 #define STOP_INVDSC     19                              /* invalid disk sector */
72 #define STOP_INVDCN     20                              /* invalid disk count */
73 #define STOP_INVDSK     21                              /* invalid disk unit */
74 #define STOP_INVDFN     22                              /* invalid disk func */
75 #define STOP_INVDLN     23                              /* invalid disk reclen */
76 #define STOP_WRADIS     24                              /* write address dis */
77 #define STOP_WRCHKE     25                              /* write check error */
78 #define STOP_INVDAD     26                              /* invalid disk addr */
79 #define STOP_INVDCY     27                              /* invalid direct seek */
80 
81 /* Memory and devices */
82 
83 #define MAXMEMSIZE      16000                           /* max memory */
84 #define MEMSIZE         (cpu_unit.capac)                /* current memory */
85 #define CDR_BUF         1                               /* card rdr buffer */
86 #define CDR_WIDTH       80                              /* card rdr width */
87 #define CDP_BUF         101                             /* card punch buffer */
88 #define CDP_WIDTH       80                              /* card punch width */
89 #define CD_CBUF1        401                             /* r/p col bin buf 12-3 */
90 #define CD_CBUF2        501                             /* r/p col bin buf 4-9 */
91 #define LPT_BUF         201                             /* line print buffer */
92 #define LPT_WIDTH       132                             /* line print width */
93 #define CCT_LNT         132                             /* car ctrl length */
94 #define INQ_WIDTH       80                              /* inq term width */
95 #define ADDR_ERR(x)     (((uint32) (x)) >= MEMSIZE)
96 
97 /* Binary address format
98 
99         <14:0>          address, with index added in
100         <23:16>         index register memory address
101         <25:24>         address error bits
102 */
103 
104 #define ADDRMASK        037777                          /* addr mask */
105 #define INDEXMASK       077777                          /* addr + index mask */
106 #define V_INDEX         16
107 #define M_INDEX         0177
108 #define V_ADDRERR       24
109 #define BA              (1 << V_ADDRERR)                /* bad addr digit */
110 #define X1              (87 << V_INDEX)                 /* index reg 1 */
111 #define X2              (92 << V_INDEX)                 /* index reg 2 */
112 #define X3              (97 << V_INDEX)                 /* index reg 3 */
113 
114 /* CPU instruction control flags.  The flag definitions must be harmonized
115    with the UNIT flag definitions used by the simulator. */
116 
117 /* Lengths */
118 
119 #define L1              0001                            /* 1: op */
120 #define L2              0002                            /* 2: op d */
121 #define L4              0004                            /* 4: op aaa */
122 #define L5              0010                            /* 5: op aaa d */
123 #define L7              0020                            /* 7: op aaa bbb */
124 #define L8              0040                            /* 8: op aaa bbb d */
125 #define MAX_L           8                               /* max length */
126 
127 /* CPU options, stored in cpu_unit.flags */
128 
129 #define MDV             (1 << (UNIT_V_UF + 0))          /* multiply/divide */
130 #define MR              (1 << (UNIT_V_UF + 1))          /* move record */
131 #define XSA             (1 << (UNIT_V_UF + 2))          /* index, store addr */
132 #define EPE             (1 << (UNIT_V_UF + 3))          /* expanded edit */
133 #define MA              (1 << (UNIT_V_UF + 4))          /* modify address */
134 #define BBE             (1 << (UNIT_V_UF + 5))          /* br bit equal */
135 #define HLE             (1 << (UNIT_V_UF + 6))          /* high/low/equal */
136 #define UNIT_MSIZE      (1 << (UNIT_V_UF + 7))          /* fake flag */
137 #define ALLOPT          (MDV + MR + XSA + EPE + MA + BBE + HLE)
138 #define STDOPT          (MDV + MR + XSA + EPE + MA + BBE + HLE)
139 
140 /* Fetch control */
141 
142 #define AREQ            (1 << (UNIT_V_UF + 8))          /* validate A */
143 #define BREQ            (1 << (UNIT_V_UF + 9))          /* validate B */
144 #define MLS             (1 << (UNIT_V_UF + 10))         /* move load store */
145 #define NOWM            (1 << (UNIT_V_UF + 11))         /* no WM at end */
146 #define HNOP            (1 << (UNIT_V_UF + 12))         /* halt or nop */
147 #define IO              (1 << (UNIT_V_UF + 13))         /* IO */
148 #define UNIT_BCD        (1 << (UNIT_V_UF + 14))         /* BCD strings */
149 
150 #if (UNIT_V_UF < 6) || ((UNIT_V_UF + 14) > 31)
151     Definition error: flags overlap
152 #endif
153 
154 /* BCD memory character format */
155 
156 #define WM              0100                            /* word mark */
157 #define ZONE            0060                            /* zone */
158 #define  BBIT           0040                            /* 1 in valid sign */
159 #define  ABIT           0020                            /* sign (1 = +) */
160 #define DIGIT           0017                            /* digit */
161 #define CHAR            0077                            /* character */
162 
163 #define V_WM            6
164 #define V_ZONE          4
165 #define V_DIGIT         0
166 
167 /* Interesting BCD characters */
168 
169 #define BCD_BLANK       000
170 #define BCD_ONE         001
171 #define BCD_TWO         002
172 #define BCD_THREE       003
173 #define BCD_FOUR        004
174 #define BCD_FIVE        005
175 #define BCD_SIX         006
176 #define BCD_SEVEN       007
177 #define BCD_EIGHT       010
178 #define BCD_NINE        011
179 #define BCD_ZERO        012
180 #define BCD_TAPMRK      017
181 #define BCD_ALT         020
182 #define BCD_S           022
183 #define BCD_U           024
184 #define BCD_W           026
185 #define BCD_RECMRK      032
186 #define BCD_COMMA       033
187 #define BCD_PERCNT      034
188 #define BCD_WM          035
189 #define BCD_BS          036
190 #define BCD_TS          037
191 #define BCD_MINUS       040
192 #define BCD_M           044
193 #define BCD_R           051
194 #define BCD_DOLLAR      053
195 #define BCD_ASTER       054
196 #define BCD_AMPER       060
197 #define BCD_A           061
198 #define BCD_B           062
199 #define BCD_C           063
200 #define BCD_E           065
201 #define BCD_DECIMAL     073
202 #define BCD_SQUARE      074
203 #define BCD_GRPMRK      077
204 
205 /* Opcodes */
206 
207 #define OP_R            001                             /* read */
208 #define OP_W            002                             /* write */
209 #define OP_WR           003                             /* write and read */
210 #define OP_P            004                             /* punch */
211 #define OP_RP           005                             /* read and punch */
212 #define OP_WP           006                             /* write and punch */
213 #define OP_WRP          007                             /* write read punch */
214 #define OP_RF           010                             /* reader feed */
215 #define OP_PF           011                             /* punch feed */
216 #define OP_MA           013                             /* modify address */
217 #define OP_MUL          014                             /* multiply */
218 #define OP_CS           021                             /* clear storage */
219 #define OP_S            022                             /* subtract */
220 #define OP_MTF          024                             /* magtape function */
221 #define OP_BWZ          025                             /* branch wm or zone */
222 #define OP_BBE          026                             /* branch bit equal */
223 #define OP_MZ           030                             /* move zone */
224 #define OP_MCS          031                             /* move suppr zeroes */
225 #define OP_SWM          033                             /* set word mark */
226 #define OP_DIV          034                             /* divide */
227 #define OP_SS           042                             /* select stacker */
228 #define OP_LCA          043                             /* load characters */
229 #define OP_MCW          044                             /* move characters */
230 #define OP_NOP          045                             /* no op */
231 #define OP_MCM          047                             /* move to rec/grp mk */
232 #define OP_SAR          050                             /* store A register */
233 #define OP_ZS           052                             /* zero and subtract */
234 #define OP_A            061                             /* add */
235 #define OP_B            062                             /* branch */
236 #define OP_C            063                             /* compare */
237 #define OP_MN           064                             /* move numeric */
238 #define OP_MCE          065                             /* move char and edit */
239 #define OP_CC           066                             /* carriage control */
240 #define OP_SBR          070                             /* store B register */
241 #define OP_ZA           072                             /* zero and add */
242 #define OP_H            073                             /* halt */
243 #define OP_CWM          074                             /* clear word mark */
244 
245 /* I/O addresses */
246 
247 #define IO_INQ          023                             /* inquiry terminal */
248 #define IO_MT           024                             /* magtape */
249 #define IO_MTB          062                             /* binary magtape */
250 #define IO_DP           066                             /* 1311 diskpack */
251 
252 /* I/O modes */
253 
254 #define MD_NORM         0                               /* normal (move) */
255 #define MD_WM           1                               /* word mark (load) */
256 #define MD_BIN          2                               /* binary */
257 #define MD_BOOT         4                               /* boot read */
258 
259 /* Indicator characters */
260 
261 #define IN_UNC          000                             /* unconditional */
262 #define IN_CC9          011                             /* carr ctrl chan 9 */
263 #define IN_CC12         014                             /* carr ctrl chan 12 */
264 #define IN_UNQ          021                             /* unequal */
265 #define IN_EQU          022                             /* equal */
266 #define IN_LOW          023                             /* low */
267 #define IN_HGH          024                             /* high */
268 #define IN_DPW          025                             /* parity/compare check */
269 #define IN_LNG          026                             /* wrong lnt record */
270 #define IN_UNA          027                             /* unequal addr cmp */
271 #define IN_DSK          030                             /* disk error */
272 #define IN_OVF          031                             /* overflow */
273 #define IN_LPT          032                             /* printer error */
274 #define IN_PRO          034                             /* process check */
275 #define IN_DBY          036                             /* disk busy */
276 #define IN_TBY          041                             /* tape busy */
277 #define IN_END          042                             /* end indicator */
278 #define IN_TAP          043                             /* tape error */
279 #define IN_ACC          045                             /* access error */
280 #define IN_BSY          047                             /* printer busy */
281 #define IN_INR          050                             /* inquiry request */
282 #define IN_PCB          051                             /* printer carr busy */
283 #define IN_PNCH         052                             /* punch error */
284 #define IN_INC          054                             /* inquiry clear */
285 #define IN_LST          061                             /* last card */
286 #define IN_SSB          062                             /* sense switch B */
287 #define IN_SSC          063                             /* sense switch C */
288 #define IN_SSD          064                             /* sense switch D */
289 #define IN_SSE          065                             /* sense switch E */
290 #define IN_SSF          066                             /* sense switch F */
291 #define IN_SSG          067                             /* sense switch G */
292 #define IN_RBY          070                             /* reader busy */
293 #define IN_PBY          071                             /* punch busy */
294 #define IN_READ         072                             /* reader error */
295 
296 #define CRETIOE(f,c)    return ((f)? (c): SCPE_OK)
297 
298 /* Function prototypes */
299 
300 int32 bcd2ascii (int32 c, t_bool use_h);
301 int32 ascii2bcd (int32 c);
302 
303 
304 #endif
305