1 // Copyright 2020 yuzu Emulator Project
2 // Licensed under GPLv2 or any later version
3 // Refer to the license.txt file included.
4 
5 #include <array>
6 #include "common/assert.h"
7 #include "video_core/command_classes/nvdec.h"
8 #include "video_core/command_classes/vic.h"
9 #include "video_core/engines/maxwell_3d.h"
10 #include "video_core/gpu.h"
11 #include "video_core/memory_manager.h"
12 #include "video_core/texture_cache/surface_params.h"
13 
14 extern "C" {
15 #include <libswscale/swscale.h>
16 }
17 
18 namespace Tegra {
19 
Vic(GPU & gpu_,std::shared_ptr<Nvdec> nvdec_processor_)20 Vic::Vic(GPU& gpu_, std::shared_ptr<Nvdec> nvdec_processor_)
21     : gpu(gpu_), nvdec_processor(std::move(nvdec_processor_)) {}
22 Vic::~Vic() = default;
23 
VicStateWrite(u32 offset,u32 arguments)24 void Vic::VicStateWrite(u32 offset, u32 arguments) {
25     u8* const state_offset = reinterpret_cast<u8*>(&vic_state) + offset * sizeof(u32);
26     std::memcpy(state_offset, &arguments, sizeof(u32));
27 }
28 
ProcessMethod(Method method,const std::vector<u32> & arguments)29 void Vic::ProcessMethod(Method method, const std::vector<u32>& arguments) {
30     LOG_DEBUG(HW_GPU, "Vic method 0x{:X}", method);
31     VicStateWrite(static_cast<u32>(method), arguments[0]);
32     const u64 arg = static_cast<u64>(arguments[0]) << 8;
33     switch (method) {
34     case Method::Execute:
35         Execute();
36         break;
37     case Method::SetConfigStructOffset:
38         config_struct_address = arg;
39         break;
40     case Method::SetOutputSurfaceLumaOffset:
41         output_surface_luma_address = arg;
42         break;
43     case Method::SetOutputSurfaceChromaUOffset:
44         output_surface_chroma_u_address = arg;
45         break;
46     case Method::SetOutputSurfaceChromaVOffset:
47         output_surface_chroma_v_address = arg;
48         break;
49     default:
50         break;
51     }
52 }
53 
Execute()54 void Vic::Execute() {
55     if (output_surface_luma_address == 0) {
56         LOG_ERROR(Service_NVDRV, "VIC Luma address not set. Recieved 0x{:X}",
57                   vic_state.output_surface.luma_offset);
58         return;
59     }
60     const VicConfig config{gpu.MemoryManager().Read<u64>(config_struct_address + 0x20)};
61     const AVFramePtr frame_ptr = nvdec_processor->GetFrame();
62     const auto* frame = frame_ptr.get();
63     if (!frame || frame->width == 0 || frame->height == 0) {
64         return;
65     }
66     const VideoPixelFormat pixel_format =
67         static_cast<VideoPixelFormat>(config.pixel_format.Value());
68     switch (pixel_format) {
69     case VideoPixelFormat::BGRA8:
70     case VideoPixelFormat::RGBA8: {
71         LOG_TRACE(Service_NVDRV, "Writing RGB Frame");
72 
73         if (scaler_ctx == nullptr || frame->width != scaler_width ||
74             frame->height != scaler_height) {
75             const AVPixelFormat target_format =
76                 (pixel_format == VideoPixelFormat::RGBA8) ? AV_PIX_FMT_RGBA : AV_PIX_FMT_BGRA;
77 
78             sws_freeContext(scaler_ctx);
79             scaler_ctx = nullptr;
80 
81             // FFmpeg returns all frames in YUV420, convert it into expected format
82             scaler_ctx =
83                 sws_getContext(frame->width, frame->height, AV_PIX_FMT_YUV420P, frame->width,
84                                frame->height, target_format, 0, nullptr, nullptr, nullptr);
85 
86             scaler_width = frame->width;
87             scaler_height = frame->height;
88         }
89         // Get Converted frame
90         const std::size_t linear_size = frame->width * frame->height * 4;
91 
92         using AVMallocPtr = std::unique_ptr<u8, decltype(&av_free)>;
93         AVMallocPtr converted_frame_buffer{static_cast<u8*>(av_malloc(linear_size)), av_free};
94 
95         const int converted_stride{frame->width * 4};
96         u8* const converted_frame_buf_addr{converted_frame_buffer.get()};
97 
98         sws_scale(scaler_ctx, frame->data, frame->linesize, 0, frame->height,
99                   &converted_frame_buf_addr, &converted_stride);
100 
101         const u32 blk_kind = static_cast<u32>(config.block_linear_kind);
102         if (blk_kind != 0) {
103             // swizzle pitch linear to block linear
104             const u32 block_height = static_cast<u32>(config.block_linear_height_log2);
105             const auto size = Tegra::Texture::CalculateSize(true, 4, frame->width, frame->height, 1,
106                                                             block_height, 0);
107             std::vector<u8> swizzled_data(size);
108             Tegra::Texture::CopySwizzledData(frame->width, frame->height, 1, 4, 4,
109                                              swizzled_data.data(), converted_frame_buffer.get(),
110                                              false, block_height, 0, 1);
111 
112             gpu.MemoryManager().WriteBlock(output_surface_luma_address, swizzled_data.data(), size);
113             gpu.Maxwell3D().OnMemoryWrite();
114         } else {
115             // send pitch linear frame
116             gpu.MemoryManager().WriteBlock(output_surface_luma_address, converted_frame_buf_addr,
117                                            linear_size);
118             gpu.Maxwell3D().OnMemoryWrite();
119         }
120         break;
121     }
122     case VideoPixelFormat::Yuv420: {
123         LOG_TRACE(Service_NVDRV, "Writing YUV420 Frame");
124 
125         const std::size_t surface_width = config.surface_width_minus1 + 1;
126         const std::size_t surface_height = config.surface_height_minus1 + 1;
127         const std::size_t half_width = surface_width / 2;
128         const std::size_t half_height = config.surface_height_minus1 / 2;
129         const std::size_t aligned_width = (surface_width + 0xff) & ~0xff;
130 
131         const auto* luma_ptr = frame->data[0];
132         const auto* chroma_b_ptr = frame->data[1];
133         const auto* chroma_r_ptr = frame->data[2];
134         const auto stride = frame->linesize[0];
135         const auto half_stride = frame->linesize[1];
136 
137         std::vector<u8> luma_buffer(aligned_width * surface_height);
138         std::vector<u8> chroma_buffer(aligned_width * half_height);
139 
140         // Populate luma buffer
141         for (std::size_t y = 0; y < surface_height - 1; ++y) {
142             std::size_t src = y * stride;
143             std::size_t dst = y * aligned_width;
144 
145             std::size_t size = surface_width;
146 
147             for (std::size_t offset = 0; offset < size; ++offset) {
148                 luma_buffer[dst + offset] = luma_ptr[src + offset];
149             }
150         }
151         gpu.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(),
152                                        luma_buffer.size());
153 
154         // Populate chroma buffer from both channels with interleaving.
155         for (std::size_t y = 0; y < half_height; ++y) {
156             std::size_t src = y * half_stride;
157             std::size_t dst = y * aligned_width;
158 
159             for (std::size_t x = 0; x < half_width; ++x) {
160                 chroma_buffer[dst + x * 2] = chroma_b_ptr[src + x];
161                 chroma_buffer[dst + x * 2 + 1] = chroma_r_ptr[src + x];
162             }
163         }
164         gpu.MemoryManager().WriteBlock(output_surface_chroma_u_address, chroma_buffer.data(),
165                                        chroma_buffer.size());
166         gpu.Maxwell3D().OnMemoryWrite();
167         break;
168     }
169     default:
170         UNIMPLEMENTED_MSG("Unknown video pixel format {}", config.pixel_format.Value());
171         break;
172     }
173 }
174 
175 } // namespace Tegra
176