1 /* z80_ddfd.c Z80 {DD,FD}xx opcodes 2 Copyright (c) 1999-2003 Philip Kendall 3 4 This program is free software; you can redistribute it and/or modify 5 it under the terms of the GNU General Public License as published by 6 the Free Software Foundation; either version 2 of the License, or 7 (at your option) any later version. 8 9 This program is distributed in the hope that it will be useful, 10 but WITHOUT ANY WARRANTY; without even the implied warranty of 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 GNU General Public License for more details. 13 14 You should have received a copy of the GNU General Public License along 15 with this program; if not, write to the Free Software Foundation, Inc., 16 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 17 18 Author contact information: 19 20 E-mail: philip-fuse@shadowmagic.org.uk 21 22 */ 23 24 /* NB: this file is autogenerated by 'z80.pl' from 'opcodes_ddfd.dat', 25 and included in 'z80_ops.c' */ 26 27 case 0x09: /* ADD REGISTER,BC */ 28 contend_read_no_mreq( IR, 1 ); 29 contend_read_no_mreq( IR, 1 ); 30 contend_read_no_mreq( IR, 1 ); 31 contend_read_no_mreq( IR, 1 ); 32 contend_read_no_mreq( IR, 1 ); 33 contend_read_no_mreq( IR, 1 ); 34 contend_read_no_mreq( IR, 1 ); 35 ADD16(REGISTER,BC); 36 break; 37 case 0x19: /* ADD REGISTER,DE */ 38 contend_read_no_mreq( IR, 1 ); 39 contend_read_no_mreq( IR, 1 ); 40 contend_read_no_mreq( IR, 1 ); 41 contend_read_no_mreq( IR, 1 ); 42 contend_read_no_mreq( IR, 1 ); 43 contend_read_no_mreq( IR, 1 ); 44 contend_read_no_mreq( IR, 1 ); 45 ADD16(REGISTER,DE); 46 break; 47 case 0x21: /* LD REGISTER,nnnn */ 48 REGISTERL=Z80_RB_MACRO(PC++); 49 REGISTERH=Z80_RB_MACRO(PC++); 50 break; 51 case 0x22: /* LD (nnnn),REGISTER */ 52 LD16_NNRR(REGISTERL,REGISTERH); 53 break; 54 case 0x23: /* INC REGISTER */ 55 contend_read_no_mreq( IR, 1 ); 56 contend_read_no_mreq( IR, 1 ); 57 REGISTER++; 58 break; 59 case 0x24: /* INC REGISTERH */ 60 INC(REGISTERH); 61 break; 62 case 0x25: /* DEC REGISTERH */ 63 DEC(REGISTERH); 64 break; 65 case 0x26: /* LD REGISTERH,nn */ 66 REGISTERH = Z80_RB_MACRO( PC++ ); 67 break; 68 case 0x29: /* ADD REGISTER,REGISTER */ 69 contend_read_no_mreq( IR, 1 ); 70 contend_read_no_mreq( IR, 1 ); 71 contend_read_no_mreq( IR, 1 ); 72 contend_read_no_mreq( IR, 1 ); 73 contend_read_no_mreq( IR, 1 ); 74 contend_read_no_mreq( IR, 1 ); 75 contend_read_no_mreq( IR, 1 ); 76 ADD16(REGISTER,REGISTER); 77 break; 78 case 0x2a: /* LD REGISTER,(nnnn) */ 79 LD16_RRNN(REGISTERL,REGISTERH); 80 break; 81 case 0x2b: /* DEC REGISTER */ 82 contend_read_no_mreq( IR, 1 ); 83 contend_read_no_mreq( IR, 1 ); 84 REGISTER--; 85 break; 86 case 0x2c: /* INC REGISTERL */ 87 INC(REGISTERL); 88 break; 89 case 0x2d: /* DEC REGISTERL */ 90 DEC(REGISTERL); 91 break; 92 case 0x2e: /* LD REGISTERL,nn */ 93 REGISTERL = Z80_RB_MACRO( PC++ ); 94 break; 95 case 0x34: /* INC (REGISTER+dd) */ 96 { 97 uint8_t offset, bytetemp; 98 uint16_t wordtemp; 99 offset = Z80_RB_MACRO( PC ); 100 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 101 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 102 contend_read_no_mreq( PC, 1 ); PC++; 103 wordtemp = REGISTER + (int8)offset; 104 bytetemp = Z80_RB_MACRO( wordtemp ); 105 contend_read_no_mreq( wordtemp, 1 ); 106 INC(bytetemp); 107 Z80_WB_MACRO(wordtemp,bytetemp); 108 } 109 break; 110 case 0x35: /* DEC (REGISTER+dd) */ 111 { 112 uint8_t offset, bytetemp; 113 uint16_t wordtemp; 114 offset = Z80_RB_MACRO( PC ); 115 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 116 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 117 contend_read_no_mreq( PC, 1 ); PC++; 118 wordtemp = REGISTER + (int8)offset; 119 bytetemp = Z80_RB_MACRO( wordtemp ); 120 contend_read_no_mreq( wordtemp, 1 ); 121 DEC(bytetemp); 122 Z80_WB_MACRO(wordtemp,bytetemp); 123 } 124 break; 125 case 0x36: /* LD (REGISTER+dd),nn */ 126 { 127 uint8_t offset, value; 128 offset = Z80_RB_MACRO( PC++ ); 129 value = Z80_RB_MACRO( PC ); 130 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); PC++; 131 Z80_WB_MACRO( REGISTER + (int8)offset, value ); 132 } 133 break; 134 case 0x39: /* ADD REGISTER,SP */ 135 contend_read_no_mreq( IR, 1 ); 136 contend_read_no_mreq( IR, 1 ); 137 contend_read_no_mreq( IR, 1 ); 138 contend_read_no_mreq( IR, 1 ); 139 contend_read_no_mreq( IR, 1 ); 140 contend_read_no_mreq( IR, 1 ); 141 contend_read_no_mreq( IR, 1 ); 142 ADD16(REGISTER,SP); 143 break; 144 case 0x44: /* LD B,REGISTERH */ 145 B=REGISTERH; 146 break; 147 case 0x45: /* LD B,REGISTERL */ 148 B=REGISTERL; 149 break; 150 case 0x46: /* LD B,(REGISTER+dd) */ 151 { 152 uint8_t offset; 153 offset = Z80_RB_MACRO( PC ); 154 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 155 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 156 contend_read_no_mreq( PC, 1 ); PC++; 157 B = Z80_RB_MACRO( REGISTER + (int8)offset ); 158 } 159 break; 160 case 0x4c: /* LD C,REGISTERH */ 161 C=REGISTERH; 162 break; 163 case 0x4d: /* LD C,REGISTERL */ 164 C=REGISTERL; 165 break; 166 case 0x4e: /* LD C,(REGISTER+dd) */ 167 { 168 uint8_t offset; 169 offset = Z80_RB_MACRO( PC ); 170 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 171 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 172 contend_read_no_mreq( PC, 1 ); PC++; 173 C = Z80_RB_MACRO( REGISTER + (int8)offset ); 174 } 175 break; 176 case 0x54: /* LD D,REGISTERH */ 177 D=REGISTERH; 178 break; 179 case 0x55: /* LD D,REGISTERL */ 180 D=REGISTERL; 181 break; 182 case 0x56: /* LD D,(REGISTER+dd) */ 183 { 184 uint8_t offset; 185 offset = Z80_RB_MACRO( PC ); 186 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 187 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 188 contend_read_no_mreq( PC, 1 ); PC++; 189 D = Z80_RB_MACRO( REGISTER + (int8)offset ); 190 } 191 break; 192 case 0x5c: /* LD E,REGISTERH */ 193 E=REGISTERH; 194 break; 195 case 0x5d: /* LD E,REGISTERL */ 196 E=REGISTERL; 197 break; 198 case 0x5e: /* LD E,(REGISTER+dd) */ 199 { 200 uint8_t offset; 201 offset = Z80_RB_MACRO( PC ); 202 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 203 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 204 contend_read_no_mreq( PC, 1 ); PC++; 205 E = Z80_RB_MACRO( REGISTER + (int8)offset ); 206 } 207 break; 208 case 0x60: /* LD REGISTERH,B */ 209 REGISTERH=B; 210 break; 211 case 0x61: /* LD REGISTERH,C */ 212 REGISTERH=C; 213 break; 214 case 0x62: /* LD REGISTERH,D */ 215 REGISTERH=D; 216 break; 217 case 0x63: /* LD REGISTERH,E */ 218 REGISTERH=E; 219 break; 220 case 0x64: /* LD REGISTERH,REGISTERH */ 221 break; 222 case 0x65: /* LD REGISTERH,REGISTERL */ 223 REGISTERH=REGISTERL; 224 break; 225 case 0x66: /* LD H,(REGISTER+dd) */ 226 { 227 uint8_t offset; 228 offset = Z80_RB_MACRO( PC ); 229 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 230 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 231 contend_read_no_mreq( PC, 1 ); PC++; 232 H = Z80_RB_MACRO( REGISTER + (int8)offset ); 233 } 234 break; 235 case 0x67: /* LD REGISTERH,A */ 236 REGISTERH=A; 237 break; 238 case 0x68: /* LD REGISTERL,B */ 239 REGISTERL=B; 240 break; 241 case 0x69: /* LD REGISTERL,C */ 242 REGISTERL=C; 243 break; 244 case 0x6a: /* LD REGISTERL,D */ 245 REGISTERL=D; 246 break; 247 case 0x6b: /* LD REGISTERL,E */ 248 REGISTERL=E; 249 break; 250 case 0x6c: /* LD REGISTERL,REGISTERH */ 251 REGISTERL=REGISTERH; 252 break; 253 case 0x6d: /* LD REGISTERL,REGISTERL */ 254 break; 255 case 0x6e: /* LD L,(REGISTER+dd) */ 256 { 257 uint8_t offset; 258 offset = Z80_RB_MACRO( PC ); 259 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 260 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 261 contend_read_no_mreq( PC, 1 ); PC++; 262 L = Z80_RB_MACRO( REGISTER + (int8)offset ); 263 } 264 break; 265 case 0x6f: /* LD REGISTERL,A */ 266 REGISTERL=A; 267 break; 268 case 0x70: /* LD (REGISTER+dd),B */ 269 { 270 uint8_t offset; 271 offset = Z80_RB_MACRO( PC ); 272 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 273 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 274 contend_read_no_mreq( PC, 1 ); PC++; 275 Z80_WB_MACRO( REGISTER + (int8)offset, B ); 276 } 277 break; 278 case 0x71: /* LD (REGISTER+dd),C */ 279 { 280 uint8_t offset; 281 offset = Z80_RB_MACRO( PC ); 282 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 283 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 284 contend_read_no_mreq( PC, 1 ); PC++; 285 Z80_WB_MACRO( REGISTER + (int8)offset, C ); 286 } 287 break; 288 case 0x72: /* LD (REGISTER+dd),D */ 289 { 290 uint8_t offset; 291 offset = Z80_RB_MACRO( PC ); 292 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 293 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 294 contend_read_no_mreq( PC, 1 ); PC++; 295 Z80_WB_MACRO( REGISTER + (int8)offset, D ); 296 } 297 break; 298 case 0x73: /* LD (REGISTER+dd),E */ 299 { 300 uint8_t offset; 301 offset = Z80_RB_MACRO( PC ); 302 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 303 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 304 contend_read_no_mreq( PC, 1 ); PC++; 305 Z80_WB_MACRO( REGISTER + (int8)offset, E ); 306 } 307 break; 308 case 0x74: /* LD (REGISTER+dd),H */ 309 { 310 uint8_t offset; 311 offset = Z80_RB_MACRO( PC ); 312 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 313 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 314 contend_read_no_mreq( PC, 1 ); PC++; 315 Z80_WB_MACRO( REGISTER + (int8)offset, H ); 316 } 317 break; 318 case 0x75: /* LD (REGISTER+dd),L */ 319 { 320 uint8_t offset; 321 offset = Z80_RB_MACRO( PC ); 322 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 323 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 324 contend_read_no_mreq( PC, 1 ); PC++; 325 Z80_WB_MACRO( REGISTER + (int8)offset, L ); 326 } 327 break; 328 case 0x77: /* LD (REGISTER+dd),A */ 329 { 330 uint8_t offset; 331 offset = Z80_RB_MACRO( PC ); 332 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 333 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 334 contend_read_no_mreq( PC, 1 ); PC++; 335 Z80_WB_MACRO( REGISTER + (int8)offset, A ); 336 } 337 break; 338 case 0x7c: /* LD A,REGISTERH */ 339 A=REGISTERH; 340 break; 341 case 0x7d: /* LD A,REGISTERL */ 342 A=REGISTERL; 343 break; 344 case 0x7e: /* LD A,(REGISTER+dd) */ 345 { 346 uint8_t offset; 347 offset = Z80_RB_MACRO( PC ); 348 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 349 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 350 contend_read_no_mreq( PC, 1 ); PC++; 351 A = Z80_RB_MACRO( REGISTER + (int8)offset ); 352 } 353 break; 354 case 0x84: /* ADD A,REGISTERH */ 355 ADD(REGISTERH); 356 break; 357 case 0x85: /* ADD A,REGISTERL */ 358 ADD(REGISTERL); 359 break; 360 case 0x86: /* ADD A,(REGISTER+dd) */ 361 { 362 uint8_t offset, bytetemp; 363 offset = Z80_RB_MACRO( PC ); 364 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 365 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 366 contend_read_no_mreq( PC, 1 ); PC++; 367 bytetemp = Z80_RB_MACRO( REGISTER + (int8)offset ); 368 ADD(bytetemp); 369 } 370 break; 371 case 0x8c: /* ADC A,REGISTERH */ 372 ADC(REGISTERH); 373 break; 374 case 0x8d: /* ADC A,REGISTERL */ 375 ADC(REGISTERL); 376 break; 377 case 0x8e: /* ADC A,(REGISTER+dd) */ 378 { 379 uint8_t offset, bytetemp; 380 offset = Z80_RB_MACRO( PC ); 381 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 382 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 383 contend_read_no_mreq( PC, 1 ); PC++; 384 bytetemp = Z80_RB_MACRO( REGISTER + (int8)offset ); 385 ADC(bytetemp); 386 } 387 break; 388 case 0x94: /* SUB A,REGISTERH */ 389 SUB(REGISTERH); 390 break; 391 case 0x95: /* SUB A,REGISTERL */ 392 SUB(REGISTERL); 393 break; 394 case 0x96: /* SUB A,(REGISTER+dd) */ 395 { 396 uint8_t offset, bytetemp; 397 offset = Z80_RB_MACRO( PC ); 398 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 399 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 400 contend_read_no_mreq( PC, 1 ); PC++; 401 bytetemp = Z80_RB_MACRO( REGISTER + (int8)offset ); 402 SUB(bytetemp); 403 } 404 break; 405 case 0x9c: /* SBC A,REGISTERH */ 406 SBC(REGISTERH); 407 break; 408 case 0x9d: /* SBC A,REGISTERL */ 409 SBC(REGISTERL); 410 break; 411 case 0x9e: /* SBC A,(REGISTER+dd) */ 412 { 413 uint8_t offset, bytetemp; 414 offset = Z80_RB_MACRO( PC ); 415 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 416 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 417 contend_read_no_mreq( PC, 1 ); PC++; 418 bytetemp = Z80_RB_MACRO( REGISTER + (int8)offset ); 419 SBC(bytetemp); 420 } 421 break; 422 case 0xa4: /* AND A,REGISTERH */ 423 AND(REGISTERH); 424 break; 425 case 0xa5: /* AND A,REGISTERL */ 426 AND(REGISTERL); 427 break; 428 case 0xa6: /* AND A,(REGISTER+dd) */ 429 { 430 uint8_t offset, bytetemp; 431 offset = Z80_RB_MACRO( PC ); 432 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 433 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 434 contend_read_no_mreq( PC, 1 ); PC++; 435 bytetemp = Z80_RB_MACRO( REGISTER + (int8)offset ); 436 AND(bytetemp); 437 } 438 break; 439 case 0xac: /* XOR A,REGISTERH */ 440 XOR(REGISTERH); 441 break; 442 case 0xad: /* XOR A,REGISTERL */ 443 XOR(REGISTERL); 444 break; 445 case 0xae: /* XOR A,(REGISTER+dd) */ 446 { 447 uint8_t offset, bytetemp; 448 offset = Z80_RB_MACRO( PC ); 449 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 450 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 451 contend_read_no_mreq( PC, 1 ); PC++; 452 bytetemp = Z80_RB_MACRO( REGISTER + (int8)offset ); 453 XOR(bytetemp); 454 } 455 break; 456 case 0xb4: /* OR A,REGISTERH */ 457 OR(REGISTERH); 458 break; 459 case 0xb5: /* OR A,REGISTERL */ 460 OR(REGISTERL); 461 break; 462 case 0xb6: /* OR A,(REGISTER+dd) */ 463 { 464 uint8_t offset, bytetemp; 465 offset = Z80_RB_MACRO( PC ); 466 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 467 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 468 contend_read_no_mreq( PC, 1 ); PC++; 469 bytetemp = Z80_RB_MACRO( REGISTER + (int8)offset ); 470 OR(bytetemp); 471 } 472 break; 473 case 0xbc: /* CP A,REGISTERH */ 474 CP(REGISTERH); 475 break; 476 case 0xbd: /* CP A,REGISTERL */ 477 CP(REGISTERL); 478 break; 479 case 0xbe: /* CP A,(REGISTER+dd) */ 480 { 481 uint8_t offset, bytetemp; 482 offset = Z80_RB_MACRO( PC ); 483 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 484 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); 485 contend_read_no_mreq( PC, 1 ); PC++; 486 bytetemp = Z80_RB_MACRO( REGISTER + (int8)offset ); 487 CP(bytetemp); 488 } 489 break; 490 case 0xcb: /* shift DDFDCB */ 491 { 492 uint16_t tempaddr; uint8_t opcode3; 493 tempaddr = REGISTER + (int8)Z80_RB_MACRO( PC ); 494 PC++; 495 opcode3 = Z80_RB_MACRO( PC ); 496 contend_read_no_mreq( PC, 1 ); contend_read_no_mreq( PC, 1 ); PC++; 497 switch(opcode3) 498 { 499 #include "z80_ddfdcb.c" 500 } 501 } 502 break; 503 case 0xe1: /* POP REGISTER */ 504 POP16(REGISTERL,REGISTERH); 505 break; 506 case 0xe3: /* EX (SP),REGISTER */ 507 { 508 uint8_t bytetempl, bytetemph; 509 bytetempl = Z80_RB_MACRO( SP ); 510 bytetemph = Z80_RB_MACRO( SP + 1 ); contend_read_no_mreq( SP + 1, 1 ); 511 Z80_WB_MACRO( SP + 1, REGISTERH ); 512 Z80_WB_MACRO( SP, REGISTERL ); 513 contend_write_no_mreq( SP, 1 ); contend_write_no_mreq( SP, 1 ); 514 REGISTERL=bytetempl; REGISTERH=bytetemph; 515 } 516 break; 517 case 0xe5: /* PUSH REGISTER */ 518 contend_read_no_mreq( IR, 1 ); 519 PUSH16(REGISTERL,REGISTERH); 520 break; 521 case 0xe9: /* JP REGISTER */ 522 PC=REGISTER; /* NB: NOT INDIRECT! */ 523 break; 524 case 0xf9: /* LD SP,REGISTER */ 525 contend_read_no_mreq( IR, 1 ); 526 contend_read_no_mreq( IR, 1 ); 527 SP = REGISTER; 528 break; 529 default: /* Instruction did not involve H or L, so backtrack 530 one instruction and parse again */ 531 PC--; 532 R--; 533 opcode = opcode2; 534 break; // FIXME! 535 //goto end_opcode; 536