1 // Galaga & Dig-Dug driver for FB Alpha, based on the MAME driver by Nicola Salmoria & previous work by Martin Scragg, Mirko Buffoni, Aaron Giles
2 // Dig Dug added July 27, 2015
3 // Xevious added April 22, 2019
4
5 #include "tiles_generic.h"
6 #include "z80_intf.h"
7 #include "namco_snd.h"
8 #include "samples.h"
9 #include "earom.h"
10
11 enum
12 {
13 CPU1 = 0,
14 CPU2,
15 CPU3,
16 NAMCO_BRD_CPU_COUNT
17 };
18
19 struct CPU_Control_Def
20 {
21 UINT8 fireIRQ;
22 UINT8 halt;
23 };
24
25 struct CPU_Def
26 {
27 struct CPU_Control_Def CPU[NAMCO_BRD_CPU_COUNT];
28 };
29
30 static struct CPU_Def cpus = { 0 };
31
32 struct CPU_Memory_Map_Def
33 {
34 UINT8 **byteArray;
35 UINT32 startAddress;
36 UINT32 endAddress;
37 UINT32 type;
38 };
39
40 struct CPU_Config_Def
41 {
42 UINT32 id;
43 UINT8 __fastcall (*z80ProgRead)(UINT16 addr);
44 void __fastcall (*z80ProgWrite)(UINT16 addr, UINT8 dta);
45 void (*z80MemMap)(void);
46 };
47
48 struct Memory_Def
49 {
50 struct
51 {
52 UINT8 *start;
53 UINT32 size;
54 } all;
55 struct
56 {
57 UINT8 *start;
58 UINT32 size;
59 UINT8 *video;
60 UINT8 *shared1;
61 UINT8 *shared2;
62 UINT8 *shared3;
63 } RAM;
64 struct
65 {
66 UINT8 *rom1;
67 UINT8 *rom2;
68 UINT8 *rom3;
69 } Z80;
70 struct
71 {
72 UINT8 *palette;
73 UINT8 *charLookup;
74 UINT8 *spriteLookup;
75 } PROM;
76 };
77
78 static struct Memory_Def memory;
79
80 enum
81 {
82 MEM_PGM = 0,
83 MEM_RAM,
84 MEM_ROM,
85 MEM_DATA,
86 MEM_DATA32,
87 MEM_TYPES
88 };
89
90 struct Memory_Map_Def
91 {
92 union
93 {
94 UINT8 **uint8;
95 UINT32 **uint32;
96 } region;
97 UINT32 size;
98 UINT32 type;
99 };
100
101 struct ROM_Load_Def
102 {
103 UINT8 **address;
104 UINT32 offset;
105 INT32 (*postProcessing)(void);
106 };
107
108 static UINT8 *tempRom = NULL;
109 static UINT8 *gameData; // digdug playfield data
110
111 struct Graphics_Def
112 {
113 UINT8 *fgChars;
114 UINT8 *sprites;
115 UINT8 *bgTiles;
116 UINT32 *palette;
117 };
118
119 static struct Graphics_Def graphics;
120
121 /* Weird video definitions...
122 * +---+
123 * | |
124 * | |
125 * | | screen_height, x, tilemap_width
126 * | |
127 * +---+
128 * screen_width, y, tilemap_height
129 */
130 #define NAMCO_SCREEN_WIDTH 224
131 #define NAMCO_SCREEN_HEIGHT 288
132
133 #define NAMCO_TMAP_WIDTH 36
134 #define NAMCO_TMAP_HEIGHT 28
135
136
137 static const INT32 Colour2Bit[4] =
138 {
139 0x00, 0x47, 0x97, 0xde
140 };
141
142 static const INT32 Colour3Bit[8] =
143 {
144 0x00, 0x21, 0x47, 0x68,
145 0x97, 0xb8, 0xde, 0xff
146 };
147
148 static const INT32 Colour4Bit[16] =
149 {
150 0x00, 0x0e, 0x1f, 0x2d,
151 0x43, 0x51, 0x62, 0x70,
152 0x8f, 0x9d, 0xae, 0xbc,
153 0xd2, 0xe0, 0xf1, 0xff
154 };
155
156 #define NAMCO_BRD_INP_COUNT 3
157
158 struct InputSignalBits_Def
159 {
160 UINT8 bit[8];
161 };
162
163 struct InputSignal_Def
164 {
165 struct InputSignalBits_Def bits;
166 UINT8 byte;
167 };
168
169 struct Port_Def
170 {
171 struct InputSignal_Def previous;
172 struct InputSignal_Def current;
173 };
174
175 struct Input_Def
176 {
177 struct Port_Def ports[NAMCO_BRD_INP_COUNT];
178 struct InputSignal_Def dip[2];
179 UINT8 reset;
180 };
181
182 static struct Input_Def input;
183
184 /* check directions, according to the following 8-position rule */
185 /* 0 */
186 /* 7 1 */
187 /* 6 8 2 */
188 /* 5 3 */
189 /* 4 */
190 static const UINT8 namcoControls[16] = {
191 /* 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111 */
192 /* LDRU, LDRu, LDrU, LDru, LdRU, LdRu, LdrU, Ldru, lDRU, lDRu, lDrU, lDru, ldRU, ldRu, ldrU, ldru */
193 8, 8, 8, 5, 8, 8, 7, 6, 8, 3, 8, 4, 1, 2, 0, 8
194 };
195
196 struct CPU_Rd_Table
197 {
198 UINT16 startAddr;
199 UINT16 endAddr;
200 UINT8 (*readFunc)(UINT16 offset);
201 };
202
203 struct CPU_Wr_Table
204 {
205 UINT16 startAddr;
206 UINT16 endAddr;
207 void (*writeFunc)(UINT16 offset, UINT8 dta);
208 };
209
210 struct Namco_Custom_RW_Entry
211 {
212 UINT8 n06xxCmd;
213 UINT8 (*customRWFunc)(UINT8 offset, UINT8 writeDta);
214 };
215
216 enum SpriteFlags
217 {
218 X_FLIP = 0,
219 Y_FLIP,
220 X_SIZE,
221 Y_SIZE
222 };
223
224 #define xFlip (1 << X_FLIP)
225 #define yFlip (1 << Y_FLIP)
226 #define xSize (1 << X_SIZE)
227 #define ySize (1 << Y_SIZE)
228 #define orient (xFlip | yFlip)
229
230 struct Namco_Sprite_Params
231 {
232 INT32 sprite;
233 INT32 colour;
234 INT32 xStart;
235 INT32 yStart;
236 INT32 xStep;
237 INT32 yStep;
238 INT32 flags;
239 INT32 paletteBits;
240 INT32 paletteOffset;
241 };
242
243 #define N06XX_BUF_SIZE 16
244
245 struct N06XX_Def
246 {
247 UINT8 customCommand;
248 UINT8 CPU1FireNMI;
249 UINT8 buffer[N06XX_BUF_SIZE];
250 };
251
252 struct N50XX_Def
253 {
254 UINT8 input;
255 };
256
257 struct N51XX_Def
258 {
259 UINT8 mode;
260 UINT8 leftCoinPerCredit;
261 UINT8 leftCreditPerCoins;
262 UINT8 rightCoinPerCredit;
263 UINT8 rightCreditPerCoins;
264 UINT8 auxCoinPerCredit;
265 UINT8 auxCreditPerCoins;
266 UINT8 leftCoinsInserted;
267 UINT8 rightCoinsInserted;
268 UINT8 credits;
269 UINT8 startEnable;
270 UINT8 remapJoystick;
271 UINT8 coinCreditDataCount;
272 UINT8 coinCreditDataIndex;
273 };
274
275 #define NAMCO54XX_CFG1_SIZE 4
276 #define NAMCO54XX_CFG2_SIZE 4
277 #define NAMCO54XX_CFG3_SIZE 5
278
279 struct N54XX_Def
280 {
281 INT32 fetch;
282 UINT8 *fetchDestination;
283 UINT8 config1[NAMCO54XX_CFG1_SIZE];
284 UINT8 config2[NAMCO54XX_CFG2_SIZE];
285 UINT8 config3[NAMCO54XX_CFG3_SIZE];
286 };
287
288 struct N54XX_Sample_Info_Def
289 {
290 INT32 sampleNo;
291 UINT8 sampleTrigger[8];
292 };
293
294 static struct NCustom_Def
295 {
296 struct N06XX_Def n06xx;
297 struct N50XX_Def n50xx;
298 struct N51XX_Def n51xx;
299 struct N54XX_Def n54xx;
300 } namcoCustomIC;
301
302 struct Machine_Config_Def
303 {
304 struct CPU_Config_Def *cpus;
305 struct CPU_Wr_Table *wrAddrList;
306 struct CPU_Rd_Table *rdAddrList;
307 struct Memory_Map_Def *memMapTable;
308 UINT32 sizeOfMemMapTable;
309 struct ROM_Load_Def *romLayoutTable;
310 UINT32 sizeOfRomLayoutTable;
311 UINT32 tempRomSize;
312 INT32 (*tilemapsConfig)(void);
313 void (**drawLayerTable)(void);
314 UINT32 drawTableSize;
315 UINT32 (*getSpriteParams)(struct Namco_Sprite_Params *spriteParams, UINT32 offset);
316 INT32 (*reset)(void);
317 struct Namco_Custom_RW_Entry *customRWTable;
318 struct N54XX_Sample_Info_Def *n54xxSampleList;
319 };
320
321 enum GAMES_ON_MACHINE
322 {
323 NAMCO_GALAGA = 0,
324 NAMCO_DIGDUG,
325 NAMCO_XEVIOUS,
326 NAMCO_TOTAL_GAMES
327 };
328
329 struct Machine_Def
330 {
331 struct Machine_Config_Def *config;
332 enum GAMES_ON_MACHINE game;
333 UINT8 hasSamples;
334 UINT8 flipScreen;
335 UINT32 numOfDips;
336 };
337
338 static struct Machine_Def machine = { 0 };
339
340 enum
341 {
342 NAMCO_1BIT_PALETTE_BITS = 1,
343 NAMCO_2BIT_PALETTE_BITS
344 };
345
346 static const INT32 planeOffsets1Bit[NAMCO_1BIT_PALETTE_BITS] =
347 { 0 };
348 static const INT32 planeOffsets2Bit[NAMCO_2BIT_PALETTE_BITS] =
349 { 0, 4 };
350
351 static const INT32 xOffsets8x8Tiles1Bit[8] = { STEP8(7,-1) };
352 static const INT32 yOffsets8x8Tiles1Bit[8] = { STEP8(0,8) };
353 static const INT32 xOffsets8x8Tiles2Bit[8] = { 64, 65, 66, 67, 0, 1, 2, 3 };
354 static const INT32 yOffsets8x8Tiles2Bit[8] = { 0, 8, 16, 24, 32, 40, 48, 56 };
355 static const INT32 xOffsets16x16Tiles2Bit[16] = { 0, 1, 2, 3, 64, 65, 66, 67,
356 128, 129, 130, 131, 192, 193, 194, 195 };
357 static const INT32 yOffsets16x16Tiles2Bit[16] = { 0, 8, 16, 24, 32, 40, 48, 56,
358 256, 264, 272, 280, 288, 296, 304, 312 };
359
360 typedef void (*DrawFunc_t)(void);
361
362 static INT32 namcoInitBoard(void);
363 static INT32 namcoMachineInit(void);
364 static void machineReset(void);
365 static INT32 DrvDoReset(void);
366
367 static INT32 namcoMemIndex(void);
368 static INT32 namcoLoadGameROMS(void);
369
370 static void namcoCustomReset(void);
371 static void namco51xxReset(void);
372
373 static UINT8 updateJoyAndButtons(UINT16 offset, UINT8 jp);
374 static UINT8 namco51xxRead(UINT8 offset, UINT8 dummyDta);
375 static UINT8 namco50xxRead(UINT8 offset, UINT8 dummyDta);
376 static UINT8 namco53xxRead(UINT8 offset, UINT8 dummyDta);
377 static UINT8 namcoCustomICsReadDta(UINT16 offset);
378
379 static UINT8 namco51xxWrite(UINT8 offset, UINT8 dta);
380 static INT32 n54xxCheckBuffer(UINT8 *n54xxBuffer, UINT32 bufferSize);
381 static UINT8 namco50xxWrite(UINT8 offset, UINT8 dta);
382 static UINT8 namco54xxWrite(UINT8 offset, UINT8 dta);
383 static void namcoCustomICsWriteDta(UINT16 offset, UINT8 dta);
384
385 static UINT8 namcoCustomICsReadCmd(UINT16 offset);
386 static void namcoCustomICsWriteCmd(UINT16 offset, UINT8 dta);
387
388 static UINT8 namcoZ80ReadDip(UINT16 offset);
389
390 static UINT8 __fastcall namcoZ80ProgRead(UINT16 addr);
391
392 static void namcoZ80WriteSound(UINT16 offset, UINT8 dta);
393 static void namcoZ80WriteCPU1Irq(UINT16 offset, UINT8 dta);
394 static void namcoZ80WriteCPU2Irq(UINT16 offset, UINT8 dta);
395 static void namcoZ80WriteCPU3Irq(UINT16 offset, UINT8 dta);
396 static void namcoZ80WriteCPUReset(UINT16 offset, UINT8 dta);
397 static void namcoZ80WriteFlipScreen(UINT16 offset, UINT8 dta);
398 static void __fastcall namcoZ80ProgWrite(UINT16 addr, UINT8 dta);
399
400 static tilemap_scan ( namco );
401 static void namcoRenderSprites(void);
402
403 static INT32 DrvExit(void);
404 static void DrvMakeInputs(void);
405 static INT32 DrvFrame(void);
406
407 static INT32 DrvScan(INT32 nAction, INT32 *pnMin);
408
409 /* === Common === */
410
namcoInitBoard(void)411 static INT32 namcoInitBoard(void)
412 {
413 // Allocate and Blank all required memory
414 memory.all.start = NULL;
415 namcoMemIndex();
416
417 memory.all.start = (UINT8 *)BurnMalloc(memory.all.size);
418 if (NULL == memory.all.start)
419 return 1;
420 memset(memory.all.start, 0, memory.all.size);
421
422 namcoMemIndex();
423
424 return namcoLoadGameROMS();
425 }
426
namcoMachineInit(void)427 static INT32 namcoMachineInit(void)
428 {
429 INT32 retVal = 0;
430
431 for (INT32 cpuCount = CPU1; cpuCount < NAMCO_BRD_CPU_COUNT; cpuCount ++)
432 {
433 struct CPU_Config_Def *currentCPU = &machine.config->cpus[cpuCount];
434 ZetInit(currentCPU->id);
435 ZetOpen(currentCPU->id);
436 ZetSetReadHandler(currentCPU->z80ProgRead);
437 ZetSetWriteHandler(currentCPU->z80ProgWrite);
438 currentCPU->z80MemMap();
439 ZetClose();
440 }
441
442 NamcoSoundInit(18432000 / 6 / 32, 3, 0);
443 NacmoSoundSetAllRoutes(0.90 * 10.0 / 16.0, BURN_SND_ROUTE_BOTH);
444 BurnSampleInit(1);
445 BurnSampleSetAllRoutesAllSamples(0.25, BURN_SND_ROUTE_BOTH);
446 machine.hasSamples = BurnSampleGetStatus(0) != -1;
447
448 bprintf(PRINT_NORMAL, _T("samples %d"), machine.hasSamples);
449
450 GenericTilesInit();
451
452 if (machine.config->tilemapsConfig)
453 {
454 retVal = machine.config->tilemapsConfig();
455 }
456
457 if (0 == retVal)
458 {
459 // Reset the driver
460 machine.config->reset();
461 }
462
463 return retVal;
464 }
465
machineReset()466 static void machineReset()
467 {
468 cpus.CPU[CPU1].fireIRQ = 0;
469 cpus.CPU[CPU2].fireIRQ = 0;
470 cpus.CPU[CPU3].fireIRQ = 0;
471 cpus.CPU[CPU2].halt = 0;
472 cpus.CPU[CPU3].halt = 0;
473
474 machine.flipScreen = 0;
475
476 namcoCustomReset();
477 namco51xxReset();
478
479 }
480
DrvDoReset(void)481 static INT32 DrvDoReset(void)
482 {
483 for (INT32 i = 0; i < NAMCO_BRD_CPU_COUNT; i ++)
484 {
485 ZetOpen(i);
486 ZetReset();
487 ZetClose();
488 }
489
490 BurnSampleReset();
491 NamcoSoundReset();
492
493 machineReset();
494
495 HiscoreReset();
496
497 return 0;
498 }
499
namcoMemIndex(void)500 static INT32 namcoMemIndex(void)
501 {
502 struct Memory_Map_Def *memoryMapEntry = machine.config->memMapTable;
503 if (NULL == memoryMapEntry) return 1;
504
505 UINT8 *next = memory.all.start;
506
507 UINT32 i = 0;
508 while (i < machine.config->sizeOfMemMapTable)
509 {
510 if (next)
511 {
512 if ((MEM_RAM == memoryMapEntry->type) && (0 == memory.RAM.start))
513 {
514 memory.RAM.start = next;
515 }
516 switch (memoryMapEntry->type)
517 {
518 case MEM_DATA32:
519 *(memoryMapEntry->region.uint32) = (UINT32 *)next;
520 break;
521
522 default:
523 *(memoryMapEntry->region.uint8) = next;
524 break;
525 }
526 next += memoryMapEntry->size;
527 if ( (MEM_RAM == memoryMapEntry->type) &&
528 (memory.RAM.size < (next - memory.RAM.start)) )
529 {
530 memory.RAM.size = next - memory.RAM.start;
531 }
532 }
533 else
534 {
535 memory.all.size += memoryMapEntry->size;
536 }
537
538 i ++;
539 memoryMapEntry ++;
540 }
541
542 return 0;
543 }
544
namcoLoadGameROMS(void)545 static INT32 namcoLoadGameROMS(void)
546 {
547 struct ROM_Load_Def *romEntry = machine.config->romLayoutTable;
548 UINT32 tableSize = machine.config->sizeOfRomLayoutTable;
549 UINT32 tempSize = machine.config->tempRomSize;
550 INT32 retVal = 1;
551
552 if (tempSize) tempRom = (UINT8 *)BurnMalloc(tempSize);
553
554 if ((NULL != tempRom) && (NULL != romEntry))
555 {
556 memset(tempRom, 0, tempSize);
557
558 retVal = 0;
559
560 for (UINT32 idx = 0; ((idx < tableSize) && (0 == retVal)); idx ++)
561 {
562 retVal = BurnLoadRom(*(romEntry->address) + romEntry->offset, idx, 1);
563 if ((0 == retVal) && (NULL != romEntry->postProcessing))
564 retVal = romEntry->postProcessing();
565
566 romEntry ++;
567 }
568
569 BurnFree(tempRom);
570 }
571
572 return retVal;
573 }
574
575 /* derived from the latest emulation contained in MAME
576 */
namcoCustomReset(void)577 static void namcoCustomReset(void)
578 {
579 memset(&namcoCustomIC, 0, sizeof(struct NCustom_Def));
580 }
581
namco51xxReset(void)582 static void namco51xxReset(void)
583 {
584 namcoCustomIC.n51xx.coinCreditDataCount = 0;
585
586 namcoCustomIC.n51xx.leftCoinPerCredit = 0;
587 namcoCustomIC.n51xx.leftCreditPerCoins = 0;
588 namcoCustomIC.n51xx.rightCoinPerCredit = 0;
589 namcoCustomIC.n51xx.rightCreditPerCoins = 0;
590 namcoCustomIC.n51xx.auxCoinPerCredit = 0;
591 namcoCustomIC.n51xx.auxCreditPerCoins = 0;
592
593 namcoCustomIC.n51xx.credits = 0;
594 namcoCustomIC.n51xx.leftCoinsInserted = 0;
595 namcoCustomIC.n51xx.rightCoinsInserted = 0;
596
597 namcoCustomIC.n51xx.startEnable = 0;
598
599 namcoCustomIC.n51xx.remapJoystick = 0;
600
601 input.ports[0].current.byte = 0xff;
602 input.ports[1].current.byte = 0xff;
603 input.ports[2].current.byte = 0xff;
604
605 input.ports[0].previous.byte = input.ports[0].current.byte;
606 input.ports[1].previous.byte = input.ports[1].current.byte;
607 input.ports[2].previous.byte = input.ports[2].current.byte;
608
609 }
610
611 /*
612 * joy.5 | joy.4 | toggle | in.0 | last.0
613 * 1 | 1 | 0 | 0 | 0 (released)
614 * 0 | 0 | 1 | 1 | 0 (just pressed)
615 * 0 | 1 | 0 | 1 | 1 (held)
616 * 1 | 1 | 1 | 0 | 1 (just released)
617 */
updateJoyAndButtons(UINT16 offset,UINT8 jp)618 static UINT8 updateJoyAndButtons(UINT16 offset, UINT8 jp)
619 {
620 UINT8 portValue = input.ports[1].current.byte;
621
622 UINT8 joy = portValue & 0x0f;
623 if (namcoCustomIC.n51xx.remapJoystick) joy = namcoControls[joy];
624
625 UINT8 portLast = input.ports[1].previous.byte;
626
627 UINT8 buttonsValue = 0;
628
629 UINT8 buttonsDown = ~(portValue & 0xf0);
630 UINT8 buttonsLast = ~(portLast & 0xf0);
631
632 UINT8 toggle = buttonsDown ^ buttonsLast;
633
634 switch (offset)
635 {
636 case 1:
637 {
638 /* fire */
639 buttonsValue = ((toggle & buttonsDown & 0x10)^0x10);
640 buttonsValue |= ((( buttonsDown & 0x10)^0x10) << 1);
641 }
642 break;
643
644 case 2:
645 {
646 buttonsDown <<= 1;
647 buttonsLast <<= 1;
648
649 toggle <<= 1;
650
651 /* fire */
652 buttonsValue = (((toggle & buttonsDown & 0x20)^0x20)>>1);
653 buttonsValue |= (( buttonsDown & 0x20)^0x20);
654 }
655 break;
656
657 default:
658 break;
659 }
660
661 input.ports[offset].previous.byte = input.ports[offset].current.byte;
662
663 return (joy | buttonsValue);
664 }
665
namco51xxRead(UINT8 offset,UINT8 dummyDta)666 static UINT8 namco51xxRead(UINT8 offset, UINT8 dummyDta)
667 {
668 UINT8 retVal = 0xff;
669
670 switch (offset)
671 {
672 case 0:
673 {
674 if (0 == namcoCustomIC.n51xx.mode)
675 {
676 retVal = input.ports[0].current.byte;
677 }
678 else
679 {
680 UINT8 in = input.ports[0].current.byte;
681 UINT8 toggle = in ^ input.ports[0].previous.byte;
682
683 if (0 < namcoCustomIC.n51xx.leftCoinPerCredit)
684 {
685 if (99 >= namcoCustomIC.n51xx.credits)
686 {
687 if (in & toggle & 0x10)
688 {
689 namcoCustomIC.n51xx.leftCoinsInserted ++;
690 if (namcoCustomIC.n51xx.leftCoinsInserted >= namcoCustomIC.n51xx.leftCoinPerCredit)
691 {
692 namcoCustomIC.n51xx.credits += namcoCustomIC.n51xx.leftCreditPerCoins;
693 namcoCustomIC.n51xx.leftCoinsInserted -= namcoCustomIC.n51xx.leftCoinPerCredit;
694 }
695 }
696 if (in & toggle & 0x20)
697 {
698 namcoCustomIC.n51xx.rightCoinsInserted ++;
699 if (namcoCustomIC.n51xx.rightCoinsInserted >= namcoCustomIC.n51xx.rightCoinPerCredit)
700 {
701 namcoCustomIC.n51xx.credits += namcoCustomIC.n51xx.rightCreditPerCoins;
702 namcoCustomIC.n51xx.rightCoinsInserted -= namcoCustomIC.n51xx.rightCoinPerCredit;
703 }
704 }
705 if (in & toggle & 0x40)
706 {
707 namcoCustomIC.n51xx.credits ++;
708 }
709 }
710 }
711 #ifndef FORCE_FREEPLAY
712 else
713 #endif
714 {
715 namcoCustomIC.n51xx.credits = 100;
716 }
717
718 if (namcoCustomIC.n51xx.startEnable)
719 {
720 if (toggle & in & 0x04)
721 {
722 if (1 <= namcoCustomIC.n51xx.credits)
723 {
724 namcoCustomIC.n51xx.credits --;
725 }
726 }
727
728 else if (toggle & in & 0x08)
729 {
730 if (2 <= namcoCustomIC.n51xx.credits)
731 {
732 namcoCustomIC.n51xx.credits -= 2;
733 }
734 }
735 }
736
737 retVal = (namcoCustomIC.n51xx.credits / 10) * 16 + namcoCustomIC.n51xx.credits % 10;
738
739 if (~in & 0x80)
740 {
741 retVal = 0xbb;
742 }
743 }
744 input.ports[0].previous.byte = input.ports[0].current.byte;
745 }
746 break;
747
748 case 1:
749 case 2:
750 {
751 retVal = updateJoyAndButtons(offset, input.ports[offset].current.byte);
752 }
753 break;
754
755 default:
756 {
757 }
758 break;
759 }
760
761 return retVal;
762 }
763
namco50xxRead(UINT8 offset,UINT8 dummyDta)764 static UINT8 namco50xxRead(UINT8 offset, UINT8 dummyDta)
765 {
766 UINT8 retVal = 0;
767
768 if (3 == offset)
769 {
770 if ((0x80 == namcoCustomIC.n50xx.input) ||
771 (0x10 == namcoCustomIC.n50xx.input) )
772 retVal = 0x05;
773 else
774 retVal = 0x95;
775 }
776
777 return retVal;
778 }
779
780
namco53xxRead(UINT8 offset,UINT8 dummyDta)781 static UINT8 namco53xxRead(UINT8 offset, UINT8 dummyDta)
782 {
783 UINT8 retVal = 0xff;
784
785 if ( (0 == offset) || (1 == offset) )
786 retVal = input.dip[offset].byte;
787
788 return retVal;
789 }
790
namcoCustomICsReadDta(UINT16 offset)791 static UINT8 namcoCustomICsReadDta(UINT16 offset)
792 {
793 UINT8 retVal = 0xff;
794
795 struct Namco_Custom_RW_Entry *customRdEntry = machine.config->customRWTable;
796 if (NULL != customRdEntry)
797 {
798 while (NULL != customRdEntry->customRWFunc)
799 {
800 if (namcoCustomIC.n06xx.customCommand == customRdEntry->n06xxCmd)
801 {
802 retVal = customRdEntry->customRWFunc((UINT8)(offset & 0xff), 0);
803 }
804 customRdEntry ++;
805 }
806 }
807
808 return retVal;
809 }
810
namco50xxWrite(UINT8 offset,UINT8 dta)811 static UINT8 namco50xxWrite(UINT8 offset, UINT8 dta)
812 {
813 if (0 == offset)
814 namcoCustomIC.n50xx.input = dta;
815
816 return 0;
817 }
818
namco51xxWrite(UINT8 offset,UINT8 dta)819 static UINT8 namco51xxWrite(UINT8 offset, UINT8 dta)
820 {
821 dta &= 0x07;
822
823 if (namcoCustomIC.n51xx.coinCreditDataCount)
824 {
825 namcoCustomIC.n51xx.coinCreditDataIndex ++;
826
827 if (namcoCustomIC.n51xx.coinCreditDataIndex >= namcoCustomIC.n51xx.coinCreditDataCount)
828 {
829 namcoCustomIC.n51xx.coinCreditDataCount = 0;
830 }
831
832 switch (namcoCustomIC.n51xx.coinCreditDataIndex)
833 {
834 case 1:
835 namcoCustomIC.n51xx.leftCoinPerCredit = dta;
836 break;
837
838 case 2:
839 namcoCustomIC.n51xx.leftCreditPerCoins = dta;
840 break;
841
842 case 3:
843 namcoCustomIC.n51xx.rightCoinPerCredit = dta;
844 break;
845
846 case 4:
847 namcoCustomIC.n51xx.rightCreditPerCoins = dta;
848 break;
849
850 case 5:
851 namcoCustomIC.n51xx.auxCoinPerCredit = dta;
852 break;
853
854 case 6:
855 namcoCustomIC.n51xx.auxCreditPerCoins = dta;
856 break;
857
858 default:
859 break;
860 }
861 }
862 else
863 {
864 switch (dta)
865 {
866 case 0: // nop
867 break;
868
869 case 1:
870 switch (machine.game)
871 {
872 case NAMCO_XEVIOUS:
873 {
874 namcoCustomIC.n51xx.coinCreditDataCount = 6;
875 namcoCustomIC.n51xx.remapJoystick = 1;
876 }
877 break;
878
879 default:
880 {
881 namcoCustomIC.n51xx.coinCreditDataCount = 4;
882 }
883 break;
884 }
885 namcoCustomIC.n51xx.coinCreditDataIndex = 0;
886 break;
887
888 case 2:
889 namcoCustomIC.n51xx.mode = 1;
890 namcoCustomIC.n51xx.startEnable = 1;
891 break;
892
893 case 3:
894 namcoCustomIC.n51xx.remapJoystick = 0;
895 break;
896
897 case 4:
898 namcoCustomIC.n51xx.remapJoystick = 1;
899 break;
900
901 case 5:
902 memset(&namcoCustomIC.n51xx, 0, sizeof(struct N51XX_Def));
903 input.ports[0].previous.byte = input.ports[0].current.byte;
904 break;
905
906 default:
907 bprintf(PRINT_ERROR, _T("unknown 51XX command %02x\n"), dta);
908 break;
909 }
910 }
911
912 return 0;
913 }
914
n54xxCheckBuffer(UINT8 * n54xxBuffer,UINT32 bufferSize)915 static INT32 n54xxCheckBuffer(UINT8 *n54xxBuffer, UINT32 bufferSize)
916 {
917 INT32 retVal = -1;
918
919 char bufCheck[32];
920
921 struct N54XX_Sample_Info_Def *sampleEntry = machine.config->n54xxSampleList;
922
923 if (NULL != sampleEntry)
924 {
925 while (0 <= sampleEntry->sampleNo)
926 {
927 if (0 == memcmp(n54xxBuffer, sampleEntry->sampleTrigger, bufferSize) )
928 {
929 retVal = sampleEntry->sampleNo;
930 }
931
932 sprintf(bufCheck, "%d, %d %02x,%02x,%02x,%02x : %02x,%02x,%02x,%02x",
933 retVal,
934 sampleEntry->sampleNo,
935 n54xxBuffer[0],
936 n54xxBuffer[1],
937 n54xxBuffer[2],
938 n54xxBuffer[3],
939 sampleEntry->sampleTrigger[0],
940 sampleEntry->sampleTrigger[1],
941 sampleEntry->sampleTrigger[2],
942 sampleEntry->sampleTrigger[3]
943 );
944 bprintf(PRINT_NORMAL, _T("%s\n"), bufCheck);
945
946 sampleEntry ++;
947 }
948
949 bprintf(PRINT_NORMAL, _T(" %d (%d)\n"), retVal, sampleEntry->sampleNo);
950 }
951
952 return retVal;
953 }
954
namco54xxWrite(UINT8 offset,UINT8 dta)955 static UINT8 namco54xxWrite(UINT8 offset, UINT8 dta)
956 {
957 if (namcoCustomIC.n54xx.fetch)
958 {
959 if (NULL != namcoCustomIC.n54xx.fetchDestination)
960 *(namcoCustomIC.n54xx.fetchDestination ++) = dta;
961
962 namcoCustomIC.n54xx.fetch --;
963 }
964 else
965 {
966 switch (dta & 0xf0)
967 {
968 case 0x00:
969 break;
970
971 case 0x10: // output sound on pins 4-7 only
972 {
973 INT32 sampleNo = n54xxCheckBuffer(namcoCustomIC.n54xx.config1, NAMCO54XX_CFG1_SIZE);
974 if (0 <= sampleNo) BurnSamplePlay(sampleNo);
975 }
976 break;
977
978 case 0x20: // output sound on pins 8-11 only
979 {
980 INT32 sampleNo = n54xxCheckBuffer(namcoCustomIC.n54xx.config2, NAMCO54XX_CFG2_SIZE);
981 if (0 <= sampleNo) BurnSamplePlay(sampleNo);
982 }
983 break;
984
985 case 0x30:
986 {
987 namcoCustomIC.n54xx.fetch = NAMCO54XX_CFG1_SIZE;
988 namcoCustomIC.n54xx.fetchDestination = namcoCustomIC.n54xx.config1;
989 }
990 break;
991
992 case 0x40:
993 {
994 namcoCustomIC.n54xx.fetch = NAMCO54XX_CFG2_SIZE;
995 namcoCustomIC.n54xx.fetchDestination = namcoCustomIC.n54xx.config2;
996 }
997 break;
998
999 case 0x50: // output sound on pins 17-20 only
1000 {
1001 INT32 sampleNo = n54xxCheckBuffer(namcoCustomIC.n54xx.config3, NAMCO54XX_CFG3_SIZE);
1002 if (0 <= sampleNo) BurnSamplePlay(sampleNo);
1003 }
1004 break;
1005
1006 case 0x60:
1007 {
1008 namcoCustomIC.n54xx.fetch = NAMCO54XX_CFG3_SIZE;
1009 namcoCustomIC.n54xx.fetchDestination = namcoCustomIC.n54xx.config3;
1010 }
1011 break;
1012
1013 case 0x70:
1014 {
1015 // polepos
1016 /* 0x7n = Screech sound. n = pitch (if 0 then no sound) */
1017 /* followed by 0x60 command? */
1018 if (0 == ( dta & 0x0f ))
1019 {
1020 // if (sample_playing(1))
1021 // sample_stop(1);
1022 }
1023 else
1024 {
1025 // INT32 freq = (INT32)( ( 44100.0f / 10.0f ) * (float)(Data & 0x0f) );
1026
1027 // if (!sample_playing(1))
1028 // sample_start(1, 1, 1);
1029 // sample_set_freq(1, freq);
1030 }
1031 }
1032 break;
1033
1034 default:
1035 break;
1036 }
1037 }
1038
1039 return 0;
1040 }
1041
namcoCustomICsWriteDta(UINT16 offset,UINT8 dta)1042 static void namcoCustomICsWriteDta(UINT16 offset, UINT8 dta)
1043 {
1044 namcoCustomIC.n06xx.buffer[offset & 0x0f] = dta;
1045
1046 UINT8 retVal = 0x0;
1047 struct Namco_Custom_RW_Entry *customWrEntry = machine.config->customRWTable;
1048 if (NULL != customWrEntry)
1049 {
1050 while (NULL != customWrEntry->customRWFunc)
1051 {
1052 if (namcoCustomIC.n06xx.customCommand == customWrEntry->n06xxCmd)
1053 {
1054 retVal += customWrEntry->customRWFunc((UINT8)(offset & 0xff), dta);
1055 }
1056 customWrEntry ++;
1057 }
1058 }
1059 }
1060
namcoCustomICsReadCmd(UINT16 offset)1061 static UINT8 namcoCustomICsReadCmd(UINT16 offset)
1062 {
1063 return namcoCustomIC.n06xx.customCommand;
1064 }
1065
namcoCustomICsWriteCmd(UINT16 offset,UINT8 dta)1066 static void namcoCustomICsWriteCmd(UINT16 offset, UINT8 dta)
1067 {
1068 namcoCustomIC.n06xx.customCommand = dta;
1069 namcoCustomIC.n06xx.CPU1FireNMI = 1;
1070
1071 switch (namcoCustomIC.n06xx.customCommand)
1072 {
1073 case 0x10:
1074 {
1075 namcoCustomIC.n06xx.CPU1FireNMI = 0;
1076 }
1077 break;
1078
1079 default:
1080 break;
1081 }
1082 }
1083
namcoZ80ReadDip(UINT16 offset)1084 static UINT8 namcoZ80ReadDip(UINT16 offset)
1085 {
1086 UINT8 retVal = input.dip[1].bits.bit[offset] | input.dip[0].bits.bit[offset];
1087
1088 return retVal;
1089 }
1090
namcoZ80ProgRead(UINT16 addr)1091 static UINT8 __fastcall namcoZ80ProgRead(UINT16 addr)
1092 {
1093 struct CPU_Rd_Table *rdEntry = machine.config->rdAddrList;
1094 UINT8 dta = 0;
1095
1096 if (NULL != rdEntry)
1097 {
1098 while (NULL != rdEntry->readFunc)
1099 {
1100 if ( (addr >= rdEntry->startAddr) &&
1101 (addr <= rdEntry->endAddr) )
1102 {
1103 dta = rdEntry->readFunc(addr - rdEntry->startAddr);
1104 }
1105 rdEntry ++;
1106 }
1107 }
1108
1109 return dta;
1110 }
1111
namcoZ80WriteSound(UINT16 Offset,UINT8 dta)1112 static void namcoZ80WriteSound(UINT16 Offset, UINT8 dta)
1113 {
1114 NamcoSoundWrite(Offset, dta);
1115 }
1116
namcoZ80WriteCPU1Irq(UINT16 Offset,UINT8 dta)1117 static void namcoZ80WriteCPU1Irq(UINT16 Offset, UINT8 dta)
1118 {
1119 cpus.CPU[CPU1].fireIRQ = dta & 0x01;
1120 if (!cpus.CPU[CPU1].fireIRQ)
1121 {
1122 INT32 nActive = ZetGetActive();
1123 ZetClose();
1124 ZetOpen(CPU1);
1125 ZetSetIRQLine(0, CPU_IRQSTATUS_NONE);
1126 ZetClose();
1127 ZetOpen(nActive);
1128 }
1129
1130 }
1131
namcoZ80WriteCPU2Irq(UINT16 Offset,UINT8 dta)1132 static void namcoZ80WriteCPU2Irq(UINT16 Offset, UINT8 dta)
1133 {
1134 cpus.CPU[CPU2].fireIRQ = dta & 0x01;
1135 if (!cpus.CPU[CPU2].fireIRQ)
1136 {
1137 INT32 nActive = ZetGetActive();
1138 ZetClose();
1139 ZetOpen(CPU2);
1140 ZetSetIRQLine(0, CPU_IRQSTATUS_NONE);
1141 ZetClose();
1142 ZetOpen(nActive);
1143 }
1144
1145 }
1146
namcoZ80WriteCPU3Irq(UINT16 Offset,UINT8 dta)1147 static void namcoZ80WriteCPU3Irq(UINT16 Offset, UINT8 dta)
1148 {
1149 cpus.CPU[CPU3].fireIRQ = !(dta & 0x01);
1150
1151 }
1152
namcoZ80WriteCPUReset(UINT16 Offset,UINT8 dta)1153 static void namcoZ80WriteCPUReset(UINT16 Offset, UINT8 dta)
1154 {
1155 if (!(dta & 0x01))
1156 {
1157 INT32 nActive = ZetGetActive();
1158 ZetClose();
1159 ZetOpen(CPU2);
1160 ZetReset();
1161 ZetClose();
1162 ZetOpen(CPU3);
1163 ZetReset();
1164 ZetClose();
1165 ZetOpen(nActive);
1166 cpus.CPU[CPU2].halt = 1;
1167 cpus.CPU[CPU3].halt = 1;
1168 namcoCustomReset();
1169 namco51xxReset();
1170 return;
1171 }
1172 else
1173 {
1174 cpus.CPU[CPU2].halt = 0;
1175 cpus.CPU[CPU3].halt = 0;
1176 }
1177 }
1178
namcoZ80WriteFlipScreen(UINT16 offset,UINT8 dta)1179 static void namcoZ80WriteFlipScreen(UINT16 offset, UINT8 dta)
1180 {
1181 machine.flipScreen = dta & 0x01;
1182 }
1183
namcoZ80ProgWrite(UINT16 addr,UINT8 dta)1184 static void __fastcall namcoZ80ProgWrite(UINT16 addr, UINT8 dta)
1185 {
1186 struct CPU_Wr_Table *wrEntry = machine.config->wrAddrList;
1187
1188 if (NULL != wrEntry)
1189 {
1190 while (NULL != wrEntry->writeFunc)
1191 {
1192 if ( (addr >= wrEntry->startAddr) &&
1193 (addr <= wrEntry->endAddr) )
1194 {
1195 wrEntry->writeFunc(addr - wrEntry->startAddr, dta);
1196 }
1197
1198 wrEntry ++;
1199 }
1200 }
1201 }
1202
tilemap_scan(namco)1203 static tilemap_scan ( namco )
1204 {
1205 if ((col - 2) & 0x20)
1206 {
1207 return (row + 2 + (((col - 2) & 0x1f) << 5));
1208 }
1209
1210 return col - 2 + ((row + 2) << 5);
1211 }
1212
namcoRenderSprites(void)1213 static void namcoRenderSprites(void)
1214 {
1215 struct Namco_Sprite_Params spriteParams;
1216
1217 for (INT32 offset = 0; offset < 0x80; offset += 2)
1218 {
1219 if (machine.config->getSpriteParams(&spriteParams, offset))
1220 {
1221 INT32 spriteRows = ((spriteParams.flags & ySize) != 0);
1222 INT32 spriteCols = ((spriteParams.flags & xSize) != 0);
1223
1224 for (INT32 y = 0; y <= spriteRows; y ++)
1225 {
1226 for (INT32 x = 0; x <= spriteCols; x ++)
1227 {
1228 INT32 code = spriteParams.sprite;
1229 if (spriteRows || spriteCols)
1230 code += ((y * 2 + x) ^ (spriteParams.flags & orient));
1231 INT32 xPos = spriteParams.xStart + spriteParams.xStep * x;
1232 INT32 yPos = spriteParams.yStart + spriteParams.yStep * y;
1233
1234 if ((xPos < -15) || (xPos >= nScreenWidth) ) continue;
1235 if ((yPos < -15) || (yPos >= nScreenHeight)) continue;
1236
1237 switch (spriteParams.flags & orient)
1238 {
1239 case 3:
1240 Render16x16Tile_Mask_FlipXY_Clip(
1241 pTransDraw,
1242 code,
1243 xPos, yPos,
1244 spriteParams.colour,
1245 spriteParams.paletteBits,
1246 0,
1247 spriteParams.paletteOffset,
1248 graphics.sprites
1249 );
1250 break;
1251 case 2:
1252 Render16x16Tile_Mask_FlipY_Clip(
1253 pTransDraw,
1254 code,
1255 xPos, yPos,
1256 spriteParams.colour,
1257 spriteParams.paletteBits,
1258 0,
1259 spriteParams.paletteOffset,
1260 graphics.sprites
1261 );
1262 break;
1263 case 1:
1264 Render16x16Tile_Mask_FlipX_Clip(
1265 pTransDraw,
1266 code,
1267 xPos, yPos,
1268 spriteParams.colour,
1269 spriteParams.paletteBits,
1270 0,
1271 spriteParams.paletteOffset,
1272 graphics.sprites
1273 );
1274 break;
1275 case 0:
1276 default:
1277 Render16x16Tile_Mask_Clip(
1278 pTransDraw,
1279 code,
1280 xPos, yPos,
1281 spriteParams.colour,
1282 spriteParams.paletteBits,
1283 0,
1284 spriteParams.paletteOffset,
1285 graphics.sprites
1286 );
1287 break;
1288 }
1289 }
1290 }
1291 }
1292 }
1293 }
1294
DrvExit(void)1295 static INT32 DrvExit(void)
1296 {
1297 GenericTilesExit();
1298
1299 NamcoSoundExit();
1300 BurnSampleExit();
1301
1302 ZetExit();
1303
1304 earom_exit();
1305
1306 machineReset();
1307
1308 BurnFree(memory.all.start);
1309
1310 machine.game = NAMCO_GALAGA;
1311
1312 return 0;
1313 }
1314
DrvMakeInputs(void)1315 static void DrvMakeInputs(void)
1316 {
1317 struct InputSignal_Def *currentPort0 = &input.ports[0].current;
1318 struct InputSignal_Def *currentPort1 = &input.ports[1].current;
1319 struct InputSignal_Def *currentPort2 = &input.ports[2].current;
1320
1321 // Reset Inputs
1322 currentPort0->byte = 0xff;
1323 currentPort1->byte = 0xff;
1324 currentPort2->byte = 0xff;
1325
1326 switch (machine.game)
1327 {
1328 case NAMCO_XEVIOUS:
1329 // map blaster inputs from ports to dip switches
1330 input.dip[0].byte |= 0x11;
1331 if (currentPort1->bits.bit[6]) input.dip[0].byte &= 0xFE;
1332 if (currentPort2->bits.bit[6]) input.dip[0].byte &= 0xEF;
1333 break;
1334
1335 default:
1336 break;
1337 }
1338
1339 // Compile Digital Inputs
1340 for (INT32 i = 0; i < 8; i ++)
1341 {
1342 currentPort0->byte -= (currentPort0->bits.bit[i] & 1) << i;
1343 currentPort1->byte -= (currentPort1->bits.bit[i] & 1) << i;
1344 currentPort2->byte -= (currentPort2->bits.bit[i] & 1) << i;
1345
1346 input.dip[0].bits.bit[i] = ((input.dip[0].byte >> i) & 1) << 0;
1347 input.dip[1].bits.bit[i] = ((input.dip[1].byte >> i) & 1) << 1;
1348 }
1349 }
1350
DrvDraw(void)1351 static INT32 DrvDraw(void)
1352 {
1353 BurnTransferClear();
1354
1355 if (NULL != machine.config->drawLayerTable)
1356 {
1357 for (UINT32 drawLayer = 0; drawLayer < machine.config->drawTableSize; drawLayer ++)
1358 {
1359 machine.config->drawLayerTable[drawLayer]();
1360 }
1361
1362 BurnTransferCopy(graphics.palette);
1363
1364 return 0;
1365 }
1366 return 1;
1367 }
1368
DrvFrame(void)1369 static INT32 DrvFrame(void)
1370 {
1371 if (input.reset)
1372 {
1373 machine.config->reset();
1374 }
1375
1376 DrvMakeInputs();
1377
1378 INT32 nSoundBufferPos = 0;
1379 INT32 nInterleave = 400;
1380 INT32 nCyclesTotal[3];
1381
1382 nCyclesTotal[0] = (18432000 / 6) / 60;
1383 nCyclesTotal[1] = (18432000 / 6) / 60;
1384 nCyclesTotal[2] = (18432000 / 6) / 60;
1385
1386 ZetNewFrame();
1387
1388 for (INT32 i = 0; i < nInterleave; i++)
1389 {
1390 INT32 nCurrentCPU;
1391
1392 nCurrentCPU = CPU1;
1393 ZetOpen(nCurrentCPU);
1394 ZetRun(nCyclesTotal[nCurrentCPU] / nInterleave);
1395 if (i == (nInterleave-1) && cpus.CPU[CPU1].fireIRQ)
1396 {
1397 ZetSetIRQLine(0, CPU_IRQSTATUS_HOLD);
1398 }
1399 if ( (9 == (i % 10)) && namcoCustomIC.n06xx.CPU1FireNMI )
1400 {
1401 ZetNmi();
1402 }
1403 ZetClose();
1404
1405 if (!cpus.CPU[CPU2].halt)
1406 {
1407 nCurrentCPU = CPU2;
1408 ZetOpen(nCurrentCPU);
1409 ZetRun(nCyclesTotal[nCurrentCPU] / nInterleave);
1410 if (i == (nInterleave-1) && cpus.CPU[CPU2].fireIRQ)
1411 {
1412 ZetSetIRQLine(0, CPU_IRQSTATUS_HOLD);
1413 }
1414 ZetClose();
1415 }
1416
1417 if (!cpus.CPU[CPU3].halt)
1418 {
1419 nCurrentCPU = CPU3;
1420 ZetOpen(nCurrentCPU);
1421 ZetRun(nCyclesTotal[nCurrentCPU] / nInterleave);
1422 if ( ((i == ((64 + 000) * nInterleave) / 272) ||
1423 (i == ((64 + 128) * nInterleave) / 272)) && cpus.CPU[CPU3].fireIRQ)
1424 {
1425 ZetNmi();
1426 }
1427 ZetClose();
1428 }
1429
1430 if (pBurnSoundOut)
1431 {
1432 INT32 nSegmentLength = nBurnSoundLen / nInterleave;
1433 INT16* pSoundBuf = pBurnSoundOut + (nSoundBufferPos << 1);
1434
1435 if (nSegmentLength)
1436 {
1437 NamcoSoundUpdate(pSoundBuf, nSegmentLength);
1438 if (machine.hasSamples)
1439 BurnSampleRender(pSoundBuf, nSegmentLength);
1440 }
1441 nSoundBufferPos += nSegmentLength;
1442 }
1443 }
1444
1445 if (pBurnSoundOut)
1446 {
1447 INT32 nSegmentLength = nBurnSoundLen - nSoundBufferPos;
1448 INT16* pSoundBuf = pBurnSoundOut + (nSoundBufferPos << 1);
1449
1450 if (nSegmentLength)
1451 {
1452 NamcoSoundUpdate(pSoundBuf, nSegmentLength);
1453 if (machine.hasSamples)
1454 BurnSampleRender(pSoundBuf, nSegmentLength);
1455 }
1456 }
1457
1458 if (pBurnDraw)
1459 BurnDrvRedraw();
1460
1461 return 0;
1462 }
1463
DrvScan(INT32 nAction,INT32 * pnMin)1464 static INT32 DrvScan(INT32 nAction, INT32 *pnMin)
1465 {
1466 struct BurnArea ba;
1467
1468 // Return minimum compatible version
1469 if (pnMin != NULL)
1470 {
1471 *pnMin = 0x029737;
1472 }
1473
1474 if (nAction & ACB_MEMORY_RAM)
1475 {
1476 memset(&ba, 0, sizeof(ba));
1477 ba.Data = memory.RAM.start;
1478 ba.nLen = memory.RAM.size;
1479 ba.szName = "All Ram";
1480 BurnAcb(&ba);
1481 }
1482
1483 if (nAction & ACB_DRIVER_DATA) {
1484 ZetScan(nAction); // Scan Z80
1485
1486 NamcoSoundScan(nAction, pnMin);
1487 BurnSampleScan(nAction, pnMin);
1488
1489 // Scan critical driver variables
1490 SCAN_VAR(cpus.CPU[CPU1].fireIRQ);
1491 SCAN_VAR(cpus.CPU[CPU2].fireIRQ);
1492 SCAN_VAR(cpus.CPU[CPU3].fireIRQ);
1493 SCAN_VAR(cpus.CPU[CPU2].halt);
1494 SCAN_VAR(cpus.CPU[CPU3].halt);
1495 SCAN_VAR(machine.flipScreen);
1496 SCAN_VAR(namcoCustomIC.n06xx.customCommand);
1497 SCAN_VAR(namcoCustomIC.n06xx.CPU1FireNMI);
1498 SCAN_VAR(namcoCustomIC.n51xx.mode);
1499 SCAN_VAR(namcoCustomIC.n51xx.credits);
1500 SCAN_VAR(namcoCustomIC.n51xx.leftCoinPerCredit);
1501 SCAN_VAR(namcoCustomIC.n51xx.leftCreditPerCoins);
1502 SCAN_VAR(namcoCustomIC.n51xx.rightCoinPerCredit);
1503 SCAN_VAR(namcoCustomIC.n51xx.rightCreditPerCoins);
1504 SCAN_VAR(namcoCustomIC.n51xx.auxCoinPerCredit);
1505 SCAN_VAR(namcoCustomIC.n51xx.auxCreditPerCoins);
1506 SCAN_VAR(namcoCustomIC.n06xx.buffer);
1507
1508 SCAN_VAR(input.ports);
1509
1510 SCAN_VAR(namcoCustomIC.n54xx.fetch);
1511 SCAN_VAR(namcoCustomIC.n54xx.fetchDestination);
1512 SCAN_VAR(namcoCustomIC.n54xx.config1);
1513 SCAN_VAR(namcoCustomIC.n54xx.config2);
1514 SCAN_VAR(namcoCustomIC.n54xx.config3);
1515 }
1516
1517 return 0;
1518 }
1519
1520 /* === Galaga === */
1521
1522 static struct BurnInputInfo GalagaInputList[] =
1523 {
1524 {"Start 1" , BIT_DIGITAL , &input.ports[0].current.bits.bit[2], "p1 start" },
1525 {"Start 2" , BIT_DIGITAL , &input.ports[0].current.bits.bit[3], "p2 start" },
1526 {"Coin 1" , BIT_DIGITAL , &input.ports[0].current.bits.bit[4], "p1 coin" },
1527 {"Coin 2" , BIT_DIGITAL , &input.ports[0].current.bits.bit[5], "p2 coin" },
1528
1529 {"Left" , BIT_DIGITAL , &input.ports[1].current.bits.bit[3], "p1 left" },
1530 {"Right" , BIT_DIGITAL , &input.ports[1].current.bits.bit[1], "p1 right" },
1531 {"Fire 1" , BIT_DIGITAL , &input.ports[1].current.bits.bit[4], "p1 fire 1" },
1532
1533 {"Left (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[3], "p2 left" },
1534 {"Right (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[1], "p2 right" },
1535 {"Fire 1 (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[4], "p2 fire 1" },
1536
1537 {"Reset" , BIT_DIGITAL , &input.reset, "reset" },
1538 {"Service" , BIT_DIGITAL , &input.ports[0].current.bits.bit[6], "service" },
1539 {"Dip 1" , BIT_DIPSWITCH, &input.dip[0].byte, "dip" },
1540 {"Dip 2" , BIT_DIPSWITCH, &input.dip[1].byte, "dip" },
1541 };
1542
1543 STDINPUTINFO(Galaga)
1544
1545 #define GALAGA_NUM_OF_DIPSWITCHES 2
1546
1547 static struct BurnDIPInfo GalagaDIPList[]=
1548 {
1549 // offset
1550 { 0x0b, 0xf0, 0x01, 0x01, NULL },
1551
1552 // Default Values
1553 // nOffset, nID, nMask, nDefault, NULL
1554 { 0x00, 0xff, 0x01, 0x01, NULL },
1555 { 0x01, 0xff, 0xff, 0x97, NULL },
1556 { 0x02, 0xff, 0xbf, 0xb7, NULL },
1557
1558 // Service Switch
1559 // x, DIP_GRP, x, OptionCnt, szTitle
1560 { 0, 0xfe, 0, 2, "Service Mode" },
1561 // nInput, nFlags, nMask, nSetting, szText
1562 { 0x00, 0x01, 0x01, 0x01, "Off" },
1563 { 0x00, 0x01, 0x01, 0x00, "On" },
1564
1565 // Dip 1
1566 // x, DIP_GRP, x, OptionCnt, szTitle
1567 { 0, 0xfe, 0, 8, "Coinage" },
1568 // nInput, nFlags, nMask, nSetting, szText
1569 { 0x01, 0x01, 0x07, 0x04, "4 Coins 1 Play" },
1570 { 0x01, 0x01, 0x07, 0x02, "3 Coins 1 Play" },
1571 { 0x01, 0x01, 0x07, 0x06, "2 Coins 1 Play" },
1572 { 0x01, 0x01, 0x07, 0x07, "1 Coin 1 Play" },
1573 { 0x01, 0x01, 0x07, 0x01, "2 Coins 3 Plays" },
1574 { 0x01, 0x01, 0x07, 0x03, "1 Coin 2 Plays" },
1575 { 0x01, 0x01, 0x07, 0x05, "1 Coin 3 Plays" },
1576 { 0x01, 0x01, 0x07, 0x00, "Freeplay" },
1577
1578 // x, DIP_GRP, x, OptionCnt, szTitle
1579 { 0, 0xfe, 0, 8, "Bonus Life" },
1580 // nInput, nFlags, nMask, nSetting, szText
1581 { 0x01, 0x01, 0x38, 0x20, "20k 60k 60k" },
1582 { 0x01, 0x01, 0x38, 0x18, "20k 60k" },
1583 { 0x01, 0x01, 0x38, 0x10, "20k 70k 70k" },
1584 { 0x01, 0x01, 0x38, 0x30, "20k 80k 80k" },
1585 { 0x01, 0x01, 0x38, 0x38, "30k 80k" },
1586 { 0x01, 0x01, 0x38, 0x08, "30k 100k 100k" },
1587 { 0x01, 0x01, 0x38, 0x28, "30k 120k 120k" },
1588 { 0x01, 0x01, 0x38, 0x00, "None" },
1589
1590 // x, DIP_GRP, x, OptionCnt, szTitle
1591 { 0, 0xfe, 0, 4, "Lives" },
1592 // nInput, nFlags, nMask, nSetting, szText
1593 { 0x01, 0x01, 0xc0, 0x00, "2" },
1594 { 0x01, 0x01, 0xc0, 0x80, "3" },
1595 { 0x01, 0x01, 0xc0, 0x40, "4" },
1596 { 0x01, 0x01, 0xc0, 0xc0, "5" },
1597
1598 // Dip 2
1599 // x, DIP_GRP, x, OptionCnt, szTitle
1600 { 0, 0xfe, 0, 4, "Difficulty" },
1601 // nInput, nFlags, nMask, nSetting, szText
1602 { 0x02, 0x01, 0x03, 0x03, "Easy" },
1603 { 0x02, 0x01, 0x03, 0x00, "Medium" },
1604 { 0x02, 0x01, 0x03, 0x01, "Hard" },
1605 { 0x02, 0x01, 0x03, 0x02, "Hardest" },
1606
1607 // x, DIP_GRP, x, OptionCnt, szTitle
1608 { 0, 0xfe, 0, 2, "Demo Sounds" },
1609 // nInput, nFlags, nMask, nSetting, szText
1610 { 0x02, 0x01, 0x08, 0x08, "Off" },
1611 { 0x02, 0x01, 0x08, 0x00, "On" },
1612
1613 // x, DIP_GRP, x, OptionCnt, szTitle
1614 { 0, 0xfe, 0, 2, "Freeze" },
1615 // nInput, nFlags, nMask, nSetting, szText
1616 { 0x02, 0x01, 0x10, 0x10, "Off" },
1617 { 0x02, 0x01, 0x10, 0x00, "On" },
1618
1619 // x, DIP_GRP, x, OptionCnt, szTitle
1620 { 0, 0xfe, 0, 2, "Rack Test" },
1621 // nInput, nFlags, nMask, nSetting, szText
1622 { 0x02, 0x01, 0x20, 0x20, "Off" },
1623 { 0x02, 0x01, 0x20, 0x00, "On" },
1624
1625 // x, DIP_GRP, x, OptionCnt, szTitle
1626 { 0, 0xfe, 0, 2, "Cabinet" },
1627 // nInput, nFlags, nMask, nSetting, szText
1628 { 0x02, 0x01, 0x80, 0x80, "Upright" },
1629 { 0x02, 0x01, 0x80, 0x00, "Cocktail" },
1630 };
1631
1632 STDDIPINFO(Galaga)
1633
1634 static struct BurnDIPInfo GalagamwDIPList[]=
1635 {
1636 // Offset
1637 { 0x0b, 0xf0, 0x01, 0x01, NULL },
1638
1639 // Default Values
1640 // nOffset, nID, nMask, nDefault, NULL
1641 { 0x00, 0xff, 0x01, 0x01, NULL },
1642 { 0x01, 0xff, 0xff, 0x97, NULL },
1643 { 0x02, 0xff, 0xff, 0xf7, NULL },
1644
1645 // Service Switch
1646 // x, DIP_GRP, x, OptionCnt, szTitle
1647 { 0, 0xfe, 0, 2, "Service Mode" },
1648 // nInput, nFlags, nMask, nSetting, szText
1649 { 0x00, 0x01, 0x01, 0x01, "Off" },
1650 { 0x00, 0x01, 0x01, 0x00, "On" },
1651
1652 // Dip 1
1653 // x, DIP_GRP, x, OptionCnt, szTitle
1654 { 0, 0xfe, 0, 8, "Coinage" },
1655 // nInput, nFlags, nMask, nSetting, szText
1656 { 0x01, 0x01, 0x07, 0x04, "4 Coins 1 Play" },
1657 { 0x01, 0x01, 0x07, 0x02, "3 Coins 1 Play" },
1658 { 0x01, 0x01, 0x07, 0x06, "2 Coins 1 Play" },
1659 { 0x01, 0x01, 0x07, 0x07, "1 Coin 1 Play" },
1660 { 0x01, 0x01, 0x07, 0x01, "2 Coins 3 Plays" },
1661 { 0x01, 0x01, 0x07, 0x03, "1 Coin 2 Plays" },
1662 { 0x01, 0x01, 0x07, 0x05, "1 Coin 3 Plays" },
1663 { 0x01, 0x01, 0x07, 0x00, "Freeplay" },
1664
1665 // x, DIP_GRP, x, OptionCnt, szTitle
1666 { 0, 0xfe, 0, 8, "Bonus Life" },
1667 // nInput, nFlags, nMask, nSetting, szText
1668 { 0x01, 0x01, 0x38, 0x20, "20k 60k 60k" },
1669 { 0x01, 0x01, 0x38, 0x18, "20k 60k" },
1670 { 0x01, 0x01, 0x38, 0x10, "20k 70k 70k" },
1671 { 0x01, 0x01, 0x38, 0x30, "20k 80k 80k" },
1672 { 0x01, 0x01, 0x38, 0x38, "30k 80k" },
1673 { 0x01, 0x01, 0x38, 0x08, "30k 100k 100k" },
1674 { 0x01, 0x01, 0x38, 0x28, "30k 120k 120k" },
1675 { 0x01, 0x01, 0x38, 0x00, "None" },
1676
1677 // x, DIP_GRP, x, OptionCnt, szTitle
1678 { 0, 0xfe, 0, 4, "Lives" },
1679 // nInput, nFlags, nMask, nSetting, szText
1680 { 0x01, 0x01, 0xc0, 0x00, "2" },
1681 { 0x01, 0x01, 0xc0, 0x80, "3" },
1682 { 0x01, 0x01, 0xc0, 0x40, "4" },
1683 { 0x01, 0x01, 0xc0, 0xc0, "5" },
1684
1685 // Dip 2
1686 // x, DIP_GRP, x, OptionCnt, szTitle
1687 { 0, 0xfe, 0, 2, "2 Credits Game" },
1688 // nInput, nFlags, nMask, nSetting, szText
1689 { 0x02, 0x01, 0x01, 0x00, "1 Player" },
1690 { 0x02, 0x01, 0x01, 0x01, "2 Players" },
1691
1692 // x, DIP_GRP, x, OptionCnt, szTitle
1693 { 0, 0xfe, 0, 4, "Difficulty" },
1694 // nInput, nFlags, nMask, nSetting, szText
1695 { 0x02, 0x01, 0x06, 0x06, "Easy" },
1696 { 0x02, 0x01, 0x06, 0x00, "Medium" },
1697 { 0x02, 0x01, 0x06, 0x02, "Hard" },
1698 { 0x02, 0x01, 0x06, 0x04, "Hardest" },
1699
1700 // x, DIP_GRP, x, OptionCnt, szTitle
1701 { 0, 0xfe, 0, 2, "Demo Sounds" },
1702 // nInput, nFlags, nMask, nSetting, szText
1703 { 0x02, 0x01, 0x08, 0x08, "Off" },
1704 { 0x02, 0x01, 0x08, 0x00, "On" },
1705
1706 // x, DIP_GRP, x, OptionCnt, szTitle
1707 { 0, 0xfe, 0, 2, "Freeze" },
1708 // nInput, nFlags, nMask, nSetting, szText
1709 { 0x02, 0x01, 0x10, 0x10, "Off" },
1710 { 0x02, 0x01, 0x10, 0x00, "On" },
1711
1712 // x, DIP_GRP, x, OptionCnt, szTitle
1713 { 0, 0xfe, 0, 2, "Rack Test" },
1714 // nInput, nFlags, nMask, nSetting, szText
1715 { 0x02, 0x01, 0x20, 0x20, "Off" },
1716 { 0x02, 0x01, 0x20, 0x00, "On" },
1717
1718 // x, DIP_GRP, x, OptionCnt, szTitle
1719 { 0, 0xfe, 0, 2, "Cabinet" },
1720 // nInput, nFlags, nMask, nSetting, szText
1721 { 0x02, 0x01, 0x80, 0x80, "Upright" },
1722 { 0x02, 0x01, 0x80, 0x00, "Cocktail" },
1723 };
1724
1725 STDDIPINFO(Galagamw)
1726
1727 static struct BurnRomInfo GalagaRomDesc[] = {
1728 { "gg1_1b.3p", 0x01000, 0xab036c9f, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1729 { "gg1_2b.3m", 0x01000, 0xd9232240, BRF_ESS | BRF_PRG }, // 1
1730 { "gg1_3.2m", 0x01000, 0x753ce503, BRF_ESS | BRF_PRG }, // 2
1731 { "gg1_4b.2l", 0x01000, 0x499fcc76, BRF_ESS | BRF_PRG }, // 3
1732
1733 { "gg1_5b.3f", 0x01000, 0xbb5caae3, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1734
1735 { "gg1_7b.2c", 0x01000, 0xd016686b, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1736
1737 { "gg1_9.4l", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1738
1739 { "gg1_11.4d", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1740 { "gg1_10.4f", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1741
1742 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1743 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1744 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1745 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1746 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1747 };
1748
1749 STD_ROM_PICK(Galaga)
1750 STD_ROM_FN(Galaga)
1751
1752 static struct BurnRomInfo GalagaoRomDesc[] = {
1753 { "gg1-1.3p", 0x01000, 0xa3a0f743, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1754 { "gg1-2.3m", 0x01000, 0x43bb0d5c, BRF_ESS | BRF_PRG }, // 1
1755 { "gg1-3.2m", 0x01000, 0x753ce503, BRF_ESS | BRF_PRG }, // 2
1756 { "gg1-4.2l", 0x01000, 0x83874442, BRF_ESS | BRF_PRG }, // 3
1757
1758 { "gg1-5.3f", 0x01000, 0x3102fccd, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1759
1760 { "gg1-7.2c", 0x01000, 0x8995088d, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1761
1762 { "gg1-9.4l", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1763
1764 { "gg1-11.4d", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1765 { "gg1-10.4f", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1766
1767 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1768 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1769 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1770 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1771 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1772 };
1773
1774 STD_ROM_PICK(Galagao)
1775 STD_ROM_FN(Galagao)
1776
1777 static struct BurnRomInfo GalagamwRomDesc[] = {
1778 { "3200a.bin", 0x01000, 0x3ef0b053, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1779 { "3300b.bin", 0x01000, 0x1b280831, BRF_ESS | BRF_PRG }, // 1
1780 { "3400c.bin", 0x01000, 0x16233d33, BRF_ESS | BRF_PRG }, // 2
1781 { "3500d.bin", 0x01000, 0x0aaf5c23, BRF_ESS | BRF_PRG }, // 3
1782
1783 { "3600e.bin", 0x01000, 0xbc556e76, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1784
1785 { "3700g.bin", 0x01000, 0xb07f0aa4, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1786
1787 { "2600j.bin", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1788
1789 { "2800l.bin", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1790 { "2700k.bin", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1791
1792 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1793 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1794 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1795 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1796 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1797 };
1798
1799 STD_ROM_PICK(Galagamw)
1800 STD_ROM_FN(Galagamw)
1801
1802 static struct BurnRomInfo GalagamfRomDesc[] = {
1803 { "3200a.bin", 0x01000, 0x3ef0b053, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1804 { "3300b.bin", 0x01000, 0x1b280831, BRF_ESS | BRF_PRG }, // 1
1805 { "3400c.bin", 0x01000, 0x16233d33, BRF_ESS | BRF_PRG }, // 2
1806 { "3500d.bin", 0x01000, 0x0aaf5c23, BRF_ESS | BRF_PRG }, // 3
1807
1808 { "3600fast.bin", 0x01000, 0x23d586e5, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1809
1810 { "3700g.bin", 0x01000, 0xb07f0aa4, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1811
1812 { "2600j.bin", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1813
1814 { "2800l.bin", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1815 { "2700k.bin", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1816
1817 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1818 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1819 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1820 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1821 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1822 };
1823
1824 STD_ROM_PICK(Galagamf)
1825 STD_ROM_FN(Galagamf)
1826
1827 static struct BurnRomInfo GalagamkRomDesc[] = {
1828 { "mk2-1", 0x01000, 0x23cea1e2, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1829 { "mk2-2", 0x01000, 0x89695b1a, BRF_ESS | BRF_PRG }, // 1
1830 { "3400c.bin", 0x01000, 0x16233d33, BRF_ESS | BRF_PRG }, // 2
1831 { "mk2-4", 0x01000, 0x24b767f5, BRF_ESS | BRF_PRG }, // 3
1832
1833 { "gg1-5.3f", 0x01000, 0x3102fccd, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1834
1835 { "gg1-7b.2c", 0x01000, 0xd016686b, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1836
1837 { "gg1-9.4l", 0x01000, 0x58b2f47c, BRF_GRA }, // 6 Characters
1838
1839 { "gg1-11.4d", 0x01000, 0xad447c80, BRF_GRA }, // 7 Sprites
1840 { "gg1-10.4f", 0x01000, 0xdd6f1afc, BRF_GRA }, // 8
1841
1842 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 9 PROMs
1843 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 10
1844 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 11
1845 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 12
1846 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 13
1847 };
1848
1849 STD_ROM_PICK(Galagamk)
1850 STD_ROM_FN(Galagamk)
1851
1852 static struct BurnRomInfo GallagRomDesc[] = {
1853 { "gallag.1", 0x01000, 0xa3a0f743, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1854 { "gallag.2", 0x01000, 0x5eda60a7, BRF_ESS | BRF_PRG }, // 1
1855 { "gallag.3", 0x01000, 0x753ce503, BRF_ESS | BRF_PRG }, // 2
1856 { "gallag.4", 0x01000, 0x83874442, BRF_ESS | BRF_PRG }, // 3
1857
1858 { "gallag.5", 0x01000, 0x3102fccd, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1859
1860 { "gallag.7", 0x01000, 0x8995088d, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1861
1862 { "gallag.6", 0x01000, 0x001b70bc, BRF_ESS | BRF_PRG }, // 6 Z80 #4 Program Code
1863
1864 { "gallag.8", 0x01000, 0x169a98a4, BRF_GRA }, // 7 Characters
1865
1866 { "gallag.a", 0x01000, 0xad447c80, BRF_GRA }, // 8 Sprites
1867 { "gallag.9", 0x01000, 0xdd6f1afc, BRF_GRA }, // 9
1868
1869 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 10 PROMs
1870 { "prom-4.2n", 0x00100, 0x59b6edab, BRF_GRA }, // 11
1871 { "prom-3.1c", 0x00100, 0x4a04bb6b, BRF_GRA }, // 12
1872 { "prom-1.1d", 0x00100, 0x7a2815b4, BRF_GRA }, // 13
1873 { "prom-2.5c", 0x00100, 0x77245b66, BRF_GRA }, // 14
1874 };
1875
1876 STD_ROM_PICK(Gallag)
1877 STD_ROM_FN(Gallag)
1878
1879 static struct BurnRomInfo NebulbeeRomDesc[] = {
1880 { "nebulbee.01", 0x01000, 0xf405f2c4, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
1881 { "nebulbee.02", 0x01000, 0x31022b60, BRF_ESS | BRF_PRG }, // 1
1882 { "gg1_3.2m", 0x01000, 0x753ce503, BRF_ESS | BRF_PRG }, // 2
1883 { "nebulbee.04", 0x01000, 0xd76788a5, BRF_ESS | BRF_PRG }, // 3
1884
1885 { "gg1-5", 0x01000, 0x3102fccd, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
1886
1887 { "gg1-7", 0x01000, 0x8995088d, BRF_ESS | BRF_PRG }, // 5 Z80 #3 Program Code
1888
1889 { "nebulbee.07", 0x01000, 0x035e300c, BRF_ESS | BRF_PRG }, // 6 Z80 #4 Program Code
1890
1891 { "gg1_9.4l", 0x01000, 0x58b2f47c, BRF_GRA }, // 7 Characters
1892
1893 { "gg1_11.4d", 0x01000, 0xad447c80, BRF_GRA }, // 8 Sprites
1894 { "gg1_10.4f", 0x01000, 0xdd6f1afc, BRF_GRA }, // 9
1895
1896 { "prom-5.5n", 0x00020, 0x54603c6b, BRF_GRA }, // 10 PROMs
1897 { "2n.bin", 0x00100, 0xa547d33b, BRF_GRA }, // 11
1898 { "1c.bin", 0x00100, 0xb6f585fb, BRF_GRA }, // 12
1899 { "1d.bin", 0x00100, 0x86d92b24, BRF_GRA }, // 14
1900 { "5c.bin", 0x00100, 0x8bd565f6, BRF_GRA }, // 13
1901 };
1902
1903 STD_ROM_PICK(Nebulbee)
1904 STD_ROM_FN(Nebulbee)
1905
1906 static struct BurnSampleInfo GalagaSampleDesc[] = {
1907 #if !defined (ROM_VERIFY)
1908 { "bang", SAMPLE_NOLOOP },
1909 { "init", SAMPLE_NOLOOP },
1910 #endif
1911 { "", 0 }
1912 };
1913
1914 STD_SAMPLE_PICK(Galaga)
1915 STD_SAMPLE_FN(Galaga)
1916
1917 static INT32 galagaInit(void);
1918 static INT32 gallagInit(void);
1919 static INT32 galagaReset(void);
1920
1921 static void galagaMemoryMap1(void);
1922 static void galagaMemoryMap2(void);
1923 static void galagaMemoryMap3(void);
1924 static tilemap_callback(galaga_fg);
1925 static INT32 galagaCharDecode(void);
1926 static INT32 galagaSpriteDecode(void);
1927 static INT32 galagaTilemapConfig(void);
1928
1929 static void galagaZ80WriteStars(UINT16 offset, UINT8 dta);
1930
1931 static void galagaCalcPalette(void);
1932 static void galagaInitStars(void);
1933 static void galagaRenderStars(void);
1934 static void galagaStarScroll(void);
1935 static void galagaRenderChars(void);
1936
1937 static UINT32 galagaGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset);
1938
1939 static INT32 galagaScan(INT32 nAction, INT32 *pnMin);
1940
1941 #define GALAGA_PALETTE_SIZE_CHARS 0x100
1942 #define GALAGA_PALETTE_SIZE_SPRITES 0x100
1943 #define GALAGA_PALETTE_SIZE_BGSTARS 0x040
1944 #define GALAGA_PALETTE_SIZE (GALAGA_PALETTE_SIZE_CHARS + \
1945 GALAGA_PALETTE_SIZE_SPRITES + \
1946 GALAGA_PALETTE_SIZE_BGSTARS)
1947
1948 #define GALAGA_PALETTE_OFFSET_CHARS 0
1949 #define GALAGA_PALETTE_OFFSET_SPRITE (GALAGA_PALETTE_OFFSET_CHARS + GALAGA_PALETTE_SIZE_CHARS)
1950 #define GALAGA_PALETTE_OFFSET_BGSTARS (GALAGA_PALETTE_OFFSET_SPRITE + GALAGA_PALETTE_SIZE_SPRITES)
1951
1952 #define GALAGA_NUM_OF_CHAR 0x100
1953 #define GALAGA_SIZE_OF_CHAR_IN_BYTES 0x80
1954
1955 #define GALAGA_NUM_OF_SPRITE 0x80
1956 #define GALAGA_SIZE_OF_SPRITE_IN_BYTES 0x200
1957
1958 #define STARS_CTRL_NUM 6
1959
1960 struct Stars_Def
1961 {
1962 UINT32 scrollX;
1963 UINT32 scrollY;
1964 UINT8 control[STARS_CTRL_NUM];
1965 };
1966
1967 static struct Stars_Def stars = { 0 };
1968
1969 struct Star_Def
1970 {
1971 UINT16 x;
1972 UINT16 y;
1973 UINT8 colour;
1974 UINT8 set;
1975 };
1976
1977 #define MAX_STARS 252
1978 static struct Star_Def *starSeedTable;
1979
1980 static struct CPU_Config_Def galagaCPU[NAMCO_BRD_CPU_COUNT] =
1981 {
1982 {
1983 /* CPU ID = */ CPU1,
1984 /* CPU Read Func = */ namcoZ80ProgRead,
1985 /* CPU Write Func = */ namcoZ80ProgWrite,
1986 /* Memory Mapping = */ galagaMemoryMap1
1987 },
1988 {
1989 /* CPU ID = */ CPU2,
1990 /* CPU Read Func = */ namcoZ80ProgRead,
1991 /* CPU Write Func = */ namcoZ80ProgWrite,
1992 /* Memory Mapping = */ galagaMemoryMap2
1993 },
1994 {
1995 /* CPU ID = */ CPU3,
1996 /* CPU Read Func = */ namcoZ80ProgRead,
1997 /* CPU Write Func = */ namcoZ80ProgWrite,
1998 /* Memory Mapping = */ galagaMemoryMap3
1999 },
2000 };
2001
2002 static struct CPU_Rd_Table galagaReadTable[] =
2003 {
2004 { 0x6800, 0x6807, namcoZ80ReadDip },
2005 { 0x7000, 0x7002, namcoCustomICsReadDta },
2006 { 0x7100, 0x7100, namcoCustomICsReadCmd },
2007 { 0x0000, 0x0000, NULL }, // End of Table marker
2008 };
2009
2010 static struct CPU_Wr_Table galagaWriteTable[] =
2011 {
2012 { 0x6800, 0x681f, namcoZ80WriteSound },
2013 { 0x6820, 0x6820, namcoZ80WriteCPU1Irq },
2014 { 0x6821, 0x6821, namcoZ80WriteCPU2Irq },
2015 { 0x6822, 0x6822, namcoZ80WriteCPU3Irq },
2016 { 0x6823, 0x6823, namcoZ80WriteCPUReset },
2017 // { 0x6830, 0x6830, WatchDogWriteNotImplemented },
2018 { 0x7000, 0x700f, namcoCustomICsWriteDta },
2019 { 0x7100, 0x7100, namcoCustomICsWriteCmd },
2020 { 0xa000, 0xa005, galagaZ80WriteStars },
2021 { 0xa007, 0xa007, namcoZ80WriteFlipScreen },
2022 { 0x0000, 0x0000, NULL }, // End of Table marker
2023 };
2024
2025 static struct Memory_Map_Def galagaMemTable[] =
2026 {
2027 { &memory.Z80.rom1, 0x04000, MEM_PGM },
2028 { &memory.Z80.rom2, 0x04000, MEM_PGM },
2029 { &memory.Z80.rom3, 0x04000, MEM_PGM },
2030 { &memory.PROM.palette, 0x00020, MEM_ROM },
2031 { &memory.PROM.charLookup, 0x00100, MEM_ROM },
2032 { &memory.PROM.spriteLookup, 0x00100, MEM_ROM },
2033 { &NamcoSoundProm, 0x00200, MEM_ROM },
2034
2035 { &memory.RAM.video, 0x00800, MEM_RAM },
2036 { &memory.RAM.shared1, 0x00400, MEM_RAM },
2037 { &memory.RAM.shared2, 0x00400, MEM_RAM },
2038 { &memory.RAM.shared3, 0x00400, MEM_RAM },
2039
2040 { (UINT8 **)&starSeedTable, sizeof(struct Star_Def) * MAX_STARS, MEM_DATA },
2041 { &graphics.fgChars, GALAGA_NUM_OF_CHAR * 8 * 8, MEM_DATA },
2042 { &graphics.sprites, GALAGA_NUM_OF_SPRITE * 16 * 16, MEM_DATA },
2043 { (UINT8 **)&graphics.palette, GALAGA_PALETTE_SIZE * sizeof(UINT32), MEM_DATA32 },
2044 };
2045
2046 #define GALAGA_MEM_TBL_SIZE (sizeof(galagaMemTable) / sizeof(struct Memory_Map_Def))
2047
2048 static struct ROM_Load_Def galagaROMTable[] =
2049 {
2050 { &memory.Z80.rom1, 0x00000, NULL },
2051 { &memory.Z80.rom1, 0x01000, NULL },
2052 { &memory.Z80.rom1, 0x02000, NULL },
2053 { &memory.Z80.rom1, 0x03000, NULL },
2054 { &memory.Z80.rom2, 0x00000, NULL },
2055 { &memory.Z80.rom3, 0x00000, NULL },
2056 { &tempRom, 0x00000, galagaCharDecode },
2057 { &tempRom, 0x00000, NULL },
2058 { &tempRom, 0x01000, galagaSpriteDecode },
2059 { &memory.PROM.palette, 0x00000, NULL },
2060 { &memory.PROM.charLookup, 0x00000, NULL },
2061 { &memory.PROM.spriteLookup, 0x00000, NULL },
2062 { &NamcoSoundProm, 0x00000, namcoMachineInit }
2063
2064 };
2065
2066 #define GALAGA_ROM_TBL_SIZE (sizeof(galagaROMTable) / sizeof(struct ROM_Load_Def))
2067
2068 static struct ROM_Load_Def gallagROMTable[] =
2069 {
2070 { &memory.Z80.rom1, 0x00000, NULL },
2071 { &memory.Z80.rom1, 0x01000, NULL },
2072 { &memory.Z80.rom1, 0x02000, NULL },
2073 { &memory.Z80.rom1, 0x03000, NULL },
2074 { &memory.Z80.rom2, 0x00000, NULL },
2075 { &memory.Z80.rom3, 0x00000, NULL },
2076 { &tempRom, 0x00000, galagaCharDecode },
2077 { &tempRom, 0x00000, NULL },
2078 { &tempRom, 0x01000, galagaSpriteDecode },
2079 { &memory.PROM.palette, 0x00000, NULL },
2080 { &memory.PROM.charLookup, 0x00000, NULL },
2081 { &memory.PROM.spriteLookup, 0x00000, NULL },
2082 { &NamcoSoundProm, 0x00000, namcoMachineInit },
2083 };
2084
2085 #define GALLAG_ROM_TBL_SIZE (sizeof(gallagROMTable) / sizeof(struct ROM_Load_Def))
2086
2087 static DrawFunc_t galagaDrawFuncs[] =
2088 {
2089 galagaCalcPalette,
2090 galagaRenderChars,
2091 galagaRenderStars,
2092 namcoRenderSprites,
2093 galagaStarScroll,
2094 };
2095
2096 #define GALAGA_DRAW_TBL_SIZE (sizeof(galagaDrawFuncs) / sizeof(galagaDrawFuncs[0]))
2097
2098 static struct Namco_Custom_RW_Entry galagaCustomICRW[] =
2099 {
2100 { 0x71, namco51xxRead },
2101 { 0xa1, namco51xxWrite },
2102 { 0xb1, namco51xxRead },
2103 { 0xe1, namco51xxWrite },
2104 { 0xA8, namco54xxWrite },
2105 { 0x00, NULL }
2106 };
2107
2108 static struct N54XX_Sample_Info_Def galagaN54xxSampleList[] =
2109 {
2110 { 0, "\x40\x00\x02\xdf" },
2111 { 1, "\x30\x30\x03\xdf" },
2112 { -1, "" },
2113 };
2114
2115 static struct Machine_Config_Def galagaMachineConfig =
2116 {
2117 .cpus = galagaCPU,
2118 .wrAddrList = galagaWriteTable,
2119 .rdAddrList = galagaReadTable,
2120 .memMapTable = galagaMemTable,
2121 .sizeOfMemMapTable = GALAGA_MEM_TBL_SIZE,
2122 .romLayoutTable = galagaROMTable,
2123 .sizeOfRomLayoutTable = GALAGA_ROM_TBL_SIZE,
2124 .tempRomSize = 0x2000,
2125 .tilemapsConfig = galagaTilemapConfig,
2126 .drawLayerTable = galagaDrawFuncs,
2127 .drawTableSize = GALAGA_DRAW_TBL_SIZE,
2128 .getSpriteParams = galagaGetSpriteParams,
2129 .reset = galagaReset,
2130 .customRWTable = galagaCustomICRW,
2131 .n54xxSampleList = galagaN54xxSampleList
2132 };
2133
galagaInit(void)2134 static INT32 galagaInit(void)
2135 {
2136 machine.game = NAMCO_GALAGA;
2137 machine.numOfDips = GALAGA_NUM_OF_DIPSWITCHES;
2138
2139 machine.config = &galagaMachineConfig;
2140
2141 return namcoInitBoard();
2142 }
2143
2144 static struct Machine_Config_Def gallagMachineConfig =
2145 {
2146 .cpus = galagaCPU,
2147 .wrAddrList = galagaWriteTable,
2148 .rdAddrList = galagaReadTable,
2149 .memMapTable = galagaMemTable,
2150 .sizeOfMemMapTable = GALAGA_MEM_TBL_SIZE,
2151 .romLayoutTable = gallagROMTable,
2152 .sizeOfRomLayoutTable = GALLAG_ROM_TBL_SIZE,
2153 .tempRomSize = 0x2000,
2154 .tilemapsConfig = galagaTilemapConfig,
2155 .drawLayerTable = galagaDrawFuncs,
2156 .drawTableSize = GALAGA_DRAW_TBL_SIZE,
2157 .getSpriteParams = galagaGetSpriteParams,
2158 .reset = galagaReset,
2159 .customRWTable = galagaCustomICRW,
2160 .n54xxSampleList = galagaN54xxSampleList
2161 };
2162
gallagInit(void)2163 static INT32 gallagInit(void)
2164 {
2165 machine.game = NAMCO_GALAGA;
2166 machine.numOfDips = GALAGA_NUM_OF_DIPSWITCHES;
2167
2168 machine.config = &gallagMachineConfig;
2169
2170 return namcoInitBoard();
2171 }
2172
galagaReset(void)2173 static INT32 galagaReset(void)
2174 {
2175 for (INT32 i = 0; i < STARS_CTRL_NUM; i ++)
2176 {
2177 stars.control[i] = 0;
2178 }
2179 stars.scrollX = 0;
2180 stars.scrollY = 0;
2181
2182 return DrvDoReset();
2183 }
2184
galagaMemoryMap1(void)2185 static void galagaMemoryMap1(void)
2186 {
2187 ZetMapMemory(memory.Z80.rom1, 0x0000, 0x3fff, MAP_ROM);
2188 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
2189 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
2190 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
2191 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
2192 }
2193
galagaMemoryMap2(void)2194 static void galagaMemoryMap2(void)
2195 {
2196 ZetMapMemory(memory.Z80.rom2, 0x0000, 0x3fff, MAP_ROM);
2197 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
2198 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
2199 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
2200 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
2201 }
2202
galagaMemoryMap3(void)2203 static void galagaMemoryMap3(void)
2204 {
2205 ZetMapMemory(memory.Z80.rom3, 0x0000, 0x3fff, MAP_ROM);
2206 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
2207 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
2208 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
2209 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
2210 }
2211
tilemap_callback(galaga_fg)2212 static tilemap_callback ( galaga_fg )
2213 {
2214 INT32 code = memory.RAM.video[offs + 0x000] & 0x7f;
2215 INT32 colour = memory.RAM.video[offs + 0x400] & 0x3f;
2216
2217 TILE_SET_INFO(0, code, colour, 0);
2218 }
2219
galagaCharDecode(void)2220 static INT32 galagaCharDecode(void)
2221 {
2222 GfxDecode(
2223 GALAGA_NUM_OF_CHAR,
2224 NAMCO_2BIT_PALETTE_BITS,
2225 8, 8,
2226 (INT32*)planeOffsets2Bit,
2227 (INT32*)xOffsets8x8Tiles2Bit,
2228 (INT32*)yOffsets8x8Tiles2Bit,
2229 GALAGA_SIZE_OF_CHAR_IN_BYTES,
2230 tempRom,
2231 graphics.fgChars
2232 );
2233
2234 return 0;
2235 }
2236
galagaSpriteDecode(void)2237 static INT32 galagaSpriteDecode(void)
2238 {
2239 GfxDecode(
2240 GALAGA_NUM_OF_SPRITE,
2241 NAMCO_2BIT_PALETTE_BITS,
2242 16, 16,
2243 (INT32*)planeOffsets2Bit,
2244 (INT32*)xOffsets16x16Tiles2Bit,
2245 (INT32*)yOffsets16x16Tiles2Bit,
2246 GALAGA_SIZE_OF_SPRITE_IN_BYTES,
2247 tempRom,
2248 graphics.sprites
2249 );
2250
2251 return 0;
2252 }
2253
galagaTilemapConfig(void)2254 static INT32 galagaTilemapConfig(void)
2255 {
2256 GenericTilemapInit(
2257 0, //TILEMAP_FG,
2258 namco_map_scan,
2259 galaga_fg_map_callback,
2260 8, 8,
2261 NAMCO_TMAP_WIDTH, NAMCO_TMAP_HEIGHT
2262 );
2263
2264 GenericTilemapSetGfx(
2265 0, //TILEMAP_FG,
2266 graphics.fgChars,
2267 NAMCO_2BIT_PALETTE_BITS,
2268 8, 8,
2269 (GALAGA_NUM_OF_CHAR * 8 * 8),
2270 0x0,
2271 (GALAGA_PALETTE_SIZE_CHARS - 1)
2272 );
2273
2274 GenericTilemapSetTransparent(0, 0);
2275
2276 GenericTilemapSetOffsets(TMAP_GLOBAL, 0, 0);
2277
2278 return 0;
2279 }
2280
galagaZ80WriteStars(UINT16 offset,UINT8 dta)2281 static void galagaZ80WriteStars(UINT16 offset, UINT8 dta)
2282 {
2283 stars.control[offset] = dta & 0x01;
2284 }
2285
2286 #define GALAGA_3BIT_PALETTE_SIZE 32
2287 #define GALAGA_2BIT_PALETTE_SIZE 64
2288
galagaCalcPalette(void)2289 static void galagaCalcPalette(void)
2290 {
2291 UINT32 palette3Bit[GALAGA_3BIT_PALETTE_SIZE];
2292
2293 for (INT32 i = 0; i < GALAGA_3BIT_PALETTE_SIZE; i ++)
2294 {
2295 INT32 r = Colour3Bit[(memory.PROM.palette[i] >> 0) & 0x07];
2296 INT32 g = Colour3Bit[(memory.PROM.palette[i] >> 3) & 0x07];
2297 INT32 b = Colour3Bit[(memory.PROM.palette[i] >> 5) & 0x06];
2298
2299 palette3Bit[i] = BurnHighCol(r, g, b, 0);
2300 }
2301
2302 for (INT32 i = 0; i < GALAGA_PALETTE_SIZE_CHARS; i ++)
2303 {
2304 graphics.palette[GALAGA_PALETTE_OFFSET_CHARS + i] =
2305 palette3Bit[((memory.PROM.charLookup[i]) & 0x0f) + 0x10];
2306 }
2307
2308 for (INT32 i = 0; i < GALAGA_PALETTE_SIZE_SPRITES; i ++)
2309 {
2310 graphics.palette[GALAGA_PALETTE_OFFSET_SPRITE + i] =
2311 palette3Bit[memory.PROM.spriteLookup[i] & 0x0f];
2312 }
2313
2314 UINT32 palette2Bit[GALAGA_2BIT_PALETTE_SIZE];
2315
2316 for (INT32 i = 0; i < GALAGA_2BIT_PALETTE_SIZE; i ++)
2317 {
2318 INT32 r = Colour2Bit[(i >> 0) & 0x03];
2319 INT32 g = Colour2Bit[(i >> 2) & 0x03];
2320 INT32 b = Colour2Bit[(i >> 4) & 0x03];
2321
2322 palette2Bit[i] = BurnHighCol(r, g, b, 0);
2323 }
2324
2325 for (INT32 i = 0; i < GALAGA_PALETTE_SIZE_BGSTARS; i ++)
2326 {
2327 graphics.palette[GALAGA_PALETTE_OFFSET_BGSTARS + i] =
2328 palette2Bit[i];
2329 }
2330
2331 galagaInitStars();
2332 }
2333
galagaInitStars(void)2334 static void galagaInitStars(void)
2335 {
2336 /*
2337 Galaga star line and pixel locations pulled directly from
2338 a clocked stepping of the 05 starfield. The chip was clocked
2339 on a test rig with hblank and vblank simulated, each X & Y
2340 location of a star being recorded along with it's color value.
2341
2342 The lookup table is generated using a reverse engineered
2343 linear feedback shift register + XOR boolean expression.
2344
2345 Because the starfield begins generating stars at the point
2346 in time it's enabled the exact horiz location of the stars
2347 on Galaga depends on the length of time of the POST for the
2348 original board.
2349
2350 Two control bits determine which of two sets are displayed
2351 set 0 or 1 and simultaneously 2 or 3.
2352
2353 There are 63 stars in each set, 126 displayed at any one time
2354 Code: jmakovicka, based on info from http://www.pin4.at/pro_custom_05xx.php
2355 */
2356
2357 const UINT16 feed = 0x9420;
2358
2359 INT32 idx = 0;
2360 for (UINT32 sf = 0; sf < 4; ++ sf)
2361 {
2362 // starfield select flags
2363 UINT16 sf1 = (sf >> 1) & 1;
2364 UINT16 sf2 = sf & 1;
2365
2366 UINT16 i = 0x70cc;
2367 for (UINT32 cnt = 0; cnt < 65535; ++ cnt)
2368 {
2369 // output enable lookup
2370 UINT16 xor1 = i ^ (i >> 3);
2371 UINT16 xor2 = xor1 ^ (i >> 2);
2372 UINT16 oe = (sf1 ? 0 : 0x4000) | ((sf1 ^ sf2) ? 0 : 0x1000);
2373 if ( ( 0x8007 == ( i & 0x8007) ) &&
2374 ( 0x2008 == (~i & 0x2008) ) &&
2375 ( (sf1 ? 0 : 0x0100) == (xor1 & 0x0100) ) &&
2376 ( (sf2 ? 0 : 0x0040) == (xor2 & 0x0040) ) &&
2377 ( oe == (i & 0x5000) ) &&
2378 ( cnt >= (256 * 4) ) )
2379 {
2380 // color lookup
2381 UINT16 xor3 = (i >> 1) ^ (i >> 6);
2382 UINT16 clr = (
2383 ( (i >> 9) & 0x07)
2384 | ( ( xor3 ^ (i >> 4) ^ (i >> 7)) & 0x08)
2385 | (~xor3 & 0x10)
2386 | ( ( (i >> 2) ^ (i >> 5)) & 0x20) )
2387 ^ ( (i & 0x4000) ? 0 : 0x24)
2388 ^ ( ( ((i >> 2) ^ i) & 0x1000) ? 0x21 : 0);
2389
2390 starSeedTable[idx].x = cnt % 256;
2391 starSeedTable[idx].y = cnt / 256;
2392 starSeedTable[idx].colour = clr;
2393 starSeedTable[idx].set = sf;
2394 ++ idx;
2395 }
2396
2397 // update the LFSR
2398 if (i & 1) i = (i >> 1) ^ feed;
2399 else i = (i >> 1);
2400 }
2401 }
2402 }
2403
galagaRenderStars(void)2404 static void galagaRenderStars(void)
2405 {
2406 if (1 == stars.control[5])
2407 {
2408 INT32 setA = stars.control[3];
2409 INT32 setB = stars.control[4] | 0x02;
2410
2411 for (INT32 starCounter = 0; starCounter < MAX_STARS; starCounter ++)
2412 {
2413 if ( (setA == starSeedTable[starCounter].set) ||
2414 (setB == starSeedTable[starCounter].set) )
2415 {
2416 INT32 x = ( starSeedTable[starCounter].x + stars.scrollX) % 256 + 16;
2417 INT32 y = ((nScreenHeight / 2) + starSeedTable[starCounter].y + stars.scrollY) % 256;
2418
2419 if ( (x >= 0) && (x < nScreenWidth) &&
2420 (y >= 0) && (y < nScreenHeight) )
2421 {
2422 pTransDraw[(y * nScreenWidth) + x] = starSeedTable[starCounter].colour + GALAGA_PALETTE_OFFSET_BGSTARS;
2423 }
2424 }
2425
2426 }
2427 }
2428 }
2429
galagaStarScroll(void)2430 static void galagaStarScroll(void)
2431 {
2432 static const INT32 speeds[8] = { -1, -2, -3, 0, 3, 2, 1, 0 };
2433
2434 stars.scrollX += speeds[stars.control[0] + (stars.control[1] * 2) + (stars.control[2] * 4)];
2435 }
2436
galagaRenderChars(void)2437 static void galagaRenderChars(void)
2438 {
2439 GenericTilemapSetScrollX(0, 0);
2440 GenericTilemapSetScrollY(0, 0);
2441 GenericTilemapSetEnable(0, 1);
2442 GenericTilemapDraw(0, pTransDraw, 0 | TMAP_TRANSPARENT);
2443 }
2444
galagaGetSpriteParams(struct Namco_Sprite_Params * spriteParams,UINT32 offset)2445 static UINT32 galagaGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset)
2446 {
2447 UINT8 *spriteRam1 = memory.RAM.shared1 + 0x380;
2448 UINT8 *spriteRam2 = memory.RAM.shared2 + 0x380;
2449 UINT8 *spriteRam3 = memory.RAM.shared3 + 0x380;
2450
2451 spriteParams->sprite = spriteRam1[offset + 0] & 0x7f;
2452 spriteParams->colour = spriteRam1[offset + 1] & 0x3f;
2453
2454 spriteParams->xStart = spriteRam2[offset + 1] - 40 + (0x100 * (spriteRam3[offset + 1] & 0x03));
2455 spriteParams->yStart = NAMCO_SCREEN_WIDTH - spriteRam2[offset + 0] + 1;
2456 spriteParams->xStep = 16;
2457 spriteParams->yStep = 16;
2458
2459 spriteParams->flags = spriteRam3[offset + 0] & 0x0f;
2460
2461 if (spriteParams->flags & ySize)
2462 {
2463 if (spriteParams->flags & yFlip)
2464 {
2465 spriteParams->yStep = -16;
2466 }
2467 else
2468 {
2469 spriteParams->yStart -= 16;
2470 }
2471 }
2472
2473 if (spriteParams->flags & xSize)
2474 {
2475 if (spriteParams->flags & xFlip)
2476 {
2477 spriteParams->xStart += 16;
2478 spriteParams->xStep = -16;
2479 }
2480 }
2481
2482 spriteParams->paletteBits = NAMCO_2BIT_PALETTE_BITS;
2483 spriteParams->paletteOffset = GALAGA_PALETTE_OFFSET_SPRITE;
2484
2485 return 1;
2486 }
2487
galagaScan(INT32 nAction,INT32 * pnMin)2488 static INT32 galagaScan(INT32 nAction, INT32 *pnMin)
2489 {
2490 if (nAction & ACB_DRIVER_DATA) {
2491 SCAN_VAR(stars.scrollX);
2492 SCAN_VAR(stars.scrollY);
2493 SCAN_VAR(stars.control);
2494 }
2495
2496 return DrvScan(nAction, pnMin);
2497 }
2498
2499 struct BurnDriver BurnDrvGalaga =
2500 {
2501 /* filename of zip without extension = */ "galaga",
2502 /* filename of parent, no extension = */ NULL,
2503 /* filename of board ROMs = */ NULL,
2504 /* filename of samples ZIP = */ "galaga",
2505 /* date = */ "1981",
2506 /* FullName = */ "Galaga (Namco rev. B)\0",
2507 /* Comment = */ NULL,
2508 /* Manufacturer = */ "Namco",
2509 /* System = */ "Miscellaneous",
2510 /* FullName = */ NULL,
2511 /* Comment = */ NULL,
2512 /* Manufacturer = */ NULL,
2513 /* System = */ NULL,
2514 /* Flags = */ BDF_GAME_WORKING |
2515 BDF_ORIENTATION_VERTICAL |
2516 BDF_ORIENTATION_FLIPPED |
2517 BDF_HISCORE_SUPPORTED,
2518 /* No of Players = */ 2,
2519 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2520 /* Genre = */ GBF_VERSHOOT,
2521 /* Family = */ 0,
2522 /* GetZipName func = */ NULL,
2523 /* GetROMInfo func = */ GalagaRomInfo,
2524 /* GetROMName func = */ GalagaRomName,
2525 /* GetHDDInfo func = */ NULL,
2526 /* GetHDDName func = */ NULL,
2527 /* GetSampleInfo func = */ GalagaSampleInfo,
2528 /* GetSampleName func = */ GalagaSampleName,
2529 /* GetInputInfo func = */ GalagaInputInfo,
2530 /* GetDIPInfo func = */ GalagaDIPInfo,
2531 /* Init func = */ galagaInit,
2532 /* Exit func = */ DrvExit,
2533 /* Frame func = */ DrvFrame,
2534 /* Redraw func = */ DrvDraw,
2535 /* Areascan func = */ galagaScan,
2536 /* Recalc Palette = */ NULL,
2537 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2538 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2539 /* xAspect, yAspect = */ 3, 4
2540 };
2541
2542 struct BurnDriver BurnDrvGalagao =
2543 {
2544 /* filename of zip without extension = */ "galagao",
2545 /* filename of parent, no extension = */ "galaga",
2546 /* filename of board ROMs = */ NULL,
2547 /* filename of samples ZIP = */ "galaga",
2548 /* date = */ "1981",
2549 /* FullName = */ "Galaga (Namco)\0",
2550 /* Comment = */ NULL,
2551 /* Manufacturer = */ "Namco",
2552 /* System = */ "Miscellaneous",
2553 /* FullName = */ NULL,
2554 /* Comment = */ NULL,
2555 /* Manufacturer = */ NULL,
2556 /* System = */ NULL,
2557 /* Flags = */ BDF_GAME_WORKING |
2558 BDF_CLONE |
2559 BDF_ORIENTATION_VERTICAL |
2560 BDF_ORIENTATION_FLIPPED |
2561 BDF_HISCORE_SUPPORTED,
2562 /* No of Players = */ 2,
2563 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2564 /* Genre = */ GBF_VERSHOOT,
2565 /* Family = */ 0,
2566 /* GetZipName func = */ NULL,
2567 /* GetROMInfo func = */ GalagaoRomInfo,
2568 /* GetROMName func = */ GalagaoRomName,
2569 /* GetHDDInfo func = */ NULL,
2570 /* GetHDDName func = */ NULL,
2571 /* GetSampleInfo func = */ GalagaSampleInfo,
2572 /* GetSampleName func = */ GalagaSampleName,
2573 /* GetInputInfo func = */ GalagaInputInfo,
2574 /* GetDIPInfo func = */ GalagaDIPInfo,
2575 /* Init func = */ galagaInit,
2576 /* Exit func = */ DrvExit,
2577 /* Frame func = */ DrvFrame,
2578 /* Redraw func = */ DrvDraw,
2579 /* Areascan func = */ galagaScan,
2580 /* Recalc Palette = */ NULL,
2581 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2582 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2583 /* xAspect, yAspect = */ 3, 4
2584 };
2585
2586 struct BurnDriver BurnDrvGalagamw =
2587 {
2588 /* filename of zip without extension = */ "galagamw",
2589 /* filename of parent, no extension = */ "galaga",
2590 /* filename of board ROMs = */ NULL,
2591 /* filename of samples ZIP = */ "galaga",
2592 /* date = */ "1981",
2593 /* FullName = */ "Galaga (Midway set 1)\0",
2594 /* Comment = */ NULL,
2595 /* Manufacturer = */ "Namco (Midway License)",
2596 /* System = */ "Miscellaneous",
2597 /* FullName = */ NULL,
2598 /* Comment = */ NULL,
2599 /* Manufacturer = */ NULL,
2600 /* System = */ NULL,
2601 /* Flags = */ BDF_GAME_WORKING |
2602 BDF_CLONE |
2603 BDF_ORIENTATION_VERTICAL |
2604 BDF_ORIENTATION_FLIPPED |
2605 BDF_HISCORE_SUPPORTED,
2606 /* No of Players = */ 2,
2607 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2608 /* Genre = */ GBF_VERSHOOT,
2609 /* Family = */ 0,
2610 /* GetZipName func = */ NULL,
2611 /* GetROMInfo func = */ GalagamwRomInfo,
2612 /* GetROMName func = */ GalagamwRomName,
2613 /* GetHDDInfo func = */ NULL,
2614 /* GetHDDName func = */ NULL,
2615 /* GetSampleInfo func = */ GalagaSampleInfo,
2616 /* GetSampleName func = */ GalagaSampleName,
2617 /* GetInputInfo func = */ GalagaInputInfo,
2618 /* GetDIPInfo func = */ GalagamwDIPInfo,
2619 /* Init func = */ galagaInit,
2620 /* Exit func = */ DrvExit,
2621 /* Frame func = */ DrvFrame,
2622 /* Redraw func = */ DrvDraw,
2623 /* Areascan func = */ galagaScan,
2624 /* Recalc Palette = */ NULL,
2625 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2626 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2627 /* xAspect, yAspect = */ 3, 4
2628 };
2629
2630 struct BurnDriver BurnDrvGalagamk =
2631 {
2632 /* filename of zip without extension = */ "galagamk",
2633 /* filename of parent, no extension = */ "galaga",
2634 /* filename of board ROMs = */ NULL,
2635 /* filename of samples ZIP = */ "galaga",
2636 /* date = */ "1981",
2637 /* FullName = */ "Galaga (Midway set 2)\0",
2638 /* Comment = */ NULL,
2639 /* Manufacturer = */ "Namco (Midway License)",
2640 /* System = */ "Miscellaneous",
2641 /* FullName = */ NULL,
2642 /* Comment = */ NULL,
2643 /* Manufacturer = */ NULL,
2644 /* System = */ NULL,
2645 /* Flags = */ BDF_GAME_WORKING |
2646 BDF_CLONE |
2647 BDF_ORIENTATION_VERTICAL |
2648 BDF_ORIENTATION_FLIPPED |
2649 BDF_HISCORE_SUPPORTED,
2650 /* No of Players = */ 2,
2651 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2652 /* Genre = */ GBF_VERSHOOT,
2653 /* Family = */ 0,
2654 /* GetZipName func = */ NULL,
2655 /* GetROMInfo func = */ GalagamkRomInfo,
2656 /* GetROMName func = */ GalagamkRomName,
2657 /* GetHDDInfo func = */ NULL,
2658 /* GetHDDName func = */ NULL,
2659 /* GetSampleInfo func = */ GalagaSampleInfo,
2660 /* GetSampleName func = */ GalagaSampleName,
2661 /* GetInputInfo func = */ GalagaInputInfo,
2662 /* GetDIPInfo func = */ GalagaDIPInfo,
2663 /* Init func = */ galagaInit,
2664 /* Exit func = */ DrvExit,
2665 /* Frame func = */ DrvFrame,
2666 /* Redraw func = */ DrvDraw,
2667 /* Areascan func = */ galagaScan,
2668 /* Recalc Palette = */ NULL,
2669 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2670 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2671 /* xAspect, yAspect = */ 3, 4
2672 };
2673
2674 struct BurnDriver BurnDrvGalagamf =
2675 {
2676 /* filename of zip without extension = */ "galagamf",
2677 /* filename of parent, no extension = */ "galaga",
2678 /* filename of board ROMs = */ NULL,
2679 /* filename of samples ZIP = */ "galaga",
2680 /* date = */ "1981",
2681 /* FullName = */ "Galaga (Midway set 1 with fast shoot hack)\0",
2682 /* Comment = */ NULL,
2683 /* Manufacturer = */ "Namco (Midway License)",
2684 /* System = */ "Miscellaneous",
2685 /* FullName = */ NULL,
2686 /* Comment = */ NULL,
2687 /* Manufacturer = */ NULL,
2688 /* System = */ NULL,
2689 /* Flags = */ BDF_GAME_WORKING |
2690 BDF_CLONE |
2691 BDF_ORIENTATION_VERTICAL |
2692 BDF_ORIENTATION_FLIPPED |
2693 BDF_HISCORE_SUPPORTED,
2694 /* No of Players = */ 2,
2695 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2696 /* Genre = */ GBF_VERSHOOT,
2697 /* Family = */ 0,
2698 /* GetZipName func = */ NULL,
2699 /* GetROMInfo func = */ GalagamfRomInfo,
2700 /* GetROMName func = */ GalagamfRomName,
2701 /* GetHDDInfo func = */ NULL,
2702 /* GetHDDName func = */ NULL,
2703 /* GetSampleInfo func = */ GalagaSampleInfo,
2704 /* GetSampleName func = */ GalagaSampleName,
2705 /* GetInputInfo func = */ GalagaInputInfo,
2706 /* GetDIPInfo func = */ GalagaDIPInfo,
2707 /* Init func = */ galagaInit,
2708 /* Exit func = */ DrvExit,
2709 /* Frame func = */ DrvFrame,
2710 /* Redraw func = */ DrvDraw,
2711 /* Areascan func = */ galagaScan,
2712 /* Recalc Palette = */ NULL,
2713 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2714 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2715 /* xAspect, yAspect = */ 3, 4
2716 };
2717
2718 struct BurnDriver BurnDrvGallag =
2719 {
2720 /* filename of zip without extension = */ "gallag",
2721 /* filename of parent, no extension = */ "galaga",
2722 /* filename of board ROMs = */ NULL,
2723 /* filename of samples ZIP = */ "galaga",
2724 /* date = */ "1981",
2725 /* FullName = */ "Gallag\0",
2726 /* Comment = */ NULL,
2727 /* Manufacturer = */ "bootleg",
2728 /* System = */ "Miscellaneous",
2729 /* FullName = */ NULL,
2730 /* Comment = */ NULL,
2731 /* Manufacturer = */ NULL,
2732 /* System = */ NULL,
2733 /* Flags = */ BDF_GAME_WORKING |
2734 BDF_CLONE |
2735 BDF_ORIENTATION_VERTICAL |
2736 BDF_ORIENTATION_FLIPPED |
2737 BDF_BOOTLEG |
2738 BDF_HISCORE_SUPPORTED,
2739 /* No of Players = */ 2,
2740 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2741 /* Genre = */ GBF_VERSHOOT,
2742 /* Family = */ 0,
2743 /* GetZipName func = */ NULL,
2744 /* GetROMInfo func = */ GallagRomInfo,
2745 /* GetROMName func = */ GallagRomName,
2746 /* GetHDDInfo func = */ NULL,
2747 /* GetHDDName func = */ NULL,
2748 /* GetSampleInfo func = */ GalagaSampleInfo,
2749 /* GetSampleName func = */ GalagaSampleName,
2750 /* GetInputInfo func = */ GalagaInputInfo,
2751 /* GetDIPInfo func = */ GalagaDIPInfo,
2752 /* Init func = */ gallagInit,
2753 /* Exit func = */ DrvExit,
2754 /* Frame func = */ DrvFrame,
2755 /* Redraw func = */ DrvDraw,
2756 /* Areascan func = */ galagaScan,
2757 /* Recalc Palette = */ NULL,
2758 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2759 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2760 /* xAspect, yAspect = */ 3, 4
2761 };
2762
2763 struct BurnDriver BurnDrvNebulbee =
2764 {
2765 /* filename of zip without extension = */ "nebulbee",
2766 /* filename of parent, no extension = */ "galaga",
2767 /* filename of board ROMs = */ NULL,
2768 /* filename of samples ZIP = */ "galaga",
2769 /* date = */ "1981",
2770 /* FullName = */ "Nebulous Bee\0",
2771 /* Comment = */ NULL,
2772 /* Manufacturer = */ "bootleg",
2773 /* System = */ "Miscellaneous",
2774 /* FullName = */ NULL,
2775 /* Comment = */ NULL,
2776 /* Manufacturer = */ NULL,
2777 /* System = */ NULL,
2778 /* Flags = */ BDF_GAME_WORKING |
2779 BDF_CLONE |
2780 BDF_ORIENTATION_VERTICAL |
2781 BDF_ORIENTATION_FLIPPED |
2782 BDF_BOOTLEG |
2783 BDF_HISCORE_SUPPORTED,
2784 /* No of Players = */ 2,
2785 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
2786 /* Genre = */ GBF_VERSHOOT,
2787 /* Family = */ 0,
2788 /* GetZipName func = */ NULL,
2789 /* GetROMInfo func = */ NebulbeeRomInfo,
2790 /* GetROMName func = */ NebulbeeRomName,
2791 /* GetHDDInfo func = */ NULL,
2792 /* GetHDDName func = */ NULL,
2793 /* GetSampleInfo func = */ GalagaSampleInfo,
2794 /* GetSampleName func = */ GalagaSampleName,
2795 /* GetInputInfo func = */ GalagaInputInfo,
2796 /* GetDIPInfo func = */ GalagaDIPInfo,
2797 /* Init func = */ gallagInit,
2798 /* Exit func = */ DrvExit,
2799 /* Frame func = */ DrvFrame,
2800 /* Redraw func = */ DrvDraw,
2801 /* Areascan func = */ galagaScan,
2802 /* Recalc Palette = */ NULL,
2803 /* Palette Entries count = */ GALAGA_PALETTE_SIZE,
2804 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
2805 /* xAspect, yAspect = */ 3, 4
2806 };
2807
2808 /* === Dig Dug === */
2809
2810 static struct BurnInputInfo DigdugInputList[] =
2811 {
2812 {"P1 Start" , BIT_DIGITAL , &input.ports[0].current.bits.bit[2], "p1 start" },
2813 {"P2 Start" , BIT_DIGITAL , &input.ports[0].current.bits.bit[3], "p2 start" },
2814 {"P1 Coin" , BIT_DIGITAL , &input.ports[0].current.bits.bit[4], "p1 coin" },
2815 {"P2 Coin" , BIT_DIGITAL , &input.ports[0].current.bits.bit[5], "p2 coin" },
2816
2817 {"P1 Up" , BIT_DIGITAL , &input.ports[1].current.bits.bit[0], "p1 up" },
2818 {"P1 Down" , BIT_DIGITAL , &input.ports[1].current.bits.bit[2], "p1 down" },
2819 {"P1 Left" , BIT_DIGITAL , &input.ports[1].current.bits.bit[3], "p1 left" },
2820 {"P1 Right" , BIT_DIGITAL , &input.ports[1].current.bits.bit[1], "p1 right" },
2821 {"P1 Fire 1" , BIT_DIGITAL , &input.ports[1].current.bits.bit[4], "p1 fire 1" },
2822
2823 {"P2 Up (cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[0], "p2 up" },
2824 {"P2 Down (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[2], "p2 down" },
2825 {"P2 Left (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[3], "p2 left" },
2826 {"P2 Right (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[1], "p2 right" },
2827 {"P2 Fire 1 (Cocktail)" , BIT_DIGITAL , &input.ports[2].current.bits.bit[4], "p2 fire 1" },
2828
2829 {"Service" , BIT_DIGITAL , &input.ports[0].current.bits.bit[7], "service" },
2830 {"Reset" , BIT_DIGITAL , &input.reset, "reset" },
2831 {"Dip 1" , BIT_DIPSWITCH, &input.dip[0].byte, "dip" },
2832 {"Dip 2" , BIT_DIPSWITCH, &input.dip[1].byte, "dip" },
2833 };
2834
2835 STDINPUTINFO(Digdug)
2836
2837 #define DIGDUG_NUM_OF_DIPSWITCHES 2
2838
2839 static struct BurnDIPInfo DigdugDIPList[]=
2840 {
2841 { 0x10, 0xf0, 0xff, 0xa1, NULL },
2842
2843 // nOffset, nID, nMask, nDefault, NULL
2844 { 0x00, 0xff, 0xff, 0xa1, NULL },
2845 { 0x01, 0xff, 0xff, 0x24, NULL },
2846
2847 // Dip 1
2848 // x, DIP_GRP, x, OptionCnt, szTitle
2849 { 0, 0xfe, 0, 8, "Coin B" },
2850 // nInput, nFlags, nMask, nSetting, szText
2851 { 0x00, 0x01, 0x07, 0x07, "3 Coins 1 Credits" },
2852 { 0x00, 0x01, 0x07, 0x03, "2 Coins 1 Credits" },
2853 { 0x00, 0x01, 0x07, 0x05, "2 Coins 3 Credits" },
2854 { 0x00, 0x01, 0x07, 0x01, "1 Coin 1 Credits" },
2855 { 0x00, 0x01, 0x07, 0x06, "1 Coin 2 Credits" },
2856 { 0x00, 0x01, 0x07, 0x02, "1 Coin 3 Credits" },
2857 { 0x00, 0x01, 0x07, 0x04, "1 Coin 6 Credits" },
2858 { 0x00, 0x01, 0x07, 0x00, "1 Coin 7 Credits" },
2859
2860 // x, DIP_GRP, x, OptionCnt, szTitle
2861 { 0, 0xfe, 0, 8, "Bonus Life (1,2,3) / (5)" },
2862 // nInput, nFlags, nMask, nSetting, szText
2863 { 0x00, 0x01, 0x38, 0x20, "10K & Every 40K / 20K & Every 60K" },
2864 { 0x00, 0x01, 0x38, 0x10, "10K & Every 50K / 30K & Every 80K" },
2865 { 0x00, 0x01, 0x38, 0x30, "20K & Every 60K / 20K & 50K Only" },
2866 { 0x00, 0x01, 0x38, 0x08, "20K & Every 70K / 20K & 60K Only" },
2867 { 0x00, 0x01, 0x38, 0x28, "10K & 40K Only / 30K & 70K Only" },
2868 { 0x00, 0x01, 0x38, 0x18, "20K & 60K Only / 20K Only" },
2869 { 0x00, 0x01, 0x38, 0x38, "10K Only / 30K Only" },
2870 { 0x00, 0x01, 0x38, 0x00, "None / None" },
2871
2872 // x, DIP_GRP, x, OptionCnt, szTitle
2873 { 0, 0xfe, 0, 4, "Lives" },
2874 // nInput, nFlags, nMask, nSetting, szText
2875 { 0x00, 0x01, 0xc0, 0x00, "1" },
2876 { 0x00, 0x01, 0xc0, 0x40, "2" },
2877 { 0x00, 0x01, 0xc0, 0x80, "3" },
2878 { 0x00, 0x01, 0xc0, 0xc0, "5" },
2879
2880 // DIP 2
2881 // x, DIP_GRP, x, OptionCnt, szTitle
2882 { 0, 0xfe, 0, 4, "Coin A" },
2883 // nInput, nFlags, nMask, nSetting, szText
2884 { 0x01, 0x01, 0xc0, 0x40, "2 Coins 1 Credits" },
2885 { 0x01, 0x01, 0xc0, 0x00, "1 Coin 1 Credits" },
2886 { 0x01, 0x01, 0xc0, 0xc0, "2 Coins 3 Credits" },
2887 { 0x01, 0x01, 0xc0, 0x80, "1 Coin 2 Credits" },
2888
2889 // x, DIP_GRP, x, OptionCnt, szTitle
2890 { 0, 0xfe, 0, 2, "Freeze" },
2891 // nInput, nFlags, nMask, nSetting, szText
2892 { 0x01, 0x01, 0x20, 0x20, "Off" },
2893 { 0x01, 0x01, 0x20, 0x00, "On" },
2894
2895 // x, DIP_GRP, x, OptionCnt, szTitle
2896 { 0, 0xfe, 0, 2, "Demo Sounds" },
2897 // nInput, nFlags, nMask, nSetting, szText
2898 { 0x01, 0x01, 0x10, 0x10, "Off" },
2899 { 0x01, 0x01, 0x10, 0x00, "On" },
2900
2901 // x, DIP_GRP, x, OptionCnt, szTitle
2902 { 0, 0xfe, 0, 2, "Allow Continue" },
2903 // nInput, nFlags, nMask, nSetting, szText
2904 { 0x01, 0x01, 0x08, 0x08, "No" },
2905 { 0x01, 0x01, 0x08, 0x00, "Yes" },
2906
2907 // x, DIP_GRP, x, OptionCnt, szTitle
2908 { 0, 0xfe, 0, 2, "Cabinet" },
2909 // nInput, nFlags, nMask, nSetting, szText
2910 { 0x01, 0x01, 0x04, 0x04, "Upright" },
2911 { 0x01, 0x01, 0x04, 0x00, "Cocktail" },
2912
2913 // x, DIP_GRP, x, OptionCnt, szTitle
2914 { 0, 0xfe, 0, 4, "Difficulty" },
2915 // nInput, nFlags, nMask, nSetting, szText
2916 { 0x01, 0x01, 0x03, 0x00, "Easy" },
2917 { 0x01, 0x01, 0x03, 0x02, "Medium" },
2918 { 0x01, 0x01, 0x03, 0x01, "Hard" },
2919 { 0x01, 0x01, 0x03, 0x03, "Hardest" },
2920 };
2921
2922 STDDIPINFO(Digdug)
2923
2924 // Dig Dug (rev 2)
2925
2926 static struct BurnRomInfo digdugRomDesc[] = {
2927 { "dd1a.1", 0x1000, 0xa80ec984, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
2928 { "dd1a.2", 0x1000, 0x559f00bd, BRF_ESS | BRF_PRG }, // 1
2929 { "dd1a.3", 0x1000, 0x8cbc6fe1, BRF_ESS | BRF_PRG }, // 2
2930 { "dd1a.4", 0x1000, 0xd066f830, BRF_ESS | BRF_PRG }, // 3
2931
2932 { "dd1a.5", 0x1000, 0x6687933b, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
2933 { "dd1a.6", 0x1000, 0x843d857f, BRF_ESS | BRF_PRG }, // 5
2934
2935 { "dd1.7", 0x1000, 0xa41bce72, BRF_ESS | BRF_PRG }, // 6 Z80 #3 Program Code
2936
2937 { "dd1.9", 0x0800, 0xf14a6fe1, BRF_GRA }, // 7 Characters
2938
2939 { "dd1.15", 0x1000, 0xe22957c8, BRF_GRA }, // 8 Sprites
2940 { "dd1.14", 0x1000, 0x2829ec99, BRF_GRA }, // 9
2941 { "dd1.13", 0x1000, 0x458499e9, BRF_GRA }, // 10
2942 { "dd1.12", 0x1000, 0xc58252a0, BRF_GRA }, // 11
2943
2944 { "dd1.11", 0x1000, 0x7b383983, BRF_GRA }, // 12 Characters 8x8 2bpp
2945
2946 { "dd1.10b", 0x1000, 0x2cf399c2, BRF_GRA }, // 13 Playfield Data
2947
2948 { "136007.113", 0x0020, 0x4cb9da99, BRF_GRA }, // 14 Palette Prom
2949 { "136007.111", 0x0100, 0x00c7c419, BRF_GRA }, // 15 Sprite Color Prom
2950 { "136007.112", 0x0100, 0xe9b3e08e, BRF_GRA }, // 16 Character Color Prom
2951
2952 { "136007.110", 0x0100, 0x7a2815b4, BRF_GRA }, // 17 Namco Sound Proms
2953 { "136007.109", 0x0100, 0x77245b66, BRF_GRA }, // 18
2954 };
2955
2956 STD_ROM_PICK(digdug)
2957 STD_ROM_FN(digdug)
2958
2959 static struct DigDug_PlayField_Params
2960 {
2961 // Dig Dug playfield stuff
2962 INT32 playField;
2963 INT32 alphaColor;
2964 INT32 playEnable;
2965 INT32 playColor;
2966 } playFieldParams;
2967
2968 #define DIGDUG_NUM_OF_CHAR_PALETTE_BITS 1
2969 #define DIGDUG_NUM_OF_SPRITE_PALETTE_BITS 2
2970 #define DIGDUG_NUM_OF_BGTILE_PALETTE_BITS 2
2971
2972 #define DIGDUG_PALETTE_SIZE_BGTILES 0x100
2973 #define DIGDUG_PALETTE_SIZE_SPRITES 0x100
2974 #define DIGDUG_PALETTE_SIZE_CHARS 0x20
2975 #define DIGDUG_PALETTE_SIZE (DIGDUG_PALETTE_SIZE_CHARS + \
2976 DIGDUG_PALETTE_SIZE_SPRITES + \
2977 DIGDUG_PALETTE_SIZE_BGTILES)
2978
2979 #define DIGDUG_PALETTE_OFFSET_BGTILES 0x0
2980 #define DIGDUG_PALETTE_OFFSET_SPRITE (DIGDUG_PALETTE_OFFSET_BGTILES + \
2981 DIGDUG_PALETTE_SIZE_BGTILES)
2982 #define DIGDUG_PALETTE_OFFSET_CHARS (DIGDUG_PALETTE_OFFSET_SPRITE + \
2983 DIGDUG_PALETTE_SIZE_SPRITES)
2984
2985 #define DIGDUG_NUM_OF_CHAR 0x80
2986 #define DIGDUG_SIZE_OF_CHAR_IN_BYTES 0x40
2987
2988 #define DIGDUG_NUM_OF_SPRITE 0x100
2989 #define DIGDUG_SIZE_OF_SPRITE_IN_BYTES 0x200
2990
2991 #define DIGDUG_NUM_OF_BGTILE 0x100
2992 #define DIGDUG_SIZE_OF_BGTILE_IN_BYTES 0x80
2993
2994 static INT32 digdugInit(void);
2995 static INT32 digdugReset(void);
2996
2997 static void digdugMemoryMap1(void);
2998 static void digdugMemoryMap2(void);
2999 static void digdugMemoryMap3(void);
3000
3001 static INT32 digdugCharDecode(void);
3002 static INT32 digdugBGTilesDecode(void);
3003 static INT32 digdugSpriteDecode(void);
3004 static tilemap_callback(digdug_bg);
3005 static tilemap_callback(digdug_fg);
3006 static INT32 digdugTilemapConfig(void);
3007
3008 static void digdug_pf_latch_w(UINT16 offset, UINT8 dta);
3009 static void digdugZ80Writeb840(UINT16 offset, UINT8 dta);
3010
3011 static void digdugCalcPalette(void);
3012 static void digdugRenderTiles(void);
3013 static UINT32 digdugGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset);
3014
3015 static INT32 digdugScan(INT32 nAction, INT32 *pnMin);
3016
3017 static struct CPU_Config_Def digdugCPU[NAMCO_BRD_CPU_COUNT] =
3018 {
3019 {
3020 /* CPU ID = */ CPU1,
3021 /* CPU Read Func = */ namcoZ80ProgRead,
3022 /* CPU Write Func = */ namcoZ80ProgWrite,
3023 /* Memory Mapping = */ digdugMemoryMap1
3024 },
3025 {
3026 /* CPU ID = */ CPU2,
3027 /* CPU Read Func = */ namcoZ80ProgRead,
3028 /* CPU Write Func = */ namcoZ80ProgWrite,
3029 /* Memory Mapping = */ digdugMemoryMap2
3030 },
3031 {
3032 /* CPU ID = */ CPU3,
3033 /* CPU Read Func = */ namcoZ80ProgRead,
3034 /* CPU Write Func = */ namcoZ80ProgWrite,
3035 /* Memory Mapping = */ digdugMemoryMap3
3036 },
3037 };
3038
3039 static struct CPU_Rd_Table digdugReadTable[] =
3040 {
3041 { 0x6800, 0x6807, namcoZ80ReadDip },
3042 { 0x7000, 0x700f, namcoCustomICsReadDta },
3043 { 0x7100, 0x7100, namcoCustomICsReadCmd },
3044 // EAROM Read
3045 { 0xb800, 0xb83f, earom_read },
3046 { 0x0000, 0x0000, NULL },
3047 };
3048
3049 static struct CPU_Wr_Table digdugWriteTable[] =
3050 {
3051 // EAROM Write
3052 { 0xb800, 0xb83f, earom_write },
3053 { 0x6800, 0x681f, namcoZ80WriteSound },
3054 { 0xb840, 0xb840, digdugZ80Writeb840 },
3055 { 0x6820, 0x6820, namcoZ80WriteCPU1Irq },
3056 { 0x6821, 0x6821, namcoZ80WriteCPU2Irq },
3057 { 0x6822, 0x6822, namcoZ80WriteCPU3Irq },
3058 { 0x6823, 0x6823, namcoZ80WriteCPUReset },
3059 // { 0x6830, 0x6830, WatchDogWriteNotImplemented },
3060 { 0x7000, 0x700f, namcoCustomICsWriteDta },
3061 { 0x7100, 0x7100, namcoCustomICsWriteCmd },
3062 { 0xa000, 0xa006, digdug_pf_latch_w },
3063 { 0xa007, 0xa007, namcoZ80WriteFlipScreen },
3064 { 0x0000, 0x0000, NULL },
3065
3066 };
3067
3068 static struct Memory_Map_Def digdugMemTable[] =
3069 {
3070 { &memory.Z80.rom1, 0x04000, MEM_PGM },
3071 { &memory.Z80.rom2, 0x04000, MEM_PGM },
3072 { &memory.Z80.rom3, 0x04000, MEM_PGM },
3073 { &memory.PROM.palette, 0x00020, MEM_ROM },
3074 { &memory.PROM.charLookup, 0x00100, MEM_ROM },
3075 { &memory.PROM.spriteLookup, 0x00100, MEM_ROM },
3076 { &NamcoSoundProm, 0x00200, MEM_ROM },
3077
3078 { &memory.RAM.video, 0x00800, MEM_RAM },
3079 { &memory.RAM.shared1, 0x00400, MEM_RAM },
3080 { &memory.RAM.shared2, 0x00400, MEM_RAM },
3081 { &memory.RAM.shared3, 0x00400, MEM_RAM },
3082
3083 { (UINT8 **)&gameData, 0x1000, MEM_DATA },
3084 { &graphics.fgChars, DIGDUG_NUM_OF_CHAR * 8 * 8, MEM_DATA },
3085 { &graphics.bgTiles, DIGDUG_NUM_OF_BGTILE * 8 * 8, MEM_DATA },
3086 { &graphics.sprites, DIGDUG_NUM_OF_SPRITE * 16 * 16, MEM_DATA },
3087 { (UINT8 **)&graphics.palette, DIGDUG_PALETTE_SIZE * sizeof(UINT32), MEM_DATA32 },
3088 };
3089
3090 #define DIGDUG_MEM_TBL_SIZE (sizeof(digdugMemTable) / sizeof(struct Memory_Map_Def))
3091
3092 static struct ROM_Load_Def digdugROMTable[] =
3093 {
3094 { &memory.Z80.rom1, 0x00000, NULL },
3095 { &memory.Z80.rom1, 0x01000, NULL },
3096 { &memory.Z80.rom1, 0x02000, NULL },
3097 { &memory.Z80.rom1, 0x03000, NULL },
3098 { &memory.Z80.rom2, 0x00000, NULL },
3099 { &memory.Z80.rom2, 0x01000, NULL },
3100 { &memory.Z80.rom3, 0x00000, NULL },
3101 { &tempRom, 0x00000, digdugCharDecode },
3102 { &tempRom, 0x00000, NULL },
3103 { &tempRom, 0x01000, NULL },
3104 { &tempRom, 0x02000, NULL },
3105 { &tempRom, 0x03000, digdugSpriteDecode },
3106 { &tempRom, 0x00000, digdugBGTilesDecode },
3107 { &gameData, 0x00000, NULL },
3108 { &memory.PROM.palette, 0x00000, NULL },
3109 { &memory.PROM.spriteLookup, 0x00000, NULL },
3110 { &memory.PROM.charLookup, 0x00000, NULL },
3111 { &NamcoSoundProm, 0x00000, NULL },
3112 { &NamcoSoundProm, 0x00100, namcoMachineInit },
3113 };
3114
3115 #define DIGDUG_ROM_TBL_SIZE (sizeof(digdugROMTable) / sizeof(struct ROM_Load_Def))
3116
3117 typedef void (*DrawFunc_t)(void);
3118
3119 static DrawFunc_t digdugDrawFuncs[] =
3120 {
3121 digdugCalcPalette,
3122 digdugRenderTiles,
3123 namcoRenderSprites,
3124 };
3125
3126 #define DIGDUG_DRAW_TBL_SIZE (sizeof(digdugDrawFuncs) / sizeof(digdugDrawFuncs[0]))
3127
3128 static struct Namco_Custom_RW_Entry digdugCustomRWTable[] =
3129 {
3130 { 0x71, namco51xxRead },
3131 { 0xa1, namco51xxWrite },
3132 { 0xb1, namco51xxRead },
3133 { 0xc1, namco51xxWrite },
3134 { 0xd2, namco53xxRead },
3135 { 0x00, NULL }
3136 };
3137
3138 static struct Machine_Config_Def digdugMachineConfig =
3139 {
3140 .cpus = digdugCPU,
3141 .wrAddrList = digdugWriteTable,
3142 .rdAddrList = digdugReadTable,
3143 .memMapTable = digdugMemTable,
3144 .sizeOfMemMapTable = DIGDUG_MEM_TBL_SIZE,
3145 .romLayoutTable = digdugROMTable,
3146 .sizeOfRomLayoutTable = DIGDUG_ROM_TBL_SIZE,
3147 .tempRomSize = 0x4000,
3148 .tilemapsConfig = digdugTilemapConfig,
3149 .drawLayerTable = digdugDrawFuncs,
3150 .drawTableSize = DIGDUG_DRAW_TBL_SIZE,
3151 .getSpriteParams = digdugGetSpriteParams,
3152 .reset = digdugReset,
3153 .customRWTable = digdugCustomRWTable,
3154 .n54xxSampleList = NULL
3155 };
3156
digdugInit(void)3157 static INT32 digdugInit(void)
3158 {
3159 machine.game = NAMCO_DIGDUG;
3160 machine.numOfDips = DIGDUG_NUM_OF_DIPSWITCHES;
3161
3162 machine.config = &digdugMachineConfig;
3163
3164 INT32 retVal = namcoInitBoard();
3165
3166 if (0 == retVal)
3167 earom_init();
3168
3169 return retVal;
3170 }
3171
digdugReset(void)3172 static INT32 digdugReset(void)
3173 {
3174 playFieldParams.playField = 0;
3175 playFieldParams.alphaColor = 0;
3176 playFieldParams.playEnable = 0;
3177 playFieldParams.playColor = 0;
3178
3179 earom_reset();
3180
3181 return DrvDoReset();
3182 }
3183
digdugMemoryMap1(void)3184 static void digdugMemoryMap1(void)
3185 {
3186 ZetMapMemory(memory.Z80.rom1, 0x0000, 0x3fff, MAP_ROM);
3187 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
3188 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
3189 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
3190 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
3191 }
3192
digdugMemoryMap2(void)3193 static void digdugMemoryMap2(void)
3194 {
3195 ZetMapMemory(memory.Z80.rom2, 0x0000, 0x3fff, MAP_ROM);
3196 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
3197 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
3198 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
3199 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
3200 }
3201
digdugMemoryMap3(void)3202 static void digdugMemoryMap3(void)
3203 {
3204 ZetMapMemory(memory.Z80.rom3, 0x0000, 0x3fff, MAP_ROM);
3205 ZetMapMemory(memory.RAM.video, 0x8000, 0x87ff, MAP_RAM);
3206 ZetMapMemory(memory.RAM.shared1, 0x8800, 0x8bff, MAP_RAM);
3207 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x93ff, MAP_RAM);
3208 ZetMapMemory(memory.RAM.shared3, 0x9800, 0x9bff, MAP_RAM);
3209 }
3210
digdugCharDecode(void)3211 static INT32 digdugCharDecode(void)
3212 {
3213 GfxDecode(
3214 DIGDUG_NUM_OF_CHAR,
3215 DIGDUG_NUM_OF_CHAR_PALETTE_BITS,
3216 8, 8,
3217 (INT32*)planeOffsets1Bit,
3218 (INT32*)xOffsets8x8Tiles1Bit,
3219 (INT32*)yOffsets8x8Tiles1Bit,
3220 DIGDUG_SIZE_OF_CHAR_IN_BYTES,
3221 tempRom,
3222 graphics.fgChars
3223 );
3224
3225 return 0;
3226 }
3227
digdugBGTilesDecode(void)3228 static INT32 digdugBGTilesDecode(void)
3229 {
3230 GfxDecode(
3231 DIGDUG_NUM_OF_BGTILE,
3232 DIGDUG_NUM_OF_BGTILE_PALETTE_BITS,
3233 8, 8,
3234 (INT32*)planeOffsets2Bit,
3235 (INT32*)xOffsets8x8Tiles2Bit,
3236 (INT32*)yOffsets8x8Tiles2Bit,
3237 DIGDUG_SIZE_OF_BGTILE_IN_BYTES,
3238 tempRom,
3239 graphics.bgTiles
3240 );
3241
3242 return 0;
3243 };
3244
digdugSpriteDecode(void)3245 static INT32 digdugSpriteDecode(void)
3246 {
3247 GfxDecode(
3248 DIGDUG_NUM_OF_SPRITE,
3249 DIGDUG_NUM_OF_SPRITE_PALETTE_BITS,
3250 16, 16,
3251 (INT32*)planeOffsets2Bit,
3252 (INT32*)xOffsets16x16Tiles2Bit,
3253 (INT32*)yOffsets16x16Tiles2Bit,
3254 DIGDUG_SIZE_OF_SPRITE_IN_BYTES,
3255 tempRom,
3256 graphics.sprites
3257 );
3258
3259 return 0;
3260 }
3261
tilemap_callback(digdug_fg)3262 static tilemap_callback ( digdug_fg )
3263 {
3264 INT32 code = memory.RAM.video[offs];
3265 INT32 colour = ((code >> 4) & 0x0e) | ((code >> 3) & 2);
3266 code &= 0x7f;
3267
3268 TILE_SET_INFO(1, code, colour, 0);
3269 }
3270
tilemap_callback(digdug_bg)3271 static tilemap_callback ( digdug_bg )
3272 {
3273 UINT8 *pf = gameData + (playFieldParams.playField << 10);
3274 INT8 pfval = pf[offs & 0xfff];
3275 INT32 pfColour = (pfval >> 4) + (playFieldParams.playColor << 4);
3276
3277 TILE_SET_INFO(0, pfval, pfColour, 0);
3278 }
3279
digdugTilemapConfig(void)3280 static INT32 digdugTilemapConfig(void)
3281 {
3282 GenericTilemapInit(
3283 0,
3284 namco_map_scan, digdug_bg_map_callback,
3285 8, 8,
3286 NAMCO_TMAP_WIDTH, NAMCO_TMAP_HEIGHT
3287 );
3288 GenericTilemapSetGfx(
3289 0,
3290 graphics.bgTiles,
3291 DIGDUG_NUM_OF_BGTILE_PALETTE_BITS,
3292 8, 8,
3293 DIGDUG_NUM_OF_BGTILE * 8 * 8,
3294 DIGDUG_PALETTE_OFFSET_BGTILES,
3295 DIGDUG_PALETTE_SIZE_BGTILES - 1
3296 );
3297 GenericTilemapSetTransparent(0, 0);
3298
3299 GenericTilemapInit(
3300 1,
3301 namco_map_scan, digdug_fg_map_callback,
3302 8, 8,
3303 NAMCO_TMAP_WIDTH, NAMCO_TMAP_HEIGHT
3304 );
3305 GenericTilemapSetGfx(
3306 1,
3307 graphics.fgChars,
3308 DIGDUG_NUM_OF_CHAR_PALETTE_BITS,
3309 8, 8,
3310 DIGDUG_NUM_OF_CHAR * 8 * 8,
3311 DIGDUG_PALETTE_OFFSET_CHARS,
3312 DIGDUG_PALETTE_SIZE_CHARS - 1
3313 );
3314 GenericTilemapSetTransparent(1, 0);
3315
3316 GenericTilemapSetOffsets(TMAP_GLOBAL, 0, 0);
3317
3318 return 0;
3319 }
3320
digdug_pf_latch_w(UINT16 offset,UINT8 dta)3321 static void digdug_pf_latch_w(UINT16 offset, UINT8 dta)
3322 {
3323 switch (offset)
3324 {
3325 case 0:
3326 playFieldParams.playField = (playFieldParams.playField & ~1) | (dta & 1);
3327 break;
3328
3329 case 1:
3330 playFieldParams.playField = (playFieldParams.playField & ~2) | ((dta << 1) & 2);
3331 break;
3332
3333 case 2:
3334 playFieldParams.alphaColor = dta & 1;
3335 break;
3336
3337 case 3:
3338 playFieldParams.playEnable = dta & 1;
3339 break;
3340
3341 case 4:
3342 playFieldParams.playColor = (playFieldParams.playColor & ~1) | (dta & 1);
3343 break;
3344
3345 case 5:
3346 playFieldParams.playColor = (playFieldParams.playColor & ~2) | ((dta << 1) & 2);
3347 break;
3348 }
3349 }
3350
digdugZ80Writeb840(UINT16 offset,UINT8 dta)3351 static void digdugZ80Writeb840(UINT16 offset, UINT8 dta)
3352 {
3353 earom_ctrl_write(0xb840, dta);
3354 }
3355
3356 #define DIGDUG_3BIT_PALETTE_SIZE 32
3357
digdugCalcPalette(void)3358 static void digdugCalcPalette(void)
3359 {
3360 UINT32 palette[DIGDUG_3BIT_PALETTE_SIZE];
3361
3362 for (INT32 i = 0; i < DIGDUG_3BIT_PALETTE_SIZE; i ++)
3363 {
3364 INT32 r = Colour3Bit[(memory.PROM.palette[i] >> 0) & 0x07];
3365 INT32 g = Colour3Bit[(memory.PROM.palette[i] >> 3) & 0x07];
3366 INT32 b = Colour3Bit[(memory.PROM.palette[i] >> 5) & 0x06];
3367
3368 palette[i] = BurnHighCol(r, g, b, 0);
3369 }
3370
3371 /* bg_select */
3372 for (INT32 i = 0; i < DIGDUG_PALETTE_SIZE_BGTILES; i ++)
3373 {
3374 graphics.palette[DIGDUG_PALETTE_OFFSET_BGTILES + i] =
3375 palette[memory.PROM.charLookup[i] & 0x0f];
3376 }
3377
3378 /* sprites */
3379 for (INT32 i = 0; i < DIGDUG_PALETTE_SIZE_SPRITES; i ++)
3380 {
3381 graphics.palette[DIGDUG_PALETTE_OFFSET_SPRITE + i] =
3382 palette[(memory.PROM.spriteLookup[i] & 0x0f) + 0x10];
3383 }
3384
3385 /* characters - direct mapping */
3386 for (INT32 i = 0; i < DIGDUG_PALETTE_SIZE_CHARS; i += 2)
3387 {
3388 graphics.palette[DIGDUG_PALETTE_OFFSET_CHARS + i + 0] = palette[0];
3389 graphics.palette[DIGDUG_PALETTE_OFFSET_CHARS + i + 1] = palette[i/2];
3390 }
3391 }
3392
digdugRenderTiles(void)3393 static void digdugRenderTiles(void)
3394 {
3395 GenericTilemapSetScrollX(0, 0);
3396 GenericTilemapSetScrollY(0, 0);
3397 GenericTilemapSetOffsets(0, 0, 0);
3398 GenericTilemapSetEnable(0, (0 == playFieldParams.playEnable));
3399 GenericTilemapDraw(0, pTransDraw, 0 | TMAP_DRAWOPAQUE);
3400 GenericTilemapSetEnable(1, 1);
3401 GenericTilemapDraw(1, pTransDraw, 0 | TMAP_TRANSPARENT);
3402 }
3403
digdugGetSpriteParams(struct Namco_Sprite_Params * spriteParams,UINT32 offset)3404 static UINT32 digdugGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset)
3405 {
3406 UINT8 *spriteRam1 = memory.RAM.shared1 + 0x380;
3407 UINT8 *spriteRam2 = memory.RAM.shared2 + 0x380;
3408 UINT8 *spriteRam3 = memory.RAM.shared3 + 0x380;
3409
3410 INT32 sprite = spriteRam1[offset + 0];
3411 if (sprite & 0x80) spriteParams->sprite = (sprite & 0xc0) | ((sprite & ~0xc0) << 2);
3412 else spriteParams->sprite = sprite;
3413 spriteParams->colour = spriteRam1[offset + 1] & 0x3f;
3414
3415 spriteParams->xStart = spriteRam2[offset + 1] - 40 + 1;
3416 if (8 > spriteParams->xStart) spriteParams->xStart += 0x100;
3417 spriteParams->yStart = NAMCO_SCREEN_WIDTH - spriteRam2[offset + 0] + 1;
3418 spriteParams->xStep = 16;
3419 spriteParams->yStep = 16;
3420
3421 spriteParams->flags = spriteRam3[offset + 0] & 0x03;
3422 spriteParams->flags |= ((sprite & 0x80) >> 4) | ((sprite & 0x80) >> 5);
3423
3424 if (spriteParams->flags & ySize)
3425 {
3426 spriteParams->yStart -= 16;
3427 }
3428
3429 if (spriteParams->flags & xSize)
3430 {
3431 if (spriteParams->flags & xFlip)
3432 {
3433 spriteParams->xStart += 16;
3434 spriteParams->xStep = -16;
3435 }
3436 }
3437
3438 spriteParams->paletteBits = DIGDUG_NUM_OF_SPRITE_PALETTE_BITS;
3439 spriteParams->paletteOffset = DIGDUG_PALETTE_OFFSET_SPRITE;
3440
3441 return 1;
3442 }
3443
digdugScan(INT32 nAction,INT32 * pnMin)3444 static INT32 digdugScan(INT32 nAction, INT32 *pnMin)
3445 {
3446 if (nAction & ACB_DRIVER_DATA) {
3447 SCAN_VAR(playFieldParams.playField);
3448 SCAN_VAR(playFieldParams.alphaColor);
3449 SCAN_VAR(playFieldParams.playEnable);
3450 SCAN_VAR(playFieldParams.playColor);
3451
3452 earom_scan(nAction, pnMin);
3453 }
3454
3455 return DrvScan(nAction, pnMin);
3456 }
3457
3458 struct BurnDriver BurnDrvDigdug =
3459 {
3460 /* filename of zip without extension = */ "digdug",
3461 /* filename of parent, no extension = */ NULL,
3462 /* filename of board ROMs = */ NULL,
3463 /* filename of samples ZIP = */ NULL,
3464 /* date = */ "1982",
3465 /* FullName = */ "Dig Dug (rev 2)\0",
3466 /* Comment = */ NULL,
3467 /* Manufacturer = */ "Namco",
3468 /* System = */ "Miscellaneous",
3469 /* FullName = */ NULL,
3470 /* Comment = */ NULL,
3471 /* Manufacturer = */ NULL,
3472 /* System = */ NULL,
3473 /* Flags = */ BDF_GAME_WORKING |
3474 BDF_ORIENTATION_VERTICAL |
3475 BDF_ORIENTATION_FLIPPED,
3476 /* No of Players = */ 2,
3477 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
3478 /* Genre = */ GBF_MAZE | GBF_ACTION,
3479 /* Family = */ 0,
3480 /* GetZipName func = */ NULL,
3481 /* GetROMInfo func = */ digdugRomInfo,
3482 /* GetROMName func = */ digdugRomName,
3483 /* GetHDDInfo func = */ NULL,
3484 /* GetHDDName func = */ NULL,
3485 /* GetSampleInfo func = */ NULL,
3486 /* GetSampleName func = */ NULL,
3487 /* GetInputInfo func = */ DigdugInputInfo,
3488 /* GetDIPInfo func = */ DigdugDIPInfo,
3489 /* Init func = */ digdugInit,
3490 /* Exit func = */ DrvExit,
3491 /* Frame func = */ DrvFrame,
3492 /* Redraw func = */ DrvDraw,
3493 /* Areascan func = */ digdugScan,
3494 /* Recalc Palette = */ NULL,
3495 /* Palette Entries count = */ DIGDUG_PALETTE_SIZE,
3496 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
3497 /* xAspect, yAspect = */ 3, 4
3498 };
3499
3500 /* === XEVIOUS === */
3501
3502 static struct BurnInputInfo XeviousInputList[] =
3503 {
3504 {"Dip 1" , BIT_DIPSWITCH, &input.dip[0].byte, "dip" },
3505 {"Dip 2" , BIT_DIPSWITCH, &input.dip[1].byte, "dip" },
3506
3507 {"Reset" , BIT_DIGITAL, &input.reset, "reset" },
3508
3509 {"Up" , BIT_DIGITAL, &input.ports[1].current.bits.bit[0], "p1 up" },
3510 {"Right" , BIT_DIGITAL, &input.ports[1].current.bits.bit[1], "p1 right" },
3511 {"Down" , BIT_DIGITAL, &input.ports[1].current.bits.bit[2], "p1 down" },
3512 {"Left" , BIT_DIGITAL, &input.ports[1].current.bits.bit[3], "p1 left" },
3513 {"P1 Button 1" , BIT_DIGITAL, &input.ports[1].current.bits.bit[4], "p1 fire 1" },
3514 // hack! CUF - must remap this input to DIP1.0
3515 {"P1 Button 2" , BIT_DIGITAL, &input.ports[1].current.bits.bit[6], "p1 fire 2" },
3516
3517 {"Up (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[0], "p2 up" },
3518 {"Right (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[1], "p2 right" },
3519 {"Down (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[2], "p2 down" },
3520 {"Left (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[3], "p2 left" },
3521 {"Fire 1 (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[4], "p2 fire 1" },
3522 // hack! CUF - must remap this input to DIP1.4
3523 {"Fire 2 (Cocktail)" , BIT_DIGITAL, &input.ports[2].current.bits.bit[6], "p2 fire 2" },
3524
3525 {"Start 1" , BIT_DIGITAL, &input.ports[0].current.bits.bit[2], "p1 start" },
3526 {"Start 2" , BIT_DIGITAL, &input.ports[0].current.bits.bit[3], "p2 start" },
3527 {"Coin 1" , BIT_DIGITAL, &input.ports[0].current.bits.bit[4], "p1 coin" },
3528 {"Coin 2" , BIT_DIGITAL, &input.ports[0].current.bits.bit[5], "p2 coin" },
3529 {"Service" , BIT_DIGITAL, &input.ports[0].current.bits.bit[7], "service" },
3530
3531 };
3532
3533 STDINPUTINFO(Xevious)
3534
3535 #define XEVIOUS_NUM_OF_DIPSWITCHES 2
3536
3537 static struct BurnDIPInfo XeviousDIPList[]=
3538 {
3539 // Default Values
3540 // nOffset, nID, nMask, nDefault, NULL
3541 { 0x00, 0xff, 0xff, 0xFF, NULL },
3542 { 0x01, 0xff, 0xff, 0xFF, NULL },
3543
3544 // Dip 1
3545 // x, DIP_GRP, x, OptionCnt, szTitle
3546 { 0, 0xfe, 0, 0, "Button 2 (Not a DIP)" },
3547 // nInput, nFlags, nMask, nSetting, szText
3548 { 0x00, 0x01, 0x01, 0x01, "Released" },
3549 { 0x00, 0x01, 0x01, 0x00, "Held" },
3550
3551 // x, DIP_GRP, x, OptionCnt, szTitle
3552 { 0, 0xfe, 0, 2, "Flags Award Bonus Life" },
3553 // nInput, nFlags, nMask, nSetting, szText
3554 { 0x00, 0x01, 0x02, 0x02, "Yes" },
3555 { 0x00, 0x01, 0x02, 0x00, "No" },
3556
3557 // x, DIP_GRP, x, OptionCnt, szTitle
3558 { 0, 0xfe, 0, 4, "Coin B" },
3559 // nInput, nFlags, nMask, nSetting, szText
3560 { 0x00, 0x01, 0x0C, 0x04, "2 Coins 1 Play" },
3561 { 0x00, 0x01, 0x0C, 0x0C, "1 Coin 1 Play" },
3562 { 0x00, 0x01, 0x0C, 0x00, "2 Coins 3 Plays" },
3563 { 0x00, 0x01, 0x0C, 0x08, "1 Coin 2 Plays" },
3564
3565 // x, DIP_GRP, x, OptionCnt, szTitle
3566 { 0, 0xfe, 0, 0, "Button 2 (Cocktail) (Not a DIP)" },
3567 // nInput, nFlags, nMask, nSetting, szText
3568 { 0x00, 0x01, 0x10, 0x10, "Released" },
3569 { 0x00, 0x01, 0x10, 0x00, "Held" },
3570
3571 // x, DIP_GRP, x, OptionCnt, szTitle
3572 { 0, 0xfe, 0, 4, "Difficulty" },
3573 // nInput, nFlags, nMask, nSetting, szText
3574 { 0x00, 0x01, 0x60, 0x40, "Easy" },
3575 { 0x00, 0x01, 0x60, 0x60, "Normal" },
3576 { 0x00, 0x01, 0x60, 0x20, "Hard" },
3577 { 0x00, 0x01, 0x60, 0x00, "Hardest" },
3578
3579 // x, DIP_GRP, x, OptionCnt, szTitle
3580 { 0, 0xfe, 0, 2, "Freeze" },
3581 // nInput, nFlags, nMask, nSetting, szText
3582 { 0x00, 0x01, 0x80, 0x80, "Off" },
3583 { 0x00, 0x01, 0x80, 0x00, "On" },
3584
3585 // Dip 2
3586 // x, DIP_GRP, x, OptionCnt, szTitle
3587 { 0, 0xfe, 0, 4, "Coin A" },
3588 // nInput, nFlags, nMask, nSetting, szText
3589 { 0x01, 0x01, 0x03, 0x01, "2 Coins 1 Play" },
3590 { 0x01, 0x01, 0x03, 0x03, "1 Coin 1 Play" },
3591 { 0x01, 0x01, 0x03, 0x00, "2 Coins 3 Plays" },
3592 { 0x01, 0x01, 0x03, 0x02, "1 Coin 2 Plays" },
3593
3594 // x, DIP_GRP, x, OptionCnt, szTitle
3595 { 0, 0xfe, 0, 8, "Bonus Life" },
3596 // nInput, nFlags, nMask, nSetting, szText
3597 { 0x01, 0x01, 0x1C, 0x18, "10k 40k 40k" },
3598 { 0x01, 0x01, 0x1C, 0x14, "10k 50k 50k" },
3599 { 0x01, 0x01, 0x1C, 0x10, "20k 50k 50k" },
3600 { 0x01, 0x01, 0x1C, 0x1C, "20k 60k 60k" },
3601 { 0x01, 0x01, 0x1C, 0x0C, "20k 70k 70k" },
3602 { 0x01, 0x01, 0x1C, 0x08, "20k 80k 80k" },
3603 { 0x01, 0x01, 0x1C, 0x04, "20k 60k" },
3604 { 0x01, 0x01, 0x1C, 0x00, "None" },
3605
3606 // x, DIP_GRP, x, OptionCnt, szTitle
3607 { 0, 0xfe, 0, 4, "Lives" },
3608 // nInput, nFlags, nMask, nSetting, szText
3609 { 0x01, 0x01, 0x60, 0x40, "1" },
3610 { 0x01, 0x01, 0x60, 0x20, "2" },
3611 { 0x01, 0x01, 0x60, 0x60, "3" },
3612 { 0x01, 0x01, 0x60, 0x00, "5" },
3613
3614 // x, DIP_GRP, x, OptionCnt, szTitle
3615 { 0, 0xfe, 0, 2, "Cabinet" },
3616 // nInput, nFlags, nMask, nSetting, szText
3617 { 0x01, 0x01, 0x80, 0x80, "Upright" },
3618 { 0x01, 0x01, 0x80, 0x00, "Cocktail" },
3619
3620 };
3621
3622 STDDIPINFO(Xevious)
3623
3624 static struct BurnRomInfo XeviousRomDesc[] = {
3625 { "xvi_1.3p", 0x01000, 0x09964dda, BRF_ESS | BRF_PRG }, // 0 Z80 #1 Program Code
3626 { "xvi_2.3m", 0x01000, 0x60ecce84, BRF_ESS | BRF_PRG }, // 1
3627 { "xvi_3.2m", 0x01000, 0x79754b7d, BRF_ESS | BRF_PRG }, // 2
3628 { "xvi_4.2l", 0x01000, 0xc7d4bbf0, BRF_ESS | BRF_PRG }, // 3
3629
3630 { "xvi_5.3f", 0x01000, 0xc85b703f, BRF_ESS | BRF_PRG }, // 4 Z80 #2 Program Code
3631 { "xvi_6.3j", 0x01000, 0xe18cdaad, BRF_ESS | BRF_PRG }, // 5
3632
3633 { "xvi_7.2c", 0x01000, 0xdd35cf1c, BRF_ESS | BRF_PRG }, // 6 Z80 #3 Program Code
3634
3635 { "xvi_12.3b", 0x01000, 0x088c8b26, BRF_GRA }, /* 7 background characters */
3636 { "xvi_13.3c", 0x01000, 0xde60ba25, BRF_GRA }, /* 8 bg pattern B0 */
3637 { "xvi_14.3d", 0x01000, 0x535cdbbc, BRF_GRA }, /* 9 bg pattern B1 */
3638
3639 { "xvi_15.4m", 0x02000, 0xdc2c0ecb, BRF_GRA }, /* 10 sprite set #1, planes 0/1 */
3640 { "xvi_18.4r", 0x02000, 0x02417d19, BRF_GRA }, /* 11 sprite set #1, plane 2, set #2, plane 0 */
3641 { "xvi_17.4p", 0x02000, 0xdfb587ce, BRF_GRA }, /* 12 sprite set #2, planes 1/2 */
3642 { "xvi_16.4n", 0x01000, 0x605ca889, BRF_GRA }, /* 13 sprite set #3, planes 0/1 */
3643
3644 { "xvi_9.2a", 0x01000, 0x57ed9879, BRF_GRA }, /* 14 */
3645 { "xvi_10.2b", 0x02000, 0xae3ba9e5, BRF_GRA }, /* 15 */
3646 { "xvi_11.2c", 0x01000, 0x31e244dd, BRF_GRA }, /* 16 */
3647
3648 { "xvi_8bpr.6a", 0x00100, 0x5cc2727f, BRF_GRA }, /* 17 palette red component */
3649 { "xvi_9bpr.6d", 0x00100, 0x5c8796cc, BRF_GRA }, /* 18 palette green component */
3650 { "xvi10bpr.6e", 0x00100, 0x3cb60975, BRF_GRA }, /* 19 palette blue component */
3651 { "xvi_7bpr.4h", 0x00200, 0x22d98032, BRF_GRA }, /* 20 bg tiles lookup table low bits */
3652 { "xvi_6bpr.4f", 0x00200, 0x3a7599f0, BRF_GRA }, /* 21 bg tiles lookup table high bits */
3653 { "xvi_4bpr.3l", 0x00200, 0xfd8b9d91, BRF_GRA }, /* 22 sprite lookup table low bits */
3654 { "xvi_5bpr.3m", 0x00200, 0xbf906d82, BRF_GRA }, /* 23 sprite lookup table high bits */
3655
3656 { "xvi_2bpr.7n", 0x00100, 0x550f06bc, BRF_GRA }, /* 24 */
3657 { "xvi_1bpr.5n", 0x00100, 0x77245b66, BRF_GRA }, /* 25 timing - not used */
3658 };
3659
3660 STD_ROM_PICK(Xevious)
3661 STD_ROM_FN(Xevious)
3662
3663
3664 static struct BurnSampleInfo XeviousSampleDesc[] = {
3665 #if !defined (ROM_VERIFY)
3666 { "explo1", SAMPLE_NOLOOP }, // ground target explosion
3667 { "explo2", SAMPLE_NOLOOP }, // Solvalou explosion
3668 { "explo3", SAMPLE_NOLOOP }, // credit
3669 { "explo4", SAMPLE_NOLOOP }, // Garu Zakato explosion
3670 #endif
3671 { "", 0 }
3672 };
3673
3674 STD_SAMPLE_PICK(Xevious)
3675 STD_SAMPLE_FN(Xevious)
3676
3677 #define XEVIOUS_NO_OF_COLS 64
3678 #define XEVIOUS_NO_OF_ROWS 32
3679
3680 #define XEVIOUS_NUM_OF_CHAR_PALETTE_BITS 1
3681 #define XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS 3
3682 #define XEVIOUS_NUM_OF_BGTILE_PALETTE_BITS 2
3683
3684 #define XEVIOUS_PALETTE_OFFSET_BGTILES 0x0
3685 #define XEVIOUS_PALETTE_SIZE_BGTILES (0x80 * 4)
3686 #define XEVIOUS_PALETTE_OFFSET_SPRITE (XEVIOUS_PALETTE_OFFSET_BGTILES + \
3687 XEVIOUS_PALETTE_SIZE_BGTILES)
3688 #define XEVIOUS_PALETTE_SIZE_SPRITES (0x40 * 8)
3689 #define XEVIOUS_PALETTE_OFFSET_CHARS (XEVIOUS_PALETTE_OFFSET_SPRITE + \
3690 XEVIOUS_PALETTE_SIZE_SPRITES)
3691 #define XEVIOUS_PALETTE_SIZE_CHARS (0x40 * 2)
3692 #define XEVIOUS_PALETTE_SIZE (XEVIOUS_PALETTE_SIZE_CHARS + \
3693 XEVIOUS_PALETTE_SIZE_SPRITES + \
3694 XEVIOUS_PALETTE_SIZE_BGTILES)
3695 #define XEVIOUS_PALETTE_MEM_SIZE_IN_BYTES (XEVIOUS_PALETTE_SIZE * \
3696 sizeof(UINT32))
3697
3698 #define XEVIOUS_NUM_OF_CHAR 0x200
3699 #define XEVIOUS_SIZE_OF_CHAR_IN_BYTES (8 * 8)
3700 #define XEVIOUS_CHAR_MEM_SIZE_IN_BYTES (XEVIOUS_NUM_OF_CHAR * \
3701 XEVIOUS_SIZE_OF_CHAR_IN_BYTES)
3702
3703 #define XEVIOUS_NUM_OF_SPRITE1 0x080
3704 #define XEVIOUS_NUM_OF_SPRITE2 0x080
3705 #define XEVIOUS_NUM_OF_SPRITE3 0x040
3706 #define XEVIOUS_NUM_OF_SPRITE (XEVIOUS_NUM_OF_SPRITE1 + \
3707 XEVIOUS_NUM_OF_SPRITE2 + \
3708 XEVIOUS_NUM_OF_SPRITE3)
3709 #define XEVIOUS_SIZE_OF_SPRITE_IN_BYTES 0x200
3710 #define XEVIOUS_SPRITE_MEM_SIZE_IN_BYTES (XEVIOUS_NUM_OF_SPRITE * \
3711 XEVIOUS_SIZE_OF_SPRITE_IN_BYTES)
3712
3713 #define XEVIOUS_NUM_OF_BGTILE 0x200
3714 #define XEVIOUS_SIZE_OF_BGTILE_IN_BYTES (8 * 8)
3715 #define XEVIOUS_TILES_MEM_SIZE_IN_BYTES (XEVIOUS_NUM_OF_BGTILE * \
3716 XEVIOUS_SIZE_OF_BGTILE_IN_BYTES)
3717
3718 static INT32 XeviousCharXOffsets[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
3719 static INT32 XeviousCharYOffsets[8] = { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 };
3720
3721 static struct PlaneOffsets
3722 {
3723 INT32 fgChars[XEVIOUS_NUM_OF_CHAR_PALETTE_BITS];
3724 INT32 bgChars[XEVIOUS_NUM_OF_BGTILE_PALETTE_BITS];
3725 INT32 sprites1[XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS];
3726 INT32 sprites2[XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS];
3727 INT32 sprites3[XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS];
3728 } xeviousOffsets = {
3729 { 0 }, /* foreground characters */
3730
3731 /* background tiles */
3732 /* 512 characters */
3733 /* 2 bits per pixel */
3734 /* 8 x 8 characters */
3735 /* every char takes 8 consecutive bytes */
3736 { 0, 512 * 8 * 8 },
3737
3738 /* sprite set #1 */
3739 /* 128 sprites */
3740 /* 3 bits per pixel */
3741 /* 16 x 16 sprites */
3742 /* every sprite takes 64 consecutive bytes */
3743 { 0x10004, 0x00000, 0x00004 }, // 0x0000 + { 128*64*8+4, 0, 4 }
3744
3745 /* sprite set #2 */
3746 { 0x00000, 0x10000, 0x10004 }, // 0x2000 + { 0, 128*64*8, 128*64*8+4 }
3747
3748 /* sprite set #3 */
3749 { 0x08000, 0x00000, 0x00004 }, // 0x6000 + { 64*64*8, 0, 4 }
3750
3751 };
3752
3753 static INT32 xeviousInit(void);
3754 static void xeviousMemoryMap1(void);
3755 static void xeviousMemoryMap2(void);
3756 static void xeviousMemoryMap3(void);
3757 static INT32 xeviousCharDecode(void);
3758 static INT32 xeviousTilesDecode(void);
3759 static INT32 xeviousSpriteDecode(void);
3760 static tilemap_scan(xevious);
3761 static tilemap_callback(xevious_bg);
3762 static tilemap_callback(xevious_fg);
3763 static INT32 xeviousTilemapConfig(void);
3764
3765 static UINT8 xeviousPlayFieldRead(UINT16 offset);
3766 static UINT8 xeviousWorkRAMRead(UINT16 offset);
3767 static UINT8 xeviousSharedRAM1Read(UINT16 offset);
3768 static UINT8 xeviousSharedRAM2Read(UINT16 offset);
3769 static UINT8 xeviousSharedRAM3Read(UINT16 offset);
3770
3771 static void xevious_bs_wr(UINT16 offset, UINT8 dta);
3772 static void xevious_vh_latch_w(UINT16 offset, UINT8 dta);
3773 static void xeviousBGColorRAMWrite(UINT16 offset, UINT8 dta);
3774 static void xeviousBGCharRAMWrite(UINT16 offset, UINT8 dta);
3775 static void xeviousFGColorRAMWrite(UINT16 offset, UINT8 dta);
3776 static void xeviousFGCharRAMWrite(UINT16 offset, UINT8 dta);
3777 static void xeviousWorkRAMWrite(UINT16 offset, UINT8 dta);
3778 static void xeviousSharedRAM1Write(UINT16 offset, UINT8 dta);
3779 static void xeviousSharedRAM2Write(UINT16 offset, UINT8 dta);
3780 static void xeviousSharedRAM3Write(UINT16 offset, UINT8 dta);
3781
3782 static void xeviousCalcPalette(void);
3783 static void xeviousRenderTiles0(void);
3784 static void xeviousRenderTiles1(void);
3785 static UINT32 xeviousGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset);
3786
3787 struct Xevious_RAM
3788 {
3789 UINT8 bs[2];
3790
3791 UINT8 *workram;
3792 UINT8 *fg_videoram;
3793 UINT8 *fg_colorram;
3794 UINT8 *bg_videoram;
3795 UINT8 *bg_colorram;
3796 };
3797
3798 struct Xevious_ROM
3799 {
3800 UINT8 *rom2a;
3801 UINT8 *rom2b;
3802 UINT8 *rom2c;
3803 };
3804
3805 static struct Xevious_RAM xeviousRAM;
3806 static struct Xevious_ROM xeviousROM;
3807
3808 static struct CPU_Config_Def xeviousCPU[NAMCO_BRD_CPU_COUNT] =
3809 {
3810 {
3811 /* CPU ID = */ CPU1,
3812 /* CPU Read Func = */ namcoZ80ProgRead,
3813 /* CPU Write Func = */ namcoZ80ProgWrite,
3814 /* Memory Mapping = */ xeviousMemoryMap1
3815 },
3816 {
3817 /* CPU ID = */ CPU2,
3818 /* CPU Read Func = */ namcoZ80ProgRead,
3819 /* CPU Write Func = */ namcoZ80ProgWrite,
3820 /* Memory Mapping = */ xeviousMemoryMap2
3821 },
3822 {
3823 /* CPU ID = */ CPU3,
3824 /* CPU Read Func = */ namcoZ80ProgRead,
3825 /* CPU Write Func = */ namcoZ80ProgWrite,
3826 /* Memory Mapping = */ xeviousMemoryMap3
3827 },
3828 };
3829
3830 static struct CPU_Rd_Table xeviousZ80ReadTable[] =
3831 {
3832 { 0x6800, 0x6807, namcoZ80ReadDip },
3833 { 0x7000, 0x700f, namcoCustomICsReadDta },
3834 { 0x7100, 0x7100, namcoCustomICsReadCmd },
3835 { 0x7800, 0x7fff, xeviousWorkRAMRead },
3836 { 0x8000, 0x8fff, xeviousSharedRAM1Read },
3837 { 0x9000, 0x9fff, xeviousSharedRAM2Read },
3838 { 0xa000, 0xafff, xeviousSharedRAM3Read },
3839 { 0xf000, 0xffff, xeviousPlayFieldRead },
3840 { 0x0000, 0x0000, NULL },
3841 };
3842
3843 static struct CPU_Wr_Table xeviousZ80WriteTable[] =
3844 {
3845 { 0x6800, 0x681f, namcoZ80WriteSound },
3846 { 0x6820, 0x6820, namcoZ80WriteCPU1Irq },
3847 { 0x6821, 0x6821, namcoZ80WriteCPU2Irq },
3848 { 0x6822, 0x6822, namcoZ80WriteCPU3Irq },
3849 { 0x6823, 0x6823, namcoZ80WriteCPUReset },
3850 // { 0x6830, 0x6830, WatchDogWriteNotImplemented },
3851 { 0x7000, 0x700f, namcoCustomICsWriteDta },
3852 { 0x7100, 0x7100, namcoCustomICsWriteCmd },
3853 { 0x7800, 0x7fff, xeviousWorkRAMWrite },
3854 { 0x8000, 0x8fff, xeviousSharedRAM1Write },
3855 { 0x9000, 0x9fff, xeviousSharedRAM2Write },
3856 { 0xa000, 0xafff, xeviousSharedRAM3Write },
3857 { 0xb000, 0xb7ff, xeviousFGColorRAMWrite },
3858 { 0xb800, 0xbfff, xeviousBGColorRAMWrite },
3859 { 0xc000, 0xc7ff, xeviousFGCharRAMWrite },
3860 { 0xc800, 0xcfff, xeviousBGCharRAMWrite },
3861 { 0xd000, 0xd07f, xevious_vh_latch_w },
3862 { 0xf000, 0xffff, xevious_bs_wr },
3863 { 0x0000, 0x0000, NULL },
3864 };
3865
3866 static struct Memory_Map_Def xeviousMemTable[] =
3867 {
3868 { &memory.Z80.rom1, 0x04000, MEM_PGM },
3869 { &memory.Z80.rom2, 0x04000, MEM_PGM },
3870 { &memory.Z80.rom3, 0x04000, MEM_PGM },
3871 { &memory.PROM.palette, 0x00300, MEM_ROM },
3872 { &memory.PROM.charLookup, 0x00400, MEM_ROM },
3873 { &memory.PROM.spriteLookup, 0x00400, MEM_ROM },
3874 { &NamcoSoundProm, 0x00200, MEM_ROM },
3875
3876 { &xeviousRAM.workram, 0x00800, MEM_RAM },
3877 { &memory.RAM.shared1, 0x01000, MEM_RAM },
3878 { &memory.RAM.shared2, 0x01000, MEM_RAM },
3879 { &memory.RAM.shared3, 0x01000, MEM_RAM },
3880 { &memory.RAM.video, 0x02000, MEM_RAM },
3881
3882 { &graphics.bgTiles, XEVIOUS_TILES_MEM_SIZE_IN_BYTES, MEM_DATA },
3883 { &xeviousROM.rom2a, 0x01000, MEM_DATA },
3884 { &xeviousROM.rom2b, 0x02000, MEM_DATA },
3885 { &xeviousROM.rom2c, 0x01000, MEM_DATA },
3886 { &graphics.fgChars, XEVIOUS_CHAR_MEM_SIZE_IN_BYTES, MEM_DATA },
3887 { &graphics.sprites, XEVIOUS_SPRITE_MEM_SIZE_IN_BYTES, MEM_DATA },
3888 { (UINT8 **)&graphics.palette, XEVIOUS_PALETTE_MEM_SIZE_IN_BYTES,MEM_DATA32},
3889 };
3890
3891 #define XEVIOUS_MEM_TBL_SIZE (sizeof(xeviousMemTable) / sizeof(struct Memory_Map_Def))
3892
3893 static struct ROM_Load_Def xeviousROMTable[] =
3894 {
3895 { &memory.Z80.rom1, 0x00000, NULL },
3896 { &memory.Z80.rom1, 0x01000, NULL },
3897 { &memory.Z80.rom1, 0x02000, NULL },
3898 { &memory.Z80.rom1, 0x03000, NULL },
3899 { &memory.Z80.rom2, 0x00000, NULL },
3900 { &memory.Z80.rom2, 0x01000, NULL },
3901 { &memory.Z80.rom3, 0x00000, NULL },
3902
3903 { &tempRom, 0x00000, xeviousCharDecode },
3904
3905 { &tempRom, 0x00000, NULL },
3906 { &tempRom, 0x01000, xeviousTilesDecode },
3907
3908 { &tempRom, 0x00000, NULL },
3909 { &tempRom, 0x02000, NULL },
3910 { &tempRom, 0x04000, NULL },
3911 { &tempRom, 0x06000, xeviousSpriteDecode },
3912
3913 { &xeviousROM.rom2a, 0x00000, NULL },
3914 { &xeviousROM.rom2b, 0x00000, NULL },
3915 { &xeviousROM.rom2c, 0x00000, NULL },
3916
3917 { &memory.PROM.palette, 0x00000, NULL },
3918 { &memory.PROM.palette, 0x00100, NULL },
3919 { &memory.PROM.palette, 0x00200, NULL },
3920 { &memory.PROM.charLookup, 0x00000, NULL },
3921 { &memory.PROM.charLookup, 0x00200, NULL },
3922 { &memory.PROM.spriteLookup, 0x00000, NULL },
3923 { &memory.PROM.spriteLookup, 0x00200, NULL },
3924 { &NamcoSoundProm, 0x00000, NULL },
3925 { &NamcoSoundProm, 0x00100, namcoMachineInit }
3926 };
3927
3928 #define XEVIOUS_ROM_TBL_SIZE (sizeof(xeviousROMTable) / sizeof(struct ROM_Load_Def))
3929
3930 static DrawFunc_t xeviousDrawFuncs[] =
3931 {
3932 xeviousCalcPalette,
3933 xeviousRenderTiles0,
3934 namcoRenderSprites,
3935 xeviousRenderTiles1,
3936 };
3937
3938 #define XEVIOUS_DRAW_TBL_SIZE (sizeof(xeviousDrawFuncs) / sizeof(xeviousDrawFuncs[0]))
3939
3940 static struct Namco_Custom_RW_Entry xeviousCustomRWTable[] =
3941 {
3942 { 0x71, namco51xxRead },
3943 { 0xa1, namco51xxWrite },
3944 { 0x61, namco51xxWrite },
3945 { 0x74, namco50xxRead },
3946 { 0x64, namco50xxWrite },
3947 { 0x68, namco54xxWrite },
3948 { 0x00, NULL }
3949 };
3950
3951 static struct N54XX_Sample_Info_Def xeviousN54xxSampleList[] =
3952 {
3953 { 0, "\x40\x40\x01\xff" }, // ground target explosion
3954 { 1, "\x40\x00\x02\xdf" }, // Solvalou explosion
3955 { 2, "\x10\x00\x80\xff" }, // credit
3956 { 3, "\x30\x30\x03\xdf" }, // Garu Zakato explosion
3957 { -1, "" }
3958 };
3959
3960 static struct Machine_Config_Def xeviousMachineConfig =
3961 {
3962 .cpus = xeviousCPU,
3963 .wrAddrList = xeviousZ80WriteTable,
3964 .rdAddrList = xeviousZ80ReadTable,
3965 .memMapTable = xeviousMemTable,
3966 .sizeOfMemMapTable = XEVIOUS_MEM_TBL_SIZE,
3967 .romLayoutTable = xeviousROMTable,
3968 .sizeOfRomLayoutTable = XEVIOUS_ROM_TBL_SIZE,
3969 .tempRomSize = 0x8000,
3970 .tilemapsConfig = xeviousTilemapConfig,
3971 .drawLayerTable = xeviousDrawFuncs,
3972 .drawTableSize = XEVIOUS_DRAW_TBL_SIZE,
3973 .getSpriteParams = xeviousGetSpriteParams,
3974 .reset = DrvDoReset,
3975 .customRWTable = xeviousCustomRWTable,
3976 .n54xxSampleList = xeviousN54xxSampleList
3977 };
3978
xeviousInit(void)3979 static INT32 xeviousInit(void)
3980 {
3981 machine.game = NAMCO_XEVIOUS;
3982 machine.numOfDips = XEVIOUS_NUM_OF_DIPSWITCHES;
3983
3984 machine.config = &xeviousMachineConfig;
3985
3986 return namcoInitBoard();
3987 }
3988
xeviousMemoryMap1(void)3989 static void xeviousMemoryMap1(void)
3990 {
3991 ZetMapMemory(memory.Z80.rom1, 0x0000, 0x3fff, MAP_ROM);
3992 ZetMapMemory(xeviousRAM.workram, 0x7800, 0x7fff, MAP_RAM);
3993 ZetMapMemory(memory.RAM.shared1, 0x8000, 0x8fff, MAP_RAM);
3994 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x9fff, MAP_RAM);
3995 ZetMapMemory(memory.RAM.shared3, 0xa000, 0xafff, MAP_RAM);
3996 ZetMapMemory(memory.RAM.video, 0xb000, 0xcfff, MAP_RAM);
3997 }
3998
xeviousMemoryMap2(void)3999 static void xeviousMemoryMap2(void)
4000 {
4001 ZetMapMemory(memory.Z80.rom2, 0x0000, 0x3fff, MAP_ROM);
4002 ZetMapMemory(xeviousRAM.workram, 0x7800, 0x7fff, MAP_RAM);
4003 ZetMapMemory(memory.RAM.shared1, 0x8000, 0x8fff, MAP_RAM);
4004 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x9fff, MAP_RAM);
4005 ZetMapMemory(memory.RAM.shared3, 0xa000, 0xafff, MAP_RAM);
4006 ZetMapMemory(memory.RAM.video, 0xb000, 0xcfff, MAP_RAM);
4007 }
4008
xeviousMemoryMap3(void)4009 static void xeviousMemoryMap3(void)
4010 {
4011 ZetMapMemory(memory.Z80.rom3, 0x0000, 0x3fff, MAP_ROM);
4012 ZetMapMemory(xeviousRAM.workram, 0x7800, 0x7fff, MAP_RAM);
4013 ZetMapMemory(memory.RAM.shared1, 0x8000, 0x8fff, MAP_RAM);
4014 ZetMapMemory(memory.RAM.shared2, 0x9000, 0x9fff, MAP_RAM);
4015 ZetMapMemory(memory.RAM.shared3, 0xa000, 0xafff, MAP_RAM);
4016 ZetMapMemory(memory.RAM.video, 0xb000, 0xcfff, MAP_RAM);
4017 }
4018
xeviousCharDecode(void)4019 static INT32 xeviousCharDecode(void)
4020 {
4021 // Load and decode the chars
4022 /* foreground characters: */
4023 /* 512 characters */
4024 /* 1 bit per pixel */
4025 /* 8 x 8 characters */
4026 /* every char takes 8 consecutive bytes */
4027 GfxDecode(
4028 XEVIOUS_NUM_OF_CHAR,
4029 XEVIOUS_NUM_OF_CHAR_PALETTE_BITS,
4030 8, 8,
4031 xeviousOffsets.fgChars,
4032 XeviousCharXOffsets,
4033 XeviousCharYOffsets,
4034 XEVIOUS_SIZE_OF_CHAR_IN_BYTES,
4035 tempRom,
4036 graphics.fgChars
4037 );
4038
4039 memset(tempRom, 0, machine.config->tempRomSize);
4040
4041 return 0;
4042 }
4043
xeviousTilesDecode(void)4044 static INT32 xeviousTilesDecode(void)
4045 {
4046 /* background tiles */
4047 /* 512 characters */
4048 /* 2 bits per pixel */
4049 /* 8 x 8 characters */
4050 /* every char takes 8 consecutive bytes */
4051 GfxDecode(
4052 XEVIOUS_NUM_OF_BGTILE,
4053 XEVIOUS_NUM_OF_BGTILE_PALETTE_BITS,
4054 8, 8,
4055 xeviousOffsets.bgChars,
4056 XeviousCharXOffsets,
4057 XeviousCharYOffsets,
4058 XEVIOUS_SIZE_OF_BGTILE_IN_BYTES,
4059 tempRom,
4060 graphics.bgTiles
4061 );
4062
4063 memset(tempRom, 0, machine.config->tempRomSize);
4064
4065 return 0;
4066 }
4067
xeviousSpriteDecode(void)4068 static INT32 xeviousSpriteDecode(void)
4069 {
4070 /* sprite set #1 */
4071 /* 128 sprites */
4072 /* 3 bits per pixel */
4073 /* 16 x 16 sprites */
4074 /* every sprite takes 128 (64?) consecutive bytes */
4075 GfxDecode(
4076 XEVIOUS_NUM_OF_SPRITE1,
4077 XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS,
4078 16, 16,
4079 xeviousOffsets.sprites1,
4080 (INT32*)xOffsets16x16Tiles2Bit,
4081 (INT32*)yOffsets16x16Tiles2Bit,
4082 XEVIOUS_SIZE_OF_SPRITE_IN_BYTES,
4083 tempRom + (0x0000),
4084 graphics.sprites
4085 );
4086
4087 /* sprite set #2 */
4088 /* 128 sprites */
4089 /* 3 bits per pixel */
4090 /* 16 x 16 sprites */
4091 /* every sprite takes 128 (64?) consecutive bytes */
4092 GfxDecode(
4093 XEVIOUS_NUM_OF_SPRITE2,
4094 XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS,
4095 16, 16,
4096 xeviousOffsets.sprites2,
4097 (INT32*)xOffsets16x16Tiles2Bit,
4098 (INT32*)yOffsets16x16Tiles2Bit,
4099 XEVIOUS_SIZE_OF_SPRITE_IN_BYTES,
4100 tempRom + (0x2000),
4101 graphics.sprites + (XEVIOUS_NUM_OF_SPRITE1 * (16 * 16))
4102 );
4103
4104 /* sprite set #3 */
4105 /* 64 sprites */
4106 /* 3 bits per pixel (one is always 0) */
4107 /* 16 x 16 sprites */
4108 /* every sprite takes 64 consecutive bytes */
4109 GfxDecode(
4110 XEVIOUS_NUM_OF_SPRITE3,
4111 XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS,
4112 16, 16,
4113 xeviousOffsets.sprites3,
4114 (INT32*)xOffsets16x16Tiles2Bit,
4115 (INT32*)yOffsets16x16Tiles2Bit,
4116 XEVIOUS_SIZE_OF_SPRITE_IN_BYTES,
4117 tempRom + (0x6000),
4118 graphics.sprites + ((XEVIOUS_NUM_OF_SPRITE1 + XEVIOUS_NUM_OF_SPRITE2) * (16 * 16))
4119 );
4120
4121 return 0;
4122 }
4123
tilemap_scan(xevious)4124 static tilemap_scan ( xevious )
4125 {
4126 return (row) * XEVIOUS_NO_OF_COLS + col;
4127 }
4128
tilemap_callback(xevious_bg)4129 static tilemap_callback ( xevious_bg )
4130 {
4131 UINT8 code = xeviousRAM.bg_videoram[offs];
4132 UINT8 attr = xeviousRAM.bg_colorram[offs];
4133
4134 TILE_SET_INFO(
4135 0,
4136 (UINT16)(code + ((attr & 0x01) << 8)),
4137 ((attr & 0x3c) >> 2) | ((code & 0x80) >> 3) | ((attr & 0x03) << 5),
4138 ((attr & 0xc0) >> 6)
4139 );
4140 }
4141
tilemap_callback(xevious_fg)4142 static tilemap_callback ( xevious_fg )
4143 {
4144 UINT8 code = xeviousRAM.fg_videoram[offs];
4145 UINT8 attr = xeviousRAM.fg_colorram[offs];
4146 TILE_SET_INFO(
4147 1,
4148 code,
4149 ((attr & 0x03) << 4) | ((attr & 0x3c) >> 2),
4150 ((attr & 0xc0) >> 6)
4151 );
4152
4153 }
4154
xeviousTilemapConfig(void)4155 static INT32 xeviousTilemapConfig(void)
4156 {
4157 xeviousRAM.fg_colorram = memory.RAM.video; // 0xb000 - 0xb7ff
4158 xeviousRAM.bg_colorram = memory.RAM.video + 0x0800; // 0xb800 - 0xbfff
4159 xeviousRAM.fg_videoram = memory.RAM.video + 0x1000; // 0xc000 - 0xc7ff
4160 xeviousRAM.bg_videoram = memory.RAM.video + 0x1800; // 0xc800 - 0xcfff
4161
4162 GenericTilemapInit(
4163 0,
4164 xevious_map_scan, xevious_bg_map_callback,
4165 8, 8,
4166 XEVIOUS_NO_OF_COLS, XEVIOUS_NO_OF_ROWS
4167 );
4168 GenericTilemapSetGfx(
4169 0,
4170 graphics.bgTiles,
4171 XEVIOUS_NUM_OF_BGTILE_PALETTE_BITS,
4172 8, 8,
4173 XEVIOUS_TILES_MEM_SIZE_IN_BYTES,
4174 XEVIOUS_PALETTE_OFFSET_BGTILES,
4175 0x7f //XEVIOUS_PALETTE_SIZE_BGTILES - 1
4176 );
4177
4178 GenericTilemapInit(
4179 1,
4180 xevious_map_scan, xevious_fg_map_callback,
4181 8, 8,
4182 XEVIOUS_NO_OF_COLS, XEVIOUS_NO_OF_ROWS
4183 );
4184 GenericTilemapSetGfx(
4185 1,
4186 graphics.fgChars,
4187 XEVIOUS_NUM_OF_CHAR_PALETTE_BITS,
4188 8, 8,
4189 XEVIOUS_CHAR_MEM_SIZE_IN_BYTES,
4190 XEVIOUS_PALETTE_OFFSET_CHARS,
4191 0x3f // XEVIOUS_PALETTE_SIZE_CHARS - 1
4192 );
4193 GenericTilemapSetTransparent(1, 0);
4194
4195 GenericTilemapSetOffsets(TMAP_GLOBAL, 0, 0);
4196
4197 return 0;
4198 }
4199
xeviousPlayFieldRead(UINT16 offset)4200 static UINT8 xeviousPlayFieldRead(UINT16 offset)
4201 {
4202 UINT16 addr_2b = ( ((xeviousRAM.bs[1] & 0x7e) << 6) |
4203 ((xeviousRAM.bs[0] & 0xfe) >> 1) );
4204
4205 UINT8 dat_2b = xeviousROM.rom2b[addr_2b];
4206
4207 UINT16 addr_2a = addr_2b >> 1;
4208
4209 UINT8 dat_2a = xeviousROM.rom2a[addr_2a];
4210 if (addr_2b & 1)
4211 {
4212 dat_2a >>= 4;
4213 }
4214 else
4215 {
4216 dat_2a &= 0x0f;
4217 }
4218
4219 UINT16 addr_2c = (UINT16)dat_2b << 2;
4220 if (dat_2a & 1)
4221 {
4222 addr_2c += 0x0400;
4223 }
4224 if ((xeviousRAM.bs[0] & 1) ^ ((dat_2a >> 2) & 1) )
4225 {
4226 addr_2c |= 1;
4227 }
4228 if ((xeviousRAM.bs[1] & 1) ^ ((dat_2a >> 1) & 1) )
4229 {
4230 addr_2c |= 2;
4231 }
4232
4233 UINT8 dat_2c = 0;
4234 if (offset & 1)
4235 {
4236 dat_2c = xeviousROM.rom2c[addr_2c + 0x0800];
4237 }
4238 else
4239 {
4240 dat_2c = xeviousROM.rom2c[addr_2c];
4241 dat_2c = (dat_2c & 0x3f) | ((dat_2c & 0x80) >> 1) | ((dat_2c & 0x40) << 1);
4242 dat_2c ^= ((dat_2a << 4) & 0x40);
4243 dat_2c ^= ((dat_2a << 6) & 0x80);
4244 }
4245
4246 return dat_2c;
4247 }
4248
xeviousWorkRAMRead(UINT16 offset)4249 static UINT8 xeviousWorkRAMRead(UINT16 offset)
4250 {
4251 return xeviousRAM.workram[offset];
4252 }
4253
xeviousSharedRAM1Read(UINT16 offset)4254 static UINT8 xeviousSharedRAM1Read(UINT16 offset)
4255 {
4256 return memory.RAM.shared1[offset & 0x07ff];
4257 }
4258
xeviousSharedRAM2Read(UINT16 offset)4259 static UINT8 xeviousSharedRAM2Read(UINT16 offset)
4260 {
4261 return memory.RAM.shared2[offset & 0x07ff];
4262 }
4263
xeviousSharedRAM3Read(UINT16 offset)4264 static UINT8 xeviousSharedRAM3Read(UINT16 offset)
4265 {
4266 return memory.RAM.shared3[offset & 0x07ff];
4267 }
4268
xevious_bs_wr(UINT16 offset,UINT8 dta)4269 static void xevious_bs_wr(UINT16 offset, UINT8 dta)
4270 {
4271 xeviousRAM.bs[offset & 0x01] = dta;
4272 }
4273
xevious_vh_latch_w(UINT16 offset,UINT8 dta)4274 static void xevious_vh_latch_w(UINT16 offset, UINT8 dta)
4275 {
4276 UINT16 dta16 = dta + ((offset & 1) << 8);
4277 UINT16 reg = (offset & 0xf0) >> 4;
4278
4279 switch (reg)
4280 {
4281 case 0:
4282 {
4283 // set bg tilemap x
4284 GenericTilemapSetScrollX(0, dta16 + 20);
4285 break;
4286 }
4287 case 1:
4288 {
4289 // set fg tilemap x
4290 GenericTilemapSetScrollX(1, dta16 + 32);
4291 break;
4292 }
4293 case 2:
4294 {
4295 // set bg tilemap y
4296 GenericTilemapSetScrollY(0, dta16 + 16);
4297 break;
4298 }
4299 case 3:
4300 {
4301 // set fg tilemap y
4302 GenericTilemapSetScrollY(1, dta16 + 18);
4303 break;
4304 }
4305 case 7:
4306 {
4307 // flipscreen
4308 machine.flipScreen = dta & 1;
4309 break;
4310 }
4311 default:
4312 {
4313 break;
4314 }
4315 }
4316
4317 }
4318
xeviousBGColorRAMWrite(UINT16 offset,UINT8 dta)4319 static void xeviousBGColorRAMWrite(UINT16 offset, UINT8 dta)
4320 {
4321 *(xeviousRAM.bg_colorram + (offset & 0x7ff)) = dta;
4322 }
4323
xeviousBGCharRAMWrite(UINT16 offset,UINT8 dta)4324 static void xeviousBGCharRAMWrite(UINT16 offset, UINT8 dta)
4325 {
4326 *(xeviousRAM.bg_videoram + (offset & 0x7ff)) = dta;
4327 }
4328
xeviousFGColorRAMWrite(UINT16 offset,UINT8 dta)4329 static void xeviousFGColorRAMWrite(UINT16 offset, UINT8 dta)
4330 {
4331 *(xeviousRAM.fg_colorram + (offset & 0x7ff)) = dta;
4332 }
4333
xeviousFGCharRAMWrite(UINT16 offset,UINT8 dta)4334 static void xeviousFGCharRAMWrite(UINT16 offset, UINT8 dta)
4335 {
4336 *(xeviousRAM.fg_videoram + (offset & 0x7ff)) = dta;
4337 }
4338
xeviousWorkRAMWrite(UINT16 offset,UINT8 dta)4339 static void xeviousWorkRAMWrite(UINT16 offset, UINT8 dta)
4340 {
4341 xeviousRAM.workram[offset & 0x7ff] = dta;
4342 }
4343
xeviousSharedRAM1Write(UINT16 offset,UINT8 dta)4344 static void xeviousSharedRAM1Write(UINT16 offset, UINT8 dta)
4345 {
4346 memory.RAM.shared1[offset & 0x07ff] = dta;
4347 }
4348
xeviousSharedRAM2Write(UINT16 offset,UINT8 dta)4349 static void xeviousSharedRAM2Write(UINT16 offset, UINT8 dta)
4350 {
4351 memory.RAM.shared2[offset & 0x07ff] = dta;
4352 }
4353
xeviousSharedRAM3Write(UINT16 offset,UINT8 dta)4354 static void xeviousSharedRAM3Write(UINT16 offset, UINT8 dta)
4355 {
4356 memory.RAM.shared3[offset & 0x07ff] = dta;
4357 }
4358
4359 #define XEVIOUS_BASE_PALETTE_SIZE 128
4360
xeviousCalcPalette(void)4361 static void xeviousCalcPalette(void)
4362 {
4363 UINT32 palette[XEVIOUS_BASE_PALETTE_SIZE + 1];
4364 UINT32 code = 0;
4365
4366 for (INT32 i = 0; i < XEVIOUS_BASE_PALETTE_SIZE; i ++)
4367 {
4368 INT32 r = Colour4Bit[(memory.PROM.palette[0x0000 + i]) & 0x0f];
4369 INT32 g = Colour4Bit[(memory.PROM.palette[0x0100 + i]) & 0x0f];
4370 INT32 b = Colour4Bit[(memory.PROM.palette[0x0200 + i]) & 0x0f];
4371
4372 palette[i] = BurnHighCol(r, g, b, 0);
4373 }
4374
4375 palette[XEVIOUS_BASE_PALETTE_SIZE] = BurnHighCol(0, 0, 0, 0); // Transparency Colour for Sprites
4376
4377 /* bg_select */
4378 for (INT32 i = 0; i < XEVIOUS_PALETTE_SIZE_BGTILES; i ++)
4379 {
4380 code = ( (memory.PROM.charLookup[ i] & 0x0f) |
4381 ((memory.PROM.charLookup[XEVIOUS_PALETTE_SIZE_BGTILES + i] & 0x0f) << 4) );
4382 graphics.palette[XEVIOUS_PALETTE_OFFSET_BGTILES + i] = palette[code];
4383 }
4384
4385 /* sprites */
4386 for (INT32 i = 0; i < XEVIOUS_PALETTE_SIZE_SPRITES; i ++)
4387 {
4388 code = ( (memory.PROM.spriteLookup[i ] & 0x0f) |
4389 ((memory.PROM.spriteLookup[XEVIOUS_PALETTE_SIZE_SPRITES + i] & 0x0f) << 4) );
4390 if (code & 0x80)
4391 graphics.palette[XEVIOUS_PALETTE_OFFSET_SPRITE + i] = palette[code & 0x7f];
4392 else
4393 graphics.palette[XEVIOUS_PALETTE_OFFSET_SPRITE + i] = palette[XEVIOUS_BASE_PALETTE_SIZE];
4394 }
4395
4396 /* characters - direct mapping */
4397 for (INT32 i = 0; i < XEVIOUS_PALETTE_SIZE_CHARS; i += 2)
4398 {
4399 graphics.palette[XEVIOUS_PALETTE_OFFSET_CHARS + i + 0] = palette[XEVIOUS_BASE_PALETTE_SIZE];
4400 graphics.palette[XEVIOUS_PALETTE_OFFSET_CHARS + i + 1] = palette[i / 2];
4401 }
4402
4403 }
4404
xeviousRenderTiles0(void)4405 static void xeviousRenderTiles0(void)
4406 {
4407 GenericTilemapSetEnable(0, 1);
4408 GenericTilemapDraw(0, pTransDraw, 0 | TMAP_DRAWOPAQUE);
4409 }
4410
xeviousRenderTiles1(void)4411 static void xeviousRenderTiles1(void)
4412 {
4413 GenericTilemapSetEnable(1, 1);
4414 GenericTilemapDraw(1, pTransDraw, 0 | TMAP_TRANSPARENT);
4415 }
4416
xeviousGetSpriteParams(struct Namco_Sprite_Params * spriteParams,UINT32 offset)4417 static UINT32 xeviousGetSpriteParams(struct Namco_Sprite_Params *spriteParams, UINT32 offset)
4418 {
4419 UINT8 *spriteRam2 = memory.RAM.shared1 + 0x780;
4420 UINT8 *spriteRam3 = memory.RAM.shared2 + 0x780;
4421 UINT8 *spriteRam1 = memory.RAM.shared3 + 0x780;
4422
4423 if (0 == (spriteRam1[offset + 1] & 0x40))
4424 {
4425 INT32 sprite = spriteRam1[offset + 0];
4426
4427 if (spriteRam3[offset + 0] & 0x80)
4428 {
4429 sprite &= 0x3f;
4430 sprite += 0x100;
4431 }
4432 spriteParams->sprite = sprite;
4433 spriteParams->colour = spriteRam1[offset + 1] & 0x7f;
4434
4435 spriteParams->xStart = ((spriteRam2[offset + 1] - 40) + (spriteRam3[offset + 1] & 1 ) * 0x100);
4436 spriteParams->yStart = NAMCO_SCREEN_WIDTH - (spriteRam2[offset + 0] - 1);
4437 spriteParams->xStep = 16;
4438 spriteParams->yStep = 16;
4439
4440 spriteParams->flags = ((spriteRam3[offset + 0] & 0x03) << 2) |
4441 ((spriteRam3[offset + 0] & 0x0c) >> 2);
4442
4443 if (spriteParams->flags & ySize)
4444 {
4445 spriteParams->yStart -= 16;
4446 }
4447
4448 spriteParams->paletteBits = XEVIOUS_NUM_OF_SPRITE_PALETTE_BITS;
4449 spriteParams->paletteOffset = XEVIOUS_PALETTE_OFFSET_SPRITE;
4450
4451 return 1;
4452 }
4453
4454 return 0;
4455 }
4456
4457 struct BurnDriver BurnDrvXevious =
4458 {
4459 /* filename of zip without extension = */ "xevious",
4460 /* filename of parent, no extension = */ NULL,
4461 /* filename of board ROMs = */ NULL,
4462 /* filename of samples ZIP = */ "xevious",
4463 /* date = */ "1982",
4464 /* FullName = */ "Xevious (Namco)\0",
4465 /* Comment = */ NULL,
4466 /* Manufacturer = */ "Namco",
4467 /* System = */ "Miscellaneous",
4468 /* FullName = */ NULL,
4469 /* Comment = */ NULL,
4470 /* Manufacturer = */ NULL,
4471 /* System = */ NULL,
4472 /* Flags = */ BDF_GAME_WORKING |
4473 BDF_ORIENTATION_VERTICAL |
4474 BDF_ORIENTATION_FLIPPED,
4475 /* No of Players = */ 2,
4476 /* Hardware Type = */ HARDWARE_MISC_PRE90S,
4477 /* Genre = */ GBF_VERSHOOT,
4478 /* Family = */ 0,
4479 /* GetZipName func = */ NULL,
4480 /* GetROMInfo func = */ XeviousRomInfo,
4481 /* GetROMName func = */ XeviousRomName,
4482 /* GetHDDInfo func = */ NULL,
4483 /* GetHDDName func = */ NULL,
4484 /* GetSampleInfo func = */ XeviousSampleInfo,
4485 /* GetSampleName func = */ XeviousSampleName,
4486 /* GetInputInfo func = */ XeviousInputInfo,
4487 /* GetDIPInfo func = */ XeviousDIPInfo,
4488 /* Init func = */ xeviousInit,
4489 /* Exit func = */ DrvExit,
4490 /* Frame func = */ DrvFrame,
4491 /* Redraw func = */ DrvDraw,
4492 /* Areascan func = */ DrvScan,
4493 /* Recalc Palette = */ NULL,
4494 /* Palette Entries count = */ XEVIOUS_PALETTE_SIZE,
4495 /* Width, Height = */ NAMCO_SCREEN_WIDTH, NAMCO_SCREEN_HEIGHT,
4496 /* xAspect, yAspect = */ 3, 4
4497 };
4498
4499