1 #include "../vidhrdw/namcos86.c"
2
3 /*******************************************************************
4 Rolling Thunder
5 (C) 1986 Namco
6
7 To Do:
8 -----
9 Remove sprite lag (watch the "bullets" signs on the walls during scrolling).
10 Increasing vblank_duration does it but some sprites flicker.
11
12 Add correct dipswitches and potentially fix controls in Wonder Momo.
13
14 Notes:
15 -----
16 PCM roms sample tables:
17 At the beggining of each PCM sound ROM you can find a 2 byte
18 offset to the beggining of each sample in the rom. Since the
19 table is not in sequential order, it is possible that the order
20 of the table is actually the sound number. Each sample ends in
21 a 0xff mark.
22
23 *******************************************************************/
24
25 #include "driver.h"
26 #include "cpu/m6809/m6809.h"
27 #include "cpu/m6800/m6800.h"
28
29 extern unsigned char *rthunder_videoram1, *rthunder_videoram2, *spriteram, *dirtybuffer;
30
31 /*******************************************************************/
32
33 void namcos86_vh_convert_color_prom(unsigned char *palette,unsigned short *colortable,const unsigned char *color_prom);
34 int namcos86_vh_start(void);
35 void namcos86_vh_screenrefresh(struct osd_bitmap *bitmap,int fullrefresh);
36 READ_HANDLER( rthunder_videoram1_r );
37 WRITE_HANDLER( rthunder_videoram1_w );
38 READ_HANDLER( rthunder_videoram2_r );
39 WRITE_HANDLER( rthunder_videoram2_w );
40 WRITE_HANDLER( rthunder_scroll0_w );
41 WRITE_HANDLER( rthunder_scroll1_w );
42 WRITE_HANDLER( rthunder_scroll2_w );
43 WRITE_HANDLER( rthunder_scroll3_w );
44 WRITE_HANDLER( rthunder_backcolor_w );
45 WRITE_HANDLER( rthunder_tilebank_select_0_w );
46 WRITE_HANDLER( rthunder_tilebank_select_1_w );
47
48
49
50 /*******************************************************************/
51
52 /* Sampled voices (Modified and Added by Takahiro Nogi. 1999/09/26) */
53
54 /* signed/unsigned 8-bit conversion macros */
55 #define AUDIO_CONV(A) ((A)^0x80)
56
57 static int rt_totalsamples[7];
58 static int rt_decode_mode;
59
60
rt_decode_sample(const struct MachineSound * msound)61 static int rt_decode_sample(const struct MachineSound *msound)
62 {
63 struct GameSamples *samples;
64 unsigned char *src, *scan, *dest, last=0;
65 int size, n = 0, j;
66 int decode_mode;
67
68 j = memory_region_length(REGION_SOUND1);
69 if (j == 0) return 0; /* no samples in this game */
70 else if (j == 0x80000) /* genpeitd */
71 rt_decode_mode = 1;
72 else
73 rt_decode_mode = 0;
74
75 //logerror("pcm decode mode:%d\n", rt_decode_mode );
76 if (rt_decode_mode != 0) {
77 decode_mode = 6;
78 } else {
79 decode_mode = 4;
80 }
81
82 /* get amount of samples */
83 for ( j = 0; j < decode_mode; j++ ) {
84 src = memory_region(REGION_SOUND1)+ ( j * 0x10000 );
85 rt_totalsamples[j] = ( ( src[0] << 8 ) + src[1] ) / 2;
86 n += rt_totalsamples[j];
87 //logerror("rt_totalsamples[%d]:%d\n", j, rt_totalsamples[j] );
88 }
89
90 /* calculate the amount of headers needed */
91 size = sizeof( struct GameSamples ) + n * sizeof( struct GameSamples * );
92
93 /* allocate */
94 if ( ( Machine->samples = (struct GameSamples*)malloc( size ) ) == NULL )
95 return 1;
96
97 samples = Machine->samples;
98 samples->total = n;
99
100 for ( n = 0; n < samples->total; n++ ) {
101 int indx, start, offs;
102
103 if ( n < rt_totalsamples[0] ) {
104 src = memory_region(REGION_SOUND1);
105 indx = n;
106 } else
107 if ( ( n - rt_totalsamples[0] ) < rt_totalsamples[1] ) {
108 src = memory_region(REGION_SOUND1)+0x10000;
109 indx = n - rt_totalsamples[0];
110 } else
111 if ( ( n - ( rt_totalsamples[0] + rt_totalsamples[1] ) ) < rt_totalsamples[2] ) {
112 src = memory_region(REGION_SOUND1)+0x20000;
113 indx = n - ( rt_totalsamples[0] + rt_totalsamples[1] );
114 } else
115 if ( ( n - ( rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] ) ) < rt_totalsamples[3] ) {
116 src = memory_region(REGION_SOUND1)+0x30000;
117 indx = n - ( rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] );
118 } else
119 if ( ( n - ( rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3] ) ) < rt_totalsamples[4] ) {
120 src = memory_region(REGION_SOUND1)+0x40000;
121 indx = n - ( rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3] );
122 } else
123 if ( ( n - ( rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3] + rt_totalsamples[4] ) ) < rt_totalsamples[5] ) {
124 src = memory_region(REGION_SOUND1)+0x50000;
125 indx = n - ( rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3] + rt_totalsamples[4] );
126 } else {
127 src = memory_region(REGION_SOUND1)+0x60000;
128 indx = n - ( rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3] + rt_totalsamples[4] + rt_totalsamples[5] );
129 }
130
131 /* calculate header offset */
132 offs = indx * 2;
133
134 /* get sample start offset */
135 start = ( src[offs] << 8 ) + src[offs+1];
136
137 /* calculate the sample size */
138 scan = &src[start];
139 size = 0;
140
141 while ( *scan != 0xff ) {
142 if ( *scan == 0x00 ) { /* run length encoded data start tag */
143 /* get RLE size */
144 size += scan[1] + 1;
145 scan += 2;
146 } else {
147 size++;
148 scan++;
149 }
150 }
151
152 /* allocate sample */
153 if ( ( samples->sample[n] = (struct GameSample*)malloc( sizeof( struct GameSample ) + size * sizeof( unsigned char ) ) ) == NULL )
154 return 1;
155
156 /* fill up the sample info */
157 samples->sample[n]->length = size;
158 samples->sample[n]->smpfreq = 6000; /* 6 kHz */
159 samples->sample[n]->resolution = 8; /* 8 bit */
160
161 /* unpack sample */
162 dest = (unsigned char *)samples->sample[n]->data;
163 scan = &src[start];
164
165 while ( *scan != 0xff ) {
166 if ( *scan == 0x00 ) { /* run length encoded data start tag */
167 int i;
168 for ( i = 0; i <= scan[1]; i++ ) /* unpack RLE */
169 *dest++ = last;
170
171 scan += 2;
172 } else {
173 last = AUDIO_CONV( scan[0] );
174 *dest++ = last;
175 scan++;
176 }
177 }
178 }
179
180 return 0; /* no errors */
181 }
182
183
184 /* play voice sample (Modified and Added by Takahiro Nogi. 1999/09/26) */
185 static int voice[2];
186
namco_voice_play(int offset,int data,int ch)187 static void namco_voice_play( int offset, int data, int ch ) {
188
189 if ( voice[ch] == -1 )
190 sample_stop( ch );
191 else
192 sample_start( ch, voice[ch], 0 );
193 }
194
WRITE_HANDLER(namco_voice0_play_w)195 static WRITE_HANDLER( namco_voice0_play_w ) {
196
197 namco_voice_play(offset, data, 0);
198 }
199
WRITE_HANDLER(namco_voice1_play_w)200 static WRITE_HANDLER( namco_voice1_play_w ) {
201
202 namco_voice_play(offset, data, 1);
203 }
204
205 /* select voice sample (Modified and Added by Takahiro Nogi. 1999/09/26) */
namco_voice_select(int offset,int data,int ch)206 static void namco_voice_select( int offset, int data, int ch ) {
207
208 //logerror("Voice %d mode: %d select: %02x\n", ch, rt_decode_mode, data );
209
210 if ( data == 0 )
211 sample_stop( ch );
212
213 if (rt_decode_mode != 0) {
214 switch ( data & 0xe0 ) {
215 case 0x00:
216 break;
217
218 case 0x20:
219 data &= 0x1f;
220 data += rt_totalsamples[0];
221 break;
222
223 case 0x40:
224 data &= 0x1f;
225 data += rt_totalsamples[0] + rt_totalsamples[1];
226 break;
227
228 case 0x60:
229 data &= 0x1f;
230 data += rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2];
231 break;
232
233 case 0x80:
234 data &= 0x1f;
235 data += rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3];
236 break;
237
238 case 0xa0:
239 data &= 0x1f;
240 data += rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3] + rt_totalsamples[4];
241 break;
242
243 case 0xc0:
244 data &= 0x1f;
245 data += rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3] + rt_totalsamples[4] + rt_totalsamples[5];
246 break;
247
248 case 0xe0:
249 data &= 0x1f;
250 data += rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2] + rt_totalsamples[3] + rt_totalsamples[4] + rt_totalsamples[5] + rt_totalsamples[6];
251 break;
252 }
253 } else {
254 switch ( data & 0xc0 ) {
255 case 0x00:
256 break;
257
258 case 0x40:
259 data &= 0x3f;
260 data += rt_totalsamples[0];
261 break;
262
263 case 0x80:
264 data &= 0x3f;
265 data += rt_totalsamples[0] + rt_totalsamples[1];
266 break;
267
268 case 0xc0:
269 data &= 0x3f;
270 data += rt_totalsamples[0] + rt_totalsamples[1] + rt_totalsamples[2];
271 break;
272 }
273 }
274
275 voice[ch] = data - 1;
276 }
277
WRITE_HANDLER(namco_voice0_select_w)278 static WRITE_HANDLER( namco_voice0_select_w ) {
279
280 namco_voice_select(offset, data, 0);
281 }
282
WRITE_HANDLER(namco_voice1_select_w)283 static WRITE_HANDLER( namco_voice1_select_w ) {
284
285 namco_voice_select(offset, data, 1);
286 }
287 /*******************************************************************/
288
289 /* shared memory area with the mcu */
290 static unsigned char *shared1;
READ_HANDLER(shared1_r)291 static READ_HANDLER( shared1_r ) { return shared1[offset]; }
WRITE_HANDLER(shared1_w)292 static WRITE_HANDLER( shared1_w ) { shared1[offset] = data; }
293
294
295
WRITE_HANDLER(spriteram_w)296 static WRITE_HANDLER( spriteram_w )
297 {
298 spriteram[offset] = data;
299 }
READ_HANDLER(spriteram_r)300 static READ_HANDLER( spriteram_r )
301 {
302 return spriteram[offset];
303 }
304
WRITE_HANDLER(bankswitch1_w)305 static WRITE_HANDLER( bankswitch1_w )
306 {
307 unsigned char *base = memory_region(REGION_CPU1) + 0x10000;
308
309 /* if the ROM expansion module is available, don't do anything. This avoids conflict */
310 /* with bankswitch1_ext_w() in wndrmomo */
311 if (memory_region(REGION_USER1)) return;
312
313 cpu_setbank(1,base + ((data & 0x03) * 0x2000));
314 }
315
WRITE_HANDLER(bankswitch1_ext_w)316 static WRITE_HANDLER( bankswitch1_ext_w )
317 {
318 unsigned char *base = memory_region(REGION_USER1);
319
320 if (base == 0) return;
321
322 cpu_setbank(1,base + ((data & 0x1f) * 0x2000));
323 }
324
WRITE_HANDLER(bankswitch2_w)325 static WRITE_HANDLER( bankswitch2_w )
326 {
327 unsigned char *base = memory_region(REGION_CPU2) + 0x10000;
328
329 cpu_setbank(2,base + ((data & 0x03) * 0x2000));
330 }
331
332 /* Stubs to pass the correct Dip Switch setup to the MCU */
READ_HANDLER(dsw0_r)333 static READ_HANDLER( dsw0_r )
334 {
335 int rhi, rlo;
336
337 rhi = ( readinputport( 2 ) & 0x01 ) << 4;
338 rhi |= ( readinputport( 2 ) & 0x04 ) << 3;
339 rhi |= ( readinputport( 2 ) & 0x10 ) << 2;
340 rhi |= ( readinputport( 2 ) & 0x40 ) << 1;
341
342 rlo = ( readinputport( 3 ) & 0x01 );
343 rlo |= ( readinputport( 3 ) & 0x04 ) >> 1;
344 rlo |= ( readinputport( 3 ) & 0x10 ) >> 2;
345 rlo |= ( readinputport( 3 ) & 0x40 ) >> 3;
346
347 return ~( rhi | rlo ) & 0xff; /* Active Low */
348 }
349
READ_HANDLER(dsw1_r)350 static READ_HANDLER( dsw1_r )
351 {
352 int rhi, rlo;
353
354 rhi = ( readinputport( 2 ) & 0x02 ) << 3;
355 rhi |= ( readinputport( 2 ) & 0x08 ) << 2;
356 rhi |= ( readinputport( 2 ) & 0x20 ) << 1;
357 rhi |= ( readinputport( 2 ) & 0x80 );
358
359 rlo = ( readinputport( 3 ) & 0x02 ) >> 1;
360 rlo |= ( readinputport( 3 ) & 0x08 ) >> 2;
361 rlo |= ( readinputport( 3 ) & 0x20 ) >> 3;
362 rlo |= ( readinputport( 3 ) & 0x80 ) >> 4;
363
364 return ~( rhi | rlo ) & 0xff; /* Active Low */
365 }
366
367 static int int_enabled[2];
368
WRITE_HANDLER(int_ack1_w)369 static WRITE_HANDLER( int_ack1_w )
370 {
371 int_enabled[0] = 1;
372 }
373
WRITE_HANDLER(int_ack2_w)374 static WRITE_HANDLER( int_ack2_w )
375 {
376 int_enabled[1] = 1;
377 }
378
namco86_interrupt1(void)379 static int namco86_interrupt1(void)
380 {
381 if (int_enabled[0])
382 {
383 int_enabled[0] = 0;
384 return interrupt();
385 }
386
387 return ignore_interrupt();
388 }
389
namco86_interrupt2(void)390 static int namco86_interrupt2(void)
391 {
392 if (int_enabled[1])
393 {
394 int_enabled[1] = 0;
395 return interrupt();
396 }
397
398 return ignore_interrupt();
399 }
400
WRITE_HANDLER(namcos86_coin_w)401 static WRITE_HANDLER( namcos86_coin_w )
402 {
403 coin_lockout_global_w(0,data & 1);
404 coin_counter_w(0,~data & 2);
405 coin_counter_w(1,~data & 4);
406 }
407
WRITE_HANDLER(namcos86_led_w)408 static WRITE_HANDLER( namcos86_led_w )
409 {
410 osd_led_w(0,data >> 3);
411 osd_led_w(1,data >> 4);
412 }
413
414
415 /*******************************************************************/
416
417 static struct MemoryReadAddress readmem1[] =
418 {
419 { 0x0000, 0x1fff, rthunder_videoram1_r },
420 { 0x2000, 0x3fff, rthunder_videoram2_r },
421 { 0x4000, 0x40ff, namcos1_wavedata_r }, /* PSG device, shared RAM */
422 { 0x4100, 0x413f, namcos1_sound_r }, /* PSG device, shared RAM */
423 { 0x4000, 0x43ff, shared1_r },
424 { 0x4400, 0x5fff, spriteram_r },
425 { 0x6000, 0x7fff, MRA_BANK1 },
426 { 0x8000, 0xffff, MRA_ROM },
427 { -1 }
428 };
429
430 static struct MemoryWriteAddress writemem1[] =
431 {
432 { 0x0000, 0x1fff, rthunder_videoram1_w, &rthunder_videoram1 },
433 { 0x2000, 0x3fff, rthunder_videoram2_w, &rthunder_videoram2 },
434
435 { 0x4000, 0x40ff, namcos1_wavedata_w, &namco_wavedata }, /* PSG device, shared RAM */
436 { 0x4100, 0x413f, namcos1_sound_w, &namco_soundregs }, /* PSG device, shared RAM */
437 { 0x4000, 0x43ff, shared1_w, &shared1 },
438
439 { 0x4400, 0x5fff, spriteram_w, &spriteram },
440
441 { 0x6000, 0x6000, namco_voice0_play_w },
442 { 0x6200, 0x6200, namco_voice0_select_w },
443 { 0x6400, 0x6400, namco_voice1_play_w },
444 { 0x6600, 0x6600, namco_voice1_select_w },
445 { 0x6800, 0x6800, bankswitch1_ext_w },
446 // { 0x6c00, 0x6c00, MWA_NOP }, /* ??? */
447 // { 0x6e00, 0x6e00, MWA_NOP }, /* ??? */
448
449 { 0x8000, 0x8000, watchdog_reset_w },
450 { 0x8400, 0x8400, int_ack1_w }, /* IRQ acknowledge */
451 { 0x8800, 0x8800, rthunder_tilebank_select_0_w },
452 { 0x8c00, 0x8c00, rthunder_tilebank_select_1_w },
453
454 { 0x9000, 0x9002, rthunder_scroll0_w }, /* scroll + priority */
455 { 0x9003, 0x9003, bankswitch1_w },
456 { 0x9004, 0x9006, rthunder_scroll1_w }, /* scroll + priority */
457
458 { 0x9400, 0x9402, rthunder_scroll2_w }, /* scroll + priority */
459 // { 0x9403, 0x9403 } sub CPU rom bank select would be here
460 { 0x9404, 0x9406, rthunder_scroll3_w }, /* scroll + priority */
461
462 { 0xa000, 0xa000, rthunder_backcolor_w },
463
464 { 0x8000, 0xffff, MWA_ROM },
465 { -1 }
466 };
467
468
469 #define CPU2_MEMORY(NAME,ADDR_SPRITE,ADDR_VIDEO1,ADDR_VIDEO2,ADDR_ROM,ADDR_BANK,ADDR_WDOG,ADDR_INT) \
470 static struct MemoryReadAddress NAME##_readmem2[] = \
471 { \
472 { ADDR_SPRITE+0x0000, ADDR_SPRITE+0x03ff, MRA_RAM }, \
473 { ADDR_SPRITE+0x0400, ADDR_SPRITE+0x1fff, spriteram_r }, \
474 { ADDR_VIDEO1+0x0000, ADDR_VIDEO1+0x1fff, rthunder_videoram1_r }, \
475 { ADDR_VIDEO2+0x0000, ADDR_VIDEO2+0x1fff, rthunder_videoram2_r }, \
476 { ADDR_ROM+0x0000, ADDR_ROM+0x1fff, MRA_BANK2 }, \
477 { 0x8000, 0xffff, MRA_ROM }, \
478 { -1 } \
479 }; \
480 static struct MemoryWriteAddress NAME##_writemem2[] = \
481 { \
482 { ADDR_SPRITE+0x0000, ADDR_SPRITE+0x03ff, MWA_RAM }, \
483 { ADDR_SPRITE+0x0400, ADDR_SPRITE+0x1fff, spriteram_w }, \
484 { ADDR_VIDEO1+0x0000, ADDR_VIDEO1+0x1fff, rthunder_videoram1_w }, \
485 { ADDR_VIDEO2+0x0000, ADDR_VIDEO2+0x1fff, rthunder_videoram2_w }, \
486 /* { ADDR_BANK+0x00, ADDR_BANK+0x02 } layer 2 scroll registers would be here */ \
487 { ADDR_BANK+0x03, ADDR_BANK+0x03, bankswitch2_w }, \
488 /* { ADDR_BANK+0x04, ADDR_BANK+0x06 } layer 3 scroll registers would be here */ \
489 { ADDR_WDOG, ADDR_WDOG, watchdog_reset_w }, \
490 { ADDR_INT, ADDR_INT, int_ack2_w }, /* IRQ acknowledge */ \
491 { ADDR_ROM+0x0000, ADDR_ROM+0x1fff, MWA_ROM }, \
492 { 0x8000, 0xffff, MWA_ROM }, \
493 { -1 } \
494 };
495
496 #define UNUSED 0x4000
497 /* SPRITE VIDEO1 VIDEO2 ROM BANK WDOG IRQACK */
498 CPU2_MEMORY( hopmappy, UNUSED, UNUSED, UNUSED, UNUSED, UNUSED, 0x9000, UNUSED )
499 CPU2_MEMORY( skykiddx, UNUSED, UNUSED, UNUSED, UNUSED, UNUSED, 0x9000, 0x9400 )
500 CPU2_MEMORY( roishtar, 0x0000, 0x6000, 0x4000, UNUSED, UNUSED, 0xa000, 0xb000 )
501 CPU2_MEMORY( genpeitd, 0x4000, 0x0000, 0x2000, UNUSED, UNUSED, 0xb000, 0x8800 )
502 CPU2_MEMORY( rthunder, 0x0000, 0x2000, 0x4000, 0x6000, 0xd800, 0x8000, 0x8800 )
503 CPU2_MEMORY( wndrmomo, 0x2000, 0x4000, 0x6000, UNUSED, UNUSED, 0xc000, 0xc800 )
504 #undef UNUSED
505
506
507 #define MCU_MEMORY(NAME,ADDR_LOWROM,ADDR_INPUT,ADDR_UNK1,ADDR_UNK2) \
508 static struct MemoryReadAddress NAME##_mcu_readmem[] = \
509 { \
510 { 0x0000, 0x001f, hd63701_internal_registers_r }, \
511 { 0x0080, 0x00ff, MRA_RAM }, \
512 { 0x1000, 0x10ff, namcos1_wavedata_r }, /* PSG device, shared RAM */ \
513 { 0x1100, 0x113f, namcos1_sound_r }, /* PSG device, shared RAM */ \
514 { 0x1000, 0x13ff, shared1_r }, \
515 { 0x1400, 0x1fff, MRA_RAM }, \
516 { ADDR_INPUT+0x00, ADDR_INPUT+0x01, YM2151_status_port_0_r }, \
517 { ADDR_INPUT+0x20, ADDR_INPUT+0x20, input_port_0_r }, \
518 { ADDR_INPUT+0x21, ADDR_INPUT+0x21, input_port_1_r }, \
519 { ADDR_INPUT+0x30, ADDR_INPUT+0x30, dsw0_r }, \
520 { ADDR_INPUT+0x31, ADDR_INPUT+0x31, dsw1_r }, \
521 { ADDR_LOWROM, ADDR_LOWROM+0x3fff, MRA_ROM }, \
522 { 0x8000, 0xbfff, MRA_ROM }, \
523 { 0xf000, 0xffff, MRA_ROM }, \
524 { -1 } /* end of table */ \
525 }; \
526 static struct MemoryWriteAddress NAME##_mcu_writemem[] = \
527 { \
528 { 0x0000, 0x001f, hd63701_internal_registers_w }, \
529 { 0x0080, 0x00ff, MWA_RAM }, \
530 { 0x1000, 0x10ff, namcos1_wavedata_w }, /* PSG device, shared RAM */ \
531 { 0x1100, 0x113f, namcos1_sound_w }, /* PSG device, shared RAM */ \
532 { 0x1000, 0x13ff, shared1_w }, \
533 { 0x1400, 0x1fff, MWA_RAM }, \
534 { ADDR_INPUT+0x00, ADDR_INPUT+0x00, YM2151_register_port_0_w }, \
535 { ADDR_INPUT+0x01, ADDR_INPUT+0x01, YM2151_data_port_0_w }, \
536 { ADDR_UNK1, ADDR_UNK1, MWA_NOP }, /* ??? written (not always) at end of interrupt */ \
537 { ADDR_UNK2, ADDR_UNK2, MWA_NOP }, /* ??? written (not always) at end of interrupt */ \
538 { ADDR_LOWROM, ADDR_LOWROM+0x3fff, MWA_ROM }, \
539 { 0x8000, 0xbfff, MWA_ROM }, \
540 { 0xf000, 0xffff, MWA_ROM }, \
541 { -1 } /* end of table */ \
542 };
543
544 #define UNUSED 0x4000
545 /* LOWROM INPUT UNK1 UNK2 */
546 MCU_MEMORY( hopmappy, UNUSED, 0x2000, 0x8000, 0x8800 )
547 MCU_MEMORY( skykiddx, UNUSED, 0x2000, 0x8000, 0x8800 )
548 MCU_MEMORY( roishtar, 0x0000, 0x6000, 0x8000, 0x9800 )
549 MCU_MEMORY( genpeitd, 0x4000, 0x2800, 0xa000, 0xa800 )
550 MCU_MEMORY( rthunder, 0x4000, 0x2000, 0xb000, 0xb800 )
551 MCU_MEMORY( wndrmomo, 0x4000, 0x3800, 0xc000, 0xc800 )
552 #undef UNUSED
553
554
555 static struct IOReadPort mcu_readport[] =
556 {
557 { HD63701_PORT1, HD63701_PORT1, input_port_4_r },
558 { -1 } /* end of table */
559 };
560
561 static struct IOWritePort mcu_writeport[] =
562 {
563 { HD63701_PORT1, HD63701_PORT1, namcos86_coin_w },
564 { HD63701_PORT2, HD63701_PORT2, namcos86_led_w },
565 { -1 } /* end of table */
566 };
567
568
569 /*******************************************************************/
570
571 INPUT_PORTS_START( hopmappy )
572 PORT_START
573 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 2 */
574 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 2 player 1 */
575 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
576 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
577 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
578 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
579 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
580 PORT_BITX( 0x80, 0x80, IPT_SERVICE, "Service Switch", KEYCODE_F1, IP_JOY_NONE )
581
582 PORT_START
583 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 1 */
584 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 2 player 2 */
585 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
586 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
587 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
588 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
589 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
590 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
591
592 PORT_START /* DSWA */
593 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_B ) )
594 PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) )
595 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
596 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
597 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
598 PORT_DIPNAME( 0x04, 0x00, "Allow Continue" )
599 PORT_DIPSETTING( 0x04, DEF_STR( No ) )
600 PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
601 PORT_DIPNAME( 0x18, 0x00, DEF_STR( Lives ) )
602 PORT_DIPSETTING( 0x08, "1" )
603 PORT_DIPSETTING( 0x10, "2" )
604 PORT_DIPSETTING( 0x00, "3" )
605 PORT_DIPSETTING( 0x18, "5" )
606 PORT_DIPNAME( 0x60, 0x00, DEF_STR( Coin_A ) )
607 PORT_DIPSETTING( 0x60, DEF_STR( 3C_1C ) )
608 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
609 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
610 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
611 PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
612
613 PORT_START /* DSWB */
614 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
615 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
616 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
617 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
618 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
619 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
620 PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
621 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
622 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
623 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
624 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
625 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
626 PORT_BITX( 0x10, 0x00, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Level Select", IP_KEY_NONE, IP_JOY_NONE )
627 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
628 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
629 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Flip_Screen ) )
630 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
631 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
632 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) )
633 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
634 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
635 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Difficulty ) )
636 PORT_DIPSETTING( 0x00, "Easy" )
637 PORT_DIPSETTING( 0x80, "Hard" )
638
639 PORT_START
640 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */
641 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 1 */
642 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 2 */
643 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
644 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
645 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
646 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
647 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
648 INPUT_PORTS_END
649
650 INPUT_PORTS_START( skykiddx )
651 PORT_START
652 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 2 */
653 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
654 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
655 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
656 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
657 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
658 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
659 PORT_BITX( 0x80, 0x80, IPT_SERVICE, "Service Switch", KEYCODE_F1, IP_JOY_NONE )
660
661 PORT_START
662 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 1 */
663 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
664 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
665 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
666 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
667 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
668 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
669 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
670
671 PORT_START /* DSWA */
672 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_B ) )
673 PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) )
674 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
675 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
676 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
677 PORT_DIPNAME( 0x04, 0x00, "Freeze" )
678 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
679 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
680 PORT_BITX( 0x08, 0x00, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Level Select", IP_KEY_NONE, IP_JOY_NONE )
681 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
682 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
683 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
684 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
685 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
686 PORT_DIPNAME( 0x60, 0x00, DEF_STR( Coin_A ) )
687 PORT_DIPSETTING( 0x60, DEF_STR( 3C_1C ) )
688 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
689 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
690 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
691 PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
692
693 PORT_START /* DSWB */
694 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Flip_Screen ) )
695 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
696 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
697 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
698 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
699 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
700 PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
701 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
702 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
703 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
704 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
705 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
706 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
707 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
708 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
709 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) )
710 PORT_DIPSETTING( 0x20, "20000 80000" )
711 PORT_DIPSETTING( 0x00, "30000 90000" )
712 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Lives ) )
713 PORT_DIPSETTING( 0x40, "1" )
714 PORT_DIPSETTING( 0x80, "2" )
715 PORT_DIPSETTING( 0x00, "3" )
716 PORT_DIPSETTING( 0xc0, "5" )
717
718 PORT_START
719 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */
720 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 1 */
721 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 2 */
722 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
723 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
724 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
725 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
726 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
727 INPUT_PORTS_END
728
729 INPUT_PORTS_START( roishtar )
730 PORT_START
731 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 2 */
732 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON6 )
733 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN | IPF_8WAY )
734 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN | IPF_8WAY )
735 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT | IPF_8WAY )
736 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
737 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
738 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
739
740 PORT_START
741 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 1 */
742 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
743 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP | IPF_8WAY )
744 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_UP | IPF_8WAY )
745 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
746 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
747 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
748 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
749
750 PORT_START /* DSWA */
751 PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_A ) )
752 PORT_DIPSETTING( 0x07, DEF_STR( 3C_1C ) )
753 PORT_DIPSETTING( 0x05, DEF_STR( 2C_1C ) )
754 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
755 PORT_DIPSETTING( 0x06, DEF_STR( 2C_3C ) )
756 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
757 PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) )
758 PORT_DIPSETTING( 0x03, DEF_STR( 1C_5C ) )
759 PORT_DIPSETTING( 0x04, DEF_STR( 1C_6C ) )
760 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
761 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
762 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
763 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
764 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
765 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
766 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
767 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
768 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
769 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) )
770 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
771 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
772 PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
773
774 PORT_START /* DSWB */
775 PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_B ) )
776 PORT_DIPSETTING( 0x07, DEF_STR( 3C_1C ) )
777 PORT_DIPSETTING( 0x05, DEF_STR( 2C_1C ) )
778 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
779 PORT_DIPSETTING( 0x06, DEF_STR( 2C_3C ) )
780 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
781 PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) )
782 PORT_DIPSETTING( 0x03, DEF_STR( 1C_5C ) )
783 PORT_DIPSETTING( 0x04, DEF_STR( 1C_6C ) )
784 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
785 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
786 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
787 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
788 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
789 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
790 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
791 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
792 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
793 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) )
794 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
795 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
796 PORT_DIPNAME( 0x80, 0x00, "Freeze" )
797 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
798 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
799
800 PORT_START
801 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */
802 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 1 */
803 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 2 */
804 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 )
805 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT | IPF_8WAY )
806 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT | IPF_8WAY )
807 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
808 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT | IPF_8WAY )
809 INPUT_PORTS_END
810
811 INPUT_PORTS_START( genpeitd )
812 PORT_START
813 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 2 */
814 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
815 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
816 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
817 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
818 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
819 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
820 PORT_BITX( 0x80, 0x80, IPT_SERVICE, "Service Switch", KEYCODE_F1, IP_JOY_NONE )
821
822 PORT_START
823 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 1 */
824 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
825 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
826 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
827 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
828 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
829 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
830 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
831
832 PORT_START /* DSWA */
833 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_B ) )
834 PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) )
835 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
836 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
837 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
838 PORT_DIPNAME( 0x04, 0x00, "Freeze" )
839 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
840 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
841 PORT_DIPNAME( 0x08, 0x00, "Allow Continue" )
842 PORT_DIPSETTING( 0x08, DEF_STR( No ) )
843 PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
844 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
845 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
846 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
847 PORT_DIPNAME( 0x60, 0x00, DEF_STR( Coin_A ) )
848 PORT_DIPSETTING( 0x60, DEF_STR( 3C_1C ) )
849 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
850 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
851 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
852 PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
853
854 PORT_START /* DSWB */
855 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
856 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
857 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
858 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Cabinet ) )
859 PORT_DIPSETTING( 0x02, DEF_STR( Upright ) )
860 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
861 PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
862 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
863 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
864 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
865 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
866 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
867 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Difficulty ) )
868 PORT_DIPSETTING( 0x10, "Easy" )
869 PORT_DIPSETTING( 0x00, "Normal" )
870 PORT_DIPSETTING( 0x20, "Hard" )
871 PORT_DIPSETTING( 0x30, "Hardest" )
872 PORT_DIPNAME( 0xc0, 0x00, "Candle" )
873 PORT_DIPSETTING( 0x40, "40" )
874 PORT_DIPSETTING( 0x00, "50" )
875 PORT_DIPSETTING( 0x80, "60" )
876 PORT_DIPSETTING( 0xc0, "70" )
877
878 PORT_START
879 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */
880 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 1 */
881 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 2 */
882 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
883 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
884 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
885 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
886 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
887 INPUT_PORTS_END
888
889 INPUT_PORTS_START( rthunder )
890 PORT_START
891 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 2 */
892 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
893 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
894 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_PLAYER2 )
895 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_PLAYER2 )
896 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
897 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
898 PORT_BITX( 0x80, 0x80, IPT_SERVICE, "Service Switch", KEYCODE_F1, IP_JOY_NONE )
899
900 PORT_START
901 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 1 */
902 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
903 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
904 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_PLAYER2 )
905 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
906 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
907 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
908 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
909
910 PORT_START /* DSWA */
911 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_B ) )
912 PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) )
913 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
914 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
915 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
916 PORT_DIPNAME( 0x04, 0x00, "Freeze" )
917 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
918 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
919 PORT_BITX( 0x08, 0x00, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
920 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
921 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
922 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
923 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
924 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
925 PORT_DIPNAME( 0x60, 0x00, DEF_STR( Coin_A ) )
926 PORT_DIPSETTING( 0x60, DEF_STR( 3C_1C ) )
927 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
928 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
929 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
930 PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
931
932 PORT_START /* DSWB */
933 PORT_DIPNAME( 0x01, 0x00, "Continues" )
934 PORT_DIPSETTING( 0x01, "3" )
935 PORT_DIPSETTING( 0x00, "6" )
936 PORT_DIPNAME( 0x06, 0x00, DEF_STR( Cabinet ) )
937 PORT_DIPSETTING( 0x00, "Upright 1 Player" )
938 /* PORT_DIPSETTING( 0x04, "Upright 1 Player" ) */
939 PORT_DIPSETTING( 0x02, "Upright 2 Players" )
940 PORT_DIPSETTING( 0x06, DEF_STR( Cocktail ) )
941 PORT_DIPNAME( 0x08, 0x08, "Level Select" )
942 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
943 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
944 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Difficulty ) )
945 PORT_DIPSETTING( 0x00, "Normal" )
946 PORT_DIPSETTING( 0x10, "Easy" )
947 PORT_DIPNAME( 0x20, 0x20, "Timer value" )
948 PORT_DIPSETTING( 0x00, "120 secs" )
949 PORT_DIPSETTING( 0x20, "150 secs" )
950 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Bonus_Life ) )
951 PORT_DIPSETTING( 0x00, "70k, 200k" )
952 PORT_DIPSETTING( 0x40, "100k, 300k" )
953 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Lives ) )
954 PORT_DIPSETTING( 0x00, "3" )
955 PORT_DIPSETTING( 0x80, "5" )
956
957 PORT_START
958 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */
959 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 1 */
960 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 2 */
961 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
962 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
963 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
964 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
965 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_PLAYER2 )
966 INPUT_PORTS_END
967
968 INPUT_PORTS_START( rthundro )
969 PORT_START
970 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 2 */
971 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
972 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
973 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_PLAYER2 )
974 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_PLAYER2 )
975 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
976 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
977 PORT_BITX( 0x80, 0x80, IPT_SERVICE, "Service Switch", KEYCODE_F1, IP_JOY_NONE )
978
979 PORT_START
980 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 1 */
981 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
982 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
983 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_PLAYER2 )
984 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
985 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
986 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
987 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
988
989 PORT_START /* DSWA */
990 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_B ) )
991 PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) )
992 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
993 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
994 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
995 PORT_DIPNAME( 0x04, 0x00, "Freeze" )
996 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
997 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
998 PORT_BITX( 0x08, 0x00, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
999 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1000 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1001 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
1002 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1003 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1004 PORT_DIPNAME( 0x60, 0x00, DEF_STR( Coin_A ) )
1005 PORT_DIPSETTING( 0x60, DEF_STR( 3C_1C ) )
1006 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
1007 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1008 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
1009 PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
1010
1011 PORT_START /* DSWB */
1012 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
1013 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1014 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1015 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Cabinet ) )
1016 PORT_DIPSETTING( 0x02, DEF_STR( Upright ) )
1017 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
1018 PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
1019 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1020 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1021 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
1022 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1023 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1024 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
1025 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1026 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1027 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
1028 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1029 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1030 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Lives ) )
1031 PORT_DIPSETTING( 0x40, "1" )
1032 PORT_DIPSETTING( 0x80, "2" )
1033 PORT_DIPSETTING( 0x00, "3" )
1034 PORT_DIPSETTING( 0xc0, "5" )
1035
1036 PORT_START
1037 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */
1038 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 1 */
1039 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 2 */
1040 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
1041 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
1042 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
1043 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1044 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_PLAYER2 )
1045 INPUT_PORTS_END
1046
1047 INPUT_PORTS_START( wndrmomo )
1048 PORT_START
1049 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 2 */
1050 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
1051 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
1052 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_PLAYER2 )
1053 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_PLAYER2 )
1054 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
1055 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
1056 PORT_BITX( 0x80, 0x80, IPT_SERVICE, "Service Switch", KEYCODE_F1, IP_JOY_NONE )
1057
1058 PORT_START
1059 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* button 3 player 1 */
1060 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1061 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
1062 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_PLAYER2 )
1063 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
1064 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
1065 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
1066 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
1067
1068 PORT_START /* DSWA */
1069 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_B ) )
1070 PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) )
1071 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
1072 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1073 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
1074 PORT_DIPNAME( 0x04, 0x00, "Freeze" )
1075 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1076 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1077 PORT_DIPNAME( 0x08, 0x08, "Level Select" )
1078 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1079 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1080 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
1081 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
1082 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1083 PORT_DIPNAME( 0x60, 0x00, DEF_STR( Coin_A ) )
1084 PORT_DIPSETTING( 0x60, DEF_STR( 3C_1C ) )
1085 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
1086 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1087 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
1088 PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
1089
1090 PORT_START /* DSWB */
1091 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
1092 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1093 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1094 PORT_DIPNAME( 0x06, 0x00, DEF_STR( Cabinet ) )
1095 PORT_DIPSETTING( 0x00, "Type A" )
1096 PORT_DIPSETTING( 0x02, "Type B" )
1097 PORT_DIPSETTING( 0x04, "Type C" )
1098 // PORT_DIPSETTING( 0x06, "Type A" )
1099 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
1100 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1101 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1102 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
1103 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1104 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1105 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
1106 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1107 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1108 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
1109 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1110 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1111 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
1112 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1113 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1114
1115 PORT_START
1116 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */
1117 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 1 */
1118 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin counter 2 */
1119 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
1120 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
1121 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
1122 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1123 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_PLAYER2 )
1124 INPUT_PORTS_END
1125
1126
1127 /*******************************************************************/
1128
1129 #define TILELAYOUT(NUM) static struct GfxLayout tilelayout_##NUM = \
1130 { \
1131 8,8, /* 8*8 characters */ \
1132 NUM, /* NUM characters */ \
1133 3, /* 3 bits per pixel */ \
1134 { 2*NUM*8*8, NUM*8*8, 0 }, \
1135 { 0, 1, 2, 3, 4, 5, 6, 7 }, \
1136 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, \
1137 8*8 /* every char takes 8 consecutive bytes */ \
1138 }
1139
1140 TILELAYOUT(1024);
1141 TILELAYOUT(2048);
1142 TILELAYOUT(4096);
1143
1144 #define SPRITELAYOUT(NUM) static struct GfxLayout spritelayout_##NUM = \
1145 { \
1146 16,16, /* 16*16 sprites */ \
1147 NUM, /* NUM sprites */ \
1148 4, /* 4 bitss per pixel */ \
1149 { 0, 1, 2, 3 }, \
1150 { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4, \
1151 8*4, 9*4, 10*4, 11*4, 12*4, 13*4, 14*4, 15*4 }, \
1152 { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, \
1153 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 }, \
1154 16*64 \
1155 }
1156
1157 SPRITELAYOUT(256);
1158 SPRITELAYOUT(512);
1159 SPRITELAYOUT(1024);
1160
1161
1162 #define GFXDECODE(CHAR1,CHAR2,SPRITE) \
1163 static struct GfxDecodeInfo gfxdecodeinfo_##CHAR1##_##CHAR2##_##SPRITE[] = \
1164 { \
1165 { REGION_GFX1, 0x00000, &tilelayout_##CHAR1, 2048*0, 256 }, \
1166 { REGION_GFX2, 0x00000, &tilelayout_##CHAR2, 2048*0, 256 }, \
1167 { REGION_GFX3, 0*128*SPRITE, &spritelayout_##SPRITE, 2048*1, 128 }, \
1168 { REGION_GFX3, 1*128*SPRITE, &spritelayout_##SPRITE, 2048*1, 128 }, \
1169 { REGION_GFX3, 2*128*SPRITE, &spritelayout_##SPRITE, 2048*1, 128 }, \
1170 { REGION_GFX3, 3*128*SPRITE, &spritelayout_##SPRITE, 2048*1, 128 }, \
1171 { REGION_GFX3, 4*128*SPRITE, &spritelayout_##SPRITE, 2048*1, 128 }, \
1172 { REGION_GFX3, 5*128*SPRITE, &spritelayout_##SPRITE, 2048*1, 128 }, \
1173 { REGION_GFX3, 6*128*SPRITE, &spritelayout_##SPRITE, 2048*1, 128 }, \
1174 { REGION_GFX3, 7*128*SPRITE, &spritelayout_##SPRITE, 2048*1, 128 }, \
1175 { -1 } \
1176 };
1177
1178 GFXDECODE(1024,1024, 256)
1179 GFXDECODE(2048,2048, 256)
1180 GFXDECODE(2048,2048, 512)
1181 GFXDECODE(4096,2048, 512)
1182 GFXDECODE(4096,2048,1024)
1183
1184 /*******************************************************************/
1185
1186 static struct YM2151interface ym2151_interface =
1187 {
1188 1, /* 1 chip */
1189 3579580, /* 3.579580 MHz ? */
1190 { YM3012_VOL(0,MIXER_PAN_CENTER,60,MIXER_PAN_CENTER) }, /* only right channel is connected */
1191 { 0 },
1192 { 0 }
1193 };
1194
1195 static struct namco_interface namco_interface =
1196 {
1197 49152000/2048, /* 24000Hz */
1198 8, /* number of voices */
1199 50, /* playback volume */
1200 -1, /* memory region */
1201 0 /* stereo */
1202 };
1203
1204 static struct Samplesinterface samples_interface =
1205 {
1206 2, /* 2 channels for voice effects */
1207 40 /* volume */
1208 };
1209
1210 static struct CustomSound_interface custom_interface =
1211 {
1212 rt_decode_sample,
1213 0,
1214 0
1215 };
1216
1217
namco86_init_machine(void)1218 static void namco86_init_machine( void )
1219 {
1220 unsigned char *base = memory_region(REGION_CPU1) + 0x10000;
1221
1222 cpu_setbank(1,base);
1223
1224 int_enabled[0] = int_enabled[1] = 1;
1225 }
1226
1227
1228 #define MACHINE_DRIVER(NAME,GFX) \
1229 static struct MachineDriver machine_driver_##NAME = \
1230 { \
1231 { \
1232 { \
1233 CPU_M6809, \
1234 6000000/4, /* ? */ \
1235 /*49152000/32, rthunder doesn't work with this */ \
1236 readmem1,writemem1,0,0, \
1237 namco86_interrupt1,1 \
1238 }, \
1239 { \
1240 CPU_M6809, \
1241 49152000/32, /* ? */ \
1242 NAME##_readmem2,NAME##_writemem2,0,0, \
1243 namco86_interrupt2,1 \
1244 }, \
1245 { \
1246 CPU_HD63701, /* or compatible 6808 with extra instructions */ \
1247 49152000/32, /* ? */ \
1248 NAME##_mcu_readmem,NAME##_mcu_writemem,mcu_readport,mcu_writeport, \
1249 interrupt, 1 /* ??? */ \
1250 } \
1251 }, \
1252 60, DEFAULT_60HZ_VBLANK_DURATION, \
1253 100, /* cpu slices */ \
1254 namco86_init_machine, /* init machine */ \
1255 \
1256 /* video hardware */ \
1257 36*8, 28*8, { 0*8, 36*8-1, 0*8, 28*8-1 }, \
1258 gfxdecodeinfo_##GFX, \
1259 512,4096, \
1260 namcos86_vh_convert_color_prom, \
1261 \
1262 VIDEO_TYPE_RASTER, \
1263 0, \
1264 namcos86_vh_start, \
1265 0, \
1266 namcos86_vh_screenrefresh, \
1267 \
1268 /* sound hardware */ \
1269 0,0,0,0, \
1270 { \
1271 { \
1272 SOUND_YM2151, \
1273 &ym2151_interface \
1274 }, \
1275 { \
1276 SOUND_NAMCO, \
1277 &namco_interface \
1278 }, \
1279 { \
1280 SOUND_SAMPLES, \
1281 &samples_interface \
1282 }, \
1283 { \
1284 SOUND_CUSTOM, /* actually initializes the samples */ \
1285 &custom_interface \
1286 } \
1287 } \
1288 };
1289
1290
1291 MACHINE_DRIVER( hopmappy, 1024_1024_256 )
1292 MACHINE_DRIVER( skykiddx, 2048_2048_256 )
1293 MACHINE_DRIVER( roishtar, 1024_1024_256 )
1294 MACHINE_DRIVER( genpeitd, 4096_2048_1024 )
1295 MACHINE_DRIVER( rthunder, 4096_2048_512 )
1296 MACHINE_DRIVER( wndrmomo, 2048_2048_512 )
1297
1298
1299 /***************************************************************************
1300
1301 Game driver(s)
1302
1303 ***************************************************************************/
1304
ROM_START(hopmappy)1305 ROM_START( hopmappy )
1306 ROM_REGION( 0x18000, REGION_CPU1 )
1307 ROM_LOAD( "hm1", 0x08000, 0x8000, 0x1a83914e )
1308 /* 9d empty */
1309
1310 /* the CPU1 ROM expansion board is not present in this game */
1311
1312 ROM_REGION( 0x18000, REGION_CPU2 )
1313 ROM_LOAD( "hm2", 0xc000, 0x4000, 0xc46cda65 )
1314 /* 12d empty */
1315
1316 ROM_REGION( 0x06000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1317 ROM_LOAD( "hm6", 0x00000, 0x04000, 0xfd0e8887 ) /* plane 1,2 */
1318 /* no plane 3 */
1319
1320 ROM_REGION( 0x06000, REGION_GFX2 | REGIONFLAG_DISPOSE )
1321 ROM_LOAD( "hm5", 0x00000, 0x04000, 0x9c4f31ae ) /* plane 1,2 */
1322 /* no plane 3 */
1323
1324 ROM_REGION( 0x40000, REGION_GFX3 | REGIONFLAG_DISPOSE )
1325 ROM_LOAD( "hm4", 0x00000, 0x8000, 0x78719c52 )
1326 /* 12k/l/m/p/r/t/u empty */
1327
1328 ROM_REGION( 0x1420, REGION_PROMS )
1329 ROM_LOAD( "hm11.bpr", 0x0000, 0x0200, 0xcc801088 ) /* red & green components */
1330 ROM_LOAD( "hm12.bpr", 0x0200, 0x0200, 0xa1cb71c5 ) /* blue component */
1331 ROM_LOAD( "hm13.bpr", 0x0400, 0x0800, 0xe362d613 ) /* tiles colortable */
1332 ROM_LOAD( "hm14.bpr", 0x0c00, 0x0800, 0x678252b4 ) /* sprites colortable */
1333 ROM_LOAD( "hm15.bpr", 0x1400, 0x0020, 0x475bf500 ) /* tile address decoder (used at runtime) */
1334
1335 ROM_REGION( 0x10000, REGION_CPU3 )
1336 ROM_LOAD( "hm3", 0x08000, 0x2000, 0x6496e1db )
1337 ROM_LOAD( "pl1-mcu.bin", 0x0f000, 0x1000, 0x6ef08fb3 )
1338
1339 /* the PCM expansion board is not present in this game */
1340 ROM_END
1341
1342 ROM_START( skykiddx )
1343 ROM_REGION( 0x18000, REGION_CPU1 )
1344 ROM_LOAD( "sk3_1b.9c", 0x08000, 0x8000, 0x767b3514 )
1345 ROM_LOAD( "sk3_2.9d", 0x10000, 0x8000, 0x74b8f8e2 )
1346
1347 /* the CPU1 ROM expansion board is not present in this game */
1348
1349 ROM_REGION( 0x18000, REGION_CPU2 )
1350 ROM_LOAD( "sk3_3.12c", 0x8000, 0x8000, 0x6d1084c4 )
1351 /* 12d empty */
1352
1353 ROM_REGION( 0x0c000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1354 ROM_LOAD( "sk3_9.7r", 0x00000, 0x08000, 0x48675b17 ) /* plane 1,2 */
1355 ROM_LOAD( "sk3_10.7s", 0x08000, 0x04000, 0x7418465a ) /* plane 3 */
1356
1357 ROM_REGION( 0x0c000, REGION_GFX2 | REGIONFLAG_DISPOSE )
1358 ROM_LOAD( "sk3_7.4r", 0x00000, 0x08000, 0x4036b735 ) /* plane 1,2 */
1359 ROM_LOAD( "sk3_8.4s", 0x08000, 0x04000, 0x044bfd21 ) /* plane 3 */
1360
1361 ROM_REGION( 0x40000, REGION_GFX3 | REGIONFLAG_DISPOSE )
1362 ROM_LOAD( "sk3_5.12h", 0x00000, 0x8000, 0x5c7d4399 )
1363 ROM_LOAD( "sk3_6.12k", 0x08000, 0x8000, 0xc908a3b2 )
1364 /* 12l/m/p/r/t/u empty */
1365
1366 ROM_REGION( 0x1420, REGION_PROMS )
1367 ROM_LOAD( "sk3-1.3r", 0x0000, 0x0200, 0x9e81dedd ) /* red & green components */
1368 ROM_LOAD( "sk3-2.3s", 0x0200, 0x0200, 0xcbfec4dd ) /* blue component */
1369 ROM_LOAD( "sk3-3.4v", 0x0400, 0x0800, 0x81714109 ) /* tiles colortable */
1370 ROM_LOAD( "sk3-4.5v", 0x0c00, 0x0800, 0x1bf25acc ) /* sprites colortable */
1371 ROM_LOAD( "sk3-5.6u", 0x1400, 0x0020, 0xe4130804 ) /* tile address decoder (used at runtime) */
1372
1373 ROM_REGION( 0x10000, REGION_CPU3 )
1374 ROM_LOAD( "sk3_4.6b", 0x08000, 0x4000, 0xe6cae2d6 )
1375 ROM_LOAD( "rt1-mcu.bin", 0x0f000, 0x1000, 0x6ef08fb3 )
1376
1377 /* the PCM expansion board is not present in this game */
1378 ROM_END
1379
1380 ROM_START( skykiddo )
1381 ROM_REGION( 0x18000, REGION_CPU1 )
1382 ROM_LOAD( "sk3-1.9c", 0x08000, 0x8000, 0x5722a291 )
1383 ROM_LOAD( "sk3_2.9d", 0x10000, 0x8000, 0x74b8f8e2 )
1384
1385 /* the CPU1 ROM expansion board is not present in this game */
1386
1387 ROM_REGION( 0x18000, REGION_CPU2 )
1388 ROM_LOAD( "sk3_3.12c", 0x8000, 0x8000, 0x6d1084c4 )
1389 /* 12d empty */
1390
1391 ROM_REGION( 0x0c000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1392 ROM_LOAD( "sk3_9.7r", 0x00000, 0x08000, 0x48675b17 ) /* plane 1,2 */
1393 ROM_LOAD( "sk3_10.7s", 0x08000, 0x04000, 0x7418465a ) /* plane 3 */
1394
1395 ROM_REGION( 0x0c000, REGION_GFX2 | REGIONFLAG_DISPOSE )
1396 ROM_LOAD( "sk3_7.4r", 0x00000, 0x08000, 0x4036b735 ) /* plane 1,2 */
1397 ROM_LOAD( "sk3_8.4s", 0x08000, 0x04000, 0x044bfd21 ) /* plane 3 */
1398
1399 ROM_REGION( 0x40000, REGION_GFX3 | REGIONFLAG_DISPOSE )
1400 ROM_LOAD( "sk3_5.12h", 0x00000, 0x8000, 0x5c7d4399 )
1401 ROM_LOAD( "sk3_6.12k", 0x08000, 0x8000, 0xc908a3b2 )
1402 /* 12l/m/p/r/t/u empty */
1403
1404 ROM_REGION( 0x1420, REGION_PROMS )
1405 ROM_LOAD( "sk3-1.3r", 0x0000, 0x0200, 0x9e81dedd ) /* red & green components */
1406 ROM_LOAD( "sk3-2.3s", 0x0200, 0x0200, 0xcbfec4dd ) /* blue component */
1407 ROM_LOAD( "sk3-3.4v", 0x0400, 0x0800, 0x81714109 ) /* tiles colortable */
1408 ROM_LOAD( "sk3-4.5v", 0x0c00, 0x0800, 0x1bf25acc ) /* sprites colortable */
1409 ROM_LOAD( "sk3-5.6u", 0x1400, 0x0020, 0xe4130804 ) /* tile address decoder (used at runtime) */
1410
1411 ROM_REGION( 0x10000, REGION_CPU3 )
1412 ROM_LOAD( "sk3_4.6b", 0x08000, 0x4000, 0xe6cae2d6 )
1413 ROM_LOAD( "rt1-mcu.bin", 0x0f000, 0x1000, 0x6ef08fb3 )
1414
1415 /* the PCM expansion board is not present in this game */
1416 ROM_END
1417
1418 ROM_START( roishtar )
1419 ROM_REGION( 0x18000, REGION_CPU1 )
1420 ROM_LOAD( "ri1-1c.9c", 0x08000, 0x8000, 0x14acbacb )
1421 ROM_LOAD( "ri1-2.9d", 0x14000, 0x2000, 0xfcd58d91 )
1422
1423 /* the CPU1 ROM expansion board is not present in this game */
1424
1425 ROM_REGION( 0x18000, REGION_CPU2 )
1426 ROM_LOAD( "ri1-3.12c", 0x8000, 0x8000, 0xa39829f7 )
1427 /* 12d empty */
1428
1429 ROM_REGION( 0x06000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1430 ROM_LOAD( "ri1-14.7r", 0x00000, 0x04000, 0xde8154b4 ) /* plane 1,2 */
1431 ROM_LOAD( "ri1-15.7s", 0x04000, 0x02000, 0x4298822b ) /* plane 3 */
1432
1433 ROM_REGION( 0x06000, REGION_GFX2 | REGIONFLAG_DISPOSE )
1434 ROM_LOAD( "ri1-12.4r", 0x00000, 0x04000, 0x557e54d3 ) /* plane 1,2 */
1435 ROM_LOAD( "ri1-13.4s", 0x04000, 0x02000, 0x9ebe8e32 ) /* plane 3 */
1436
1437 ROM_REGION( 0x40000, REGION_GFX3 | REGIONFLAG_DISPOSE )
1438 ROM_LOAD( "ri1-5.12h", 0x00000, 0x8000, 0x46b59239 )
1439 ROM_LOAD( "ri1-6.12k", 0x08000, 0x8000, 0x94d9ef48 )
1440 ROM_LOAD( "ri1-7.12l", 0x10000, 0x8000, 0xda802b59 )
1441 ROM_LOAD( "ri1-8.12m", 0x18000, 0x8000, 0x16b88b74 )
1442 ROM_LOAD( "ri1-9.12p", 0x20000, 0x8000, 0xf3de3c2a )
1443 ROM_LOAD( "ri1-10.12r", 0x28000, 0x8000, 0x6dacc70d )
1444 ROM_LOAD( "ri1-11.12t", 0x30000, 0x8000, 0xfb6bc533 )
1445 /* 12u empty */
1446
1447 ROM_REGION( 0x1420, REGION_PROMS )
1448 ROM_LOAD( "ri1-1.3r", 0x0000, 0x0200, 0x29cd0400 ) /* red & green components */
1449 ROM_LOAD( "ri1-2.3s", 0x0200, 0x0200, 0x02fd278d ) /* blue component */
1450 ROM_LOAD( "ri1-3.4v", 0x0400, 0x0800, 0xcbd7e53f ) /* tiles colortable */
1451 ROM_LOAD( "ri1-4.5v", 0x0c00, 0x0800, 0x22921617 ) /* sprites colortable */
1452 ROM_LOAD( "ri1-5.6u", 0x1400, 0x0020, 0xe2188075 ) /* tile address decoder (used at runtime) */
1453
1454 ROM_REGION( 0x10000, REGION_CPU3 )
1455 ROM_LOAD( "ri1-4.6b", 0x00000, 0x4000, 0x552172b8 )
1456 ROM_CONTINUE( 0x08000, 0x4000 )
1457 ROM_LOAD( "rt1-mcu.bin", 0x0f000, 0x1000, 0x6ef08fb3 )
1458
1459 /* the PCM expansion board is not present in this game */
1460 ROM_END
1461
1462 ROM_START( genpeitd )
1463 ROM_REGION( 0x18000, REGION_CPU1 )
1464 ROM_LOAD( "gt1-1b.9c", 0x08000, 0x8000, 0x75396194 )
1465 /* 9d empty */
1466
1467 ROM_REGION( 0x40000, REGION_USER1 ) /* bank switched data for CPU1 */
1468 ROM_LOAD( "gt1-10b.f1", 0x00000, 0x10000, 0x5721ad0d )
1469 /* h1 empty */
1470 /* k1 empty */
1471 /* m1 empty */
1472
1473 ROM_REGION( 0x18000, REGION_CPU2 )
1474 ROM_LOAD( "gt1-2.12c", 0xc000, 0x4000, 0x302f2cb6 )
1475 /* 12d empty */
1476
1477 ROM_REGION( 0x18000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1478 ROM_LOAD( "gt1-7.7r", 0x00000, 0x10000, 0xea77a211 ) /* plane 1,2 */
1479 ROM_LOAD( "gt1-6.7s", 0x10000, 0x08000, 0x1b128a2e ) /* plane 3 */
1480
1481 ROM_REGION( 0x0c000, REGION_GFX2 | REGIONFLAG_DISPOSE )
1482 ROM_LOAD( "gt1-5.4r", 0x00000, 0x08000, 0x44d58b06 ) /* plane 1,2 */
1483 ROM_LOAD( "gt1-4.4s", 0x08000, 0x04000, 0xdb8d45b0 ) /* plane 3 */
1484
1485 ROM_REGION( 0x100000, REGION_GFX3 | REGIONFLAG_DISPOSE )
1486 ROM_LOAD( "gt1-11.12h", 0x00000, 0x20000, 0x3181a5fe )
1487 ROM_LOAD( "gt1-12.12k", 0x20000, 0x20000, 0x76b729ab )
1488 ROM_LOAD( "gt1-13.12l", 0x40000, 0x20000, 0xe332a36e )
1489 ROM_LOAD( "gt1-14.12m", 0x60000, 0x20000, 0xe5ffaef5 )
1490 ROM_LOAD( "gt1-15.12p", 0x80000, 0x20000, 0x198b6878 )
1491 ROM_LOAD( "gt1-16.12r", 0xa0000, 0x20000, 0x801e29c7 )
1492 ROM_LOAD( "gt1-8.12t", 0xc0000, 0x10000, 0xad7bc770 )
1493 ROM_LOAD( "gt1-9.12u", 0xe0000, 0x10000, 0xd95a5fd7 )
1494
1495 ROM_REGION( 0x1420, REGION_PROMS )
1496 ROM_LOAD( "gt1-1.3r", 0x0000, 0x0200, 0x2f0ddddb ) /* red & green components */
1497 ROM_LOAD( "gt1-2.3s", 0x0200, 0x0200, 0x87d27025 ) /* blue component */
1498 ROM_LOAD( "gt1-3.4v", 0x0400, 0x0800, 0xc178de99 ) /* tiles colortable */
1499 ROM_LOAD( "gt1-4.5v", 0x0c00, 0x0800, 0x9f48ef17 ) /* sprites colortable */
1500 ROM_LOAD( "gt1-5.6u", 0x1400, 0x0020, 0xe4130804 ) /* tile address decoder (used at runtime) */
1501
1502 ROM_REGION( 0x10000, REGION_CPU3 )
1503 ROM_LOAD( "gt1-3.6b", 0x04000, 0x8000, 0x315cd988 )
1504 ROM_LOAD( "rt1-mcu.bin", 0x0f000, 0x1000, 0x6ef08fb3 )
1505
1506 ROM_REGION( 0x80000, REGION_SOUND1 ) /* PCM samples for Hitachi CPU */
1507 ROM_LOAD( "gt1-17.f3", 0x00000, 0x20000, 0x26181ff8 )
1508 ROM_LOAD( "gt1-18.h3", 0x20000, 0x20000, 0x7ef9e5ea )
1509 ROM_LOAD( "gt1-19.k3", 0x40000, 0x20000, 0x38e11f6c )
1510 /* m3 empty */
1511 ROM_END
1512
1513 ROM_START( rthunder )
1514 ROM_REGION( 0x18000, REGION_CPU1 )
1515 ROM_LOAD( "rt3-1b.9c", 0x8000, 0x8000, 0x7d252a1b )
1516 /* 9d empty */
1517
1518 ROM_REGION( 0x40000, REGION_USER1 ) /* bank switched data for CPU1 */
1519 ROM_LOAD( "rt1-17.f1", 0x00000, 0x10000, 0x766af455 )
1520 ROM_LOAD( "rt1-18.h1", 0x10000, 0x10000, 0x3f9f2f5d )
1521 ROM_LOAD( "rt1-19.k1", 0x20000, 0x10000, 0xc16675e9 )
1522 ROM_LOAD( "rt1-20.m1", 0x30000, 0x10000, 0xc470681b )
1523
1524 ROM_REGION( 0x18000, REGION_CPU2 )
1525 ROM_LOAD( "rt3-2b.12c", 0x08000, 0x8000, 0xa7ea46ee )
1526 ROM_LOAD( "rt3-3.12d", 0x10000, 0x8000, 0xa13f601c )
1527
1528 ROM_REGION( 0x18000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1529 ROM_LOAD( "rt1-7.7r", 0x00000, 0x10000, 0xa85efa39 ) /* plane 1,2 */
1530 ROM_LOAD( "rt1-8.7s", 0x10000, 0x08000, 0xf7a95820 ) /* plane 3 */
1531
1532 ROM_REGION( 0x0c000, REGION_GFX2 | REGIONFLAG_DISPOSE )
1533 ROM_LOAD( "rt1-5.4r", 0x00000, 0x08000, 0xd0fc470b ) /* plane 1,2 */
1534 ROM_LOAD( "rt1-6.4s", 0x08000, 0x04000, 0x6b57edb2 ) /* plane 3 */
1535
1536 ROM_REGION( 0x80000, REGION_GFX3 | REGIONFLAG_DISPOSE )
1537 ROM_LOAD( "rt1-9.12h", 0x00000, 0x10000, 0x8e070561 )
1538 ROM_LOAD( "rt1-10.12k", 0x10000, 0x10000, 0xcb8fb607 )
1539 ROM_LOAD( "rt1-11.12l", 0x20000, 0x10000, 0x2bdf5ed9 )
1540 ROM_LOAD( "rt1-12.12m", 0x30000, 0x10000, 0xe6c6c7dc )
1541 ROM_LOAD( "rt1-13.12p", 0x40000, 0x10000, 0x489686d7 )
1542 ROM_LOAD( "rt1-14.12r", 0x50000, 0x10000, 0x689e56a8 )
1543 ROM_LOAD( "rt1-15.12t", 0x60000, 0x10000, 0x1d8bf2ca )
1544 ROM_LOAD( "rt1-16.12u", 0x70000, 0x10000, 0x1bbcf37b )
1545
1546 ROM_REGION( 0x1420, REGION_PROMS )
1547 ROM_LOAD( "mb7124e.3r", 0x0000, 0x0200, 0x8ef3bb9d ) /* red & green components */
1548 ROM_LOAD( "mb7116e.3s", 0x0200, 0x0200, 0x6510a8f2 ) /* blue component */
1549 ROM_LOAD( "mb7138h.4v", 0x0400, 0x0800, 0x95c7d944 ) /* tiles colortable */
1550 ROM_LOAD( "mb7138h.6v", 0x0c00, 0x0800, 0x1391fec9 ) /* sprites colortable */
1551 ROM_LOAD( "mb7112e.6u", 0x1400, 0x0020, 0xe4130804 ) /* tile address decoder (used at runtime) */
1552
1553 ROM_REGION( 0x10000, REGION_CPU3 )
1554 ROM_LOAD( "rt1-4.6b", 0x04000, 0x8000, 0x00cf293f )
1555 ROM_LOAD( "rt1-mcu.bin", 0x0f000, 0x1000, 0x6ef08fb3 )
1556
1557 ROM_REGION( 0x40000, REGION_SOUND1 ) /* PCM samples for Hitachi CPU */
1558 ROM_LOAD( "rt1-21.f3", 0x00000, 0x10000, 0x454968f3 )
1559 ROM_LOAD( "rt1-22.h3", 0x10000, 0x10000, 0xfe963e72 )
1560 /* k3 empty */
1561 /* m3 empty */
1562 ROM_END
1563
1564 ROM_START( rthundro )
1565 ROM_REGION( 0x18000, REGION_CPU1 )
1566 ROM_LOAD( "r1", 0x8000, 0x8000, 0x6f8c1252 )
1567 /* 9d empty */
1568
1569 ROM_REGION( 0x40000, REGION_USER1 ) /* bank switched data for CPU1 */
1570 ROM_LOAD( "rt1-17.f1", 0x00000, 0x10000, 0x766af455 )
1571 ROM_LOAD( "rt1-18.h1", 0x10000, 0x10000, 0x3f9f2f5d )
1572 ROM_LOAD( "r19", 0x20000, 0x10000, 0xfe9343b0 )
1573 ROM_LOAD( "r20", 0x30000, 0x10000, 0xf8518d4f )
1574
1575 ROM_REGION( 0x18000, REGION_CPU2 )
1576 ROM_LOAD( "r2", 0x08000, 0x8000, 0xf22a03d8 )
1577 ROM_LOAD( "r3", 0x10000, 0x8000, 0xaaa82885 )
1578
1579 ROM_REGION( 0x18000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1580 ROM_LOAD( "rt1-7.7r", 0x00000, 0x10000, 0xa85efa39 ) /* plane 1,2 */
1581 ROM_LOAD( "rt1-8.7s", 0x10000, 0x08000, 0xf7a95820 ) /* plane 3 */
1582
1583 ROM_REGION( 0x0c000, REGION_GFX2 | REGIONFLAG_DISPOSE )
1584 ROM_LOAD( "rt1-5.4r", 0x00000, 0x08000, 0xd0fc470b ) /* plane 1,2 */
1585 ROM_LOAD( "rt1-6.4s", 0x08000, 0x04000, 0x6b57edb2 ) /* plane 3 */
1586
1587 ROM_REGION( 0x80000, REGION_GFX3 | REGIONFLAG_DISPOSE )
1588 ROM_LOAD( "rt1-9.12h", 0x00000, 0x10000, 0x8e070561 )
1589 ROM_LOAD( "rt1-10.12k", 0x10000, 0x10000, 0xcb8fb607 )
1590 ROM_LOAD( "rt1-11.12l", 0x20000, 0x10000, 0x2bdf5ed9 )
1591 ROM_LOAD( "rt1-12.12m", 0x30000, 0x10000, 0xe6c6c7dc )
1592 ROM_LOAD( "rt1-13.12p", 0x40000, 0x10000, 0x489686d7 )
1593 ROM_LOAD( "rt1-14.12r", 0x50000, 0x10000, 0x689e56a8 )
1594 ROM_LOAD( "rt1-15.12t", 0x60000, 0x10000, 0x1d8bf2ca )
1595 ROM_LOAD( "rt1-16.12u", 0x70000, 0x10000, 0x1bbcf37b )
1596
1597 ROM_REGION( 0x1420, REGION_PROMS )
1598 ROM_LOAD( "mb7124e.3r", 0x0000, 0x0200, 0x8ef3bb9d ) /* red & green components */
1599 ROM_LOAD( "mb7116e.3s", 0x0200, 0x0200, 0x6510a8f2 ) /* blue component */
1600 ROM_LOAD( "mb7138h.4v", 0x0400, 0x0800, 0x95c7d944 ) /* tiles colortable */
1601 ROM_LOAD( "mb7138h.6v", 0x0c00, 0x0800, 0x1391fec9 ) /* sprites colortable */
1602 ROM_LOAD( "mb7112e.6u", 0x1400, 0x0020, 0xe4130804 ) /* tile address decoder (used at runtime) */
1603
1604 ROM_REGION( 0x10000, REGION_CPU3 )
1605 ROM_LOAD( "r4", 0x04000, 0x8000, 0x0387464f )
1606 ROM_LOAD( "rt1-mcu.bin", 0x0f000, 0x1000, 0x6ef08fb3 )
1607
1608 ROM_REGION( 0x40000, REGION_SOUND1 ) /* PCM samples for Hitachi CPU */
1609 ROM_LOAD( "rt1-21.f3", 0x00000, 0x10000, 0x454968f3 )
1610 ROM_LOAD( "rt1-22.h3", 0x10000, 0x10000, 0xfe963e72 )
1611 /* k3 empty */
1612 /* m3 empty */
1613 ROM_END
1614
1615 ROM_START( wndrmomo )
1616 ROM_REGION( 0x18000, REGION_CPU1 )
1617 ROM_LOAD( "wm1-1.9c", 0x8000, 0x8000, 0x34b50bf0 )
1618 /* 9d empty */
1619
1620 ROM_REGION( 0x40000, REGION_USER1 ) /* bank switched data for CPU1 */
1621 ROM_LOAD( "wm1-16.f1", 0x00000, 0x10000, 0xe565f8f3 )
1622 /* h1 empty */
1623 /* k1 empty */
1624 /* m1 empty */
1625
1626 ROM_REGION( 0x18000, REGION_CPU2 )
1627 ROM_LOAD( "wm1-2.12c", 0x8000, 0x8000, 0x3181efd0 )
1628 /* 12d empty */
1629
1630 ROM_REGION( 0x0c000, REGION_GFX1 | REGIONFLAG_DISPOSE )
1631 ROM_LOAD( "wm1-6.7r", 0x00000, 0x08000, 0x93955fbb ) /* plane 1,2 */
1632 ROM_LOAD( "wm1-7.7s", 0x08000, 0x04000, 0x7d662527 ) /* plane 3 */
1633
1634 ROM_REGION( 0x0c000, REGION_GFX2 | REGIONFLAG_DISPOSE )
1635 ROM_LOAD( "wm1-4.4r", 0x00000, 0x08000, 0xbbe67836 ) /* plane 1,2 */
1636 ROM_LOAD( "wm1-5.4s", 0x08000, 0x04000, 0xa81b481f ) /* plane 3 */
1637
1638 ROM_REGION( 0x80000, REGION_GFX3 | REGIONFLAG_DISPOSE )
1639 ROM_LOAD( "wm1-8.12h", 0x00000, 0x10000, 0x14f52e72 )
1640 ROM_LOAD( "wm1-9.12k", 0x10000, 0x10000, 0x16f8cdae )
1641 ROM_LOAD( "wm1-10.12l", 0x20000, 0x10000, 0xbfbc1896 )
1642 ROM_LOAD( "wm1-11.12m", 0x30000, 0x10000, 0xd775ddb2 )
1643 ROM_LOAD( "wm1-12.12p", 0x40000, 0x10000, 0xde64c12f )
1644 ROM_LOAD( "wm1-13.12r", 0x50000, 0x10000, 0xcfe589ad )
1645 ROM_LOAD( "wm1-14.12t", 0x60000, 0x10000, 0x2ae21a53 )
1646 ROM_LOAD( "wm1-15.12u", 0x70000, 0x10000, 0xb5c98be0 )
1647
1648 ROM_REGION( 0x1420, REGION_PROMS )
1649 ROM_LOAD( "wm1-1.3r", 0x0000, 0x0200, 0x1af8ade8 ) /* red & green components */
1650 ROM_LOAD( "wm1-2.3s", 0x0200, 0x0200, 0x8694e213 ) /* blue component */
1651 ROM_LOAD( "wm1-3.4v", 0x0400, 0x0800, 0x2ffaf9a4 ) /* tiles colortable */
1652 ROM_LOAD( "wm1-4.5v", 0x0c00, 0x0800, 0xf4e83e0b ) /* sprites colortable */
1653 ROM_LOAD( "wm1-5.6u", 0x1400, 0x0020, 0xe4130804 ) /* tile address decoder (used at runtime) */
1654
1655 ROM_REGION( 0x10000, REGION_CPU3 )
1656 ROM_LOAD( "wm1-3.6b", 0x04000, 0x8000, 0x55f01df7 )
1657 ROM_LOAD( "rt1-mcu.bin", 0x0f000, 0x1000, 0x6ef08fb3 )
1658
1659 ROM_REGION( 0x40000, REGION_SOUND1 ) /* PCM samples for Hitachi CPU */
1660 ROM_LOAD( "wm1-17.f3", 0x00000, 0x10000, 0xbea3c318 )
1661 ROM_LOAD( "wm1-18.h3", 0x10000, 0x10000, 0x6d73bcc5 )
1662 ROM_LOAD( "wm1-19.k3", 0x20000, 0x10000, 0xd288e912 )
1663 ROM_LOAD( "wm1-20.m3", 0x30000, 0x10000, 0x076a72cb )
1664 ROM_END
1665
1666
1667
1668 static void init_namco86(void)
1669 {
1670 int size;
1671 unsigned char *gfx;
1672 unsigned char *buffer;
1673
1674 /* shuffle tile ROMs so regular gfx unpack routines can be used */
1675 gfx = memory_region(REGION_GFX1);
1676 size = memory_region_length(REGION_GFX1) * 2 / 3;
1677 buffer = (unsigned char*)malloc( size );
1678
1679 if ( buffer )
1680 {
1681 unsigned char *dest1 = gfx;
1682 unsigned char *dest2 = gfx + ( size / 2 );
1683 unsigned char *mono = gfx + size;
1684 int i;
1685
1686 memcpy( buffer, gfx, size );
1687
1688 for ( i = 0; i < size; i += 2 )
1689 {
1690 unsigned char data1 = buffer[i];
1691 unsigned char data2 = buffer[i+1];
1692 *dest1++ = ( data1 << 4 ) | ( data2 & 0xf );
1693 *dest2++ = ( data1 & 0xf0 ) | ( data2 >> 4 );
1694
1695 *mono ^= 0xff; mono++;
1696 }
1697
1698 free( buffer );
1699 }
1700
1701 gfx = memory_region(REGION_GFX2);
1702 size = memory_region_length(REGION_GFX2) * 2 / 3;
1703 buffer = (unsigned char*)malloc( size );
1704
1705 if ( buffer )
1706 {
1707 unsigned char *dest1 = gfx;
1708 unsigned char *dest2 = gfx + ( size / 2 );
1709 unsigned char *mono = gfx + size;
1710 int i;
1711
1712 memcpy( buffer, gfx, size );
1713
1714 for ( i = 0; i < size; i += 2 )
1715 {
1716 unsigned char data1 = buffer[i];
1717 unsigned char data2 = buffer[i+1];
1718 *dest1++ = ( data1 << 4 ) | ( data2 & 0xf );
1719 *dest2++ = ( data1 & 0xf0 ) | ( data2 >> 4 );
1720
1721 *mono ^= 0xff; mono++;
1722 }
1723
1724 free( buffer );
1725 }
1726 }
1727
1728
1729
WRITE_HANDLER(roishtar_semaphore_w)1730 WRITE_HANDLER( roishtar_semaphore_w )
1731 {
1732 rthunder_videoram1_w(0x7e24-0x6000+offset,data);
1733
1734 if (data == 0x02)
1735 cpu_spinuntil_int();
1736 }
1737
init_roishtar(void)1738 static void init_roishtar(void)
1739 {
1740 /* install hook to avoid hang at game over */
1741 install_mem_write_handler(1, 0x7e24, 0x7e24, roishtar_semaphore_w);
1742
1743 init_namco86();
1744 }
1745
1746
1747
1748 GAME( 1986, hopmappy, 0, hopmappy, hopmappy, namco86, ROT0, "Namco", "Hopping Mappy" )
1749 GAME( 1986, skykiddx, 0, skykiddx, skykiddx, namco86, ROT180, "Namco", "Sky Kid Deluxe (set 1)" )
1750 GAME( 1986, skykiddo, skykiddx, skykiddx, skykiddx, namco86, ROT180, "Namco", "Sky Kid Deluxe (set 2)" )
1751 GAME( 1986, roishtar, 0, roishtar, roishtar, roishtar, ROT0, "Namco", "The Return of Ishtar" )
1752 GAME( 1986, genpeitd, 0, genpeitd, genpeitd, namco86, ROT0, "Namco", "Genpei ToumaDen" )
1753 GAME( 1986, rthunder, 0, rthunder, rthunder, namco86, ROT0, "Namco", "Rolling Thunder (new version)" )
1754 GAME( 1986, rthundro, rthunder, rthunder, rthundro, namco86, ROT0, "Namco", "Rolling Thunder (old version)" )
1755 GAME( 1987, wndrmomo, 0, wndrmomo, wndrmomo, namco86, ROT0, "Namco", "Wonder Momo" )
1756