1 /***************************************************************************
2 
3   This sound driver is used by the Scramble, Super Cobra  and Amidar drivers.
4 
5 ***************************************************************************/
6 
7 
8 #include "driver.h"
9 #include "cpu/z80/z80.h"
10 
11 
12 
13 /* The timer clock which feeds the upper 4 bits of    					*/
14 /* AY-3-8910 port A is based on the same clock        					*/
15 /* feeding the sound CPU Z80.  It is a divide by      					*/
16 /* 5120, formed by a standard divide by 512,        					*/
17 /* followed by a divide by 10 using a 4 bit           					*/
18 /* bi-quinary count sequence. (See LS90 data sheet    					*/
19 /* for an example).                                   					*/
20 /*																		*/
21 /* Bit 4 comes from the output of the divide by 1024  					*/
22 /*       0, 1, 0, 1, 0, 1, 0, 1, 0, 1									*/
23 /* Bit 5 comes from the QC output of the LS90 producing a sequence of	*/
24 /* 		 0, 0, 1, 1, 0, 0, 1, 1, 1, 0									*/
25 /* Bit 6 comes from the QD output of the LS90 producing a sequence of	*/
26 /*		 0, 0, 0, 0, 1, 0, 0, 0, 0, 1									*/
27 /* Bit 7 comes from the QA output of the LS90 producing a sequence of	*/
28 /*		 0, 0, 0, 0, 0, 1, 1, 1, 1, 1			 						*/
29 
30 static int scramble_timer[10] =
31 {
32 	0x00, 0x10, 0x20, 0x30, 0x40, 0x90, 0xa0, 0xb0, 0xa0, 0xd0
33 };
34 
READ_HANDLER(scramble_portB_r)35 READ_HANDLER( scramble_portB_r )
36 {
37 	/* need to protect from totalcycles overflow */
38 	static int last_totalcycles = 0;
39 
40 	/* number of Z80 clock cycles to count */
41 	static int clock;
42 
43 	int current_totalcycles;
44 
45 	current_totalcycles = cpu_gettotalcycles();
46 	clock = (clock + (current_totalcycles-last_totalcycles)) % 5120;
47 
48 	last_totalcycles = current_totalcycles;
49 
50 	return scramble_timer[clock/512];
51 }
52 
53 
54 
WRITE_HANDLER(scramble_sh_irqtrigger_w)55 WRITE_HANDLER( scramble_sh_irqtrigger_w )
56 {
57 	static int last;
58 
59 
60 	if (last == 0 && (data & 0x08) != 0)
61 	{
62 		/* setting bit 3 low then high triggers IRQ on the sound CPU */
63 		cpu_cause_interrupt(1, Z80_IRQ_INT);
64 	}
65 
66 	last = data & 0x08;
67 }
68 
WRITE_HANDLER(hotshock_sh_irqtrigger_w)69 WRITE_HANDLER( hotshock_sh_irqtrigger_w )
70 {
71 	cpu_cause_interrupt(1, Z80_IRQ_INT);
72 }
73 
74 
filter_w(int chip,int channel,int data)75 static void filter_w(int chip, int channel, int data)
76 {
77 	int C;
78 
79 
80 	C = 0;
81 	if (data & 1) C += 220000;	/* 220000pF = 0.220uF */
82 	if (data & 2) C +=  47000;	/*  47000pF = 0.047uF */
83 	set_RC_filter(3*chip + channel,1000,5100,0,C);
84 }
85 
WRITE_HANDLER(scramble_filter_w)86 WRITE_HANDLER( scramble_filter_w )
87 {
88 	filter_w(1, 0, (offset >>  0) & 3);
89 	filter_w(1, 1, (offset >>  2) & 3);
90 	filter_w(1, 2, (offset >>  4) & 3);
91 	filter_w(0, 0, (offset >>  6) & 3);
92 	filter_w(0, 1, (offset >>  8) & 3);
93 	filter_w(0, 2, (offset >> 10) & 3);
94 }
95