1 /***************************************************************************
2
3 cpuintrf.h
4
5 Core CPU interface functions and definitions.
6
7 ***************************************************************************/
8
9 #ifndef CPUINTRF_H
10 #define CPUINTRF_H
11
12 #include "osd_cpu.h"
13 #include "memory.h"
14 #include "timer.h"
15
16 #ifdef __cplusplus
17 extern "C" {
18 #endif
19
20
21 /*************************************
22 *
23 * Enum listing all the CPUs
24 *
25 *************************************/
26
27 /* the following list is automatically generated by makelist.pl - don't edit manually! */
28 enum
29 {
30 CPU_DUMMY,
31 #if (HAS_Z80)
32 CPU_Z80,
33 #endif
34 #if (HAS_DRZ80)
35 CPU_DRZ80,
36 #endif
37 #if (HAS_Z180)
38 CPU_Z180,
39 #endif
40 #if (HAS_8080)
41 CPU_8080,
42 #endif
43 #if (HAS_8085A)
44 CPU_8085A,
45 #endif
46 #if (HAS_M6502)
47 CPU_M6502,
48 #endif
49 #if (HAS_M65C02)
50 CPU_M65C02,
51 #endif
52 #if (HAS_M65SC02)
53 CPU_M65SC02,
54 #endif
55 #if (HAS_M65CE02)
56 CPU_M65CE02,
57 #endif
58 #if (HAS_M6509)
59 CPU_M6509,
60 #endif
61 #if (HAS_M6510)
62 CPU_M6510,
63 #endif
64 #if (HAS_M6510T)
65 CPU_M6510T,
66 #endif
67 #if (HAS_M7501)
68 CPU_M7501,
69 #endif
70 #if (HAS_M8502)
71 CPU_M8502,
72 #endif
73 #if (HAS_N2A03)
74 CPU_N2A03,
75 #endif
76 #if (HAS_DECO16)
77 CPU_DECO16,
78 #endif
79 #if (HAS_M4510)
80 CPU_M4510,
81 #endif
82 #if (HAS_H6280)
83 CPU_H6280,
84 #endif
85 #if (HAS_I86)
86 CPU_I86,
87 #endif
88 #if (HAS_I88)
89 CPU_I88,
90 #endif
91 #if (HAS_I186)
92 CPU_I186,
93 #endif
94 #if (HAS_I188)
95 CPU_I188,
96 #endif
97 #if (HAS_I286)
98 CPU_I286,
99 #endif
100 #if (HAS_V20)
101 CPU_V20,
102 #endif
103 #if (HAS_V30)
104 CPU_V30,
105 #endif
106 #if (HAS_V33)
107 CPU_V33,
108 #endif
109 #if (HAS_V60)
110 CPU_V60,
111 #endif
112 #if (HAS_V70)
113 CPU_V70,
114 #endif
115 #if (HAS_I8035)
116 CPU_I8035,
117 #endif
118 #if (HAS_I8039)
119 CPU_I8039,
120 #endif
121 #if (HAS_I8048)
122 CPU_I8048,
123 #endif
124 #if (HAS_N7751)
125 CPU_N7751,
126 #endif
127 #if (HAS_I8X41)
128 CPU_I8X41,
129 #endif
130 #if (HAS_M6800)
131 CPU_M6800,
132 #endif
133 #if (HAS_M6801)
134 CPU_M6801,
135 #endif
136 #if (HAS_M6802)
137 CPU_M6802,
138 #endif
139 #if (HAS_M6803)
140 CPU_M6803,
141 #endif
142 #if (HAS_M6808)
143 CPU_M6808,
144 #endif
145 #if (HAS_HD63701)
146 CPU_HD63701,
147 #endif
148 #if (HAS_NSC8105)
149 CPU_NSC8105,
150 #endif
151 #if (HAS_M6805)
152 CPU_M6805,
153 #endif
154 #if (HAS_M68705)
155 CPU_M68705,
156 #endif
157 #if (HAS_HD63705)
158 CPU_HD63705,
159 #endif
160 #if (HAS_HD6309)
161 CPU_HD6309,
162 #endif
163 #if (HAS_M6809)
164 CPU_M6809,
165 #endif
166 #if (HAS_KONAMI)
167 CPU_KONAMI,
168 #endif
169 #if (HAS_M68000)
170 CPU_M68000,
171 #endif
172 #if (HAS_CYCLONE)
173 CPU_CYCLONE,
174 #endif
175 #if (HAS_M68010)
176 CPU_M68010,
177 #endif
178 #if (HAS_M68EC020)
179 CPU_M68EC020,
180 #endif
181 #if (HAS_M68020)
182 CPU_M68020,
183 #endif
184 #if (HAS_T11)
185 CPU_T11,
186 #endif
187 #if (HAS_S2650)
188 CPU_S2650,
189 #endif
190 #if (HAS_TMS34010)
191 CPU_TMS34010,
192 #endif
193 #if (HAS_TMS34020)
194 CPU_TMS34020,
195 #endif
196 #if (HAS_TI990_10)
197 CPU_TI990_10,
198 #endif
199 #if (HAS_TMS9900)
200 CPU_TMS9900,
201 #endif
202 #if (HAS_TMS9940)
203 CPU_TMS9940,
204 #endif
205 #if (HAS_TMS9980)
206 CPU_TMS9980,
207 #endif
208 #if (HAS_TMS9985)
209 CPU_TMS9985,
210 #endif
211 #if (HAS_TMS9989)
212 CPU_TMS9989,
213 #endif
214 #if (HAS_TMS9995)
215 CPU_TMS9995,
216 #endif
217 #if (HAS_TMS99105A)
218 CPU_TMS99105A,
219 #endif
220 #if (HAS_TMS99110A)
221 CPU_TMS99110A,
222 #endif
223 #if (HAS_Z8000)
224 CPU_Z8000,
225 #endif
226 #if (HAS_TMS32010)
227 CPU_TMS32010,
228 #endif
229 #if (HAS_TMS32025)
230 CPU_TMS32025,
231 #endif
232 #if (HAS_TMS32031)
233 CPU_TMS32031,
234 #endif
235 #if (HAS_CCPU)
236 CPU_CCPU,
237 #endif
238 #if (HAS_ADSP2100)
239 CPU_ADSP2100,
240 #endif
241 #if (HAS_ADSP2101)
242 CPU_ADSP2101,
243 #endif
244 #if (HAS_ADSP2104)
245 CPU_ADSP2104,
246 #endif
247 #if (HAS_ADSP2105)
248 CPU_ADSP2105,
249 #endif
250 #if (HAS_ADSP2115)
251 CPU_ADSP2115,
252 #endif
253 #if (HAS_PSXCPU)
254 CPU_PSXCPU,
255 #endif
256 #if (HAS_ASAP)
257 CPU_ASAP,
258 #endif
259 #if (HAS_UPD7810)
260 CPU_UPD7810,
261 #endif
262 #if (HAS_UPD7807)
263 CPU_UPD7807,
264 #endif
265 #if (HAS_JAGUAR)
266 CPU_JAGUARGPU,
267 CPU_JAGUARDSP,
268 #endif
269 #if (HAS_R3000)
270 CPU_R3000BE,
271 CPU_R3000LE,
272 #endif
273 #if (HAS_R4600)
274 CPU_R4600BE,
275 CPU_R4600LE,
276 #endif
277 #if (HAS_R5000)
278 CPU_R5000BE,
279 CPU_R5000LE,
280 #endif
281 #if (HAS_ARM)
282 CPU_ARM,
283 #endif
284 #if (HAS_SH2)
285 CPU_SH2,
286 #endif
287 #if (HAS_DSP32C)
288 CPU_DSP32C,
289 #endif
290 #if (HAS_PIC16C54)
291 CPU_PIC16C54,
292 #endif
293 #if (HAS_PIC16C55)
294 CPU_PIC16C55,
295 #endif
296 #if (HAS_PIC16C56)
297 CPU_PIC16C56,
298 #endif
299 #if (HAS_PIC16C57)
300 CPU_PIC16C57,
301 #endif
302 #if (HAS_PIC16C58)
303 CPU_PIC16C58,
304 #endif
305 #if (HAS_G65816)
306 CPU_G65816,
307 #endif
308 #if (HAS_SPC700)
309 CPU_SPC700,
310 #endif
311 #if (HAS_E132XS)
312 CPU_E132XS,
313 #endif
314
315 CPU_COUNT
316 };
317
318
319
320 /*************************************
321 *
322 * Interrupt line constants
323 *
324 *************************************/
325
326 enum
327 {
328 /* line states */
329 CLEAR_LINE = 0, /* clear (a fired, held or pulsed) line */
330 ASSERT_LINE, /* assert an interrupt immediately */
331 HOLD_LINE, /* hold interrupt line until acknowledged */
332 PULSE_LINE, /* pulse interrupt line for one instruction */
333
334 /* internal flags (not for use by drivers!) */
335 INTERNAL_CLEAR_LINE = 100 + CLEAR_LINE,
336 INTERNAL_ASSERT_LINE = 100 + ASSERT_LINE,
337
338 /* interrupt parameters */
339 MAX_IRQ_LINES = 16, /* maximum number of IRQ lines per CPU */
340 IRQ_LINE_NMI = 127 /* IRQ line for NMIs */
341 };
342
343
344
345 /*************************************
346 *
347 * CPU information constants
348 *
349 *************************************/
350
351 /* get_reg/set_reg constants */
352 enum
353 {
354 MAX_REGS = 128, /* maximum number of register of any CPU */
355
356 /* This value is passed to activecpu_get_reg to retrieve the previous
357 * program counter value, ie. before a CPU emulation started
358 * to fetch opcodes and arguments for the current instrution. */
359 REG_PREVIOUSPC = -1,
360
361 /* This value is passed to activecpu_get_reg to retrieve the current
362 * program counter value. */
363 REG_PC = -2,
364
365 /* This value is passed to activecpu_get_reg to retrieve the current
366 * stack pointer value. */
367 REG_SP = -3,
368
369 /* This value is passed to activecpu_get_reg/activecpu_set_reg, instead of one of
370 * the names from the enum a CPU core defines for it's registers,
371 * to get or set the contents of the memory pointed to by a stack pointer.
372 * You can specify the n'th element on the stack by (REG_SP_CONTENTS-n),
373 * ie. lower negative values. The actual element size (UINT16 or UINT32)
374 * depends on the CPU core. */
375 REG_SP_CONTENTS = -4
376 };
377
378
379 /* endianness constants */
380 enum
381 {
382 CPU_IS_LE = 0, /* emulated CPU is little endian */
383 CPU_IS_BE /* emulated CPU is big endian */
384 };
385
386
387 /* Values passed to the cpu_info function of a core to retrieve information */
388 enum
389 {
390 CPU_INFO_REG,
391 CPU_INFO_FLAGS = MAX_REGS,
392 CPU_INFO_NAME,
393 CPU_INFO_FAMILY,
394 CPU_INFO_VERSION,
395 CPU_INFO_FILE,
396 CPU_INFO_CREDITS,
397 CPU_INFO_REG_LAYOUT,
398 CPU_INFO_WIN_LAYOUT
399 };
400
401
402
403 /*************************************
404 *
405 * Core CPU interface structure
406 *
407 *************************************/
408
409 struct cpu_interface
410 {
411 /* index (used to make sure we mach the enum above */
412 unsigned cpu_num;
413
414 /* table of core functions */
415 void (*init)(void);
416 void (*reset)(void *param);
417 void (*exit)(void);
418 int (*execute)(int cycles);
419 void (*burn)(int cycles);
420 unsigned (*get_context)(void *reg);
421 void (*set_context)(void *reg);
422 const void *(*get_cycle_table)(int which);
423 void (*set_cycle_table)(int which, void *new_table);
424 unsigned (*get_reg)(int regnum);
425 void (*set_reg)(int regnum, unsigned val);
426 void (*set_irq_line)(int irqline, int linestate);
427 void (*set_irq_callback)(int(*callback)(int irqline));
428 const char *(*cpu_info)(void *context,int regnum);
429 unsigned (*cpu_dasm)(char *buffer,unsigned pc);
430
431 /* IRQ and clock information */
432 unsigned num_irqs;
433 int default_vector;
434 int * icount;
435 double overclock;
436
437 /* memory information */
438 int databus_width;
439 mem_read_handler memory_read;
440 mem_write_handler memory_write;
441 mem_read_handler internal_read;
442 mem_write_handler internal_write;
443 offs_t pgm_memory_base;
444 void (*set_op_base)(offs_t pc);
445 int address_shift;
446 unsigned address_bits;
447 unsigned endianess;
448 unsigned align_unit;
449 unsigned max_inst_len;
450 };
451
452
453
454 /*************************************
455 *
456 * Core CPU interface functions
457 *
458 *************************************/
459
460 /* reset the internal CPU tracking */
461 int cpuintrf_init(void);
462
463 /* set up the interface for one CPU of a given type */
464 int cpuintrf_init_cpu(int cpunum, int cputype);
465
466 /* clean up the interface for one CPU */
467 void cpuintrf_exit_cpu(int cpunum);
468
469 /* remember the previous context and set a new one */
470 void cpuintrf_push_context(int cpunum);
471
472 /* restore the previous context */
473 void cpuintrf_pop_context(void);
474
475 /* set the dasm override handler */
476 void cpuintrf_set_dasm_override(unsigned (*dasm_override)(int cpunum, char *buffer, unsigned pc));
477
478
479
480 /*************************************
481 *
482 * Active CPU acccessors
483 *
484 *************************************/
485
486 /* apply a +/- to the current icount */
487 void activecpu_adjust_icount(int delta);
488
489 /* return the current icount */
490 int activecpu_get_icount(void);
491
492 /* ensure banking is reset properly */
493 void activecpu_reset_banking(void);
494
495 /* set the IRQ line on a CPU -- drivers use cpu_set_irq_line() */
496 void activecpu_set_irq_line(int irqline, int state);
497
498 /* return a pointer to the active cycle count table for the active CPU */
499 const void *activecpu_get_cycle_table(int which);
500
501 /* set a pointer to the active cycle count table for the active CPU */
502 void activecpu_set_cycle_tbl(int which, void *new_table);
503
504 /* return the value of a register on the active CPU */
505 unsigned activecpu_get_reg(int regnum);
506
507 /* set the value of a register on the active CPU */
508 void activecpu_set_reg(int regnum, unsigned val);
509
510 /* return the PC, corrected to a byte offset, on the active CPU */
511 offs_t activecpu_get_pc_byte(void);
512
513 /* update the banking on the active CPU */
514 void activecpu_set_op_base(unsigned val);
515
516 /* disassemble a line at a given PC on the active CPU */
517 unsigned activecpu_dasm(char *buffer, unsigned pc);
518
519 /* return a string containing the state of the flags on the active CPU */
520 const char *activecpu_flags(void);
521
522 /* return a string containing the value of a register on the active CPU */
523 const char *activecpu_dump_reg(int regnum);
524
525 /* return a string containing the state of the active CPU */
526 const char *activecpu_dump_state(void);
527
528 /* return the default IRQ vector for the active CPU */
529 int activecpu_default_irq_vector(void);
530
531 /* return the width of the address bus on the active CPU */
532 unsigned activecpu_address_bits(void);
533
534 /* return the active address mask on the active CPU */
535 unsigned activecpu_address_mask(void);
536
537 /* return the shift value to convert from address to bytes on the active CPU */
538 int activecpu_address_shift(void);
539
540 /* return the endianess of the active CPU */
541 unsigned activecpu_endianess(void);
542
543 /* return the width of the data bus on the active CPU */
544 unsigned activecpu_databus_width(void);
545
546 /* return the required alignment of data accesses on the active CPU */
547 unsigned activecpu_align_unit(void);
548
549 /* return the maximum length of one instruction on the active CPU */
550 unsigned activecpu_max_inst_len(void);
551
552 /* return a string containing the name of the active CPU */
553 const char *activecpu_name(void);
554
555 /* return a string containing the family of the active CPU */
556 const char *activecpu_core_family(void);
557
558 /* return a string containing the version of the active CPU */
559 const char *activecpu_core_version(void);
560
561 /* return a string containing the filename for the emulator of the active CPU */
562 const char *activecpu_core_file(void);
563
564 /* return a string containing the emulation credits for the active CPU */
565 const char *activecpu_core_credits(void);
566
567 /* return a string containing the registers of the active CPU */
568 const char *activecpu_reg_layout(void);
569
570 /* return a string containing the debugger layout of the active CPU */
571 const char *activecpu_win_layout(void);
572
573
574
575 /*************************************
576 *
577 * Specific CPU acccessors
578 *
579 *************************************/
580
581 /* execute the requested cycles on a given CPU */
582 int cpunum_execute(int cpunum, int cycles);
583
584 /* signal a reset and set the IRQ ack callback for a given CPU */
585 void cpunum_reset(int cpunum, void *param, int (*irqack)(int));
586
587 /* read a byte from another CPU's memory space */
588 data8_t cpunum_read_byte(int cpunum, offs_t address);
589
590 /* write a byte from another CPU's memory space */
591 void cpunum_write_byte(int cpunum, offs_t address, data8_t data);
592
593 /* return a pointer to the saved context of a given CPU, or NULL if the
594 context is active (and contained within the CPU core */
595 void *cpunum_get_context_ptr(int cpunum);
596
597 /* return a pointer to the active cycle count table for a given CPU */
598 const void *cpunum_get_cycle_table(int cpunum, int which);
599
600 /* set a pointer to the active cycle count table for a given CPU */
601 void cpunum_set_cycle_tbl(int cpunum, int which, void *new_table);
602
603 /* return the value of a register on a given CPU */
604 unsigned cpunum_get_reg(int cpunum, int regnum);
605
606 /* set the value of a register on a given CPU */
607 void cpunum_set_reg(int cpunum, int regnum, unsigned val);
608
609 /* return the PC, corrected to a byte offset, on a given CPU */
610 offs_t cpunum_get_pc_byte(int cpunum);
611
612 /* update the banking on a given CPU */
613 void cpunum_set_op_base(int cpunum, unsigned val);
614
615 /* disassemble a line at a given PC on a given CPU */
616 unsigned cpunum_dasm(int cpunum, char *buffer, unsigned pc);
617
618 /* return a string containing the state of the flags on a given CPU */
619 const char *cpunum_flags(int cpunum);
620
621 /* return a string containing the value of a register on a given CPU */
622 const char *cpunum_dump_reg(int cpunum, int regnum);
623
624 /* return a string containing the state of a given CPU */
625 const char *cpunum_dump_state(int cpunum);
626
627 /* return the default IRQ vector for a given CPU */
628 int cpunum_default_irq_vector(int cpunum);
629
630 /* return the width of the address bus on a given CPU */
631 unsigned cpunum_address_bits(int cpunum);
632
633 /* return the active address mask on a given CPU */
634 unsigned cpunum_address_mask(int cpunum);
635
636 /* return the shift value to convert from address to bytes on a given CPU */
637 int cpunum_address_shift(int cpunum);
638
639 /* return the endianess of a given CPU */
640 unsigned cpunum_endianess(int cpunum);
641
642 /* return the width of the data bus on a given CPU */
643 unsigned cpunum_databus_width(int cpunum);
644
645 /* return the required alignment of data accesses on a given CPU */
646 unsigned cpunum_align_unit(int cpunum);
647
648 /* return the maximum length of one instruction on a given CPU */
649 unsigned cpunum_max_inst_len(int cpunum);
650
651 /* return a string containing the name of a given CPU */
652 const char *cpunum_name(int cpunum);
653
654 /* return a string containing the family of a given CPU */
655 const char *cpunum_core_family(int cpunum);
656
657 /* return a string containing the version of a given CPU */
658 const char *cpunum_core_version(int cpunum);
659
660 /* return a string containing the filename for the emulator of a given CPU */
661 const char *cpunum_core_file(int cpunum);
662
663 /* return a string containing the emulation credits for a given CPU */
664 const char *cpunum_core_credits(int cpunum);
665
666 /* return a string containing the registers of a given CPU */
667 const char *cpunum_reg_layout(int cpunum);
668
669 /* return a string containing the debugger layout of a given CPU */
670 const char *cpunum_win_layout(int cpunum);
671
672
673
674 /*************************************
675 *
676 * CPU type acccessors
677 *
678 *************************************/
679
680 /* return the default IRQ vector for a given CPU type */
681 int cputype_default_irq_vector(int cputype);
682
683 /* return the width of the address bus on a given CPU type */
684 unsigned cputype_address_bits(int cputype);
685
686 /* return the active address mask on a given CPU type */
687 unsigned cputype_address_mask(int cputype);
688
689 /* return the shift value to convert from address to bytes on a given CPU type */
690 int cputype_address_shift(int cputype);
691
692 /* return the endianess of a given CPU type */
693 unsigned cputype_endianess(int cputype);
694
695 /* return the width of the data bus on a given CPU type */
696 unsigned cputype_databus_width(int cputype);
697
698 /* return the required alignment of data accesses on a given CPU type */
699 unsigned cputype_align_unit(int cputype);
700
701 /* return the maximum length of one instruction on a given CPU type */
702 unsigned cputype_max_inst_len(int cputype);
703
704 /* return a string containing the name of a given CPU type */
705 const char *cputype_name(int cputype);
706
707 /* return a string containing the family of a given CPU type */
708 const char *cputype_core_family(int cputype);
709
710 /* return a string containing the version of a given CPU type */
711 const char *cputype_core_version(int cputype);
712
713 /* return a string containing the filename for the emulator of a given CPU type */
714 const char *cputype_core_file(int cputype);
715
716 /* return a string containing the emulation credits for a given CPU type */
717 const char *cputype_core_credits(int cputype);
718
719 /* return a string containing the registers of a given CPU type */
720 const char *cputype_reg_layout(int cputype);
721
722 /* return a string containing the debugger layout of a given CPU type */
723 const char *cputype_win_layout(int cputype);
724
725
726
727 /*************************************
728 *
729 * Miscellaneous functions
730 *
731 *************************************/
732
733 /* dump the states of all CPUs */
734 void cpu_dump_states(void);
735
736 /* set a callback function for reset on the 68k */
737 void cpu_set_m68k_reset(int cpunum, void (*resetfn)(void));
738
739
740
741 /*************************************
742 *
743 * Macros
744 *
745 *************************************/
746
747 #define activecpu_get_previouspc() activecpu_get_reg(REG_PREVIOUSPC)
748 #define activecpu_get_pc() activecpu_get_reg(REG_PC)
749 #define activecpu_get_sp() activecpu_get_reg(REG_SP)
750 #define activecpu_set_pc(val) activecpu_set_reg(REG_PC, val)
751 #define activecpu_set_sp(val) activecpu_set_reg(REG_SP, val)
752
753 #define cpunum_get_previouspc(cpu) cpunum_get_reg(cpu, REG_PREVIOUSPC)
754 #define cpunum_get_pc(cpu) cpunum_get_reg(cpu, REG_PC)
755 #define cpunum_get_sp(cpu) cpunum_get_reg(cpu, REG_SP)
756 #define cpunum_set_pc(cpu, val) cpunum_set_reg(cpu, REG_PC, val)
757 #define cpunum_set_sp(cpu, val) cpunum_set_reg(cpu, REG_SP, val)
758
759 /* this is kind of gross - is it necessary */
760 #define cpu_geturnpc() activecpu_get_reg(REG_SP_CONTENTS)
761
762
763
764 /*************************************
765 *
766 * CPU interface accessors
767 *
768 *************************************/
769
770 /* return a pointer to the interface struct for a given CPU type */
cputype_get_interface(int cputype)771 static INLINE const struct cpu_interface *cputype_get_interface(int cputype)
772 {
773 extern const struct cpu_interface cpuintrf[];
774 return &cpuintrf[cputype];
775 }
776
777
778 /* return a the index of the active CPU */
cpu_getactivecpu(void)779 static INLINE int cpu_getactivecpu(void)
780 {
781 extern int activecpu;
782 return activecpu;
783 }
784
785
786 /* return a the index of the executing CPU */
cpu_getexecutingcpu(void)787 static INLINE int cpu_getexecutingcpu(void)
788 {
789 extern int executingcpu;
790 return executingcpu;
791 }
792
793
794 /* return a the total number of registered CPUs */
cpu_gettotalcpu(void)795 static INLINE int cpu_gettotalcpu(void)
796 {
797 extern int totalcpu;
798 return totalcpu;
799 }
800
801
802
803 #ifdef __cplusplus
804 }
805 #endif
806
807 #endif /* CPUINTRF_H */
808
809