1 /*************************************************************************** 2 3 namcos2.h 4 5 Common functions & declarations for the Namco System 2 driver 6 7 ***************************************************************************/ 8 9 // #define NAMCOS2_DEBUG_MODE 10 11 12 /* CPU reference numbers */ 13 14 #define NAMCOS2_CPU1 0 15 #define NAMCOS2_CPU2 1 16 #define NAMCOS2_CPU3 2 17 #define NAMCOS2_CPU4 3 18 19 #define CPU_MASTER NAMCOS2_CPU1 20 #define CPU_SLAVE NAMCOS2_CPU2 21 #define CPU_SOUND NAMCOS2_CPU3 22 #define CPU_MCU NAMCOS2_CPU4 23 24 /* VIDHRDW */ 25 26 /*********************************************/ 27 /* IF GAME SPECIFIC HACKS ARE REQUIRED THEN */ 28 /* USE THE namcos2_gametype VARIABLE TO FIND */ 29 /* OUT WHAT GAME IS RUNNING */ 30 /*********************************************/ 31 32 enum { 33 NAMCOS2_ASSAULT = 0x1000, 34 NAMCOS2_ASSAULT_JP, 35 NAMCOS2_ASSAULT_PLUS, 36 NAMCOS2_BUBBLE_TROUBLE, 37 NAMCOS2_BURNING_FORCE, 38 NAMCOS2_COSMO_GANG, 39 NAMCOS2_COSMO_GANG_US, 40 NAMCOS2_DIRT_FOX, 41 NAMCOS2_DIRT_FOX_JP, 42 NAMCOS2_DRAGON_SABER, 43 NAMCOS2_FINAL_LAP, 44 NAMCOS2_FINAL_LAP_2, 45 NAMCOS2_FINAL_LAP_3, 46 NAMCOS2_FINEST_HOUR, 47 NAMCOS2_FOUR_TRAX, 48 NAMCOS2_GOLLY_GHOST, 49 NAMCOS2_LUCKY_AND_WILD, 50 NAMCOS2_MARVEL_LAND, 51 NAMCOS2_METAL_HAWK, 52 NAMCOS2_MIRAI_NINJA, 53 NAMCOS2_ORDYNE, 54 NAMCOS2_PHELIOS, 55 NAMCOS2_ROLLING_THUNDER_2, 56 NAMCOS2_STEEL_GUNNER, 57 NAMCOS2_STEEL_GUNNER_2, 58 NAMCOS2_SUPER_WSTADIUM, 59 NAMCOS2_SUPER_WSTADIUM_92, 60 NAMCOS2_SUPER_WSTADIUM_92T, 61 NAMCOS2_SUPER_WSTADIUM_93, 62 NAMCOS2_SUZUKA_8_HOURS, 63 NAMCOS2_SUZUKA_8_HOURS_2, 64 NAMCOS2_VALKYRIE, 65 NAMCOS2_KYUUKAI_DOUCHUUKI, 66 67 NAMCOS21_AIRCOMBAT, 68 NAMCOS21_STARBLADE, 69 NAMCOS21_CYBERSLED, 70 NAMCOS21_SOLVALOU, 71 NAMCOS21_WINRUN91, 72 73 NAMCONB1_NEBULRAY, 74 NAMCONB1_GUNBULET, 75 NAMCONB1_GSLGR94U, 76 NAMCONB1_SWS95, 77 NAMCONB1_SWS96, 78 NAMCONB1_SWS97, 79 NAMCONB1_VSHOOT, 80 81 NAMCONB2_OUTFOXIES, 82 NAMCONB2_MACH_BREAKERS 83 }; 84 85 extern int namcos2_gametype; 86 87 extern data16_t *namcos21_dspram16; 88 89 #define NAMCOS21_NUM_COLORS 0x8000 90 91 /*********************************************/ 92 93 VIDEO_START( namcos21 ); 94 VIDEO_UPDATE( namcos21_default ); 95 96 VIDEO_START( namcos2 ); 97 VIDEO_UPDATE( namcos2_default ); 98 99 VIDEO_START( finallap ); 100 VIDEO_UPDATE( finallap ); 101 102 VIDEO_START( luckywld ); 103 VIDEO_UPDATE( luckywld ); 104 105 VIDEO_START( metlhawk ); 106 VIDEO_UPDATE( metlhawk ); 107 108 VIDEO_START( sgunner ); 109 VIDEO_UPDATE( sgunner ); 110 111 /* MACHINE */ 112 113 MACHINE_INIT( namcos2 ); 114 115 WRITE16_HANDLER( namcos2_gfx_ctrl_w ); 116 READ16_HANDLER( namcos2_gfx_ctrl_r ); 117 118 extern data16_t *namcos2_sprite_ram; 119 WRITE16_HANDLER( namcos2_sprite_ram_w ); 120 READ16_HANDLER( namcos2_sprite_ram_r ); 121 122 READ16_HANDLER( namcos2_flap_prot_r ); 123 124 /**************************************************************/ 125 /* EEPROM memory function handlers */ 126 /**************************************************************/ 127 #define NAMCOS2_68K_EEPROM_W namcos2_68k_eeprom_w, &namcos2_eeprom, &namcos2_eeprom_size 128 #define NAMCOS2_68K_EEPROM_R namcos2_68k_eeprom_r 129 NVRAM_HANDLER( namcos2 ); 130 WRITE16_HANDLER( namcos2_68k_eeprom_w ); 131 READ16_HANDLER( namcos2_68k_eeprom_r ); 132 extern data16_t *namcos2_eeprom; 133 extern size_t namcos2_eeprom_size; 134 135 /**************************************************************/ 136 /* Shared video memory function handlers */ 137 /**************************************************************/ 138 WRITE16_HANDLER( namcos2_68k_vram_w ); 139 READ16_HANDLER( namcos2_68k_vram_r ); 140 141 extern size_t namcos2_68k_vram_size; 142 143 READ16_HANDLER( namcos2_68k_vram_ctrl_r ); 144 WRITE16_HANDLER( namcos2_68k_vram_ctrl_w ); 145 146 /**************************************************************/ 147 /* Shared video palette function handlers */ 148 /**************************************************************/ 149 READ16_HANDLER( namcos2_68k_video_palette_r ); 150 WRITE16_HANDLER( namcos2_68k_video_palette_w ); 151 152 #define VIRTUAL_PALETTE_BANKS 30 153 extern data16_t *namcos2_68k_palette_ram; 154 extern size_t namcos2_68k_palette_size; 155 156 157 /**************************************************************/ 158 /* Shared data ROM memory handlerhandlers */ 159 /**************************************************************/ 160 READ16_HANDLER( namcos2_68k_data_rom_r ); 161 162 163 /**************************************************************/ 164 /* Shared serial communications processory (CPU5 ????) */ 165 /**************************************************************/ 166 READ16_HANDLER( namcos2_68k_serial_comms_ram_r ); 167 WRITE16_HANDLER( namcos2_68k_serial_comms_ram_w ); 168 READ16_HANDLER( namcos2_68k_serial_comms_ctrl_r ); 169 WRITE16_HANDLER( namcos2_68k_serial_comms_ctrl_w ); 170 171 extern data16_t namcos2_68k_serial_comms_ctrl[]; 172 extern data16_t *namcos2_68k_serial_comms_ram; 173 174 175 176 /**************************************************************/ 177 /* Shared protection/random number generator */ 178 /**************************************************************/ 179 READ16_HANDLER( namcos2_68k_key_r ); 180 WRITE16_HANDLER( namcos2_68k_key_w ); 181 182 /**************************************************************/ 183 /* Non-shared memory custom IO device - IRQ/Inputs/Outputs */ 184 /**************************************************************/ 185 186 #define NAMCOS2_C148_0 0 /* 0x1c0000 */ 187 #define NAMCOS2_C148_1 1 /* 0x1c2000 */ 188 #define NAMCOS2_C148_2 2 /* 0x1c4000 */ 189 #define NAMCOS2_C148_CPUIRQ 3 /* 0x1c6000 */ 190 #define NAMCOS2_C148_EXIRQ 4 /* 0x1c8000 */ 191 #define NAMCOS2_C148_POSIRQ 5 /* 0x1ca000 */ 192 #define NAMCOS2_C148_SERIRQ 6 /* 0x1cc000 */ 193 #define NAMCOS2_C148_VBLANKIRQ 7 /* 0x1ce000 */ 194 195 extern data16_t namcos2_68k_master_C148[]; 196 extern data16_t namcos2_68k_slave_C148[]; 197 198 WRITE16_HANDLER( namcos2_68k_master_C148_w ); 199 READ16_HANDLER( namcos2_68k_master_C148_r ); 200 INTERRUPT_GEN( namcos2_68k_master_vblank ); 201 void namcos2_68k_master_posirq( int moog ); 202 203 WRITE16_HANDLER( namcos2_68k_slave_C148_w ); 204 READ16_HANDLER( namcos2_68k_slave_C148_r ); 205 INTERRUPT_GEN( namcos2_68k_slave_vblank ); 206 void namcos2_68k_slave_posirq( int moog ); 207 208 209 /**************************************************************/ 210 /* MASTER CPU RAM MEMORY */ 211 /**************************************************************/ 212 213 extern data16_t *namcos2_68k_master_ram; 214 215 #define NAMCOS2_68K_MASTER_RAM_W MWA16_BANK3, &namcos2_68k_master_ram 216 #define NAMCOS2_68K_MASTER_RAM_R MRA16_BANK3 217 218 219 /**************************************************************/ 220 /* SLAVE CPU RAM MEMORY */ 221 /**************************************************************/ 222 223 extern data16_t *namcos2_68k_slave_ram; 224 225 #define NAMCOS2_68K_SLAVE_RAM_W MWA16_BANK4, &namcos2_68k_slave_ram 226 #define NAMCOS2_68K_SLAVE_RAM_R MRA16_BANK4 227 228 229 /**************************************************************/ 230 /* ROZ - Rotate & Zoom memory function handlers */ 231 /**************************************************************/ 232 233 WRITE16_HANDLER( namcos2_68k_roz_ctrl_w ); 234 READ16_HANDLER( namcos2_68k_roz_ctrl_r ); 235 236 WRITE16_HANDLER( namcos2_68k_roz_ram_w ); 237 READ16_HANDLER( namcos2_68k_roz_ram_r ); 238 extern data16_t *namcos2_68k_roz_ram; 239 240 /**************************************************************/ 241 /* */ 242 /**************************************************************/ 243 #define BANKED_SOUND_ROM_R MRA_BANK6 244 #define CPU3_ROM1 6 /* Bank number */ 245 246 247 248 /**************************************************************/ 249 /* Sound CPU support handlers - 6809 */ 250 /**************************************************************/ 251 252 WRITE_HANDLER( namcos2_sound_bankselect_w ); 253 254 255 /**************************************************************/ 256 /* MCU Specific support handlers - HD63705 */ 257 /**************************************************************/ 258 259 WRITE_HANDLER( namcos2_mcu_analog_ctrl_w ); 260 READ_HANDLER( namcos2_mcu_analog_ctrl_r ); 261 262 WRITE_HANDLER( namcos2_mcu_analog_port_w ); 263 READ_HANDLER( namcos2_mcu_analog_port_r ); 264 265 WRITE_HANDLER( namcos2_mcu_port_d_w ); 266 READ_HANDLER( namcos2_mcu_port_d_r ); 267 268 READ_HANDLER( namcos2_input_port_0_r ); 269 READ_HANDLER( namcos2_input_port_10_r ); 270 READ_HANDLER( namcos2_input_port_12_r ); 271