1 /***************************************************************************
2 
3 Splash! (c) 1992 Gaelco
4 
5 Driver by Manuel Abadia <manu@teleline.es>
6 
7 ***************************************************************************/
8 
9 #include "driver.h"
10 #include "vidhrdw/generic.h"
11 #include "cpu/z80/z80.h"
12 #include "cpu/m68000/m68000.h"
13 
14 
15 extern data16_t *splash_vregs;
16 extern data16_t *splash_videoram;
17 extern data16_t *splash_spriteram;
18 extern data16_t *splash_pixelram;
19 
20 /* from vidhrdw/gaelco.c */
21 READ16_HANDLER( splash_vram_r );
22 READ16_HANDLER( splash_pixelram_r );
23 WRITE16_HANDLER( splash_vram_w );
24 WRITE16_HANDLER( splash_pixelram_w );
25 VIDEO_START( splash );
26 VIDEO_UPDATE( splash );
27 
28 
WRITE16_HANDLER(splash_sh_irqtrigger_w)29 static WRITE16_HANDLER( splash_sh_irqtrigger_w )
30 {
31 	if (ACCESSING_LSB){
32 		soundlatch_w(0,data & 0xff);
33 		cpu_set_irq_line(1,0,HOLD_LINE);
34 	}
35 }
36 
MEMORY_READ16_START(splash_readmem)37 static MEMORY_READ16_START( splash_readmem )
38 	{ 0x000000, 0x3fffff, MRA16_ROM },			/* ROM */
39 	{ 0x800000, 0x83ffff, splash_pixelram_r },	/* Pixel Layer */
40 	{ 0x840000, 0x840001, input_port_0_word_r },/* DIPSW #1 */
41 	{ 0x840002, 0x840003, input_port_1_word_r },/* DIPSW #2 */
42 	{ 0x840004, 0x840005, input_port_2_word_r },/* INPUT #1 */
43 	{ 0x840006, 0x840007, input_port_3_word_r },/* INPUT #2 */
44 	{ 0x880000, 0x8817ff, splash_vram_r },		/* Video RAM */
45 	{ 0x881800, 0x881803, MRA16_RAM },			/* Scroll registers */
46 	{ 0x881804, 0x881fff, MRA16_RAM },			/* Work RAM */
47 	{ 0x8c0000, 0x8c0fff, MRA16_RAM },			/* Palette */
48 	{ 0x900000, 0x900fff, MRA16_RAM },			/* Sprite RAM */
49 	{ 0xffc000, 0xffffff, MRA16_RAM },			/* Work RAM */
50 MEMORY_END
51 
52 WRITE16_HANDLER( splash_coin_w )
53 {
54 	if (ACCESSING_MSB){
55 		switch ((offset >> 3)){
56 			case 0x00:	/* Coin Lockouts */
57 			case 0x01:
58 				coin_lockout_w( (offset >> 3) & 0x01, (data & 0x0400) >> 8);
59 				break;
60 			case 0x02:	/* Coin Counters */
61 			case 0x03:
62 				coin_counter_w( (offset >> 3) & 0x01, (data & 0x0100) >> 8);
63 				break;
64 		}
65 	}
66 }
67 
MEMORY_WRITE16_START(splash_writemem)68 static MEMORY_WRITE16_START( splash_writemem )
69 	{ 0x000000, 0x3fffff, MWA16_ROM },										/* ROM */
70 	{ 0x800000, 0x83ffff, splash_pixelram_w, &splash_pixelram },			/* Pixel Layer */
71 	{ 0x84000e, 0x84000f, splash_sh_irqtrigger_w },							/* Sound command */
72 	{ 0x84000a, 0x84003b, splash_coin_w },									/* Coin Counters + Coin Lockout */
73 	{ 0x880000, 0x8817ff, splash_vram_w, &splash_videoram },				/* Video RAM */
74 	{ 0x881800, 0x881803, MWA16_RAM, &splash_vregs },						/* Scroll registers */
75 	{ 0x881804, 0x881fff, MWA16_RAM },										/* Work RAM */
76 	{ 0x8c0000, 0x8c0fff, paletteram16_xRRRRRGGGGGBBBBB_word_w, &paletteram16 },/* Palette is xRRRRxGGGGxBBBBx */
77 	{ 0x900000, 0x900fff, MWA16_RAM, &splash_spriteram },					/* Sprite RAM */
78 	{ 0xffc000, 0xffffff, MWA16_RAM },										/* Work RAM */
79 MEMORY_END
80 
81 
82 static MEMORY_READ_START( splash_readmem_sound )
83 	{ 0x0000, 0xd7ff, MRA_ROM },					/* ROM */
84 	{ 0xe800, 0xe800, soundlatch_r },				/* Sound latch */
85 	{ 0xf000, 0xf000, YM3812_status_port_0_r },		/* YM3812 */
86 	{ 0xf800, 0xffff, MRA_RAM },					/* RAM */
87 MEMORY_END
88 
89 static int adpcm_data;
90 
WRITE_HANDLER(splash_adpcm_data_w)91 static WRITE_HANDLER( splash_adpcm_data_w ){
92 	adpcm_data = data;
93 }
94 
splash_msm5205_int(int data)95 static void splash_msm5205_int(int data)
96 {
97 	MSM5205_data_w(0,adpcm_data >> 4);
98 	adpcm_data = (adpcm_data << 4) & 0xf0;
99 }
100 
101 
MEMORY_WRITE_START(splash_writemem_sound)102 static MEMORY_WRITE_START( splash_writemem_sound )
103 	{ 0x0000, 0xd7ff, MWA_ROM },					/* ROM */
104 	{ 0xd800, 0xd800, splash_adpcm_data_w },		/* ADPCM data for the MSM5205 chip */
105 /*	{ 0xe000, 0xe000, MWA_NOP },					 // ??? /*/
106 	{ 0xf000, 0xf000, YM3812_control_port_0_w },	/* YM3812 */
107 	{ 0xf001, 0xf001, YM3812_write_port_0_w },		/* YM3812 */
108 	{ 0xf800, 0xffff, MWA_RAM },					/* RAM */
109 MEMORY_END
110 
111 
112 INPUT_PORTS_START( splash )
113 	PORT_START	/* DSW #1 */
114 	PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
115 	PORT_DIPSETTING(    0x06, DEF_STR( 5C_1C ) )
116 	PORT_DIPSETTING(    0x07, DEF_STR( 4C_1C ) )
117 	PORT_DIPSETTING(    0x08, DEF_STR( 3C_1C ) )
118 	PORT_DIPSETTING(    0x09, DEF_STR( 2C_1C ) )
119 	PORT_DIPSETTING(    0x0f, DEF_STR( 1C_1C ) )
120 	PORT_DIPSETTING(    0x05, DEF_STR( 2C_3C ) )
121 	PORT_DIPSETTING(    0x0e, DEF_STR( 1C_2C ) )
122 	PORT_DIPSETTING(    0x0d, DEF_STR( 1C_3C ) )
123 	PORT_DIPSETTING(    0x0c, DEF_STR( 1C_4C ) )
124 	PORT_DIPSETTING(    0x0b, DEF_STR( 1C_5C ) )
125 	PORT_DIPSETTING(    0x0a, DEF_STR( 1C_6C ) )
126 	PORT_DIPSETTING(    0x00, "1C/1C or Free Play (if Coin B too)" )
127 	PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
128 	PORT_DIPSETTING(    0x60, DEF_STR( 5C_1C ) )
129 	PORT_DIPSETTING(    0x70, DEF_STR( 4C_1C ) )
130 	PORT_DIPSETTING(    0x80, DEF_STR( 3C_1C ) )
131 	PORT_DIPSETTING(    0x90, DEF_STR( 2C_1C ) )
132 	PORT_DIPSETTING(    0xf0, DEF_STR( 1C_1C ) )
133 	PORT_DIPSETTING(    0x50, DEF_STR( 2C_3C ) )
134 	PORT_DIPSETTING(    0xe0, DEF_STR( 1C_2C ) )
135 	PORT_DIPSETTING(    0xd0, DEF_STR( 1C_3C ) )
136 	PORT_DIPSETTING(    0xc0, DEF_STR( 1C_4C ) )
137 	PORT_DIPSETTING(    0xb0, DEF_STR( 1C_5C ) )
138 	PORT_DIPSETTING(    0xa0, DEF_STR( 1C_6C ) )
139 	PORT_DIPSETTING(    0x00, "1C/1C or Free Play (if Coin A too)" )
140 
141 	PORT_START	/* DSW #2 */
142 	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
143 	PORT_DIPSETTING(    0x02, "Easy" )
144 	PORT_DIPSETTING(    0x03, "Normal" )
145 	PORT_DIPSETTING(    0x01, "Hard" )
146 	PORT_DIPSETTING(    0x00, "Hardest" )
147 	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) )
148 	PORT_DIPSETTING(    0x08, "1" )
149 	PORT_DIPSETTING(    0x04, "2" )
150 	PORT_DIPSETTING(    0x0c, "3" )
151 	/* 	according to the manual, Lives = 0x00 is NOT used */
152 	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) )
153 	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
154 	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
155 	PORT_DIPNAME( 0x20, 0x20, "Girls" )
156 	PORT_DIPSETTING(    0x00, "Light" )
157 	PORT_DIPSETTING(    0x20, "Hard" )
158 	PORT_DIPNAME( 0x40, 0x40, "Paint Mode" )
159 	PORT_DIPSETTING(    0x00, "Paint again" )
160 	PORT_DIPSETTING(    0x40, "Normal" )
161 	PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
162 
163 	PORT_START	/* 1P INPUTS & COINSW */
164 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER1 )
165 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER1 )
166 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
167 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER1 )
168 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
169 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
170 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
171 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
172 
173 	PORT_START	/* 2P INPUTS & STARTSW */
174 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    | IPF_8WAY | IPF_PLAYER2 )
175 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  | IPF_8WAY | IPF_PLAYER2 )
176 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
177 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  | IPF_8WAY | IPF_PLAYER2 )
178 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
179 	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
180 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
181 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
182 INPUT_PORTS_END
183 
184 
185 static struct GfxLayout tilelayout8 =
186 {
187 	8,8,									/* 8x8 tiles */
188 	0x20000/8,								/* number of tiles */
189 	4,										/* bitplanes */
190 	{ 0*0x20000*8, 1*0x20000*8, 2*0x20000*8, 3*0x20000*8 }, /* plane offsets */
191 	{ 0,1,2,3,4,5,6,7 },
192 	{ 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8 },
193 	8*8
194 };
195 
196 static struct GfxLayout tilelayout16 =
197 {
198 	16,16,									/* 16x16 tiles */
199 	0x20000/32,								/* number of tiles */
200 	4,										/* bitplanes */
201 	{ 0*0x20000*8, 1*0x20000*8, 2*0x20000*8, 3*0x20000*8 }, /* plane offsets */
202 	{ 0,1,2,3,4,5,6,7, 16*8+0,16*8+1,16*8+2,16*8+3,16*8+4,16*8+5,16*8+6,16*8+7 },
203 	{ 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8, 8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8 },
204 	32*8
205 };
206 
207 static struct GfxDecodeInfo gfxdecodeinfo[] =
208 {
209 	{ REGION_GFX1, 0x000000, &tilelayout8 ,0,128 },
210 	{ REGION_GFX1, 0x000000, &tilelayout16,0,128 },
211 	{ -1 }
212 };
213 
214 static struct YM3812interface splash_ym3812_interface =
215 {
216 	1,						/* 1 chip */
217 	3000000,				/* 3 MHz? */
218 	{ 80 },					/* volume */
219 	{ 0 }					/* IRQ handler */
220 };
221 
222 static struct MSM5205interface splash_msm5205_interface =
223 {
224 	1,						/* 1 chip */
225 	384000,					/* 384KHz */
226 	{ splash_msm5205_int },	/* IRQ handler */
227 	{ MSM5205_S48_4B },		/* 8KHz */
228 	{ 80 }					/* volume */
229 };
230 
231 
232 static MACHINE_DRIVER_START( splash )
233 
234 	/* basic machine hardware */
235 	MDRV_CPU_ADD(M68000,24000000/2)			/* 12 MHz */
236 	MDRV_CPU_MEMORY(splash_readmem,splash_writemem)
237 	MDRV_CPU_VBLANK_INT(irq6_line_hold,1)
238 
239 	MDRV_CPU_ADD(Z80,30000000/8)
240 	MDRV_CPU_FLAGS(CPU_AUDIO_CPU)			/* 3.75 MHz? */
241 	MDRV_CPU_MEMORY(splash_readmem_sound,splash_writemem_sound)
242 	MDRV_CPU_VBLANK_INT(nmi_line_pulse,64)	/* needed for the msm5205 to play the samples */
243 
244 	MDRV_FRAMES_PER_SECOND(60)
245 	MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
246 
247 	/* video hardware */
248 	MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
249 	MDRV_SCREEN_SIZE(64*8, 64*8)
250 	MDRV_VISIBLE_AREA(2*8, 49*8-1, 2*8, 32*8-1)
251 	MDRV_GFXDECODE(gfxdecodeinfo)
252 	MDRV_PALETTE_LENGTH(2048)
253 
254 	MDRV_VIDEO_START(splash)
255 	MDRV_VIDEO_UPDATE(splash)
256 
257 	/* sound hardware */
258 	MDRV_SOUND_ADD(YM3812, splash_ym3812_interface)
259 	MDRV_SOUND_ADD(MSM5205, splash_msm5205_interface)
260 MACHINE_DRIVER_END
261 
262 
263 ROM_START( splash )
264 	ROM_REGION( 0x400000, REGION_CPU1, 0 )	/* 68000 code + gfx */
265 	ROM_LOAD16_BYTE(	"4g",	0x000000, 0x020000, CRC(b38fda40) SHA1(37ddf4b6f9f2f6cc58efefc277bc3ae9dc71e6d0) )
266 	ROM_LOAD16_BYTE(	"4i",	0x000001, 0x020000, CRC(02359c47) SHA1(6817424b2b1afffa99cec5b8fae4fb8436db2bb5) )
267 	ROM_LOAD16_BYTE(	"5g",	0x100000, 0x080000, CRC(a4e8ed18) SHA1(64ce47193ee4bb3a8014d7c14c559b4ebb3af083) )
268 	ROM_LOAD16_BYTE(	"5i",	0x100001, 0x080000, CRC(73e1154d) SHA1(2c055ad29a32c6c1e712cc35b5972f1e69cdebb7) )
269 	ROM_LOAD16_BYTE(	"6g",	0x200000, 0x080000, CRC(ffd56771) SHA1(35ad9874b6ea5aa3ba38a31d723093b4dd2cfdb8) )
270 	ROM_LOAD16_BYTE(	"6i",	0x200001, 0x080000, CRC(16e9170c) SHA1(96fc237cb172039df153dc70d15ed7d9ee750363) )
271 	ROM_LOAD16_BYTE(	"8g",	0x300000, 0x080000, CRC(dc3a3172) SHA1(2b322b52e3e8da00f26dd276cb72bd2d48c2deaa) )
272 	ROM_LOAD16_BYTE(	"8i",	0x300001, 0x080000, CRC(2e23e6c3) SHA1(baf9ab4c3261c3f06f5e43c1e50aba9222acb71d) )
273 
274 	ROM_REGION( 0x010000, REGION_CPU2, 0 )	/* Z80 code + sound data */
275 	ROM_LOAD( "5c",	0x00000, 0x10000, CRC(0ed7ebc9) SHA1(28ef16e20d754deef49be6a5c9f63311e9ec94a3) )
276 
277 	ROM_REGION( 0x080000, REGION_GFX1, ROMREGION_DISPOSE )
278 	ROM_LOAD( "18i",	0x000000, 0x020000, CRC(028a4a68) SHA1(19384988e3690886ed55886ecdc4e4c566dbe4ba) )
279 	ROM_LOAD( "15i",	0x020000, 0x020000, CRC(2a8cb830) SHA1(bc54dfb03fade154085aa2f66784e07664a7a3d8) )
280 	ROM_LOAD( "16i",	0x040000, 0x020000, CRC(21aeff2c) SHA1(0c307e94f4a814c674ba0ab471a6bdd57e43c265) )
281 	ROM_LOAD( "13i",	0x060000, 0x020000, CRC(febb9893) SHA1(bb607a608c6c1658748a17a62431e8c30323c7ec) )
282 ROM_END
283 
284 
285 GAME( 1992, splash, 0, splash, splash, 0, ROT0, "Gaelco", "Splash! (Ver. 1.2 World)" )
286