1 /***************************************************************************
2
3 Super Contra / Thunder Cross
4
5 driver by Bryan McPhail, Manuel Abadia
6
7 K052591 emulation by Eddie Edwards
8
9 ***************************************************************************/
10
11 #include "driver.h"
12 #include "vidhrdw/generic.h"
13 #include "cpu/konami/konami.h" /* for the callback and the firq irq definition */
14 #include "vidhrdw/konamiic.h"
15 #include "mamedbg.h"
16
17 static MACHINE_INIT( scontra );
18 static MACHINE_INIT( thunderx );
19 static void thunderx_banking(int lines);
20
21 extern int scontra_priority;
22 VIDEO_START( scontra );
23 VIDEO_UPDATE( scontra );
24
25 static int unknown_enable = 0;
26 extern int debug_key_pressed;
27
28 /***************************************************************************/
29
INTERRUPT_GEN(scontra_interrupt)30 static INTERRUPT_GEN( scontra_interrupt )
31 {
32 if (K052109_is_IRQ_enabled())
33 cpu_set_irq_line(0, KONAMI_IRQ_LINE, HOLD_LINE);
34 }
35
thunderx_firq_callback(int x)36 static void thunderx_firq_callback(int x)
37 {
38 cpu_set_irq_line(0, KONAMI_FIRQ_LINE, HOLD_LINE);
39 }
40
41
42 static int palette_selected;
43 static int rambank,pmcbank;
44 static unsigned char *ram,*pmcram;
45
READ_HANDLER(scontra_bankedram_r)46 static READ_HANDLER( scontra_bankedram_r )
47 {
48 if (palette_selected)
49 return paletteram_r(offset);
50 else
51 return ram[offset];
52 }
53
WRITE_HANDLER(scontra_bankedram_w)54 static WRITE_HANDLER( scontra_bankedram_w )
55 {
56 if (palette_selected)
57 paletteram_xBBBBBGGGGGRRRRR_swap_w(offset,data);
58 else
59 ram[offset] = data;
60 }
61
READ_HANDLER(thunderx_bankedram_r)62 static READ_HANDLER( thunderx_bankedram_r )
63 {
64 if (rambank & 0x01)
65 return ram[offset];
66 else if (rambank & 0x10)
67 {
68 if (pmcbank)
69 {
70 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "%04x read pmcram %04x\n",activecpu_get_pc(),offset);*/
71 return pmcram[offset];
72 }
73 else
74 {
75 log_cb(RETRO_LOG_DEBUG, LOGPRE "%04x read pmc internal ram %04x\n",activecpu_get_pc(),offset);
76 return 0;
77 }
78 }
79 else
80 return paletteram_r(offset);
81 }
82
WRITE_HANDLER(thunderx_bankedram_w)83 static WRITE_HANDLER( thunderx_bankedram_w )
84 {
85 if (rambank & 0x01)
86 ram[offset] = data;
87 else if (rambank & 0x10)
88 {
89 /* if (offset == 0x200) debug_signal_breakpoint(1);*/
90 if (pmcbank)
91 {
92 log_cb(RETRO_LOG_DEBUG, LOGPRE "%04x pmcram %04x = %02x\n",activecpu_get_pc(),offset,data);
93 pmcram[offset] = data;
94 }
95 else
96 log_cb(RETRO_LOG_DEBUG, LOGPRE "%04x pmc internal ram %04x = %02x\n",activecpu_get_pc(),offset,data);
97 }
98 else
99 paletteram_xBBBBBGGGGGRRRRR_swap_w(offset,data);
100 }
101
102 /*
103 this is the data written to internal ram on startup:
104
105 Japan version US version
106 00: e7 00 00 ad 08 e7 00 00 ad 08
107 01: 5f 80 05 a0 0c 1f 80 05 a0 0c LDW ACC,RAM+05
108 02: 42 7e 00 8b 04 regE
109 03: df 00 e2 8b 08 df 8e 00 cb 04 regE
110 04: 5f 80 06 a0 0c 5f 80 07 a0 0c LDB ACC,RAM+07
111 05: df 7e 00 cb 08 df 7e 00 cb 08 LDB R7,[Rx]
112 06: 1b 80 00 a0 0c 1b 80 00 a0 0c LDPTR #0 PTR2,RAM+00
113 07: df 10 00 cb 08 df 10 00 cb 08 LDB R1,[PTR] (fl) LDB R1,[Rx] (flags)
114 08: 5f 80 03 a0 0c 5f 80 03 a0 0c LDB R0,[3] (cm) LDB ACC,RAM+03 load collide mask
115 09: 1f 20 00 cb 08 1f 20 00 cb 08 LD CMP2,R0 test (AND) R1 vs ACC
116 0a: c4 00 00 ab 0c c4 00 00 ab 0c INC PTR LEA Rx,[++PTR2]
117 0b: df 20 00 cb 08 df 20 00 cb 08 LDB R2,[PTR] (w) LDB R2,[Rx] (width)
118 0c: c4 00 00 ab 0c c4 00 00 ab 0c INC PTR LEA Rx,[++PTR2]
119 0d: df 30 00 cb 08 df 30 00 cb 08 LDB R3,[PTR] (h) LDB R3,[Rx] (height)
120 0e: c4 00 00 ab 0c c4 00 00 ab 0c INC PTR LEA Rx,[++PTR2]
121 0f: df 40 00 cb 08 df 40 00 cb 08 LDB R4,[PTR] (x) LDB R4,[Rx] (x)
122 10: c4 00 00 ab 0c c4 00 00 ab 0c INC PTR LEA Rx,[++PTR2]
123 11: df 50 00 cb 08 df 50 00 cb 08 LDB R5,[PTR] (y) LDB R5,[Rx] (y)
124 12: 60 22 35 e9 08 60 22 36 e9 08 BANDZ CMP2,R1,36 R2/R1, BEQ 36
125 13: 44 0e 00 ab 08 44 0e 00 ab 08 MOVE PTR,INNER LEA Rx,[PTR,0] load flags
126 14: df 60 00 cb 08 df 60 00 cb 08 LDB R6,[PTR] (fl) LDB R6,[Rx]
127 15: 5f 80 04 a0 0c 5f 80 04 a0 0c LDB R0,[4] (hm) LDB ACC,RAM+04 load hit mask
128 16: 1f 60 00 cb 08 1f 60 00 cb 08 LD CMP6,R0 test R6 and ACC (AND)
129 17: 60 6c 31 e9 08 60 6c 32 e9 08 BANDZ CMP6,R6,32 R6, BEQ 32
130 18: 45 8e 01 a0 0c 45 8e 01 a0 0c LDB R0,[INNER+1] LDB Ry,[PTR,1] (width)
131 19: c5 64 00 cb 08 c5 64 00 cb 08 ADD ACC,R0,R2 R6 = ADD Ry,R2
132 1a: 45 8e 03 a0 0c 45 8e 03 a0 0c LDB R0,[INNER+3] LDB Ry,[PTR,3] (x)
133 1b: 67 00 00 cb 0c 67 00 00 cb 0c MOV CMP,R0 ??? DEC Ry
134 1c: 15 48 5d c9 0c 15 48 5e c9 0c SUB CMP,R4 ; BGE 1E SUB R4,Ry; Bcc 1E
135 1d: 12 00 00 eb 0c 12 00 00 eb 0c NEG CMP ??? NEG Ry
136 1e: 48 6c 71 e9 0c 48 6c 72 e9 0c B (CMP > ACC) 32 R6, BLO 32
137 1f: 45 8e 02 a0 0c 45 8e 02 a0 0c LDB R0,[INNER+2] LDB Ry,[PTR,2] (height)
138 20: c5 66 00 cb 08 c5 66 00 cb 08 ADD ACC,R0,R3 R6 = ADD Ry,R3
139 21: 45 8e 04 a0 0c 45 8e 04 a0 0c LDB R0,[INNER+4] LDB Ry,[PTR,4] (y)
140 22: 67 00 00 cb 0c 67 00 00 cb 0c MOV CMP,R0 ??? DEC Ry
141 23: 15 5a 64 c9 0c 15 5a 65 c9 0c SUB CMP,R5 ; BGE 25 SUB R5,Ry; Bcc 25
142 24: 12 00 00 eb 0c 12 00 00 eb 0c NEG CMP ??? NEG Ry
143 25: 48 6c 71 e9 0c 48 6c 72 e9 0c B (CMP > ACC) 32 R6, BLO 32
144 26: e5 92 9b e0 0c e5 92 9b e0 0c AND R1,#$9B
145 27: dd 92 10 e0 0c dd 92 10 e0 0c OR R1,#$10
146 28: 5c fe 00 a0 0c 5c fe 00 a0 0c ??? STB [PTR,0]
147 29: df 60 00 d3 08 df 60 00 d3 08 LDB R6,
148 2a: e5 ec 9f e0 0c e5 ec 9f e0 0c AND R6,#$9F
149 2b: dd ec 10 00 0c dd ec 10 00 0c OR R6,#$10
150 2c: 25 ec 04 c0 0c 25 ec 04 c0 0c STB R6,[PTR2,-4]
151 2d: 18 82 00 00 0c 18 82 00 00 0c
152 2e: 4d 80 03 a0 0c 4d 80 03 a0 0c RAM+03
153 2f: df e0 e6 e0 0c df e0 36 e1 0c
154 30: 49 60 75 f1 08 49 60 76 f1 08 Jcc 36
155 31: 67 00 35 cd 08 67 00 36 cd 08 Jcc 36
156 32: c5 fe 05 e0 0c c5 fe 05 e0 0c ADD R7,R7,5 ADD regE,#5
157 33: 5f 80 02 a0 0c 5f 80 02 a0 0c LDB R0, [2] LDB ACC,RAM+02
158 34: 1f 00 00 cb 08 1f 00 00 cb 08 LCMP CMP0,R0
159 35: 48 6e 52 c9 0c 48 6e 53 c9 0c BNEQ CMP0,R7, 33 R6/R7, BLO 13
160 36: c4 00 00 ab 0c c4 00 00 ab 0c INC PTR LEA Rx,[++PTR2]
161 37: 27 00 00 ab 0c 27 00 00 ab 0c
162 38: 42 00 00 8b 04 42 00 00 8b 04 MOVE PTR, OUTER
163 39: 1f 00 00 cb 00 1f 00 00 cb 00 LCMP CMP0 ?? test PTR2 vs ACC
164 3a: 48 00 43 c9 00 48 00 44 c9 00 BLT 4 BLT 04 next in set 0
165 3b: 5f fe 00 e0 08 5f fe 00 e0 08
166 3c: 5f 7e 00 ed 08 5f 7e 00 ed 08
167 3d: ff 04 00 ff 06 ff 04 00 ff 06 STOP STOP
168 3e: 05 07 ff 02 03 05 07 ff 02 03
169 3f: 01 01 e0 02 6c 01 00 60 00 a0
170 03 6c 04 40 04
171 */
172
173 /* run_collisions*/
174 /**/
175 /* collide objects from s0 to e0 against*/
176 /* objects from s1 to e1*/
177 /**/
178 /* only compare objects with the specified bits (cm) set in their flags*/
179 /* only set object 0's hit bit if (hm & 0x40) is true*/
180 /**/
181 /* the data format is:*/
182 /**/
183 /* +0 : flags*/
184 /* +1 : width (4 pixel units)*/
185 /* +2 : height (4 pixel units)*/
186 /* +3 : x (2 pixel units) of center of object*/
187 /* +4 : y (2 pixel units) of center of object*/
188
run_collisions(int s0,int e0,int s1,int e1,int cm,int hm)189 static void run_collisions(int s0, int e0, int s1, int e1, int cm, int hm)
190 {
191 unsigned char* p0;
192 unsigned char* p1;
193 int ii,jj;
194
195 p0 = &pmcram[16 + 5*s0];
196 for (ii = s0; ii < e0; ii++, p0 += 5)
197 {
198 int l0,r0,b0,t0;
199
200 /* check valid*/
201 if (!(p0[0] & cm)) continue;
202
203 /* get area*/
204 l0 = p0[3] - p0[1];
205 r0 = p0[3] + p0[1];
206 t0 = p0[4] - p0[2];
207 b0 = p0[4] + p0[2];
208
209 p1 = &pmcram[16 + 5*s1];
210 for (jj = s1; jj < e1; jj++,p1 += 5)
211 {
212 int l1,r1,b1,t1;
213
214 /* check valid*/
215 if (!(p1[0] & hm)) continue;
216
217 /* get area*/
218 l1 = p1[3] - p1[1];
219 r1 = p1[3] + p1[1];
220 t1 = p1[4] - p1[2];
221 b1 = p1[4] + p1[2];
222
223 /* overlap check*/
224 if (l1 >= r0) continue;
225 if (l0 >= r1) continue;
226 if (t1 >= b0) continue;
227 if (t0 >= b1) continue;
228
229 /* set flags*/
230 p0[0] = (p0[0] & 0x9f) | (p1[0] & 0x04) | 0x10;
231 p1[0] = (p1[0] & 0x9f) | 0x10;
232 }
233 }
234 }
235
236 /* calculate_collisions*/
237 /**/
238 /* emulates K052591 collision detection*/
239
calculate_collisions(void)240 static void calculate_collisions( void )
241 {
242 int X0,Y0;
243 int X1,Y1;
244 int CM,HM;
245
246 /* the data at 0x00 to 0x06 defines the operation*/
247 /**/
248 /* 0x00 : word : last byte of set 0*/
249 /* 0x02 : byte : last byte of set 1*/
250 /* 0x03 : byte : collide mask*/
251 /* 0x04 : byte : hit mask*/
252 /* 0x05 : byte : first byte of set 0*/
253 /* 0x06 : byte : first byte of set 1*/
254 /**/
255 /* the USA version is slightly different:*/
256 /**/
257 /* 0x05 : word : first byte of set 0*/
258 /* 0x07 : byte : first byte of set 1*/
259 /**/
260 /* the operation is to intersect set 0 with set 1*/
261 /* collide mask specifies objects to ignore*/
262 /* hit mask is 40 to set bit on object 0 and object 1*/
263 /* hit mask is 20 to set bit on object 1 only*/
264
265 Y0 = pmcram[0];
266 Y0 = (Y0 << 8) + pmcram[1];
267 Y0 = (Y0 - 15) / 5;
268 Y1 = (pmcram[2] - 15) / 5;
269
270 if (pmcram[5] < 16)
271 {
272 /* US Thunder Cross uses this form*/
273 X0 = pmcram[5];
274 X0 = (X0 << 8) + pmcram[6];
275 X0 = (X0 - 16) / 5;
276 X1 = (pmcram[7] - 16) / 5;
277 }
278 else
279 {
280 /* Japan Thunder Cross uses this form*/
281 X0 = (pmcram[5] - 16) / 5;
282 X1 = (pmcram[6] - 16) / 5;
283 }
284
285 CM = pmcram[3];
286 HM = pmcram[4];
287
288 run_collisions(X0,Y0,X1,Y1,CM,HM);
289 }
290
WRITE_HANDLER(thunderx_1f98_w)291 static WRITE_HANDLER( thunderx_1f98_w )
292 {
293 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "%04x: 1f98_w %02x\n",activecpu_get_pc(),data);*/
294
295 /* bit 0 = enable char ROM reading through the video RAM */
296 K052109_set_RMRD_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
297
298 /* bit 1 = PMC-BK */
299 pmcbank = (data & 0x02) >> 1;
300
301 /* bit 2 = do collision detection when 0->1 */
302 if ((data & 4) && !(unknown_enable & 4))
303 {
304 calculate_collisions();
305
306 /* 100 cycle delay is arbitrary */
307 timer_set(TIME_IN_CYCLES(100,0),0, thunderx_firq_callback);
308 }
309
310 unknown_enable = data;
311 }
312
WRITE_HANDLER(scontra_bankswitch_w)313 WRITE_HANDLER( scontra_bankswitch_w )
314 {
315 unsigned char *RAM = memory_region(REGION_CPU1);
316 int offs;
317
318 /*logerror("%04x: bank switch %02x\n",activecpu_get_pc(),data);*/
319
320 /* bits 0-3 ROM bank */
321 offs = 0x10000 + (data & 0x0f)*0x2000;
322 cpu_setbank( 1, &RAM[offs] );
323
324 /* bit 4 select work RAM or palette RAM at 5800-5fff */
325 palette_selected = ~data & 0x10;
326
327 /* bits 5/6 coin counters */
328 coin_counter_w(0,data & 0x20);
329 coin_counter_w(1,data & 0x40);
330
331 /* bit 7 controls layer priority */
332 scontra_priority = data & 0x80;
333 }
334
WRITE_HANDLER(thunderx_videobank_w)335 static WRITE_HANDLER( thunderx_videobank_w )
336 {
337 /*logerror("%04x: select video ram bank %02x\n",activecpu_get_pc(),data);*/
338 /* 0x01 = work RAM at 4000-5fff */
339 /* 0x00 = palette at 5800-5fff */
340 /* 0x10 = unknown RAM at 5800-5fff */
341 rambank = data;
342
343 /* bits 1/2 coin counters */
344 coin_counter_w(0,data & 0x02);
345 coin_counter_w(1,data & 0x04);
346
347 /* bit 3 controls layer priority (seems to be always 1) */
348 scontra_priority = data & 0x08;
349 }
350
WRITE_HANDLER(thunderx_sh_irqtrigger_w)351 static WRITE_HANDLER( thunderx_sh_irqtrigger_w )
352 {
353 cpu_set_irq_line_and_vector(1,0,HOLD_LINE,0xff);
354 }
355
WRITE_HANDLER(scontra_snd_bankswitch_w)356 static WRITE_HANDLER( scontra_snd_bankswitch_w )
357 {
358 /* b3-b2: bank for chanel B */
359 /* b1-b0: bank for chanel A */
360
361 int bank_A = (data & 0x03);
362 int bank_B = ((data >> 2) & 0x03);
363 K007232_set_bank( 0, bank_A, bank_B );
364 }
365
366 /***************************************************************************/
367
MEMORY_READ_START(scontra_readmem)368 static MEMORY_READ_START( scontra_readmem )
369 { 0x1f90, 0x1f90, input_port_0_r }, /* coin */
370 { 0x1f91, 0x1f91, input_port_1_r }, /* p1 */
371 { 0x1f92, 0x1f92, input_port_2_r }, /* p2 */
372 { 0x1f93, 0x1f93, input_port_5_r }, /* Dip 3 */
373 { 0x1f94, 0x1f94, input_port_3_r }, /* Dip 1 */
374 { 0x1f95, 0x1f95, input_port_4_r }, /* Dip 2 */
375
376 { 0x0000, 0x3fff, K052109_051960_r },
377 { 0x4000, 0x57ff, MRA_RAM },
378 { 0x5800, 0x5fff, scontra_bankedram_r }, /* palette + work RAM */
379 { 0x6000, 0x7fff, MRA_BANK1 },
380 { 0x8000, 0xffff, MRA_ROM },
381 MEMORY_END
382
383 static MEMORY_READ_START( thunderx_readmem )
384 { 0x1f90, 0x1f90, input_port_0_r }, /* coin */
385 { 0x1f91, 0x1f91, input_port_1_r }, /* p1 */
386 { 0x1f92, 0x1f92, input_port_2_r }, /* p2 */
387 { 0x1f93, 0x1f93, input_port_5_r }, /* Dip 3 */
388 { 0x1f94, 0x1f94, input_port_3_r }, /* Dip 1 */
389 { 0x1f95, 0x1f95, input_port_4_r }, /* Dip 2 */
390
391 { 0x0000, 0x3fff, K052109_051960_r },
392 { 0x4000, 0x57ff, MRA_RAM },
393 { 0x5800, 0x5fff, thunderx_bankedram_r }, /* palette + work RAM + unknown RAM */
394 { 0x6000, 0x7fff, MRA_BANK1 },
395 { 0x8000, 0xffff, MRA_ROM },
396 MEMORY_END
397
398 static MEMORY_WRITE_START( scontra_writemem )
399 { 0x1f80, 0x1f80, scontra_bankswitch_w }, /* bankswitch control + coin counters */
400 { 0x1f84, 0x1f84, soundlatch_w },
401 { 0x1f88, 0x1f88, thunderx_sh_irqtrigger_w }, /* cause interrupt on audio CPU */
402 { 0x1f8c, 0x1f8c, watchdog_reset_w },
403 { 0x1f98, 0x1f98, thunderx_1f98_w },
404
405 { 0x0000, 0x3fff, K052109_051960_w }, /* video RAM + sprite RAM */
406 { 0x4000, 0x57ff, MWA_RAM },
407 { 0x5800, 0x5fff, scontra_bankedram_w, &ram }, /* palette + work RAM */
408 { 0x6000, 0xffff, MWA_ROM },
409 MEMORY_END
410
411 static MEMORY_WRITE_START( thunderx_writemem )
412 { 0x1f80, 0x1f80, thunderx_videobank_w },
413 { 0x1f84, 0x1f84, soundlatch_w },
414 { 0x1f88, 0x1f88, thunderx_sh_irqtrigger_w }, /* cause interrupt on audio CPU */
415 { 0x1f8c, 0x1f8c, watchdog_reset_w },
416 { 0x1f98, 0x1f98, thunderx_1f98_w },
417
418 { 0x0000, 0x3fff, K052109_051960_w },
419 { 0x4000, 0x57ff, MWA_RAM },
420 { 0x5800, 0x5fff, thunderx_bankedram_w, &ram }, /* palette + work RAM + unknown RAM */
421 { 0x6000, 0xffff, MWA_ROM },
422 MEMORY_END
423
424 static MEMORY_READ_START( scontra_readmem_sound )
425 { 0x0000, 0x7fff, MRA_ROM }, /* ROM */
426 { 0x8000, 0x87ff, MRA_RAM }, /* RAM */
427 { 0xa000, 0xa000, soundlatch_r }, /* soundlatch_r */
428 { 0xb000, 0xb00d, K007232_read_port_0_r }, /* 007232 registers */
429 { 0xc001, 0xc001, YM2151_status_port_0_r }, /* YM2151 */
430 MEMORY_END
431
432 static MEMORY_WRITE_START( scontra_writemem_sound )
433 { 0x0000, 0x7fff, MWA_ROM }, /* ROM */
434 { 0x8000, 0x87ff, MWA_RAM }, /* RAM */
435 { 0xb000, 0xb00d, K007232_write_port_0_w }, /* 007232 registers */
436 { 0xc000, 0xc000, YM2151_register_port_0_w }, /* YM2151 */
437 { 0xc001, 0xc001, YM2151_data_port_0_w }, /* YM2151 */
438 { 0xf000, 0xf000, scontra_snd_bankswitch_w }, /* 007232 bank select */
439 MEMORY_END
440
441 static MEMORY_READ_START( thunderx_readmem_sound )
442 { 0x0000, 0x7fff, MRA_ROM },
443 { 0x8000, 0x87ff, MRA_RAM },
444 { 0xa000, 0xa000, soundlatch_r },
445 { 0xc001, 0xc001, YM2151_status_port_0_r },
446 MEMORY_END
447
448 static MEMORY_WRITE_START( thunderx_writemem_sound )
449 { 0x0000, 0x7fff, MWA_ROM },
450 { 0x8000, 0x87ff, MWA_RAM },
451 { 0xc000, 0xc000, YM2151_register_port_0_w },
452 { 0xc001, 0xc001, YM2151_data_port_0_w },
453 MEMORY_END
454
455 /***************************************************************************
456
457 Input Ports
458
459 ***************************************************************************/
460
461 INPUT_PORTS_START( scontra )
462 PORT_START /* COINSW */
463 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
464 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
465 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
466 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
467 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
468 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
469 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
470 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
471
472 PORT_START /* PLAYER 1 INPUTS */
473 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
474 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
475 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
476 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
477 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
478 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
479 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
480 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
481
482 PORT_START /* PLAYER 2 INPUTS */
483 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
484 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
485 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
486 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
487 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
488 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
489 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
490 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
491
492 PORT_START /* DSW #1 */
493 PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
494 PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ) )
495 PORT_DIPSETTING( 0x05, DEF_STR( 3C_1C ) )
496 PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
497 PORT_DIPSETTING( 0x04, DEF_STR( 3C_2C ) )
498 PORT_DIPSETTING( 0x01, DEF_STR( 4C_3C ) )
499 PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) )
500 PORT_DIPSETTING( 0x03, DEF_STR( 3C_4C ) )
501 PORT_DIPSETTING( 0x07, DEF_STR( 2C_3C ) )
502 PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) )
503 PORT_DIPSETTING( 0x06, DEF_STR( 2C_5C ) )
504 PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) )
505 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
506 PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
507 PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
508 PORT_DIPSETTING( 0x09, DEF_STR( 1C_7C ) )
509 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
510 PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
511 PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
512 PORT_DIPSETTING( 0x50, DEF_STR( 3C_1C ) )
513 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
514 PORT_DIPSETTING( 0x40, DEF_STR( 3C_2C ) )
515 PORT_DIPSETTING( 0x10, DEF_STR( 4C_3C ) )
516 PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ) )
517 PORT_DIPSETTING( 0x30, DEF_STR( 3C_4C ) )
518 PORT_DIPSETTING( 0x70, DEF_STR( 2C_3C ) )
519 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ) )
520 PORT_DIPSETTING( 0x60, DEF_STR( 2C_5C ) )
521 PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ) )
522 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
523 PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
524 PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
525 PORT_DIPSETTING( 0x90, DEF_STR( 1C_7C ) )
526 /* PORT_DIPSETTING( 0x00, "Invalid" )*/
527
528 PORT_START /* DSW #2 */
529 PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )
530 PORT_DIPSETTING( 0x03, "2" )
531 PORT_DIPSETTING( 0x02, "3" )
532 PORT_DIPSETTING( 0x01, "5" )
533 PORT_DIPSETTING( 0x00, "7" )
534 PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) /* test mode calls it cabinet type, */
535 PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) /* but this is a 2 players game */
536 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
537 PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) )
538 PORT_DIPSETTING( 0x18, "30000 200000" )
539 PORT_DIPSETTING( 0x10, "50000 300000" )
540 PORT_DIPSETTING( 0x08, "30000" )
541 PORT_DIPSETTING( 0x00, "50000" )
542 PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) )
543 PORT_DIPSETTING( 0x60, "Easy" )
544 PORT_DIPSETTING( 0x40, "Normal" )
545 PORT_DIPSETTING( 0x20, "Difficult" )
546 PORT_DIPSETTING( 0x00, "Very Difficult" )
547 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
548 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
549 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
550
551 PORT_START /* DSW #3 */
552 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
553 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
554 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
555 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
556 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
557 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
558 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
559 PORT_DIPNAME( 0x08, 0x08, "Continue Limit" )
560 PORT_DIPSETTING( 0x08, "3" )
561 PORT_DIPSETTING( 0x00, "5" )
562 PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
563 INPUT_PORTS_END
564
565 INPUT_PORTS_START( thunderx )
566 PORT_START /* IN0 */
567 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
568 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
569 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
570 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
571 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
572 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
573 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
574 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
575
576 PORT_START /* PLAYER 1 INPUTS */
577 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
578 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
579 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
580 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
581 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
582 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
583 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
584 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
585
586 PORT_START /* PLAYER 2 INPUTS */
587 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
588 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
589 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
590 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
591 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
592 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
593 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
594 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
595
596 PORT_START
597 PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
598 PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ) )
599 PORT_DIPSETTING( 0x05, DEF_STR( 3C_1C ) )
600 PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
601 PORT_DIPSETTING( 0x04, DEF_STR( 3C_2C ) )
602 PORT_DIPSETTING( 0x01, DEF_STR( 4C_3C ) )
603 PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) )
604 PORT_DIPSETTING( 0x03, DEF_STR( 3C_4C ) )
605 PORT_DIPSETTING( 0x07, DEF_STR( 2C_3C ) )
606 PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) )
607 PORT_DIPSETTING( 0x06, DEF_STR( 2C_5C ) )
608 PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) )
609 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
610 PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
611 PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
612 PORT_DIPSETTING( 0x09, DEF_STR( 1C_7C ) )
613 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
614 PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
615 PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
616 PORT_DIPSETTING( 0x50, DEF_STR( 3C_1C ) )
617 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
618 PORT_DIPSETTING( 0x40, DEF_STR( 3C_2C ) )
619 PORT_DIPSETTING( 0x10, DEF_STR( 4C_3C ) )
620 PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ) )
621 PORT_DIPSETTING( 0x30, DEF_STR( 3C_4C ) )
622 PORT_DIPSETTING( 0x70, DEF_STR( 2C_3C ) )
623 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ) )
624 PORT_DIPSETTING( 0x60, DEF_STR( 2C_5C ) )
625 PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ) )
626 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
627 PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
628 PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
629 PORT_DIPSETTING( 0x90, DEF_STR( 1C_7C ) )
630 /* PORT_DIPSETTING( 0x00, "Invalid" )*/
631
632 PORT_START
633 PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )
634 PORT_DIPSETTING( 0x03, "2" )
635 PORT_DIPSETTING( 0x02, "3" )
636 PORT_DIPSETTING( 0x01, "5" )
637 PORT_DIPSETTING( 0x00, "7" )
638 PORT_DIPNAME( 0x04, 0x00, "Award Bonus Life" )
639 PORT_DIPSETTING( 0x04, DEF_STR( No ) )
640 PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
641 PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) )
642 PORT_DIPSETTING( 0x18, "30000 200000" )
643 PORT_DIPSETTING( 0x10, "50000 300000" )
644 PORT_DIPSETTING( 0x08, "30000" )
645 PORT_DIPSETTING( 0x00, "50000" )
646 PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) )
647 PORT_DIPSETTING( 0x60, "Easy" )
648 PORT_DIPSETTING( 0x40, "Normal" )
649 PORT_DIPSETTING( 0x20, "Difficult" )
650 PORT_DIPSETTING( 0x00, "Very Difficult" )
651 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
652 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
653 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
654
655 PORT_START
656 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
657 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
658 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
659 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
660 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
661 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
662 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
663 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
664 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
665 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
666 PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
667 INPUT_PORTS_END
668
669
670
671 /***************************************************************************
672
673 Machine Driver
674
675 ***************************************************************************/
676
677 static struct YM2151interface ym2151_interface =
678 {
679 1, /* 1 chip */
680 3579545, /* 3.579545 MHz */
681 { YM3012_VOL(100,MIXER_PAN_LEFT,100,MIXER_PAN_RIGHT) },
682 { 0 },
683 };
684
volume_callback(int v)685 static void volume_callback(int v)
686 {
687 K007232_set_volume(0,0,(v >> 4) * 0x11,0);
688 K007232_set_volume(0,1,0,(v & 0x0f) * 0x11);
689 }
690
691 static struct K007232_interface k007232_interface =
692 {
693 1, /* number of chips */
694 3579545, /* clock */
695 { REGION_SOUND1 }, /* memory regions */
696 { K007232_VOL(20,MIXER_PAN_CENTER,20,MIXER_PAN_CENTER) }, /* volume */
697 { volume_callback } /* external port callback */
698 };
699
700
701
702 static MACHINE_DRIVER_START( scontra )
703
704 /* basic machine hardware */
705 MDRV_CPU_ADD(KONAMI, 3000000) /* 052001 */
MDRV_CPU_MEMORY(scontra_readmem,scontra_writemem)706 MDRV_CPU_MEMORY(scontra_readmem,scontra_writemem)
707 MDRV_CPU_VBLANK_INT(scontra_interrupt,1)
708
709 MDRV_CPU_ADD(Z80, 3579545)
710 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* ? */
711 MDRV_CPU_MEMORY(scontra_readmem_sound,scontra_writemem_sound)
712
713 MDRV_FRAMES_PER_SECOND(60)
714 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
715
716 MDRV_MACHINE_INIT(scontra)
717
718 /* video hardware */
719 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_HAS_SHADOWS)
720 MDRV_SCREEN_SIZE(64*8, 32*8)
721 MDRV_VISIBLE_AREA(14*8, (64-14)*8-1, 2*8, 30*8-1 )
722 MDRV_PALETTE_LENGTH(1024)
723
724 MDRV_VIDEO_START(scontra)
725 MDRV_VIDEO_UPDATE(scontra)
726
727 /* sound hardware */
728 MDRV_SOUND_ADD(YM2151, ym2151_interface)
729 MDRV_SOUND_ADD(K007232, k007232_interface)
730 MACHINE_DRIVER_END
731
732
733 static MACHINE_DRIVER_START( thunderx )
734
735 /* basic machine hardware */
736 MDRV_CPU_ADD(KONAMI, 3000000) /* ? */
737 MDRV_CPU_MEMORY(thunderx_readmem,thunderx_writemem)
738 MDRV_CPU_VBLANK_INT(scontra_interrupt,1)
739
740 MDRV_CPU_ADD(Z80, 3579545)
741 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* ? */
742 MDRV_CPU_MEMORY(thunderx_readmem_sound,thunderx_writemem_sound)
743
744 MDRV_FRAMES_PER_SECOND(60)
745 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
746
747 MDRV_MACHINE_INIT(thunderx)
748
749 /* video hardware */
750 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_HAS_SHADOWS)
751 MDRV_SCREEN_SIZE(64*8, 32*8)
752 MDRV_VISIBLE_AREA(14*8, (64-14)*8-1, 2*8, 30*8-1 )
753 MDRV_PALETTE_LENGTH(1024)
754
755 MDRV_VIDEO_START(scontra)
756 MDRV_VIDEO_UPDATE(scontra)
757
758 /* sound hardware */
759 MDRV_SOUND_ADD(YM2151, ym2151_interface)
760 MACHINE_DRIVER_END
761
762
763 /***************************************************************************
764
765 Game ROMs
766
767 ***************************************************************************/
768
769 ROM_START( scontra )
770 ROM_REGION( 0x30800, REGION_CPU1, 0 ) /* ROMs + banked RAM */
771 ROM_LOAD( "e02.k11", 0x10000, 0x08000, CRC(a61c0ead) SHA1(9a0aadc8d3538fc1d88b761753fffcac8923a218) ) /* banked ROM */
772 ROM_CONTINUE( 0x08000, 0x08000 ) /* fixed ROM */
773 ROM_LOAD( "e03.k13", 0x20000, 0x10000, CRC(00b02622) SHA1(caf1da53815e437e3fb952d29e71f2c314684cd9) ) /* banked ROM */
774
775 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the SOUND CPU */
776 ROM_LOAD( "775-c01.bin", 0x00000, 0x08000, CRC(0ced785a) SHA1(1eebe005a968fbaac595c168499107e34763976c) )
777
778 ROM_REGION( 0x100000, REGION_GFX1, 0 ) /* tiles */
779 ROM_LOAD16_BYTE( "775-a07a.bin", 0x00000, 0x20000, CRC(e716bdf3) SHA1(82e10132f248aed8cc1aea6bb7afe9a1479c8b59) ) /* tiles */
780 ROM_LOAD16_BYTE( "775-a07e.bin", 0x00001, 0x20000, CRC(0986e3a5) SHA1(61c33a3f2e4fde7d23d440b5c3151fe38e25716b) )
781 ROM_LOAD16_BYTE( "775-f07c.bin", 0x40000, 0x10000, CRC(b0b30915) SHA1(0abd858f93f7cc5383a805a5ae06c086c120f208) )
782 ROM_LOAD16_BYTE( "775-f07g.bin", 0x40001, 0x10000, CRC(fbed827d) SHA1(7fcc6cc03ab6238b05799dd50f38c29eb9f98b5a) )
783 ROM_LOAD16_BYTE( "775-f07d.bin", 0x60000, 0x10000, CRC(f184be8e) SHA1(c266be12762f7e81edbe4b36f3c96b03f6ec552b) )
784 ROM_LOAD16_BYTE( "775-f07h.bin", 0x60001, 0x10000, CRC(7b56c348) SHA1(f75c1c0962389f204c8cf1a0bc2da01a922cd742) )
785 ROM_LOAD16_BYTE( "775-a08a.bin", 0x80000, 0x20000, CRC(3ddd11a4) SHA1(4831a891d6cb4507053d576eddd658c338318176) )
786 ROM_LOAD16_BYTE( "775-a08e.bin", 0x80001, 0x20000, CRC(1007d963) SHA1(cba4ca058dee1c8cdeb019e1cc50cae76bf419a1) )
787 ROM_LOAD16_BYTE( "775-f08c.bin", 0xc0000, 0x10000, CRC(53abdaec) SHA1(0e0f7fe4bb9139a1ae94506a832153b711961564) )
788 ROM_LOAD16_BYTE( "775-f08g.bin", 0xc0001, 0x10000, CRC(3df85a6e) SHA1(25a49abbf6e9fe63d4ff6bfff9219c98aa1b5e7b) )
789 ROM_LOAD16_BYTE( "775-f08d.bin", 0xe0000, 0x10000, CRC(102dcace) SHA1(03036b6d9d66a12cb3e97980f149c09d1efbd6d8) )
790 ROM_LOAD16_BYTE( "775-f08h.bin", 0xe0001, 0x10000, CRC(ad9d7016) SHA1(91e9f279b781eefcafffc70afe207f35cc6f4d9d) )
791
792 ROM_REGION( 0x100000, REGION_GFX2, 0 ) /* sprites */
793 ROM_LOAD16_BYTE( "775-a05a.bin", 0x00000, 0x10000, CRC(a0767045) SHA1(e6df0731a9fb3b3d918607de81844e1f9353aac7) ) /* sprites */
794 ROM_LOAD16_BYTE( "775-a05e.bin", 0x00001, 0x10000, CRC(2f656f08) SHA1(140e7948c45d27c6705622d588a65b59ebcc624c) )
795 ROM_LOAD16_BYTE( "775-a05b.bin", 0x20000, 0x10000, CRC(ab8ad4fd) SHA1(c9ae537fa1607fbd11403390d1da923955f0d1ab) )
796 ROM_LOAD16_BYTE( "775-a05f.bin", 0x20001, 0x10000, CRC(1c0eb1b6) SHA1(420eb26acd54ff484301aa2dad587f1b6b437363) )
797 ROM_LOAD16_BYTE( "775-f05c.bin", 0x40000, 0x10000, CRC(5647761e) SHA1(ff7983cb0c2f84f7be9d44e20b01266db4b2836a) )
798 ROM_LOAD16_BYTE( "775-f05g.bin", 0x40001, 0x10000, CRC(a1692cca) SHA1(2cefc4b7532a9d29361843419ee427fb9421b79b) )
799 ROM_LOAD16_BYTE( "775-f05d.bin", 0x60000, 0x10000, CRC(ad676a6f) SHA1(f2ca759c8c8a8007aa022d6c058d0431057a639a) )
800 ROM_LOAD16_BYTE( "775-f05h.bin", 0x60001, 0x10000, CRC(3f925bcf) SHA1(434dd442c0cb5c5c039a69683a3a5f226e49261c) )
801 ROM_LOAD16_BYTE( "775-a06a.bin", 0x80000, 0x10000, CRC(77a34ad0) SHA1(3653fb8458c1e7eb7d83b5cd63f02343c0f2d93e) )
802 ROM_LOAD16_BYTE( "775-a06e.bin", 0x80001, 0x10000, CRC(8a910c94) SHA1(0387a7f412a977fa7a5ca685653ac1bb3dfdbbcb) )
803 ROM_LOAD16_BYTE( "775-a06b.bin", 0xa0000, 0x10000, CRC(563fb565) SHA1(96a2a95ab02456e53651718a7080f18c252451c8) )
804 ROM_LOAD16_BYTE( "775-a06f.bin", 0xa0001, 0x10000, CRC(e14995c0) SHA1(1d7fdfb8f9eacb005b0897b2b62b85ce334cd4d6) )
805 ROM_LOAD16_BYTE( "775-f06c.bin", 0xc0000, 0x10000, CRC(5ee6f3c1) SHA1(9138ea3588b63862849f6e783725a711e7e50669) )
806 ROM_LOAD16_BYTE( "775-f06g.bin", 0xc0001, 0x10000, CRC(2645274d) SHA1(2fd04b0adbcf53562669946259b59f1ec9c52bda) )
807 ROM_LOAD16_BYTE( "775-f06d.bin", 0xe0000, 0x10000, CRC(c8b764fa) SHA1(62f7f59ed36dca7346ec9eb019a4e435e8476dc6) )
808 ROM_LOAD16_BYTE( "775-f06h.bin", 0xe0001, 0x10000, CRC(d6595f59) SHA1(777ea6da2026c90e7fbbc598275c8f95f2eb99c2) )
809
810 ROM_REGION( 0x80000, REGION_SOUND1, 0 ) /* k007232 data */
811 ROM_LOAD( "775-a04a.bin", 0x00000, 0x10000, CRC(7efb2e0f) SHA1(fb350a056b547fe4f981bc211e2f9518ae5a3499) )
812 ROM_LOAD( "775-a04b.bin", 0x10000, 0x10000, CRC(f41a2b33) SHA1(dffa06360b6032f7370fe72698aacad4d8779472) )
813 ROM_LOAD( "775-a04c.bin", 0x20000, 0x10000, CRC(e4e58f14) SHA1(23dcb4dfa9a44115d1b730d9efcc314801b811c7) )
814 ROM_LOAD( "775-a04d.bin", 0x30000, 0x10000, CRC(d46736f6) SHA1(586e914a35d3d7a71cccec66ca45a5bbbb9e504b) )
815 ROM_LOAD( "775-f04e.bin", 0x40000, 0x10000, CRC(fbf7e363) SHA1(53578eb7dab8f723439dc12eefade3edb027c148) )
816 ROM_LOAD( "775-f04f.bin", 0x50000, 0x10000, CRC(b031ef2d) SHA1(0124fe15871c3972ef1e2dbaf53d17668c1dccfd) )
817 ROM_LOAD( "775-f04g.bin", 0x60000, 0x10000, CRC(ee107bbb) SHA1(e21de761a0dfd3811ddcbc33d8868479010e86d0) )
818 ROM_LOAD( "775-f04h.bin", 0x70000, 0x10000, CRC(fb0fab46) SHA1(fcbf904f7cf4d265352dc73ed228390b29784aad) )
819
820 ROM_REGION( 0x0100, REGION_PROMS, 0 )
821 ROM_LOAD( "775a09.b19", 0x0000, 0x0100, CRC(46d1e0df) SHA1(65dad04a124cc49cbc9bb271f865d77efbc4d57c) ) /* priority encoder (not used) */
822 ROM_END
823
824 ROM_START( scontraj )
825 ROM_REGION( 0x30800, REGION_CPU1, 0 ) /* ROMs + banked RAM */
826 ROM_LOAD( "775-f02.bin", 0x10000, 0x08000, CRC(8d5933a7) SHA1(e13ec62a4209b790b609429d98620ec0d07bd0ee) ) /* banked ROM */
827 ROM_CONTINUE( 0x08000, 0x08000 ) /* fixed ROM */
828 ROM_LOAD( "775-f03.bin", 0x20000, 0x10000, CRC(1ef63d80) SHA1(8fa41038ec2928f9572d0d4511a4bb3a3d8de06d) ) /* banked ROM */
829
830 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the SOUND CPU */
831 ROM_LOAD( "775-c01.bin", 0x00000, 0x08000, CRC(0ced785a) SHA1(1eebe005a968fbaac595c168499107e34763976c) )
832
833 ROM_REGION( 0x100000, REGION_GFX1, 0 ) /* tiles */
834 ROM_LOAD16_BYTE( "775-a07a.bin", 0x00000, 0x20000, CRC(e716bdf3) SHA1(82e10132f248aed8cc1aea6bb7afe9a1479c8b59) ) /* tiles */
835 ROM_LOAD16_BYTE( "775-a07e.bin", 0x00001, 0x20000, CRC(0986e3a5) SHA1(61c33a3f2e4fde7d23d440b5c3151fe38e25716b) )
836 ROM_LOAD16_BYTE( "775-f07c.bin", 0x40000, 0x10000, CRC(b0b30915) SHA1(0abd858f93f7cc5383a805a5ae06c086c120f208) )
837 ROM_LOAD16_BYTE( "775-f07g.bin", 0x40001, 0x10000, CRC(fbed827d) SHA1(7fcc6cc03ab6238b05799dd50f38c29eb9f98b5a) )
838 ROM_LOAD16_BYTE( "775-f07d.bin", 0x60000, 0x10000, CRC(f184be8e) SHA1(c266be12762f7e81edbe4b36f3c96b03f6ec552b) )
839 ROM_LOAD16_BYTE( "775-f07h.bin", 0x60001, 0x10000, CRC(7b56c348) SHA1(f75c1c0962389f204c8cf1a0bc2da01a922cd742) )
840 ROM_LOAD16_BYTE( "775-a08a.bin", 0x80000, 0x20000, CRC(3ddd11a4) SHA1(4831a891d6cb4507053d576eddd658c338318176) )
841 ROM_LOAD16_BYTE( "775-a08e.bin", 0x80001, 0x20000, CRC(1007d963) SHA1(cba4ca058dee1c8cdeb019e1cc50cae76bf419a1) )
842 ROM_LOAD16_BYTE( "775-f08c.bin", 0xc0000, 0x10000, CRC(53abdaec) SHA1(0e0f7fe4bb9139a1ae94506a832153b711961564) )
843 ROM_LOAD16_BYTE( "775-f08g.bin", 0xc0001, 0x10000, CRC(3df85a6e) SHA1(25a49abbf6e9fe63d4ff6bfff9219c98aa1b5e7b) )
844 ROM_LOAD16_BYTE( "775-f08d.bin", 0xe0000, 0x10000, CRC(102dcace) SHA1(03036b6d9d66a12cb3e97980f149c09d1efbd6d8) )
845 ROM_LOAD16_BYTE( "775-f08h.bin", 0xe0001, 0x10000, CRC(ad9d7016) SHA1(91e9f279b781eefcafffc70afe207f35cc6f4d9d) )
846
847 ROM_REGION( 0x100000, REGION_GFX2, 0 ) /* sprites */
848 ROM_LOAD16_BYTE( "775-a05a.bin", 0x00000, 0x10000, CRC(a0767045) SHA1(e6df0731a9fb3b3d918607de81844e1f9353aac7) ) /* sprites */
849 ROM_LOAD16_BYTE( "775-a05e.bin", 0x00001, 0x10000, CRC(2f656f08) SHA1(140e7948c45d27c6705622d588a65b59ebcc624c) )
850 ROM_LOAD16_BYTE( "775-a05b.bin", 0x20000, 0x10000, CRC(ab8ad4fd) SHA1(c9ae537fa1607fbd11403390d1da923955f0d1ab) )
851 ROM_LOAD16_BYTE( "775-a05f.bin", 0x20001, 0x10000, CRC(1c0eb1b6) SHA1(420eb26acd54ff484301aa2dad587f1b6b437363) )
852 ROM_LOAD16_BYTE( "775-f05c.bin", 0x40000, 0x10000, CRC(5647761e) SHA1(ff7983cb0c2f84f7be9d44e20b01266db4b2836a) )
853 ROM_LOAD16_BYTE( "775-f05g.bin", 0x40001, 0x10000, CRC(a1692cca) SHA1(2cefc4b7532a9d29361843419ee427fb9421b79b) )
854 ROM_LOAD16_BYTE( "775-f05d.bin", 0x60000, 0x10000, CRC(ad676a6f) SHA1(f2ca759c8c8a8007aa022d6c058d0431057a639a) )
855 ROM_LOAD16_BYTE( "775-f05h.bin", 0x60001, 0x10000, CRC(3f925bcf) SHA1(434dd442c0cb5c5c039a69683a3a5f226e49261c) )
856 ROM_LOAD16_BYTE( "775-a06a.bin", 0x80000, 0x10000, CRC(77a34ad0) SHA1(3653fb8458c1e7eb7d83b5cd63f02343c0f2d93e) )
857 ROM_LOAD16_BYTE( "775-a06e.bin", 0x80001, 0x10000, CRC(8a910c94) SHA1(0387a7f412a977fa7a5ca685653ac1bb3dfdbbcb) )
858 ROM_LOAD16_BYTE( "775-a06b.bin", 0xa0000, 0x10000, CRC(563fb565) SHA1(96a2a95ab02456e53651718a7080f18c252451c8) )
859 ROM_LOAD16_BYTE( "775-a06f.bin", 0xa0001, 0x10000, CRC(e14995c0) SHA1(1d7fdfb8f9eacb005b0897b2b62b85ce334cd4d6) )
860 ROM_LOAD16_BYTE( "775-f06c.bin", 0xc0000, 0x10000, CRC(5ee6f3c1) SHA1(9138ea3588b63862849f6e783725a711e7e50669) )
861 ROM_LOAD16_BYTE( "775-f06g.bin", 0xc0001, 0x10000, CRC(2645274d) SHA1(2fd04b0adbcf53562669946259b59f1ec9c52bda) )
862 ROM_LOAD16_BYTE( "775-f06d.bin", 0xe0000, 0x10000, CRC(c8b764fa) SHA1(62f7f59ed36dca7346ec9eb019a4e435e8476dc6) )
863 ROM_LOAD16_BYTE( "775-f06h.bin", 0xe0001, 0x10000, CRC(d6595f59) SHA1(777ea6da2026c90e7fbbc598275c8f95f2eb99c2) )
864
865 ROM_REGION( 0x80000, REGION_SOUND1, 0 ) /* k007232 data */
866 ROM_LOAD( "775-a04a.bin", 0x00000, 0x10000, CRC(7efb2e0f) SHA1(fb350a056b547fe4f981bc211e2f9518ae5a3499) )
867 ROM_LOAD( "775-a04b.bin", 0x10000, 0x10000, CRC(f41a2b33) SHA1(dffa06360b6032f7370fe72698aacad4d8779472) )
868 ROM_LOAD( "775-a04c.bin", 0x20000, 0x10000, CRC(e4e58f14) SHA1(23dcb4dfa9a44115d1b730d9efcc314801b811c7) )
869 ROM_LOAD( "775-a04d.bin", 0x30000, 0x10000, CRC(d46736f6) SHA1(586e914a35d3d7a71cccec66ca45a5bbbb9e504b) )
870 ROM_LOAD( "775-f04e.bin", 0x40000, 0x10000, CRC(fbf7e363) SHA1(53578eb7dab8f723439dc12eefade3edb027c148) )
871 ROM_LOAD( "775-f04f.bin", 0x50000, 0x10000, CRC(b031ef2d) SHA1(0124fe15871c3972ef1e2dbaf53d17668c1dccfd) )
872 ROM_LOAD( "775-f04g.bin", 0x60000, 0x10000, CRC(ee107bbb) SHA1(e21de761a0dfd3811ddcbc33d8868479010e86d0) )
873 ROM_LOAD( "775-f04h.bin", 0x70000, 0x10000, CRC(fb0fab46) SHA1(fcbf904f7cf4d265352dc73ed228390b29784aad) )
874
875 ROM_REGION( 0x0100, REGION_PROMS, 0 )
876 ROM_LOAD( "775a09.b19", 0x0000, 0x0100, CRC(46d1e0df) SHA1(65dad04a124cc49cbc9bb271f865d77efbc4d57c) ) /* priority encoder (not used) */
877 ROM_END
878
879 ROM_START( thunderx )
880 ROM_REGION( 0x29000, REGION_CPU1, 0 ) /* ROMs + banked RAM */
881 ROM_LOAD( "873k03.k15", 0x10000, 0x10000, CRC(276817ad) SHA1(34b1beecf2a4c54dd7cd150c5d83b44f67be288a) )
882 ROM_LOAD( "873k02.k13", 0x20000, 0x08000, CRC(80cc1c45) SHA1(881bc6eea94671e8c3fdb7a10b0e742b18cb7212) )
883 ROM_CONTINUE( 0x08000, 0x08000 )
884
885 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the audio CPU */
886 ROM_LOAD( "873h01.f8", 0x0000, 0x8000, CRC(990b7a7c) SHA1(0965e7350c6006a9652cea0f24d836b4979910fd) )
887
888 ROM_REGION( 0x80000, REGION_GFX1, 0 ) /* temporary space for graphics (disposed after conversion) */
889 ROM_LOAD16_BYTE( "873c06a.f6", 0x00000, 0x10000, CRC(0e340b67) SHA1(a76b1ee4bd4c99826a02b63a705447d0ba4e7b01) ) /* Chars */
890 ROM_LOAD16_BYTE( "873c06c.f5", 0x00001, 0x10000, CRC(ef0e72cd) SHA1(85b77a303378386f2d395da8707f4b638d37833e) )
891 ROM_LOAD16_BYTE( "873c06b.e6", 0x20000, 0x10000, CRC(97ad202e) SHA1(fd155aeb691814950711ead3bc2c93c67b7b0434) )
892 ROM_LOAD16_BYTE( "873c06d.e5", 0x20001, 0x10000, CRC(8393d42e) SHA1(ffcb5eca3f58994e05c49d803fa4831c0213e2e2) )
893 ROM_LOAD16_BYTE( "873c07a.f4", 0x40000, 0x10000, CRC(a8aab84f) SHA1(a68521a9abf45c3292b3090a2483edbf31356c7d) )
894 ROM_LOAD16_BYTE( "873c07c.f3", 0x40001, 0x10000, CRC(2521009a) SHA1(6546b88943615389c81b753ff5bb6aa9378c3266) )
895 ROM_LOAD16_BYTE( "873c07b.e4", 0x60000, 0x10000, CRC(12a2b8ba) SHA1(ffa32ca116e0b6ca65bb9ce83dd28f5c027956a5) )
896 ROM_LOAD16_BYTE( "873c07d.e3", 0x60001, 0x10000, CRC(fae9f965) SHA1(780c234507835c37bde445ab34f069714cc7a506) )
897
898 ROM_REGION( 0x80000, REGION_GFX2, 0 )
899 ROM_LOAD16_BYTE( "873c04a.f11", 0x00000, 0x10000, CRC(f7740bf3) SHA1(f64b7e807f19a9523a517024a9eb56736cdda6bb) ) /* Sprites */
900 ROM_LOAD16_BYTE( "873c04c.f10", 0x00001, 0x10000, CRC(5dacbd2b) SHA1(deb943b99fd296d20be9c4250b2348549f65ba37) )
901 ROM_LOAD16_BYTE( "873c04b.e11", 0x20000, 0x10000, CRC(9ac581da) SHA1(fd0a603de8586621444055bbff8bb83349b8a0d8) )
902 ROM_LOAD16_BYTE( "873c04d.e10", 0x20001, 0x10000, CRC(44a4668c) SHA1(6d1526ed3408ddc763a071604e7b1e0773c87b99) )
903 ROM_LOAD16_BYTE( "873c05a.f9", 0x40000, 0x10000, CRC(d73e107d) SHA1(ba63b195e20a98c476e7d0f8d0187bc3327a8822) )
904 ROM_LOAD16_BYTE( "873c05c.f8", 0x40001, 0x10000, CRC(59903200) SHA1(d076802c53aa604df8c5fdd33cb41876ba2a3385) )
905 ROM_LOAD16_BYTE( "873c05b.e9", 0x60000, 0x10000, CRC(81059b99) SHA1(1e1a22ca45599abe0dce32fc0b188281deb3b8ac) )
906 ROM_LOAD16_BYTE( "873c05d.e8", 0x60001, 0x10000, CRC(7fa3d7df) SHA1(c78b9a949abdf44366d872daa1f2041158fae790) )
907
908 ROM_REGION( 0x0100, REGION_PROMS, 0 )
909 ROM_LOAD( "873a08.f20", 0x0000, 0x0100, CRC(e2d09a1b) SHA1(a9651e137486b2df367c39eb43f52d0833589e87) ) /* priority encoder (not used) */
910 ROM_END
911
912 ROM_START( thnderxj )
913 ROM_REGION( 0x29000, REGION_CPU1, 0 ) /* ROMs + banked RAM */
914 ROM_LOAD( "873-n03.k15", 0x10000, 0x10000, CRC(a01e2e3e) SHA1(eba0d95dc0c5eed18743a96e4bbda5e60d5d9c97) )
915 ROM_LOAD( "873-n02.k13", 0x20000, 0x08000, CRC(55afa2cc) SHA1(5fb9df0c7c7c0c2029dbe0f3c1e0340234a03e8a) )
916 ROM_CONTINUE( 0x08000, 0x08000 )
917
918 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the audio CPU */
919 ROM_LOAD( "873-f01.f8", 0x0000, 0x8000, CRC(ea35ffa3) SHA1(91e82b77d4f3af8238fb198db26182bebc5026e4) )
920
921 ROM_REGION( 0x80000, REGION_GFX1, 0 ) /* temporary space for graphics (disposed after conversion) */
922 ROM_LOAD16_BYTE( "873c06a.f6", 0x00000, 0x10000, CRC(0e340b67) SHA1(a76b1ee4bd4c99826a02b63a705447d0ba4e7b01) ) /* Chars */
923 ROM_LOAD16_BYTE( "873c06c.f5", 0x00001, 0x10000, CRC(ef0e72cd) SHA1(85b77a303378386f2d395da8707f4b638d37833e) )
924 ROM_LOAD16_BYTE( "873c06b.e6", 0x20000, 0x10000, CRC(97ad202e) SHA1(fd155aeb691814950711ead3bc2c93c67b7b0434) )
925 ROM_LOAD16_BYTE( "873c06d.e5", 0x20001, 0x10000, CRC(8393d42e) SHA1(ffcb5eca3f58994e05c49d803fa4831c0213e2e2) )
926 ROM_LOAD16_BYTE( "873c07a.f4", 0x40000, 0x10000, CRC(a8aab84f) SHA1(a68521a9abf45c3292b3090a2483edbf31356c7d) )
927 ROM_LOAD16_BYTE( "873c07c.f3", 0x40001, 0x10000, CRC(2521009a) SHA1(6546b88943615389c81b753ff5bb6aa9378c3266) )
928 ROM_LOAD16_BYTE( "873c07b.e4", 0x60000, 0x10000, CRC(12a2b8ba) SHA1(ffa32ca116e0b6ca65bb9ce83dd28f5c027956a5) )
929 ROM_LOAD16_BYTE( "873c07d.e3", 0x60001, 0x10000, CRC(fae9f965) SHA1(780c234507835c37bde445ab34f069714cc7a506) )
930
931 ROM_REGION( 0x80000, REGION_GFX2, 0 )
932 ROM_LOAD16_BYTE( "873c04a.f11", 0x00000, 0x10000, CRC(f7740bf3) SHA1(f64b7e807f19a9523a517024a9eb56736cdda6bb) ) /* Sprites */
933 ROM_LOAD16_BYTE( "873c04c.f10", 0x00001, 0x10000, CRC(5dacbd2b) SHA1(deb943b99fd296d20be9c4250b2348549f65ba37) )
934 ROM_LOAD16_BYTE( "873c04b.e11", 0x20000, 0x10000, CRC(9ac581da) SHA1(fd0a603de8586621444055bbff8bb83349b8a0d8) )
935 ROM_LOAD16_BYTE( "873c04d.e10", 0x20001, 0x10000, CRC(44a4668c) SHA1(6d1526ed3408ddc763a071604e7b1e0773c87b99) )
936 ROM_LOAD16_BYTE( "873c05a.f9", 0x40000, 0x10000, CRC(d73e107d) SHA1(ba63b195e20a98c476e7d0f8d0187bc3327a8822) )
937 ROM_LOAD16_BYTE( "873c05c.f8", 0x40001, 0x10000, CRC(59903200) SHA1(d076802c53aa604df8c5fdd33cb41876ba2a3385) )
938 ROM_LOAD16_BYTE( "873c05b.e9", 0x60000, 0x10000, CRC(81059b99) SHA1(1e1a22ca45599abe0dce32fc0b188281deb3b8ac) )
939 ROM_LOAD16_BYTE( "873c05d.e8", 0x60001, 0x10000, CRC(7fa3d7df) SHA1(c78b9a949abdf44366d872daa1f2041158fae790) )
940
941 ROM_REGION( 0x0100, REGION_PROMS, 0 )
942 ROM_LOAD( "873a08.f20", 0x0000, 0x0100, CRC(e2d09a1b) SHA1(a9651e137486b2df367c39eb43f52d0833589e87) ) /* priority encoder (not used) */
943 ROM_END
944
945 /***************************************************************************/
946
947 static void thunderx_banking( int lines )
948 {
949 unsigned char *RAM = memory_region(REGION_CPU1);
950 int offs;
951
952 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "thunderx %04x: bank select %02x\n", activecpu_get_pc(), lines );*/
953
954 offs = 0x10000 + (((lines & 0x0f) ^ 0x08) * 0x2000);
955 if (offs >= 0x28000) offs -= 0x20000;
956 cpu_setbank( 1, &RAM[offs] );
957 }
958
MACHINE_INIT(scontra)959 static MACHINE_INIT( scontra )
960 {
961 unsigned char *RAM = memory_region(REGION_CPU1);
962
963 paletteram = &RAM[0x30000];
964 }
965
MACHINE_INIT(thunderx)966 static MACHINE_INIT( thunderx )
967 {
968 unsigned char *RAM = memory_region(REGION_CPU1);
969
970 konami_cpu_setlines_callback = thunderx_banking;
971 cpu_setbank( 1, &RAM[0x10000] ); /* init the default bank */
972
973 paletteram = &RAM[0x28000];
974 pmcram = &RAM[0x28800];
975 }
976
DRIVER_INIT(scontra)977 static DRIVER_INIT( scontra )
978 {
979 konami_rom_deinterleave_2(REGION_GFX1);
980 konami_rom_deinterleave_2(REGION_GFX2);
981 }
982
983
984
985 GAME( 1988, scontra, 0, scontra, scontra, scontra, ROT90, "Konami", "Super Contra" )
986 GAME( 1988, scontraj, scontra, scontra, scontra, scontra, ROT90, "Konami", "Super Contra (Japan)" )
987 GAME( 1988, thunderx, 0, thunderx, thunderx, scontra, ROT0, "Konami", "Thunder Cross" )
988 GAME( 1988, thnderxj, thunderx, thunderx, thunderx, scontra, ROT0, "Konami", "Thunder Cross (Japan)" )
989