1 /* namcoic.h 2 3 Custom Chips: Final Lap Assault LuckyWld System21 NA1/2 NB1/2 4 C45 Land Generator * * 5 C65 I/O Controller * * 6 C68 * * 7 C70 * 8 C95 * * 9 C102 ROZ:Memory Access Control * 10 C106 OBJ:X-Axis Zoom Control * * 11 C107 Land Line Buffer * 12 C116 Screen Waveform Generator * * * * 13 C121 Yamaha YM2151 Sound Gen * * * 14 C123 GFX:Tile Mem Decoder * * * * 15 C134 OBJ:Address Generator * * 16 C135 OBJ:Line matching * * 17 C137 Clock Generator IC * * * * * 18 C138 * 19 C139 Serial I/F Controller * * * * 20 C140 24 Channel PCM * * * 21 C145 GFX:Tile Memory Access * * * * 22 C146 OBJ:Line Buf Steering * * 23 C148 CPU Bus Manager * * * * 24 C149 Mouse/Trackball Decoder * * * * 25 C156 Pixel Stream Combo * * * * 26 C160 Control * 27 C165 * 28 C169 ROZ(B) * * 29 C187 * * * 30 C210 * 31 C215 * 32 C218 * 33 C219 * 34 C329 CPU? * 35 C347 GfxObj * 36 C352 PCM * 37 C355 Motion Obj(B) * * * 38 C373 LAND-related * 39 C382 * 40 C383 * 41 C384 GFX(3) * 42 C385 * 43 C390 Key Custom * 44 45 46 General Support 47 --------------- 48 C65 - This is the I/O Microcontroller, handles all input/output devices. 63705 uC, CPU4 in Namco System2. 49 C137 - Takes System clock and generates all sub-system clocks, doesnt need emulation, not accessed via CPU 50 C139 - Serial Interface Controller 51 C148 - Does some Memory Decode, Interrupt Handling, 3 bit PIO port, Bus Controller 52 C149 - Does decoding of mouse/trackball input streams for the I/O Controller. (Offset Square wave) 53 54 55 Tile Fields Static/Scrolled 56 --------------------------- 57 Combination of these two devices and associated RAM & TileGFX produces a pixel stream that is fed 58 into the Pixel stream decoder. 59 60 C145 - Tile Screen Memory Access controller 61 C123 - Tile Memory decoder Part 1, converts X,Y,Tile into character ROM address index 62 63 64 Pixel Stream Decode 65 ------------------- 66 These two devices take the pixel streams from the tilefield generator and the associated graphics board 67 and combine them to form an RGB data stream that is fed to the monitor. 68 69 C156 - Pixel stream combiner 70 Takes tile field & graphics board streams and generates the priorisied pixel, then does the lookup to 71 go from palettised to 24bit RGB pixel. 72 73 C116 - Screen Waveform Generator 74 Takes RGB24 pixel stream from C156 and generates the waveform signals for the monitor, also generates 75 the line interrupt and controls screen blanking,shift, etc. 76 77 Object Control 78 -------------- 79 C106 - Generates memory output clocks to generate X-Axis Zoom for Line Buffer Writes 80 C134 - Object Memory Address Generator. Sequences the sprite memory contents to the hardware. 81 C135 - Checks is object is displayed on Current output line. 82 C146 - Steers the Decode Object Pixel data to the correct line buffer A or B 83 84 ROZ 85 --- 86 C102 - Controls CPU access to ROZ Memory Area. 87 */ 88 89 /***********************************************************************************/ 90 /* C355 Motion Object Emulation */ 91 92 /* for palXOR, supply either 0x0 (normal) or 0xf (palette mapping reversed) */ 93 void namco_obj_init( int gfxbank, int palXOR, int (*code2tile)( int code ) ); 94 void namco_obj_draw( struct mame_bitmap *bitmap, const struct rectangle *cliprect, int pri ); 95 96 WRITE16_HANDLER( namco_obj16_w ); 97 READ16_HANDLER( namco_obj16_r ); 98 99 WRITE32_HANDLER( namco_obj32_w ); 100 READ32_HANDLER( namco_obj32_r ); 101 102 WRITE16_HANDLER( namco_spritepos16_w ); 103 READ16_HANDLER( namco_spritepos16_r ); 104 105 WRITE32_HANDLER( namco_spritepos32_w ); 106 READ32_HANDLER( namco_spritepos32_r ); 107 108 /***********************************************************************************/ 109 /* C169 ROZ Layer Emulation */ 110 111 int namco_roz_init( int gfxbank, int maskregion ); 112 void namco_roz_draw( struct mame_bitmap *bitmap, const struct rectangle *cliprect, int pri ); 113 114 READ16_HANDLER( namco_rozcontrol16_r ); 115 WRITE16_HANDLER( namco_rozcontrol16_w ); 116 READ16_HANDLER( namco_rozbank16_r ); 117 WRITE16_HANDLER( namco_rozbank16_w ); 118 READ16_HANDLER( namco_rozvideoram16_r ); 119 WRITE16_HANDLER( namco_rozvideoram16_w ); 120 121 READ32_HANDLER( namco_rozcontrol32_r ); 122 WRITE32_HANDLER( namco_rozcontrol32_w ); 123 READ32_HANDLER( namco_rozbank32_r ); 124 WRITE32_HANDLER( namco_rozbank32_w ); 125 READ32_HANDLER( namco_rozvideoram32_r ); 126 WRITE32_HANDLER( namco_rozvideoram32_w ); 127 128 /***********************************************************************************/ 129 /* C45 Land (Road) Emulation */ 130 131 int namco_road_init( int gfxbank ); 132 void namco_road_set_transparent_color(pen_t pen); 133 void namco_road_draw( struct mame_bitmap *bitmap, const struct rectangle *cliprect, int pri ); 134 135 READ16_HANDLER( namco_road16_r ); 136 WRITE16_HANDLER( namco_road16_w ); 137 138 /***********************************************************************************/ 139