1 /*
2  * Copyright 2020 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "qmd.h"
23 #include "clc0c0qmd.h"
24 
25 #define NVC0C0_QMDV02_01_VAL(a...) NVQMD_VAL(NVC0C0, QMDV02_01, ##a)
26 #define NVC0C0_QMDV02_01_DEF(a...) NVQMD_DEF(NVC0C0, QMDV02_01, ##a)
27 #define NVC0C0_QMDV02_01_IDX(a...) NVQMD_IDX(NVC0C0, QMDV02_01, ##a)
28 
29 void
NVC0C0QmdDump_V02_01(uint32_t * qmd)30 NVC0C0QmdDump_V02_01(uint32_t *qmd)
31 {
32    NVC0C0_QMDV02_01_VAL(qmd, OUTER_PUT, "0x%x");
33    NVC0C0_QMDV02_01_VAL(qmd, OUTER_OVERFLOW, "0x%x");
34    NVC0C0_QMDV02_01_VAL(qmd, OUTER_GET, "0x%x");
35    NVC0C0_QMDV02_01_VAL(qmd, OUTER_STICKY_OVERFLOW, "0x%x");
36    NVC0C0_QMDV02_01_VAL(qmd, INNER_GET, "0x%x");
37    NVC0C0_QMDV02_01_VAL(qmd, INNER_OVERFLOW, "0x%x");
38    NVC0C0_QMDV02_01_VAL(qmd, INNER_PUT, "0x%x");
39    NVC0C0_QMDV02_01_VAL(qmd, INNER_STICKY_OVERFLOW, "0x%x");
40    NVC0C0_QMDV02_01_VAL(qmd, QMD_GROUP_ID, "0x%x");
41    NVC0C0_QMDV02_01_VAL(qmd, SM_GLOBAL_CACHING_ENABLE, "0x%x");
42    NVC0C0_QMDV02_01_DEF(qmd, RUN_CTA_IN_ONE_SM_PARTITION, FALSE, TRUE);
43    NVC0C0_QMDV02_01_DEF(qmd, IS_QUEUE, FALSE, TRUE);
44    NVC0C0_QMDV02_01_DEF(qmd, ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST, FALSE, TRUE);
45    NVC0C0_QMDV02_01_DEF(qmd, SEMAPHORE_RELEASE_ENABLE0, FALSE, TRUE);
46    NVC0C0_QMDV02_01_DEF(qmd, SEMAPHORE_RELEASE_ENABLE1, FALSE, TRUE);
47    NVC0C0_QMDV02_01_DEF(qmd, REQUIRE_SCHEDULING_PCAS, FALSE, TRUE);
48    NVC0C0_QMDV02_01_DEF(qmd, DEPENDENT_QMD_SCHEDULE_ENABLE, FALSE, TRUE);
49    NVC0C0_QMDV02_01_DEF(qmd, DEPENDENT_QMD_TYPE, QUEUE, GRID);
50    NVC0C0_QMDV02_01_DEF(qmd, DEPENDENT_QMD_FIELD_COPY, FALSE, TRUE);
51    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_B, "0x%x");
52    NVC0C0_QMDV02_01_VAL(qmd, CIRCULAR_QUEUE_SIZE, "0x%x");
53    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_C, "0x%x");
54    NVC0C0_QMDV02_01_DEF(qmd, INVALIDATE_TEXTURE_HEADER_CACHE, FALSE, TRUE);
55    NVC0C0_QMDV02_01_DEF(qmd, INVALIDATE_TEXTURE_SAMPLER_CACHE, FALSE, TRUE);
56    NVC0C0_QMDV02_01_DEF(qmd, INVALIDATE_TEXTURE_DATA_CACHE, FALSE, TRUE);
57    NVC0C0_QMDV02_01_DEF(qmd, INVALIDATE_SHADER_DATA_CACHE, FALSE, TRUE);
58    NVC0C0_QMDV02_01_DEF(qmd, INVALIDATE_INSTRUCTION_CACHE, FALSE, TRUE);
59    NVC0C0_QMDV02_01_DEF(qmd, INVALIDATE_SHADER_CONSTANT_CACHE, FALSE, TRUE);
60    NVC0C0_QMDV02_01_VAL(qmd, CTA_RASTER_WIDTH_RESUME, "0x%x");
61    NVC0C0_QMDV02_01_VAL(qmd, CTA_RASTER_HEIGHT_RESUME, "0x%x");
62    NVC0C0_QMDV02_01_VAL(qmd, CTA_RASTER_DEPTH_RESUME, "0x%x");
63    NVC0C0_QMDV02_01_VAL(qmd, PROGRAM_OFFSET, "0x%x");
64    NVC0C0_QMDV02_01_VAL(qmd, CIRCULAR_QUEUE_ADDR_LOWER, "0x%x");
65    NVC0C0_QMDV02_01_VAL(qmd, CIRCULAR_QUEUE_ADDR_UPPER, "0x%x");
66    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_D, "0x%x");
67    NVC0C0_QMDV02_01_VAL(qmd, CIRCULAR_QUEUE_ENTRY_SIZE, "0x%x");
68    NVC0C0_QMDV02_01_VAL(qmd, CWD_REFERENCE_COUNT_ID, "0x%x");
69    NVC0C0_QMDV02_01_VAL(qmd, CWD_REFERENCE_COUNT_DELTA_MINUS_ONE, "0x%x");
70    NVC0C0_QMDV02_01_DEF(qmd, RELEASE_MEMBAR_TYPE, FE_NONE, FE_SYSMEMBAR);
71    NVC0C0_QMDV02_01_DEF(qmd, CWD_REFERENCE_COUNT_INCR_ENABLE, FALSE, TRUE);
72    NVC0C0_QMDV02_01_DEF(qmd, CWD_MEMBAR_TYPE, L1_NONE, L1_SYSMEMBAR, L1_MEMBAR);
73    NVC0C0_QMDV02_01_DEF(qmd, SEQUENTIALLY_RUN_CTAS, FALSE, TRUE);
74    NVC0C0_QMDV02_01_DEF(qmd, CWD_REFERENCE_COUNT_DECR_ENABLE, FALSE, TRUE);
75    NVC0C0_QMDV02_01_DEF(qmd, THROTTLED, FALSE, TRUE);
76    NVC0C0_QMDV02_01_DEF(qmd, API_VISIBLE_CALL_LIMIT, _32, NO_CHECK);
77    NVC0C0_QMDV02_01_DEF(qmd, SAMPLER_INDEX, INDEPENDENTLY, VIA_HEADER_INDEX);
78    NVC0C0_QMDV02_01_VAL(qmd, CTA_RASTER_WIDTH, "0x%x");
79    NVC0C0_QMDV02_01_VAL(qmd, CTA_RASTER_HEIGHT, "0x%x");
80    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED13A, "0x%x");
81    NVC0C0_QMDV02_01_VAL(qmd, CTA_RASTER_DEPTH, "0x%x");
82    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED14A, "0x%x");
83    NVC0C0_QMDV02_01_VAL(qmd, DEPENDENT_QMD_POINTER, "0x%x");
84    NVC0C0_QMDV02_01_VAL(qmd, QUEUE_ENTRIES_PER_CTA_MINUS_ONE, "0x%x");
85    NVC0C0_QMDV02_01_VAL(qmd, COALESCE_WAITING_PERIOD, "0x%x");
86    NVC0C0_QMDV02_01_VAL(qmd, SHARED_MEMORY_SIZE, "0x%x");
87    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_G, "0x%x");
88    NVC0C0_QMDV02_01_VAL(qmd, QMD_VERSION, "0x%x");
89    NVC0C0_QMDV02_01_VAL(qmd, QMD_MAJOR_VERSION, "0x%x");
90    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_H, "0x%x");
91    NVC0C0_QMDV02_01_VAL(qmd, CTA_THREAD_DIMENSION0, "0x%x");
92    NVC0C0_QMDV02_01_VAL(qmd, CTA_THREAD_DIMENSION1, "0x%x");
93    NVC0C0_QMDV02_01_VAL(qmd, CTA_THREAD_DIMENSION2, "0x%x");
94    for (int i = 0; i < 8; i++)
95       NVC0C0_QMDV02_01_IDX(qmd, CONSTANT_BUFFER_VALID, i, FALSE, TRUE);
96    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_I, "0x%x");
97    NVC0C0_QMDV02_01_VAL(qmd, SM_DISABLE_MASK_LOWER, "0x%x");
98    NVC0C0_QMDV02_01_VAL(qmd, SM_DISABLE_MASK_UPPER, "0x%x");
99    NVC0C0_QMDV02_01_VAL(qmd, RELEASE0_ADDRESS_LOWER, "0x%x");
100    NVC0C0_QMDV02_01_VAL(qmd, RELEASE0_ADDRESS_UPPER, "0x%x");
101    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_J, "0x%x");
102    NVC0C0_QMDV02_01_DEF(qmd, RELEASE0_REDUCTION_OP, RED_ADD,
103                                                     RED_MIN,
104                                                     RED_MAX,
105                                                     RED_INC,
106                                                     RED_DEC,
107                                                     RED_AND,
108                                                     RED_OR,
109                                                     RED_XOR);
110    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_K, "0x%x");
111    NVC0C0_QMDV02_01_DEF(qmd, RELEASE0_REDUCTION_FORMAT, UNSIGNED_32, SIGNED_32);
112    NVC0C0_QMDV02_01_DEF(qmd, RELEASE0_REDUCTION_ENABLE, FALSE, TRUE);
113    NVC0C0_QMDV02_01_DEF(qmd, RELEASE0_STRUCTURE_SIZE, FOUR_WORDS, ONE_WORD);
114    NVC0C0_QMDV02_01_VAL(qmd, RELEASE0_PAYLOAD, "0x%x");
115    NVC0C0_QMDV02_01_VAL(qmd, RELEASE1_ADDRESS_LOWER, "0x%x");
116    NVC0C0_QMDV02_01_VAL(qmd, RELEASE1_ADDRESS_UPPER, "0x%x");
117    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_L, "0x%x");
118    NVC0C0_QMDV02_01_DEF(qmd, RELEASE1_REDUCTION_OP, RED_ADD,
119                                                     RED_MIN,
120                                                     RED_MAX,
121                                                     RED_INC,
122                                                     RED_DEC,
123                                                     RED_AND,
124                                                     RED_OR,
125                                                     RED_XOR);
126    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_M, "0x%x");
127    NVC0C0_QMDV02_01_DEF(qmd, RELEASE1_REDUCTION_FORMAT, UNSIGNED_32, SIGNED_32);
128    NVC0C0_QMDV02_01_DEF(qmd, RELEASE1_REDUCTION_ENABLE, FALSE, TRUE);
129    NVC0C0_QMDV02_01_DEF(qmd, RELEASE1_STRUCTURE_SIZE, FOUR_WORDS, ONE_WORD);
130    NVC0C0_QMDV02_01_VAL(qmd, RELEASE1_PAYLOAD, "0x%x");
131    NVC0C0_QMDV02_01_VAL(qmd, SHADER_LOCAL_MEMORY_LOW_SIZE, "0x%x");
132    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_N, "0x%x");
133    NVC0C0_QMDV02_01_VAL(qmd, BARRIER_COUNT, "0x%x");
134    NVC0C0_QMDV02_01_VAL(qmd, SHADER_LOCAL_MEMORY_HIGH_SIZE, "0x%x");
135    NVC0C0_QMDV02_01_VAL(qmd, REGISTER_COUNT, "0x%x");
136    NVC0C0_QMDV02_01_VAL(qmd, SHADER_LOCAL_MEMORY_CRS_SIZE, "0x%x");
137    NVC0C0_QMDV02_01_VAL(qmd, SASS_VERSION, "0x%x");
138    for (int i = 0; i < 8; i++) {
139       NVC0C0_QMDV02_01_VAL(qmd, CONSTANT_BUFFER_ADDR_LOWER, i, "0x%x");
140       NVC0C0_QMDV02_01_VAL(qmd, CONSTANT_BUFFER_ADDR_UPPER, i, "0x%x");
141       NVC0C0_QMDV02_01_VAL(qmd, CONSTANT_BUFFER_RESERVED_ADDR, i, "0x%x");
142       NVC0C0_QMDV02_01_IDX(qmd, CONSTANT_BUFFER_INVALIDATE, i, FALSE, TRUE);
143       NVC0C0_QMDV02_01_VAL(qmd, CONSTANT_BUFFER_SIZE_SHIFTED4, i, "0x%x");
144    }
145    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_R, "0x%x");
146    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_S, "0x%x");
147    NVC0C0_QMDV02_01_VAL(qmd, HW_ONLY_INNER_GET, "0x%x");
148    NVC0C0_QMDV02_01_VAL(qmd, HW_ONLY_REQUIRE_SCHEDULING_PCAS, "0x%x");
149    NVC0C0_QMDV02_01_VAL(qmd, HW_ONLY_INNER_PUT, "0x%x");
150    NVC0C0_QMDV02_01_VAL(qmd, HW_ONLY_SCG_TYPE, "0x%x");
151    NVC0C0_QMDV02_01_VAL(qmd, HW_ONLY_SPAN_LIST_HEAD_INDEX, "0x%x");
152    NVC0C0_QMDV02_01_VAL(qmd, QMD_RESERVED_Q, "0x%x");
153    NVC0C0_QMDV02_01_DEF(qmd, HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID, FALSE, TRUE);
154    NVC0C0_QMDV02_01_VAL(qmd, HW_ONLY_SKED_NEXT_QMD_POINTER, "0x%x");
155    NVC0C0_QMDV02_01_VAL(qmd, QMD_SPARE_G, "0x%x");
156    NVC0C0_QMDV02_01_VAL(qmd, QMD_SPARE_H, "0x%x");
157    NVC0C0_QMDV02_01_VAL(qmd, QMD_SPARE_I, "0x%x");
158    NVC0C0_QMDV02_01_VAL(qmd, QMD_SPARE_J, "0x%x");
159    NVC0C0_QMDV02_01_VAL(qmd, QMD_SPARE_K, "0x%x");
160    NVC0C0_QMDV02_01_VAL(qmd, QMD_SPARE_L, "0x%x");
161    NVC0C0_QMDV02_01_VAL(qmd, QMD_SPARE_M, "0x%x");
162    NVC0C0_QMDV02_01_VAL(qmd, QMD_SPARE_N, "0x%x");
163    NVC0C0_QMDV02_01_VAL(qmd, DEBUG_ID_UPPER, "0x%x");
164    NVC0C0_QMDV02_01_VAL(qmd, DEBUG_ID_LOWER, "0x%x");
165 }
166