1 /************************************************************************** 2 * 3 * Copyright 2017 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef _AC_VCN_DEC_H 29 #define _AC_VCN_DEC_H 30 31 /* VCN programming information shared between gallium/vulkan */ 32 #define RDECODE_PKT_TYPE_S(x) (((unsigned)(x)&0x3) << 30) 33 #define RDECODE_PKT_TYPE_G(x) (((x) >> 30) & 0x3) 34 #define RDECODE_PKT_TYPE_C 0x3FFFFFFF 35 #define RDECODE_PKT_COUNT_S(x) (((unsigned)(x)&0x3FFF) << 16) 36 #define RDECODE_PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) 37 #define RDECODE_PKT_COUNT_C 0xC000FFFF 38 #define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x)&0xFFFF) << 0) 39 #define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) 40 #define RDECODE_PKT0_BASE_INDEX_C 0xFFFF0000 41 #define RDECODE_PKT0(index, count) \ 42 (RDECODE_PKT_TYPE_S(0) | RDECODE_PKT0_BASE_INDEX_S(index) | RDECODE_PKT_COUNT_S(count)) 43 44 #define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2)) 45 46 #define RDECODE_PKT_REG_J(x) ((unsigned)(x)&0x3FFFF) 47 #define RDECODE_PKT_RES_J(x) (((unsigned)(x)&0x3F) << 18) 48 #define RDECODE_PKT_COND_J(x) (((unsigned)(x)&0xF) << 24) 49 #define RDECODE_PKT_TYPE_J(x) (((unsigned)(x)&0xF) << 28) 50 #define RDECODE_PKTJ(reg, cond, type) \ 51 (RDECODE_PKT_REG_J(reg) | RDECODE_PKT_RES_J(0) | RDECODE_PKT_COND_J(cond) | \ 52 RDECODE_PKT_TYPE_J(type)) 53 54 #define RDECODE_CMD_MSG_BUFFER 0x00000000 55 #define RDECODE_CMD_DPB_BUFFER 0x00000001 56 #define RDECODE_CMD_DECODING_TARGET_BUFFER 0x00000002 57 #define RDECODE_CMD_FEEDBACK_BUFFER 0x00000003 58 #define RDECODE_CMD_PROB_TBL_BUFFER 0x00000004 59 #define RDECODE_CMD_SESSION_CONTEXT_BUFFER 0x00000005 60 #define RDECODE_CMD_BITSTREAM_BUFFER 0x00000100 61 #define RDECODE_CMD_IT_SCALING_TABLE_BUFFER 0x00000204 62 #define RDECODE_CMD_CONTEXT_BUFFER 0x00000206 63 64 #define RDECODE_MSG_CREATE 0x00000000 65 #define RDECODE_MSG_DECODE 0x00000001 66 #define RDECODE_MSG_DESTROY 0x00000002 67 68 #define RDECODE_CODEC_H264 0x00000000 69 #define RDECODE_CODEC_VC1 0x00000001 70 #define RDECODE_CODEC_MPEG2_VLD 0x00000003 71 #define RDECODE_CODEC_MPEG4 0x00000004 72 #define RDECODE_CODEC_H264_PERF 0x00000007 73 #define RDECODE_CODEC_JPEG 0x00000008 74 #define RDECODE_CODEC_H265 0x00000010 75 #define RDECODE_CODEC_VP9 0x00000011 76 #define RDECODE_CODEC_AV1 0x00000013 77 78 #define RDECODE_ARRAY_MODE_LINEAR 0x00000000 79 #define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED 0x00000001 80 #define RDECODE_ARRAY_MODE_1D_THIN 0x00000002 81 #define RDECODE_ARRAY_MODE_2D_THIN 0x00000004 82 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR 0x00000004 83 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED 0x00000005 84 85 #define RDECODE_H264_PROFILE_BASELINE 0x00000000 86 #define RDECODE_H264_PROFILE_MAIN 0x00000001 87 #define RDECODE_H264_PROFILE_HIGH 0x00000002 88 #define RDECODE_H264_PROFILE_STEREO_HIGH 0x00000003 89 #define RDECODE_H264_PROFILE_MVC 0x00000004 90 91 #define RDECODE_VC1_PROFILE_SIMPLE 0x00000000 92 #define RDECODE_VC1_PROFILE_MAIN 0x00000001 93 #define RDECODE_VC1_PROFILE_ADVANCED 0x00000002 94 95 #define RDECODE_SW_MODE_LINEAR 0x00000000 96 #define RDECODE_256B_S 0x00000001 97 #define RDECODE_256B_D 0x00000002 98 #define RDECODE_4KB_S 0x00000005 99 #define RDECODE_4KB_D 0x00000006 100 #define RDECODE_64KB_S 0x00000009 101 #define RDECODE_64KB_D 0x0000000A 102 #define RDECODE_4KB_S_X 0x00000015 103 #define RDECODE_4KB_D_X 0x00000016 104 #define RDECODE_64KB_S_X 0x00000019 105 #define RDECODE_64KB_D_X 0x0000001A 106 107 #define RDECODE_MESSAGE_NOT_SUPPORTED 0x00000000 108 #define RDECODE_MESSAGE_CREATE 0x00000001 109 #define RDECODE_MESSAGE_DECODE 0x00000002 110 #define RDECODE_MESSAGE_DRM 0x00000003 111 #define RDECODE_MESSAGE_AVC 0x00000006 112 #define RDECODE_MESSAGE_VC1 0x00000007 113 #define RDECODE_MESSAGE_MPEG2_VLD 0x0000000A 114 #define RDECODE_MESSAGE_MPEG4_ASP_VLD 0x0000000B 115 #define RDECODE_MESSAGE_HEVC 0x0000000D 116 #define RDECODE_MESSAGE_VP9 0x0000000E 117 #define RDECODE_MESSAGE_DYNAMIC_DPB 0x00000010 118 #define RDECODE_MESSAGE_AV1 0x00000011 119 120 #define RDECODE_FEEDBACK_PROFILING 0x00000001 121 122 #define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7 123 124 #define RDECODE_VP9_PROBS_DATA_SIZE 2304 125 126 #define mmUVD_JPEG_CNTL 0x0200 127 #define mmUVD_JPEG_CNTL_BASE_IDX 1 128 #define mmUVD_JPEG_RB_BASE 0x0201 129 #define mmUVD_JPEG_RB_BASE_BASE_IDX 1 130 #define mmUVD_JPEG_RB_WPTR 0x0202 131 #define mmUVD_JPEG_RB_WPTR_BASE_IDX 1 132 #define mmUVD_JPEG_RB_RPTR 0x0203 133 #define mmUVD_JPEG_RB_RPTR_BASE_IDX 1 134 #define mmUVD_JPEG_RB_SIZE 0x0204 135 #define mmUVD_JPEG_RB_SIZE_BASE_IDX 1 136 #define mmUVD_JPEG_TIER_CNTL2 0x021a 137 #define mmUVD_JPEG_TIER_CNTL2_BASE_IDX 1 138 #define mmUVD_JPEG_UV_TILING_CTRL 0x021c 139 #define mmUVD_JPEG_UV_TILING_CTRL_BASE_IDX 1 140 #define mmUVD_JPEG_TILING_CTRL 0x021e 141 #define mmUVD_JPEG_TILING_CTRL_BASE_IDX 1 142 #define mmUVD_JPEG_OUTBUF_RPTR 0x0220 143 #define mmUVD_JPEG_OUTBUF_RPTR_BASE_IDX 1 144 #define mmUVD_JPEG_OUTBUF_WPTR 0x0221 145 #define mmUVD_JPEG_OUTBUF_WPTR_BASE_IDX 1 146 #define mmUVD_JPEG_PITCH 0x0222 147 #define mmUVD_JPEG_PITCH_BASE_IDX 1 148 #define mmUVD_JPEG_INT_EN 0x0229 149 #define mmUVD_JPEG_INT_EN_BASE_IDX 1 150 #define mmUVD_JPEG_UV_PITCH 0x022b 151 #define mmUVD_JPEG_UV_PITCH_BASE_IDX 1 152 #define mmUVD_JPEG_INDEX 0x023e 153 #define mmUVD_JPEG_INDEX_BASE_IDX 1 154 #define mmUVD_JPEG_DATA 0x023f 155 #define mmUVD_JPEG_DATA_BASE_IDX 1 156 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH 0x0438 157 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_BASE_IDX 1 158 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW 0x0439 159 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_BASE_IDX 1 160 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH 0x045a 161 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_BASE_IDX 1 162 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW 0x045b 163 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW_BASE_IDX 1 164 #define mmUVD_CTX_INDEX 0x0528 165 #define mmUVD_CTX_INDEX_BASE_IDX 1 166 #define mmUVD_CTX_DATA 0x0529 167 #define mmUVD_CTX_DATA_BASE_IDX 1 168 #define mmUVD_SOFT_RESET 0x05a0 169 #define mmUVD_SOFT_RESET_BASE_IDX 1 170 171 #define vcnipUVD_JPEG_DEC_SOFT_RST 0x402f 172 #define vcnipUVD_JRBC_IB_COND_RD_TIMER 0x408e 173 #define vcnipUVD_JRBC_IB_REF_DATA 0x408f 174 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH 0x40e1 175 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW 0x40e0 176 #define vcnipUVD_JPEG_RB_BASE 0x4001 177 #define vcnipUVD_JPEG_RB_SIZE 0x4004 178 #define vcnipUVD_JPEG_RB_WPTR 0x4002 179 #define vcnipUVD_JPEG_PITCH 0x401f 180 #define vcnipUVD_JPEG_UV_PITCH 0x4020 181 #define vcnipJPEG_DEC_ADDR_MODE 0x4027 182 #define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE 0x4024 183 #define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE 0x4025 184 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH 0x40e3 185 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW 0x40e2 186 #define vcnipUVD_JPEG_INDEX 0x402c 187 #define vcnipUVD_JPEG_DATA 0x402d 188 #define vcnipUVD_JPEG_TIER_CNTL2 0x400f 189 #define vcnipUVD_JPEG_OUTBUF_RPTR 0x401e 190 #define vcnipUVD_JPEG_OUTBUF_CNTL 0x401c 191 #define vcnipUVD_JPEG_INT_EN 0x400a 192 #define vcnipUVD_JPEG_CNTL 0x4000 193 #define vcnipUVD_JPEG_RB_RPTR 0x4003 194 #define vcnipUVD_JPEG_OUTBUF_WPTR 0x401d 195 196 #define UVD_BASE_INST0_SEG0 0x00007800 197 #define UVD_BASE_INST0_SEG1 0x00007E00 198 #define UVD_BASE_INST0_SEG2 0 199 #define UVD_BASE_INST0_SEG3 0 200 #define UVD_BASE_INST0_SEG4 0 201 202 #define SOC15_REG_ADDR(reg) (UVD_BASE_INST0_SEG1 + reg) 203 204 #define COND0 0 205 #define COND1 1 206 #define COND2 2 207 #define COND3 3 208 #define COND4 4 209 #define COND5 5 210 #define COND6 6 211 #define COND7 7 212 213 #define TYPE0 0 214 #define TYPE1 1 215 #define TYPE2 2 216 #define TYPE3 3 217 #define TYPE4 4 218 #define TYPE5 5 219 #define TYPE6 6 220 #define TYPE7 7 221 222 /* VP9 Frame header flags */ 223 #define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_SHIFT (14) 224 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT (13) 225 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT (12) 226 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT (11) 227 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_SHIFT (10) 228 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (9) 229 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT (8) 230 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT (7) 231 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT (6) 232 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT (5) 233 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT (4) 234 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT (3) 235 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT (2) 236 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT (1) 237 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_SHIFT (0) 238 239 240 #define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_MASK (0x00004000) 241 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK (0x00002000) 242 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK (0x00001000) 243 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK (0x00000800) 244 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_MASK (0x00000400) 245 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x00000200) 246 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK (0x00000100) 247 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK (0x00000080) 248 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK (0x00000040) 249 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK (0x00000020) 250 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK (0x00000010) 251 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK (0x00000008) 252 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK (0x00000004) 253 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK (0x00000002) 254 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_MASK (0x00000001) 255 256 /* Drm definitions */ 257 #define DRM_CMD_KEY_SHIFT 0 258 #define DRM_CMD_CNT_KEY_SHIFT 1 259 #define DRM_CMD_CNT_DATA_SHIFT 2 260 #define DRM_CMD_OFFSET_SHIFT 3 261 #define DRM_CMD_SESSION_SEL_SHIFT 4 262 #define DRM_CMD_UNWRAP_KEY_SHIFT 8 263 #define DRM_CMD_GEN_MASK_SHIFT 9 264 #define DRM_CMD_ALGORITHM_SHIFT 10 265 #define DRM_CMD_BYTE_MASK_SHIFT 16 266 #define DRM_CMD_DRM_BYPASS_SHIFT 31 267 268 #define DRM_CMD_KEY_MASK (0x00000001) 269 #define DRM_CMD_CNT_KEY_MASK (0x00000002) 270 #define DRM_CMD_CNT_DATA_MASK (0x00000004) 271 #define DRM_CMD_OFFSET_MASK (0x00000008) 272 #define DRM_CMD_SESSION_SEL_MASK (0x000000F0) 273 #define DRM_CMD_UNWRAP_KEY_MASK (0x00000100) 274 #define DRM_CMD_GEN_MASK_MASK (0x00000200) 275 #define DRM_CMD_ALGORITHM_MASK (0x00000C00) 276 #define DRM_CMD_BYTE_MASK_MASK (0x00FF0000) 277 #define DRM_CMD_DRM_BYPASS_MASK (0x80000000) 278 279 /* Drm_cntl definitions */ 280 #define DRM_CNTL_ENC_BYTECNT_SHIFT (6) 281 #define DRM_CNTL_CLR_BYTECNT_SHIFT (16) 282 #define DRM_CNTL_BYPASS_SHIFT (24) 283 #define DRM_CNTL_PARTIAL_MODE_SHIFT (25) 284 #define DRM_CNTL_OFFSET_MODE_SHIFT (26) 285 #define DRM_CNTL_HEADER_MODE_SHIFT (27) 286 #define DRM_CNTL_HEADER_BYTECNT_SHIFT (28) 287 288 #define DRM_CNTL_ENC_BYTECNT_MASK (0x00000FC0) 289 #define DRM_CNTL_CLR_BYTECNT_MASK (0x003F0000) 290 #define DRM_CNTL_BYPASS_MASK (0x01000000) 291 #define DRM_CNTL_PARTIAL_MODE_MASK (0x02000000) 292 #define DRM_CNTL_OFFSET_MODE_MASK (0x04000000) 293 #define DRM_CNTL_HEADER_MODE_MASK (0x08000000) 294 #define DRM_CNTL_HEADER_BYTECNT_MASK (0xF0000000) 295 296 #define SAMU_DRM_DISABLE 0x00000000 297 #define SAMU_DRM_ENABLE 0x00000001 298 299 /* AV1 Frame header flags */ 300 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_SHIFT (31) 301 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_SHIFT (30) 302 #define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_SHIFT (29) 303 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_SHIFT (28) 304 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (27) 305 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_SHIFT (26) 306 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_SHIFT (25) 307 #define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_SHIFT (24) 308 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_SHIFT (23) 309 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_SHIFT (22) 310 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_SHIFT (21) 311 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_SHIFT (20) 312 #define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_SHIFT (19) 313 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_SHIFT (18) 314 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_SHIFT (17) 315 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_SHIFT (16) 316 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_SHIFT (15) 317 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_SHIFT (14) 318 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_SHIFT (13) 319 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_SHIFT (12) 320 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_SHIFT (11) 321 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_SHIFT (10) 322 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_SHIFT (9) 323 #define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_SHIFT (8) 324 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_SHIFT (7) 325 #define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_SHIFT (6) 326 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_SHIFT (5) 327 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_SHIFT (4) 328 #define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_SHIFT (3) 329 #define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_SHIFT (2) 330 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_SHIFT (1) 331 #define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_SHIFT (0) 332 333 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_MASK (0x80000000) 334 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_MASK (0x40000000) 335 #define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_MASK (0x20000000) 336 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_MASK (0x10000000) 337 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x08000000) 338 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_MASK (0x04000000) 339 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_MASK (0x02000000) 340 #define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_MASK (0x01000000) 341 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_MASK (0x00800000) 342 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_MASK (0x00400000) 343 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_MASK (0x00200000) 344 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_MASK (0x00100000) 345 #define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_MASK (0x00080000) 346 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_MASK (0x00040000) 347 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_MASK (0x00020000) 348 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_MASK (0x00010000) 349 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_MASK (0x00008000) 350 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_MASK (0x00004000) 351 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_MASK (0x00002000) 352 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_MASK (0x00001000) 353 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_MASK (0x00000800) 354 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_MASK (0x00000400) 355 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_MASK (0x00000200) 356 #define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_MASK (0x00000100) 357 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_MASK (0x00000080) 358 #define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_MASK (0x08000040) 359 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_MASK (0x00000020) 360 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_MASK (0x00000010) 361 #define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_MASK (0x00000008) 362 #define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_MASK (0x00000004) 363 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_MASK (0x00000002) 364 #define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_MASK (0x00000001) 365 366 typedef struct rvcn_dec_message_index_s { 367 unsigned int message_id; 368 unsigned int offset; 369 unsigned int size; 370 unsigned int filled; 371 } rvcn_dec_message_index_t; 372 373 typedef struct rvcn_dec_message_header_s { 374 unsigned int header_size; 375 unsigned int total_size; 376 unsigned int num_buffers; 377 unsigned int msg_type; 378 unsigned int stream_handle; 379 unsigned int status_report_feedback_number; 380 381 rvcn_dec_message_index_t index[1]; 382 } rvcn_dec_message_header_t; 383 384 typedef struct rvcn_dec_message_create_s { 385 unsigned int stream_type; 386 unsigned int session_flags; 387 unsigned int width_in_samples; 388 unsigned int height_in_samples; 389 } rvcn_dec_message_create_t; 390 391 typedef struct rvcn_dec_message_decode_s { 392 unsigned int stream_type; 393 unsigned int decode_flags; 394 unsigned int width_in_samples; 395 unsigned int height_in_samples; 396 397 unsigned int bsd_size; 398 unsigned int dpb_size; 399 unsigned int dt_size; 400 unsigned int sct_size; 401 unsigned int sc_coeff_size; 402 unsigned int hw_ctxt_size; 403 unsigned int sw_ctxt_size; 404 unsigned int pic_param_size; 405 unsigned int mb_cntl_size; 406 unsigned int reserved0[4]; 407 unsigned int decode_buffer_flags; 408 409 unsigned int db_pitch; 410 unsigned int db_aligned_height; 411 unsigned int db_tiling_mode; 412 unsigned int db_swizzle_mode; 413 unsigned int db_array_mode; 414 unsigned int db_field_mode; 415 unsigned int db_surf_tile_config; 416 417 unsigned int dt_pitch; 418 unsigned int dt_uv_pitch; 419 unsigned int dt_tiling_mode; 420 unsigned int dt_swizzle_mode; 421 unsigned int dt_array_mode; 422 unsigned int dt_field_mode; 423 unsigned int dt_out_format; 424 unsigned int dt_surf_tile_config; 425 unsigned int dt_uv_surf_tile_config; 426 unsigned int dt_luma_top_offset; 427 unsigned int dt_luma_bottom_offset; 428 unsigned int dt_chroma_top_offset; 429 unsigned int dt_chroma_bottom_offset; 430 unsigned int dt_chromaV_top_offset; 431 unsigned int dt_chromaV_bottom_offset; 432 433 unsigned int mif_wrc_en; 434 unsigned int db_pitch_uv; 435 436 unsigned char reserved1[20]; 437 } rvcn_dec_message_decode_t; 438 439 typedef struct rvcn_dec_message_drm_s { 440 unsigned int drm_key[4]; 441 unsigned int drm_counter[4]; 442 unsigned int drm_wrapped_key[4]; 443 unsigned int drm_offset; 444 unsigned int drm_cmd; 445 unsigned int drm_cntl; 446 unsigned int drm_reserved; 447 } rvcn_dec_message_drm_t; 448 449 typedef struct rvcn_dec_message_dynamic_dpb_s { 450 unsigned int dpbConfigFlags; 451 unsigned int dpbLumaPitch; 452 unsigned int dpbLumaAlignedHeight; 453 unsigned int dpbLumaAlignedSize; 454 unsigned int dpbChromaPitch; 455 unsigned int dpbChromaAlignedHeight; 456 unsigned int dpbChromaAlignedSize; 457 458 unsigned char dpbArraySize; 459 unsigned char dpbCurArraySlice; 460 unsigned char dpbRefArraySlice[16]; 461 unsigned char dpbReserved0[2]; 462 463 unsigned int dpbCurrOffset; 464 unsigned int dpbAddrOffset[16]; 465 } rvcn_dec_message_dynamic_dpb_t; 466 467 typedef struct rvcn_dec_message_dynamic_dpb_t2_s { 468 unsigned int dpbConfigFlags; 469 unsigned int dpbLumaPitch; 470 unsigned int dpbLumaAlignedHeight; 471 unsigned int dpbLumaAlignedSize; 472 unsigned int dpbChromaPitch; 473 unsigned int dpbChromaAlignedHeight; 474 unsigned int dpbChromaAlignedSize; 475 unsigned int dpbArraySize; 476 477 unsigned int dpbCurrLo; 478 unsigned int dpbCurrHi; 479 unsigned int dpbAddrLo[16]; 480 unsigned int dpbAddrHi[16]; 481 } rvcn_dec_message_dynamic_dpb_t2_t; 482 483 typedef struct { 484 unsigned short viewOrderIndex; 485 unsigned short viewId; 486 unsigned short numOfAnchorRefsInL0; 487 unsigned short viewIdOfAnchorRefsInL0[15]; 488 unsigned short numOfAnchorRefsInL1; 489 unsigned short viewIdOfAnchorRefsInL1[15]; 490 unsigned short numOfNonAnchorRefsInL0; 491 unsigned short viewIdOfNonAnchorRefsInL0[15]; 492 unsigned short numOfNonAnchorRefsInL1; 493 unsigned short viewIdOfNonAnchorRefsInL1[15]; 494 } radeon_mvcElement_t; 495 496 typedef struct rvcn_dec_message_avc_s { 497 unsigned int profile; 498 unsigned int level; 499 500 unsigned int sps_info_flags; 501 unsigned int pps_info_flags; 502 unsigned char chroma_format; 503 unsigned char bit_depth_luma_minus8; 504 unsigned char bit_depth_chroma_minus8; 505 unsigned char log2_max_frame_num_minus4; 506 507 unsigned char pic_order_cnt_type; 508 unsigned char log2_max_pic_order_cnt_lsb_minus4; 509 unsigned char num_ref_frames; 510 unsigned char reserved_8bit; 511 512 signed char pic_init_qp_minus26; 513 signed char pic_init_qs_minus26; 514 signed char chroma_qp_index_offset; 515 signed char second_chroma_qp_index_offset; 516 517 unsigned char num_slice_groups_minus1; 518 unsigned char slice_group_map_type; 519 unsigned char num_ref_idx_l0_active_minus1; 520 unsigned char num_ref_idx_l1_active_minus1; 521 522 unsigned short slice_group_change_rate_minus1; 523 unsigned short reserved_16bit_1; 524 525 unsigned char scaling_list_4x4[6][16]; 526 unsigned char scaling_list_8x8[2][64]; 527 528 unsigned int frame_num; 529 unsigned int frame_num_list[16]; 530 int curr_field_order_cnt_list[2]; 531 int field_order_cnt_list[16][2]; 532 533 unsigned int decoded_pic_idx; 534 unsigned int curr_pic_ref_frame_num; 535 unsigned char ref_frame_list[16]; 536 537 unsigned int reserved[122]; 538 539 struct { 540 unsigned int numViews; 541 unsigned int viewId0; 542 radeon_mvcElement_t mvcElements[1]; 543 } mvc; 544 545 unsigned short non_existing_frame_flags; 546 unsigned int used_for_reference_flags; 547 } rvcn_dec_message_avc_t; 548 549 typedef struct rvcn_dec_message_vc1_s { 550 unsigned int profile; 551 unsigned int level; 552 unsigned int sps_info_flags; 553 unsigned int pps_info_flags; 554 unsigned int pic_structure; 555 unsigned int chroma_format; 556 unsigned short decoded_pic_idx; 557 unsigned short deblocked_pic_idx; 558 unsigned short forward_ref_idx; 559 unsigned short backward_ref_idx; 560 unsigned int cached_frame_flag; 561 } rvcn_dec_message_vc1_t; 562 563 typedef struct rvcn_dec_message_mpeg2_vld_s { 564 unsigned int decoded_pic_idx; 565 unsigned int forward_ref_pic_idx; 566 unsigned int backward_ref_pic_idx; 567 568 unsigned char load_intra_quantiser_matrix; 569 unsigned char load_nonintra_quantiser_matrix; 570 unsigned char reserved_quantiser_alignement[2]; 571 unsigned char intra_quantiser_matrix[64]; 572 unsigned char nonintra_quantiser_matrix[64]; 573 574 unsigned char profile_and_level_indication; 575 unsigned char chroma_format; 576 577 unsigned char picture_coding_type; 578 579 unsigned char reserved_1; 580 581 unsigned char f_code[2][2]; 582 unsigned char intra_dc_precision; 583 unsigned char pic_structure; 584 unsigned char top_field_first; 585 unsigned char frame_pred_frame_dct; 586 unsigned char concealment_motion_vectors; 587 unsigned char q_scale_type; 588 unsigned char intra_vlc_format; 589 unsigned char alternate_scan; 590 } rvcn_dec_message_mpeg2_vld_t; 591 592 typedef struct rvcn_dec_message_mpeg4_asp_vld_s { 593 unsigned int decoded_pic_idx; 594 unsigned int forward_ref_pic_idx; 595 unsigned int backward_ref_pic_idx; 596 597 unsigned int variant_type; 598 unsigned char profile_and_level_indication; 599 600 unsigned char video_object_layer_verid; 601 unsigned char video_object_layer_shape; 602 603 unsigned char reserved_1; 604 605 unsigned short video_object_layer_width; 606 unsigned short video_object_layer_height; 607 608 unsigned short vop_time_increment_resolution; 609 610 unsigned short reserved_2; 611 612 struct { 613 unsigned int short_video_header : 1; 614 unsigned int obmc_disable : 1; 615 unsigned int interlaced : 1; 616 unsigned int load_intra_quant_mat : 1; 617 unsigned int load_nonintra_quant_mat : 1; 618 unsigned int quarter_sample : 1; 619 unsigned int complexity_estimation_disable : 1; 620 unsigned int resync_marker_disable : 1; 621 unsigned int data_partitioned : 1; 622 unsigned int reversible_vlc : 1; 623 unsigned int newpred_enable : 1; 624 unsigned int reduced_resolution_vop_enable : 1; 625 unsigned int scalability : 1; 626 unsigned int is_object_layer_identifier : 1; 627 unsigned int fixed_vop_rate : 1; 628 unsigned int newpred_segment_type : 1; 629 unsigned int reserved_bits : 16; 630 }; 631 632 unsigned char quant_type; 633 unsigned char reserved_3[3]; 634 unsigned char intra_quant_mat[64]; 635 unsigned char nonintra_quant_mat[64]; 636 637 struct { 638 unsigned char sprite_enable; 639 640 unsigned char reserved_4[3]; 641 642 unsigned short sprite_width; 643 unsigned short sprite_height; 644 short sprite_left_coordinate; 645 short sprite_top_coordinate; 646 647 unsigned char no_of_sprite_warping_points; 648 unsigned char sprite_warping_accuracy; 649 unsigned char sprite_brightness_change; 650 unsigned char low_latency_sprite_enable; 651 } sprite_config; 652 653 struct { 654 struct { 655 unsigned int check_skip : 1; 656 unsigned int switch_rounding : 1; 657 unsigned int t311 : 1; 658 unsigned int reserved_bits : 29; 659 }; 660 661 unsigned char vol_mode; 662 663 unsigned char reserved_5[3]; 664 } divx_311_config; 665 666 struct { 667 unsigned char vop_data_present; 668 unsigned char vop_coding_type; 669 unsigned char vop_quant; 670 unsigned char vop_coded; 671 unsigned char vop_rounding_type; 672 unsigned char intra_dc_vlc_thr; 673 unsigned char top_field_first; 674 unsigned char alternate_vertical_scan_flag; 675 unsigned char vop_fcode_forward; 676 unsigned char vop_fcode_backward; 677 unsigned int TRB[2]; 678 unsigned int TRD[2]; 679 } vop; 680 681 } rvcn_dec_message_mpeg4_asp_vld_t; 682 683 typedef struct rvcn_dec_message_hevc_s { 684 unsigned int sps_info_flags; 685 unsigned int pps_info_flags; 686 unsigned char chroma_format; 687 unsigned char bit_depth_luma_minus8; 688 unsigned char bit_depth_chroma_minus8; 689 unsigned char log2_max_pic_order_cnt_lsb_minus4; 690 691 unsigned char sps_max_dec_pic_buffering_minus1; 692 unsigned char log2_min_luma_coding_block_size_minus3; 693 unsigned char log2_diff_max_min_luma_coding_block_size; 694 unsigned char log2_min_transform_block_size_minus2; 695 696 unsigned char log2_diff_max_min_transform_block_size; 697 unsigned char max_transform_hierarchy_depth_inter; 698 unsigned char max_transform_hierarchy_depth_intra; 699 unsigned char pcm_sample_bit_depth_luma_minus1; 700 701 unsigned char pcm_sample_bit_depth_chroma_minus1; 702 unsigned char log2_min_pcm_luma_coding_block_size_minus3; 703 unsigned char log2_diff_max_min_pcm_luma_coding_block_size; 704 unsigned char num_extra_slice_header_bits; 705 706 unsigned char num_short_term_ref_pic_sets; 707 unsigned char num_long_term_ref_pic_sps; 708 unsigned char num_ref_idx_l0_default_active_minus1; 709 unsigned char num_ref_idx_l1_default_active_minus1; 710 711 signed char pps_cb_qp_offset; 712 signed char pps_cr_qp_offset; 713 signed char pps_beta_offset_div2; 714 signed char pps_tc_offset_div2; 715 716 unsigned char diff_cu_qp_delta_depth; 717 unsigned char num_tile_columns_minus1; 718 unsigned char num_tile_rows_minus1; 719 unsigned char log2_parallel_merge_level_minus2; 720 721 unsigned short column_width_minus1[19]; 722 unsigned short row_height_minus1[21]; 723 724 signed char init_qp_minus26; 725 unsigned char num_delta_pocs_ref_rps_idx; 726 unsigned char curr_idx; 727 unsigned char reserved[1]; 728 int curr_poc; 729 unsigned char ref_pic_list[16]; 730 int poc_list[16]; 731 unsigned char ref_pic_set_st_curr_before[8]; 732 unsigned char ref_pic_set_st_curr_after[8]; 733 unsigned char ref_pic_set_lt_curr[8]; 734 735 unsigned char ucScalingListDCCoefSizeID2[6]; 736 unsigned char ucScalingListDCCoefSizeID3[2]; 737 738 unsigned char highestTid; 739 unsigned char isNonRef; 740 741 unsigned char p010_mode; 742 unsigned char msb_mode; 743 unsigned char luma_10to8; 744 unsigned char chroma_10to8; 745 746 unsigned char hevc_reserved[2]; 747 748 unsigned char direct_reflist[2][15]; 749 unsigned int st_rps_bits; 750 } rvcn_dec_message_hevc_t; 751 752 typedef struct rvcn_dec_message_vp9_s { 753 unsigned int frame_header_flags; 754 755 unsigned char frame_context_idx; 756 unsigned char reset_frame_context; 757 758 unsigned char curr_pic_idx; 759 unsigned char interp_filter; 760 761 unsigned char filter_level; 762 unsigned char sharpness_level; 763 unsigned char lf_adj_level[8][4][2]; 764 unsigned char base_qindex; 765 signed char y_dc_delta_q; 766 signed char uv_ac_delta_q; 767 signed char uv_dc_delta_q; 768 769 unsigned char log2_tile_cols; 770 unsigned char log2_tile_rows; 771 unsigned char tx_mode; 772 unsigned char reference_mode; 773 unsigned char chroma_format; 774 775 unsigned char ref_frame_map[8]; 776 777 unsigned char frame_refs[3]; 778 unsigned char ref_frame_sign_bias[3]; 779 unsigned char frame_to_show; 780 unsigned char bit_depth_luma_minus8; 781 unsigned char bit_depth_chroma_minus8; 782 783 unsigned char p010_mode; 784 unsigned char msb_mode; 785 unsigned char luma_10to8; 786 unsigned char chroma_10to8; 787 788 unsigned int vp9_frame_size; 789 unsigned int compressed_header_size; 790 unsigned int uncompressed_header_size; 791 } rvcn_dec_message_vp9_t; 792 793 typedef enum { 794 RVCN_DEC_AV1_IDENTITY = 0, 795 RVCN_DEC_AV1_TRANSLATION = 1, 796 RVCN_DEC_AV1_ROTZOOM = 2, 797 RVCN_DEC_AV1_AFFINE = 3, 798 RVCN_DEC_AV1_HORTRAPEZOID = 4, 799 RVCN_DEC_AV1_VERTRAPEZOID = 5, 800 RVCN_DEC_AV1_HOMOGRAPHY = 6, 801 RVCN_DEC_AV1_TRANS_TYPES = 7, 802 } rvcn_dec_transformation_type_e; 803 804 typedef struct { 805 rvcn_dec_transformation_type_e wmtype; 806 int wmmat[8]; 807 short alpha, beta, gamma, delta; 808 } rvcn_dec_warped_motion_params_t; 809 810 typedef struct { 811 unsigned char apply_grain; 812 unsigned char scaling_points_y[14][2]; 813 unsigned char num_y_points; 814 unsigned char scaling_points_cb[10][2]; 815 unsigned char num_cb_points; 816 unsigned char scaling_points_cr[10][2]; 817 unsigned char num_cr_points; 818 unsigned char scaling_shift; 819 unsigned char ar_coeff_lag; 820 signed char ar_coeffs_y[24]; 821 signed char ar_coeffs_cb[25]; 822 signed char ar_coeffs_cr[25]; 823 unsigned char ar_coeff_shift; 824 unsigned char cb_mult; 825 unsigned char cb_luma_mult; 826 unsigned short cb_offset; 827 unsigned char cr_mult; 828 unsigned char cr_luma_mult; 829 unsigned short cr_offset; 830 unsigned char overlap_flag; 831 unsigned char clip_to_restricted_range; 832 unsigned char bit_depth_minus_8; 833 unsigned char chroma_scaling_from_luma; 834 unsigned char grain_scale_shift; 835 unsigned short random_seed; 836 } rvcn_dec_film_grain_params_t; 837 838 typedef struct rvcn_dec_av1_tile_info_s { 839 unsigned int offset; 840 unsigned int size; 841 } rvcn_dec_av1_tile_info_t; 842 843 typedef struct rvcn_dec_message_av1_s { 844 unsigned int frame_header_flags; 845 unsigned int current_frame_id; 846 unsigned int frame_offset; 847 848 unsigned char profile; 849 unsigned char is_annexb; 850 unsigned char frame_type; 851 unsigned char primary_ref_frame; 852 unsigned char curr_pic_idx; 853 854 unsigned char sb_size; 855 unsigned char interp_filter; 856 unsigned char filter_level[2]; 857 unsigned char filter_level_u; 858 unsigned char filter_level_v; 859 unsigned char sharpness_level; 860 signed char ref_deltas[8]; 861 signed char mode_deltas[2]; 862 unsigned char base_qindex; 863 signed char y_dc_delta_q; 864 signed char u_dc_delta_q; 865 signed char v_dc_delta_q; 866 signed char u_ac_delta_q; 867 signed char v_ac_delta_q; 868 signed char qm_y; 869 signed char qm_u; 870 signed char qm_v; 871 signed char delta_q_res; 872 signed char delta_lf_res; 873 874 unsigned char tile_cols; 875 unsigned char tile_rows; 876 unsigned char tx_mode; 877 unsigned char reference_mode; 878 unsigned char chroma_format; 879 unsigned int tile_size_bytes; 880 unsigned int context_update_tile_id; 881 unsigned int tile_col_start_sb[65]; 882 unsigned int tile_row_start_sb[65]; 883 unsigned int max_width; 884 unsigned int max_height; 885 unsigned int width; 886 unsigned int height; 887 unsigned int superres_upscaled_width; 888 unsigned char superres_scale_denominator; 889 unsigned char order_hint_bits; 890 891 unsigned char ref_frame_map[8]; 892 unsigned int ref_frame_offset[8]; 893 unsigned char frame_refs[7]; 894 unsigned char ref_frame_sign_bias[7]; 895 896 unsigned char bit_depth_luma_minus8; 897 unsigned char bit_depth_chroma_minus8; 898 899 int feature_data[8][8]; 900 unsigned char feature_mask[8]; 901 902 unsigned char cdef_damping; 903 unsigned char cdef_bits; 904 unsigned short cdef_strengths[16]; 905 unsigned short cdef_uv_strengths[16]; 906 unsigned char frame_restoration_type[3]; 907 unsigned char log2_restoration_unit_size_minus5[3]; 908 909 unsigned char p010_mode; 910 unsigned char msb_mode; 911 unsigned char luma_10to8; 912 unsigned char chroma_10to8; 913 unsigned char preskip_segid; 914 unsigned char last_active_segid; 915 unsigned char seg_lossless_flag; 916 unsigned char coded_lossless; 917 rvcn_dec_film_grain_params_t film_grain; 918 unsigned int uncompressed_header_size; 919 rvcn_dec_warped_motion_params_t global_motion[8]; 920 rvcn_dec_av1_tile_info_t tile_info[256]; 921 } rvcn_dec_message_av1_t; 922 923 typedef struct rvcn_dec_feature_index_s { 924 unsigned int feature_id; 925 unsigned int offset; 926 unsigned int size; 927 unsigned int filled; 928 } rvcn_dec_feature_index_t; 929 930 typedef struct rvcn_dec_feedback_header_s { 931 unsigned int header_size; 932 unsigned int total_size; 933 unsigned int num_buffers; 934 unsigned int status_report_feedback_number; 935 unsigned int status; 936 unsigned int value; 937 unsigned int errorBits; 938 rvcn_dec_feature_index_t index[1]; 939 } rvcn_dec_feedback_header_t; 940 941 typedef struct rvcn_dec_feedback_profiling_s { 942 unsigned int size; 943 944 unsigned int decodingTime; 945 unsigned int decodePlusOverhead; 946 unsigned int masterTimerHits; 947 unsigned int uvdLBSIREWaitCount; 948 949 unsigned int avgMPCMemLatency; 950 unsigned int maxMPCMemLatency; 951 unsigned int uvdMPCLumaHits; 952 unsigned int uvdMPCLumaHitPend; 953 unsigned int uvdMPCLumaSearch; 954 unsigned int uvdMPCChromaHits; 955 unsigned int uvdMPCChromaHitPend; 956 unsigned int uvdMPCChromaSearch; 957 958 unsigned int uvdLMIPerfCountLo; 959 unsigned int uvdLMIPerfCountHi; 960 unsigned int uvdLMIAvgLatCntrEnvHit; 961 unsigned int uvdLMILatCntr; 962 963 unsigned int frameCRC0; 964 unsigned int frameCRC1; 965 unsigned int frameCRC2; 966 unsigned int frameCRC3; 967 968 unsigned int uvdLMIPerfMonCtrl; 969 unsigned int uvdLMILatCtrl; 970 unsigned int uvdMPCCntl; 971 unsigned int reserved0[4]; 972 unsigned int decoderID; 973 unsigned int codec; 974 975 unsigned int dmaHwCrc32Enable; 976 unsigned int dmaHwCrc32Value; 977 unsigned int dmaHwCrc32Value2; 978 } rvcn_dec_feedback_profiling_t; 979 980 typedef struct rvcn_dec_vp9_nmv_ctx_mask_s { 981 unsigned short classes_mask[2]; 982 unsigned short bits_mask[2]; 983 unsigned char joints_mask; 984 unsigned char sign_mask[2]; 985 unsigned char class0_mask[2]; 986 unsigned char class0_fp_mask[2]; 987 unsigned char fp_mask[2]; 988 unsigned char class0_hp_mask[2]; 989 unsigned char hp_mask[2]; 990 unsigned char reserve[11]; 991 } rvcn_dec_vp9_nmv_ctx_mask_t; 992 993 typedef struct rvcn_dec_vp9_nmv_component_s { 994 unsigned char sign; 995 unsigned char classes[10]; 996 unsigned char class0[1]; 997 unsigned char bits[10]; 998 unsigned char class0_fp[2][3]; 999 unsigned char fp[3]; 1000 unsigned char class0_hp; 1001 unsigned char hp; 1002 } rvcn_dec_vp9_nmv_component_t; 1003 1004 typedef struct rvcn_dec_vp9_probs_s { 1005 rvcn_dec_vp9_nmv_ctx_mask_t nmvc_mask; 1006 unsigned char coef_probs[4][2][2][6][6][3]; 1007 unsigned char y_mode_prob[4][9]; 1008 unsigned char uv_mode_prob[10][9]; 1009 unsigned char single_ref_prob[5][2]; 1010 unsigned char switchable_interp_prob[4][2]; 1011 unsigned char partition_prob[16][3]; 1012 unsigned char inter_mode_probs[7][3]; 1013 unsigned char mbskip_probs[3]; 1014 unsigned char intra_inter_prob[4]; 1015 unsigned char comp_inter_prob[5]; 1016 unsigned char comp_ref_prob[5]; 1017 unsigned char tx_probs_32x32[2][3]; 1018 unsigned char tx_probs_16x16[2][2]; 1019 unsigned char tx_probs_8x8[2][1]; 1020 unsigned char mv_joints[3]; 1021 rvcn_dec_vp9_nmv_component_t mv_comps[2]; 1022 } rvcn_dec_vp9_probs_t; 1023 1024 typedef struct rvcn_dec_vp9_probs_segment_s { 1025 union { 1026 rvcn_dec_vp9_probs_t probs; 1027 unsigned char probs_data[RDECODE_VP9_PROBS_DATA_SIZE]; 1028 }; 1029 1030 union { 1031 struct { 1032 unsigned int feature_data[8]; 1033 unsigned char tree_probs[7]; 1034 unsigned char pred_probs[3]; 1035 unsigned char abs_delta; 1036 unsigned char feature_mask[8]; 1037 } seg; 1038 unsigned char segment_data[256]; 1039 }; 1040 } rvcn_dec_vp9_probs_segment_t; 1041 1042 typedef struct rvcn_dec_av1_fg_init_buf_s { 1043 short luma_grain_block[64][96]; 1044 short cb_grain_block[32][48]; 1045 short cr_grain_block[32][48]; 1046 short scaling_lut_y[256]; 1047 short scaling_lut_cb[256]; 1048 short scaling_lut_cr[256]; 1049 unsigned short temp_tile_left_seed[256]; 1050 } rvcn_dec_av1_fg_init_buf_t; 1051 1052 typedef struct rvcn_dec_av1_segment_fg_s { 1053 union { 1054 struct { 1055 unsigned char feature_data[128]; 1056 unsigned char feature_mask[8]; 1057 } seg; 1058 unsigned char segment_data[256]; 1059 }; 1060 rvcn_dec_av1_fg_init_buf_t fg_buf; 1061 } rvcn_dec_av1_segment_fg_t; 1062 1063 struct jpeg_params { 1064 unsigned bsd_size; 1065 unsigned dt_pitch; 1066 unsigned dt_uv_pitch; 1067 unsigned dt_luma_top_offset; 1068 unsigned dt_chroma_top_offset; 1069 bool direct_reg; 1070 }; 1071 1072 #define RDECODE_VCN1_GPCOM_VCPU_CMD 0x2070c 1073 #define RDECODE_VCN1_GPCOM_VCPU_DATA0 0x20710 1074 #define RDECODE_VCN1_GPCOM_VCPU_DATA1 0x20714 1075 #define RDECODE_VCN1_ENGINE_CNTL 0x20718 1076 1077 #define RDECODE_VCN2_GPCOM_VCPU_CMD (0x503 << 2) 1078 #define RDECODE_VCN2_GPCOM_VCPU_DATA0 (0x504 << 2) 1079 #define RDECODE_VCN2_GPCOM_VCPU_DATA1 (0x505 << 2) 1080 #define RDECODE_VCN2_ENGINE_CNTL (0x506 << 2) 1081 1082 #define RDECODE_VCN2_5_GPCOM_VCPU_CMD 0x3c 1083 #define RDECODE_VCN2_5_GPCOM_VCPU_DATA0 0x40 1084 #define RDECODE_VCN2_5_GPCOM_VCPU_DATA1 0x44 1085 #define RDECODE_VCN2_5_ENGINE_CNTL 0x9b4 1086 1087 #define RDECODE_SESSION_CONTEXT_SIZE (128 * 1024) 1088 1089 #endif 1090