1 /*
2 * Copyright © 2019 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "iris_perf.h"
24 #include "iris_context.h"
25
26 static void *
iris_oa_bo_alloc(void * bufmgr,const char * name,uint64_t size)27 iris_oa_bo_alloc(void *bufmgr, const char *name, uint64_t size)
28 {
29 return iris_bo_alloc(bufmgr, name, size, 1, IRIS_MEMZONE_OTHER, BO_ALLOC_SMEM);
30 }
31
32 static void
iris_perf_emit_stall_at_pixel_scoreboard(struct iris_context * ice)33 iris_perf_emit_stall_at_pixel_scoreboard(struct iris_context *ice)
34 {
35 iris_emit_end_of_pipe_sync(&ice->batches[IRIS_BATCH_RENDER],
36 "OA metrics",
37 PIPE_CONTROL_STALL_AT_SCOREBOARD);
38 }
39
40 static void
iris_perf_emit_mi_report_perf_count(void * c,void * bo,uint32_t offset_in_bytes,uint32_t report_id)41 iris_perf_emit_mi_report_perf_count(void *c,
42 void *bo,
43 uint32_t offset_in_bytes,
44 uint32_t report_id)
45 {
46 struct iris_context *ice = c;
47 struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
48 batch->screen->vtbl.emit_mi_report_perf_count(batch, bo, offset_in_bytes, report_id);
49 }
50
51 static void
iris_perf_batchbuffer_flush(void * c,const char * file,int line)52 iris_perf_batchbuffer_flush(void *c, const char *file, int line)
53 {
54 struct iris_context *ice = c;
55 _iris_batch_flush(&ice->batches[IRIS_BATCH_RENDER], __FILE__, __LINE__);
56 }
57
58 static void
iris_perf_store_register_mem(void * ctx,void * bo,uint32_t reg,uint32_t reg_size,uint32_t offset)59 iris_perf_store_register_mem(void *ctx, void *bo,
60 uint32_t reg, uint32_t reg_size,
61 uint32_t offset)
62 {
63 struct iris_context *ice = ctx;
64 struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
65 if (reg_size == 8) {
66 batch->screen->vtbl.store_register_mem64(batch, reg, bo, offset, false);
67 } else {
68 assert(reg_size == 4);
69 batch->screen->vtbl.store_register_mem32(batch, reg, bo, offset, false);
70 }
71 }
72
73 typedef void (*bo_unreference_t)(void *);
74 typedef void *(*bo_map_t)(void *, void *, unsigned flags);
75 typedef void (*bo_unmap_t)(void *);
76 typedef void (*emit_mi_report_t)(void *, void *, uint32_t, uint32_t);
77 typedef void (*emit_mi_flush_t)(void *);
78 typedef void (*store_register_mem_t)(void *ctx, void *bo,
79 uint32_t reg, uint32_t reg_size,
80 uint32_t offset);
81 typedef bool (*batch_references_t)(void *batch, void *bo);
82 typedef void (*bo_wait_rendering_t)(void *bo);
83 typedef int (*bo_busy_t)(void *bo);
84
85 void
iris_perf_init_vtbl(struct intel_perf_config * perf_cfg)86 iris_perf_init_vtbl(struct intel_perf_config *perf_cfg)
87 {
88 perf_cfg->vtbl.bo_alloc = iris_oa_bo_alloc;
89 perf_cfg->vtbl.bo_unreference = (bo_unreference_t)iris_bo_unreference;
90 perf_cfg->vtbl.bo_map = (bo_map_t)iris_bo_map;
91 perf_cfg->vtbl.bo_unmap = (bo_unmap_t)iris_bo_unmap;
92 perf_cfg->vtbl.emit_stall_at_pixel_scoreboard =
93 (emit_mi_flush_t)iris_perf_emit_stall_at_pixel_scoreboard;
94
95 perf_cfg->vtbl.emit_mi_report_perf_count =
96 (emit_mi_report_t)iris_perf_emit_mi_report_perf_count;
97 perf_cfg->vtbl.batchbuffer_flush = iris_perf_batchbuffer_flush;
98 perf_cfg->vtbl.store_register_mem =
99 (store_register_mem_t) iris_perf_store_register_mem;
100 perf_cfg->vtbl.batch_references = (batch_references_t)iris_batch_references;
101 perf_cfg->vtbl.bo_wait_rendering =
102 (bo_wait_rendering_t)iris_bo_wait_rendering;
103 perf_cfg->vtbl.bo_busy = (bo_busy_t)iris_bo_busy;
104 }
105