1 /*
2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_C1_C1_LIR_HPP
26 #define SHARE_VM_C1_C1_LIR_HPP
27
28 #include "c1/c1_Defs.hpp"
29 #include "c1/c1_ValueType.hpp"
30 #include "oops/method.hpp"
31 #include "utilities/globalDefinitions.hpp"
32
33 class BlockBegin;
34 class BlockList;
35 class LIR_Assembler;
36 class CodeEmitInfo;
37 class CodeStub;
38 class CodeStubList;
39 class ArrayCopyStub;
40 class LIR_Op;
41 class ciType;
42 class ValueType;
43 class LIR_OpVisitState;
44 class FpuStackSim;
45
46 //---------------------------------------------------------------------
47 // LIR Operands
48 // LIR_OprDesc
49 // LIR_OprPtr
50 // LIR_Const
51 // LIR_Address
52 //---------------------------------------------------------------------
53 class LIR_OprDesc;
54 class LIR_OprPtr;
55 class LIR_Const;
56 class LIR_Address;
57 class LIR_OprVisitor;
58
59
60 typedef LIR_OprDesc* LIR_Opr;
61 typedef int RegNr;
62
63 typedef GrowableArray<LIR_Opr> LIR_OprList;
64 typedef GrowableArray<LIR_Op*> LIR_OpArray;
65 typedef GrowableArray<LIR_Op*> LIR_OpList;
66
67 // define LIR_OprPtr early so LIR_OprDesc can refer to it
68 class LIR_OprPtr: public CompilationResourceObj {
69 public:
is_oop_pointer() const70 bool is_oop_pointer() const { return (type() == T_OBJECT); }
is_float_kind() const71 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
72
as_constant()73 virtual LIR_Const* as_constant() { return NULL; }
as_address()74 virtual LIR_Address* as_address() { return NULL; }
75 virtual BasicType type() const = 0;
76 virtual void print_value_on(outputStream* out) const = 0;
77 };
78
79
80
81 // LIR constants
82 class LIR_Const: public LIR_OprPtr {
83 private:
84 JavaValue _value;
85
type_check(BasicType t) const86 void type_check(BasicType t) const { assert(type() == t, "type check"); }
type_check(BasicType t1,BasicType t2) const87 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
type_check(BasicType t1,BasicType t2,BasicType t3) const88 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
89
90 public:
LIR_Const(jint i,bool is_address=false)91 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
LIR_Const(jlong l)92 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
LIR_Const(jfloat f)93 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
LIR_Const(jdouble d)94 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
LIR_Const(jobject o)95 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
LIR_Const(void * p)96 LIR_Const(void* p) {
97 #ifdef _LP64
98 assert(sizeof(jlong) >= sizeof(p), "too small");;
99 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
100 #else
101 assert(sizeof(jint) >= sizeof(p), "too small");;
102 _value.set_type(T_INT); _value.set_jint((jint)p);
103 #endif
104 }
LIR_Const(Metadata * m)105 LIR_Const(Metadata* m) {
106 _value.set_type(T_METADATA);
107 #ifdef _LP64
108 _value.set_jlong((jlong)m);
109 #else
110 _value.set_jint((jint)m);
111 #endif // _LP64
112 }
113
type() const114 virtual BasicType type() const { return _value.get_type(); }
as_constant()115 virtual LIR_Const* as_constant() { return this; }
116
as_jint() const117 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
as_jlong() const118 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
as_jfloat() const119 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
as_jdouble() const120 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
as_jobject() const121 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
as_jint_lo() const122 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
as_jint_hi() const123 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
124
125 #ifdef _LP64
as_pointer() const126 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
as_metadata() const127 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
128 #else
as_pointer() const129 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
as_metadata() const130 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
131 #endif
132
133
as_jint_bits() const134 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
as_jint_lo_bits() const135 jint as_jint_lo_bits() const {
136 if (type() == T_DOUBLE) {
137 return low(jlong_cast(_value.get_jdouble()));
138 } else {
139 return as_jint_lo();
140 }
141 }
as_jint_hi_bits() const142 jint as_jint_hi_bits() const {
143 if (type() == T_DOUBLE) {
144 return high(jlong_cast(_value.get_jdouble()));
145 } else {
146 return as_jint_hi();
147 }
148 }
as_jlong_bits() const149 jlong as_jlong_bits() const {
150 if (type() == T_DOUBLE) {
151 return jlong_cast(_value.get_jdouble());
152 } else {
153 return as_jlong();
154 }
155 }
156
157 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
158
159
is_zero_float()160 bool is_zero_float() {
161 jfloat f = as_jfloat();
162 jfloat ok = 0.0f;
163 return jint_cast(f) == jint_cast(ok);
164 }
165
is_one_float()166 bool is_one_float() {
167 jfloat f = as_jfloat();
168 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
169 }
170
is_zero_double()171 bool is_zero_double() {
172 jdouble d = as_jdouble();
173 jdouble ok = 0.0;
174 return jlong_cast(d) == jlong_cast(ok);
175 }
176
is_one_double()177 bool is_one_double() {
178 jdouble d = as_jdouble();
179 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
180 }
181 };
182
183
184 //---------------------LIR Operand descriptor------------------------------------
185 //
186 // The class LIR_OprDesc represents a LIR instruction operand;
187 // it can be a register (ALU/FPU), stack location or a constant;
188 // Constants and addresses are represented as resource area allocated
189 // structures (see above).
190 // Registers and stack locations are inlined into the this pointer
191 // (see value function).
192
193 class LIR_OprDesc: public CompilationResourceObj {
194 public:
195 // value structure:
196 // data opr-type opr-kind
197 // +--------------+-------+-------+
198 // [max...........|7 6 5 4|3 2 1 0]
199 // ^
200 // is_pointer bit
201 //
202 // lowest bit cleared, means it is a structure pointer
203 // we need 4 bits to represent types
204
205 private:
206 friend class LIR_OprFact;
207
208 // Conversion
value() const209 intptr_t value() const { return (intptr_t) this; }
210
check_value_mask(intptr_t mask,intptr_t masked_value) const211 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
212 return (value() & mask) == masked_value;
213 }
214
215 enum OprKind {
216 pointer_value = 0
217 , stack_value = 1
218 , cpu_register = 3
219 , fpu_register = 5
220 , illegal_value = 7
221 };
222
223 enum OprBits {
224 pointer_bits = 1
225 , kind_bits = 3
226 , type_bits = 4
227 , size_bits = 2
228 , destroys_bits = 1
229 , virtual_bits = 1
230 , is_xmm_bits = 1
231 , last_use_bits = 1
232 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
233 , non_data_bits = pointer_bits + kind_bits + type_bits + size_bits + destroys_bits + virtual_bits
234 + is_xmm_bits + last_use_bits + is_fpu_stack_offset_bits
235 , data_bits = BitsPerInt - non_data_bits
236 , reg_bits = data_bits / 2 // for two registers in one value encoding
237 };
238
239 enum OprShift {
240 kind_shift = 0
241 , type_shift = kind_shift + kind_bits
242 , size_shift = type_shift + type_bits
243 , destroys_shift = size_shift + size_bits
244 , last_use_shift = destroys_shift + destroys_bits
245 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
246 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
247 , is_xmm_shift = virtual_shift + virtual_bits
248 , data_shift = is_xmm_shift + is_xmm_bits
249 , reg1_shift = data_shift
250 , reg2_shift = data_shift + reg_bits
251
252 };
253
254 enum OprSize {
255 single_size = 0 << size_shift
256 , double_size = 1 << size_shift
257 };
258
259 enum OprMask {
260 kind_mask = right_n_bits(kind_bits)
261 , type_mask = right_n_bits(type_bits) << type_shift
262 , size_mask = right_n_bits(size_bits) << size_shift
263 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
264 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
265 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
266 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
267 , pointer_mask = right_n_bits(pointer_bits)
268 , lower_reg_mask = right_n_bits(reg_bits)
269 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
270 };
271
data() const272 uintptr_t data() const { return value() >> data_shift; }
lo_reg_half() const273 int lo_reg_half() const { return data() & lower_reg_mask; }
hi_reg_half() const274 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
kind_field() const275 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
size_field() const276 OprSize size_field() const { return (OprSize)(value() & size_mask); }
277
278 static char type_char(BasicType t);
279
280 public:
281 enum {
282 vreg_base = ConcreteRegisterImpl::number_of_registers,
283 vreg_max = (1 << data_bits) - 1
284 };
285
286 static inline LIR_Opr illegalOpr();
287
288 enum OprType {
289 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
290 , int_type = 1 << type_shift
291 , long_type = 2 << type_shift
292 , object_type = 3 << type_shift
293 , address_type = 4 << type_shift
294 , float_type = 5 << type_shift
295 , double_type = 6 << type_shift
296 , metadata_type = 7 << type_shift
297 };
298 friend OprType as_OprType(BasicType t);
299 friend BasicType as_BasicType(OprType t);
300
type_field_valid() const301 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
type_field() const302 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
303
size_for(BasicType t)304 static OprSize size_for(BasicType t) {
305 switch (t) {
306 case T_LONG:
307 case T_DOUBLE:
308 return double_size;
309 break;
310
311 case T_FLOAT:
312 case T_BOOLEAN:
313 case T_CHAR:
314 case T_BYTE:
315 case T_SHORT:
316 case T_INT:
317 case T_ADDRESS:
318 case T_OBJECT:
319 case T_ARRAY:
320 case T_METADATA:
321 return single_size;
322 break;
323
324 default:
325 ShouldNotReachHere();
326 return single_size;
327 }
328 }
329
330
331 void validate_type() const PRODUCT_RETURN;
332
type() const333 BasicType type() const {
334 if (is_pointer()) {
335 return pointer()->type();
336 }
337 return as_BasicType(type_field());
338 }
339
340
value_type() const341 ValueType* value_type() const { return as_ValueType(type()); }
342
type_char() const343 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
344
is_equal(LIR_Opr opr) const345 bool is_equal(LIR_Opr opr) const { return this == opr; }
346 // checks whether types are same
is_same_type(LIR_Opr opr) const347 bool is_same_type(LIR_Opr opr) const {
348 assert(type_field() != unknown_type &&
349 opr->type_field() != unknown_type, "shouldn't see unknown_type");
350 return type_field() == opr->type_field();
351 }
is_same_register(LIR_Opr opr)352 bool is_same_register(LIR_Opr opr) {
353 return (is_register() && opr->is_register() &&
354 kind_field() == opr->kind_field() &&
355 (value() & no_type_mask) == (opr->value() & no_type_mask));
356 }
357
is_pointer() const358 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
is_illegal() const359 bool is_illegal() const { return kind_field() == illegal_value; }
is_valid() const360 bool is_valid() const { return kind_field() != illegal_value; }
361
is_register() const362 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
is_virtual() const363 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
364
is_constant() const365 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
is_address() const366 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
367
is_float_kind() const368 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
369 bool is_oop() const;
370
371 // semantic for fpu- and xmm-registers:
372 // * is_float and is_double return true for xmm_registers
373 // (so is_single_fpu and is_single_xmm are true)
374 // * So you must always check for is_???_xmm prior to is_???_fpu to
375 // distinguish between fpu- and xmm-registers
376
is_stack() const377 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
is_single_stack() const378 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
is_double_stack() const379 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
380
is_cpu_register() const381 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
is_virtual_cpu() const382 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
is_fixed_cpu() const383 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
is_single_cpu() const384 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
is_double_cpu() const385 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
386
is_fpu_register() const387 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
is_virtual_fpu() const388 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
is_fixed_fpu() const389 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
is_single_fpu() const390 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
is_double_fpu() const391 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
392
is_xmm_register() const393 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
is_single_xmm() const394 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
is_double_xmm() const395 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
396
397 // fast accessor functions for special bits that do not work for pointers
398 // (in this functions, the check for is_pointer() is omitted)
is_single_word() const399 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
is_double_word() const400 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
is_virtual_register() const401 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
is_oop_register() const402 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
type_register() const403 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
404
is_last_use() const405 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
is_fpu_stack_offset() const406 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
make_last_use()407 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
make_fpu_stack_offset()408 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
409
410
single_stack_ix() const411 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
double_stack_ix() const412 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
cpu_regnr() const413 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
cpu_regnrLo() const414 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
cpu_regnrHi() const415 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
fpu_regnr() const416 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
fpu_regnrLo() const417 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
fpu_regnrHi() const418 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
xmm_regnr() const419 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
xmm_regnrLo() const420 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
xmm_regnrHi() const421 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
vreg_number() const422 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
423
pointer() const424 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
as_constant_ptr() const425 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
as_address_ptr() const426 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
427
428 Register as_register() const;
429 Register as_register_lo() const;
430 Register as_register_hi() const;
431
as_pointer_register()432 Register as_pointer_register() {
433 #ifdef _LP64
434 if (is_double_cpu()) {
435 assert(as_register_lo() == as_register_hi(), "should be a single register");
436 return as_register_lo();
437 }
438 #endif
439 return as_register();
440 }
441
442 FloatRegister as_float_reg () const;
443 FloatRegister as_double_reg () const;
444 #ifdef X86
445 XMMRegister as_xmm_float_reg () const;
446 XMMRegister as_xmm_double_reg() const;
447 // for compatibility with RInfo
fpu() const448 int fpu() const { return lo_reg_half(); }
449 #endif
450
as_jint() const451 jint as_jint() const { return as_constant_ptr()->as_jint(); }
as_jlong() const452 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
as_jfloat() const453 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
as_jdouble() const454 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
as_jobject() const455 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
456
457 void print() const PRODUCT_RETURN;
458 void print(outputStream* out) const PRODUCT_RETURN;
459 };
460
461
as_OprType(BasicType type)462 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
463 switch (type) {
464 case T_INT: return LIR_OprDesc::int_type;
465 case T_LONG: return LIR_OprDesc::long_type;
466 case T_FLOAT: return LIR_OprDesc::float_type;
467 case T_DOUBLE: return LIR_OprDesc::double_type;
468 case T_OBJECT:
469 case T_ARRAY: return LIR_OprDesc::object_type;
470 case T_ADDRESS: return LIR_OprDesc::address_type;
471 case T_METADATA: return LIR_OprDesc::metadata_type;
472 case T_ILLEGAL: // fall through
473 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
474 }
475 }
476
as_BasicType(LIR_OprDesc::OprType t)477 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
478 switch (t) {
479 case LIR_OprDesc::int_type: return T_INT;
480 case LIR_OprDesc::long_type: return T_LONG;
481 case LIR_OprDesc::float_type: return T_FLOAT;
482 case LIR_OprDesc::double_type: return T_DOUBLE;
483 case LIR_OprDesc::object_type: return T_OBJECT;
484 case LIR_OprDesc::address_type: return T_ADDRESS;
485 case LIR_OprDesc::metadata_type:return T_METADATA;
486 case LIR_OprDesc::unknown_type: // fall through
487 default: ShouldNotReachHere(); return T_ILLEGAL;
488 }
489 }
490
491
492 // LIR_Address
493 class LIR_Address: public LIR_OprPtr {
494 friend class LIR_OpVisitState;
495
496 public:
497 // NOTE: currently these must be the log2 of the scale factor (and
498 // must also be equivalent to the ScaleFactor enum in
499 // assembler_i486.hpp)
500 enum Scale {
501 times_1 = 0,
502 times_2 = 1,
503 times_4 = 2,
504 times_8 = 3
505 };
506
507 private:
508 LIR_Opr _base;
509 LIR_Opr _index;
510 Scale _scale;
511 intx _disp;
512 BasicType _type;
513
514 public:
LIR_Address(LIR_Opr base,LIR_Opr index,BasicType type)515 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
516 _base(base)
517 , _index(index)
518 , _scale(times_1)
519 , _type(type)
520 , _disp(0) { verify(); }
521
LIR_Address(LIR_Opr base,intx disp,BasicType type)522 LIR_Address(LIR_Opr base, intx disp, BasicType type):
523 _base(base)
524 , _index(LIR_OprDesc::illegalOpr())
525 , _scale(times_1)
526 , _type(type)
527 , _disp(disp) { verify(); }
528
LIR_Address(LIR_Opr base,BasicType type)529 LIR_Address(LIR_Opr base, BasicType type):
530 _base(base)
531 , _index(LIR_OprDesc::illegalOpr())
532 , _scale(times_1)
533 , _type(type)
534 , _disp(0) { verify(); }
535
LIR_Address(LIR_Opr base,LIR_Opr index,intx disp,BasicType type)536 LIR_Address(LIR_Opr base, LIR_Opr index, intx disp, BasicType type):
537 _base(base)
538 , _index(index)
539 , _scale(times_1)
540 , _type(type)
541 , _disp(disp) { verify(); }
542
LIR_Address(LIR_Opr base,LIR_Opr index,Scale scale,intx disp,BasicType type)543 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
544 _base(base)
545 , _index(index)
546 , _scale(scale)
547 , _type(type)
548 , _disp(disp) { verify(); }
549
base() const550 LIR_Opr base() const { return _base; }
index() const551 LIR_Opr index() const { return _index; }
scale() const552 Scale scale() const { return _scale; }
disp() const553 intx disp() const { return _disp; }
554
equals(LIR_Address * other) const555 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
556
as_address()557 virtual LIR_Address* as_address() { return this; }
type() const558 virtual BasicType type() const { return _type; }
559 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
560
561 void verify() const PRODUCT_RETURN;
562
563 static Scale scale(BasicType type);
564 };
565
566
567 // operand factory
568 class LIR_OprFact: public AllStatic {
569 public:
570
571 static LIR_Opr illegalOpr;
572
single_cpu(int reg)573 static LIR_Opr single_cpu(int reg) {
574 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
575 LIR_OprDesc::int_type |
576 LIR_OprDesc::cpu_register |
577 LIR_OprDesc::single_size);
578 }
single_cpu_oop(int reg)579 static LIR_Opr single_cpu_oop(int reg) {
580 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
581 LIR_OprDesc::object_type |
582 LIR_OprDesc::cpu_register |
583 LIR_OprDesc::single_size);
584 }
single_cpu_address(int reg)585 static LIR_Opr single_cpu_address(int reg) {
586 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
587 LIR_OprDesc::address_type |
588 LIR_OprDesc::cpu_register |
589 LIR_OprDesc::single_size);
590 }
single_cpu_metadata(int reg)591 static LIR_Opr single_cpu_metadata(int reg) {
592 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
593 LIR_OprDesc::metadata_type |
594 LIR_OprDesc::cpu_register |
595 LIR_OprDesc::single_size);
596 }
double_cpu(int reg1,int reg2)597 static LIR_Opr double_cpu(int reg1, int reg2) {
598 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
599 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
600 (reg2 << LIR_OprDesc::reg2_shift) |
601 LIR_OprDesc::long_type |
602 LIR_OprDesc::cpu_register |
603 LIR_OprDesc::double_size);
604 }
605
single_fpu(int reg)606 static LIR_Opr single_fpu(int reg) {
607 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
608 LIR_OprDesc::float_type |
609 LIR_OprDesc::fpu_register |
610 LIR_OprDesc::single_size);
611 }
612
613 // Platform dependant.
614 static LIR_Opr double_fpu(int reg1, int reg2 = -1 /*fnoreg*/);
615
616 #ifdef ARM32
single_softfp(int reg)617 static LIR_Opr single_softfp(int reg) {
618 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
619 LIR_OprDesc::float_type |
620 LIR_OprDesc::cpu_register |
621 LIR_OprDesc::single_size);
622 }
double_softfp(int reg1,int reg2)623 static LIR_Opr double_softfp(int reg1, int reg2) {
624 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
625 (reg2 << LIR_OprDesc::reg2_shift) |
626 LIR_OprDesc::double_type |
627 LIR_OprDesc::cpu_register |
628 LIR_OprDesc::double_size);
629 }
630 #endif // ARM32
631
632 #if defined(X86)
single_xmm(int reg)633 static LIR_Opr single_xmm(int reg) {
634 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
635 LIR_OprDesc::float_type |
636 LIR_OprDesc::fpu_register |
637 LIR_OprDesc::single_size |
638 LIR_OprDesc::is_xmm_mask);
639 }
double_xmm(int reg)640 static LIR_Opr double_xmm(int reg) {
641 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
642 (reg << LIR_OprDesc::reg2_shift) |
643 LIR_OprDesc::double_type |
644 LIR_OprDesc::fpu_register |
645 LIR_OprDesc::double_size |
646 LIR_OprDesc::is_xmm_mask);
647 }
648 #endif // X86
649
virtual_register(int index,BasicType type)650 static LIR_Opr virtual_register(int index, BasicType type) {
651 if (index > LIR_OprDesc::vreg_max) {
652 // Running out of virtual registers. Caller should bailout.
653 return illegalOpr;
654 }
655
656 LIR_Opr res;
657 switch (type) {
658 case T_OBJECT: // fall through
659 case T_ARRAY:
660 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
661 LIR_OprDesc::object_type |
662 LIR_OprDesc::cpu_register |
663 LIR_OprDesc::single_size |
664 LIR_OprDesc::virtual_mask);
665 break;
666
667 case T_METADATA:
668 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
669 LIR_OprDesc::metadata_type|
670 LIR_OprDesc::cpu_register |
671 LIR_OprDesc::single_size |
672 LIR_OprDesc::virtual_mask);
673 break;
674
675 case T_INT:
676 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
677 LIR_OprDesc::int_type |
678 LIR_OprDesc::cpu_register |
679 LIR_OprDesc::single_size |
680 LIR_OprDesc::virtual_mask);
681 break;
682
683 case T_ADDRESS:
684 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
685 LIR_OprDesc::address_type |
686 LIR_OprDesc::cpu_register |
687 LIR_OprDesc::single_size |
688 LIR_OprDesc::virtual_mask);
689 break;
690
691 case T_LONG:
692 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
693 LIR_OprDesc::long_type |
694 LIR_OprDesc::cpu_register |
695 LIR_OprDesc::double_size |
696 LIR_OprDesc::virtual_mask);
697 break;
698
699 #ifdef __SOFTFP__
700 case T_FLOAT:
701 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
702 LIR_OprDesc::float_type |
703 LIR_OprDesc::cpu_register |
704 LIR_OprDesc::single_size |
705 LIR_OprDesc::virtual_mask);
706 break;
707 case T_DOUBLE:
708 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
709 LIR_OprDesc::double_type |
710 LIR_OprDesc::cpu_register |
711 LIR_OprDesc::double_size |
712 LIR_OprDesc::virtual_mask);
713 break;
714 #else // __SOFTFP__
715 case T_FLOAT:
716 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
717 LIR_OprDesc::float_type |
718 LIR_OprDesc::fpu_register |
719 LIR_OprDesc::single_size |
720 LIR_OprDesc::virtual_mask);
721 break;
722
723 case
724 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
725 LIR_OprDesc::double_type |
726 LIR_OprDesc::fpu_register |
727 LIR_OprDesc::double_size |
728 LIR_OprDesc::virtual_mask);
729 break;
730 #endif // __SOFTFP__
731 default: ShouldNotReachHere(); res = illegalOpr;
732 }
733
734 #ifdef ASSERT
735 res->validate_type();
736 assert(res->vreg_number() == index, "conversion check");
737 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
738 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
739
740 // old-style calculation; check if old and new method are equal
741 LIR_OprDesc::OprType t = as_OprType(type);
742 #ifdef __SOFTFP__
743 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
744 t |
745 LIR_OprDesc::cpu_register |
746 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
747 #else // __SOFTFP__
748 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
749 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
750 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
751 assert(res == old_res, "old and new method not equal");
752 #endif // __SOFTFP__
753 #endif // ASSERT
754
755 return res;
756 }
757
758 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
759 // the index is platform independent; a double stack useing indeces 2 and 3 has always
760 // index 2.
stack(int index,BasicType type)761 static LIR_Opr stack(int index, BasicType type) {
762 LIR_Opr res;
763 switch (type) {
764 case T_OBJECT: // fall through
765 case T_ARRAY:
766 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
767 LIR_OprDesc::object_type |
768 LIR_OprDesc::stack_value |
769 LIR_OprDesc::single_size);
770 break;
771
772 case T_METADATA:
773 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
774 LIR_OprDesc::metadata_type |
775 LIR_OprDesc::stack_value |
776 LIR_OprDesc::single_size);
777 break;
778 case T_INT:
779 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
780 LIR_OprDesc::int_type |
781 LIR_OprDesc::stack_value |
782 LIR_OprDesc::single_size);
783 break;
784
785 case T_ADDRESS:
786 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
787 LIR_OprDesc::address_type |
788 LIR_OprDesc::stack_value |
789 LIR_OprDesc::single_size);
790 break;
791
792 case T_LONG:
793 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
794 LIR_OprDesc::long_type |
795 LIR_OprDesc::stack_value |
796 LIR_OprDesc::double_size);
797 break;
798
799 case T_FLOAT:
800 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
801 LIR_OprDesc::float_type |
802 LIR_OprDesc::stack_value |
803 LIR_OprDesc::single_size);
804 break;
805 case T_DOUBLE:
806 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
807 LIR_OprDesc::double_type |
808 LIR_OprDesc::stack_value |
809 LIR_OprDesc::double_size);
810 break;
811
812 default: ShouldNotReachHere(); res = illegalOpr;
813 }
814
815 #ifdef ASSERT
816 assert(index >= 0, "index must be positive");
817 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
818
819 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
820 LIR_OprDesc::stack_value |
821 as_OprType(type) |
822 LIR_OprDesc::size_for(type));
823 assert(res == old_res, "old and new method not equal");
824 #endif
825
826 return res;
827 }
828
intConst(jint i)829 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
longConst(jlong l)830 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
floatConst(jfloat f)831 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
doubleConst(jdouble d)832 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
oopConst(jobject o)833 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
address(LIR_Address * a)834 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
intptrConst(void * p)835 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
intptrConst(intptr_t v)836 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
illegal()837 static LIR_Opr illegal() { return (LIR_Opr)-1; }
addressConst(jint i)838 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
metadataConst(Metadata * m)839 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); }
840
841 static LIR_Opr value_type(ValueType* type);
842 static LIR_Opr dummy_value_type(ValueType* type);
843 };
844
845
846 //-------------------------------------------------------------------------------
847 // LIR Instructions
848 //-------------------------------------------------------------------------------
849 //
850 // Note:
851 // - every instruction has a result operand
852 // - every instruction has an CodeEmitInfo operand (can be revisited later)
853 // - every instruction has a LIR_OpCode operand
854 // - LIR_OpN, means an instruction that has N input operands
855 //
856 // class hierarchy:
857 //
858 class LIR_Op;
859 class LIR_Op0;
860 class LIR_OpLabel;
861 class LIR_Op1;
862 class LIR_OpBranch;
863 class LIR_OpConvert;
864 class LIR_OpAllocObj;
865 class LIR_OpRoundFP;
866 class LIR_Op2;
867 class LIR_OpDelay;
868 class LIR_Op3;
869 class LIR_OpAllocArray;
870 class LIR_OpCall;
871 class LIR_OpJavaCall;
872 class LIR_OpRTCall;
873 class LIR_OpArrayCopy;
874 class LIR_OpUpdateCRC32;
875 class LIR_OpLock;
876 class LIR_OpTypeCheck;
877 class LIR_OpCompareAndSwap;
878 class LIR_OpProfileCall;
879 class LIR_OpProfileType;
880 #ifdef ASSERT
881 class LIR_OpAssert;
882 #endif
883
884 // LIR operation codes
885 enum LIR_Code {
886 lir_none
887 , begin_op0
888 , lir_word_align
889 , lir_label
890 , lir_nop
891 , lir_backwardbranch_target
892 , lir_std_entry
893 , lir_osr_entry
894 , lir_build_frame
895 , lir_fpop_raw
896 , lir_24bit_FPU
897 , lir_reset_FPU
898 , lir_breakpoint
899 , lir_rtcall
900 , lir_membar
901 , lir_membar_acquire
902 , lir_membar_release
903 , lir_membar_loadload
904 , lir_membar_storestore
905 , lir_membar_loadstore
906 , lir_membar_storeload
907 , lir_get_thread
908 , lir_on_spin_wait
909 , end_op0
910 , begin_op1
911 , lir_fxch
912 , lir_fld
913 , lir_ffree
914 , lir_push
915 , lir_pop
916 , lir_null_check
917 , lir_return
918 , lir_leal
919 , lir_branch
920 , lir_cond_float_branch
921 , lir_move
922 , lir_convert
923 , lir_alloc_object
924 , lir_monaddr
925 , lir_roundfp
926 , lir_safepoint
927 , lir_pack64
928 , lir_unpack64
929 , lir_unwind
930 , end_op1
931 , begin_op2
932 , lir_cmp
933 , lir_cmp_l2i
934 , lir_ucmp_fd2i
935 , lir_cmp_fd2i
936 , lir_cmove
937 , lir_add
938 , lir_sub
939 , lir_mul
940 , lir_mul_strictfp
941 , lir_div
942 , lir_div_strictfp
943 , lir_rem
944 , lir_sqrt
945 , lir_abs
946 , lir_neg
947 , lir_tan
948 , lir_log10
949 , lir_logic_and
950 , lir_logic_or
951 , lir_logic_xor
952 , lir_shl
953 , lir_shr
954 , lir_ushr
955 , lir_alloc_array
956 , lir_throw
957 , lir_compare_to
958 , lir_xadd
959 , lir_xchg
960 , end_op2
961 , begin_op3
962 , lir_idiv
963 , lir_irem
964 , lir_fmad
965 , lir_fmaf
966 , end_op3
967 , begin_opJavaCall
968 , lir_static_call
969 , lir_optvirtual_call
970 , lir_icvirtual_call
971 , lir_virtual_call
972 , lir_dynamic_call
973 , end_opJavaCall
974 , begin_opArrayCopy
975 , lir_arraycopy
976 , end_opArrayCopy
977 , begin_opUpdateCRC32
978 , lir_updatecrc32
979 , end_opUpdateCRC32
980 , begin_opLock
981 , lir_lock
982 , lir_unlock
983 , end_opLock
984 , begin_delay_slot
985 , lir_delay_slot
986 , end_delay_slot
987 , begin_opTypeCheck
988 , lir_instanceof
989 , lir_checkcast
990 , lir_store_check
991 , end_opTypeCheck
992 , begin_opCompareAndSwap
993 , lir_cas_long
994 , lir_cas_obj
995 , lir_cas_int
996 , end_opCompareAndSwap
997 , begin_opMDOProfile
998 , lir_profile_call
999 , lir_profile_type
1000 , end_opMDOProfile
1001 , begin_opAssert
1002 , lir_assert
1003 , end_opAssert
1004 };
1005
1006
1007 enum LIR_Condition {
1008 lir_cond_equal
1009 , lir_cond_notEqual
1010 , lir_cond_less
1011 , lir_cond_lessEqual
1012 , lir_cond_greaterEqual
1013 , lir_cond_greater
1014 , lir_cond_belowEqual
1015 , lir_cond_aboveEqual
1016 , lir_cond_always
1017 , lir_cond_unknown = -1
1018 };
1019
1020
1021 enum LIR_PatchCode {
1022 lir_patch_none,
1023 lir_patch_low,
1024 lir_patch_high,
1025 lir_patch_normal
1026 };
1027
1028
1029 enum LIR_MoveKind {
1030 lir_move_normal,
1031 lir_move_volatile,
1032 lir_move_unaligned,
1033 lir_move_wide,
1034 lir_move_max_flag
1035 };
1036
1037
1038 // --------------------------------------------------
1039 // LIR_Op
1040 // --------------------------------------------------
1041 class LIR_Op: public CompilationResourceObj {
1042 friend class LIR_OpVisitState;
1043
1044 #ifdef ASSERT
1045 private:
1046 const char * _file;
1047 int _line;
1048 #endif
1049
1050 protected:
1051 LIR_Opr _result;
1052 unsigned short _code;
1053 unsigned short _flags;
1054 CodeEmitInfo* _info;
1055 int _id; // value id for register allocation
1056 int _fpu_pop_count;
1057 Instruction* _source; // for debugging
1058
1059 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1060
1061 protected:
is_in_range(LIR_Code test,LIR_Code start,LIR_Code end)1062 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1063
1064 public:
LIR_Op()1065 LIR_Op()
1066 : _result(LIR_OprFact::illegalOpr)
1067 , _code(lir_none)
1068 , _flags(0)
1069 , _info(NULL)
1070 #ifdef ASSERT
1071 , _file(NULL)
1072 , _line(0)
1073 #endif
1074 , _fpu_pop_count(0)
1075 , _source(NULL)
1076 , _id(-1) {}
1077
LIR_Op(LIR_Code code,LIR_Opr result,CodeEmitInfo * info)1078 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1079 : _result(result)
1080 , _code(code)
1081 , _flags(0)
1082 , _info(info)
1083 #ifdef ASSERT
1084 , _file(NULL)
1085 , _line(0)
1086 #endif
1087 , _fpu_pop_count(0)
1088 , _source(NULL)
1089 , _id(-1) {}
1090
info() const1091 CodeEmitInfo* info() const { return _info; }
code() const1092 LIR_Code code() const { return (LIR_Code)_code; }
result_opr() const1093 LIR_Opr result_opr() const { return _result; }
set_result_opr(LIR_Opr opr)1094 void set_result_opr(LIR_Opr opr) { _result = opr; }
1095
1096 #ifdef ASSERT
set_file_and_line(const char * file,int line)1097 void set_file_and_line(const char * file, int line) {
1098 _file = file;
1099 _line = line;
1100 }
1101 #endif
1102
1103 virtual const char * name() const PRODUCT_RETURN0;
1104 virtual void visit(LIR_OpVisitState* state);
1105
id() const1106 int id() const { return _id; }
set_id(int id)1107 void set_id(int id) { _id = id; }
1108
1109 // FPU stack simulation helpers -- only used on Intel
set_fpu_pop_count(int count)1110 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
fpu_pop_count() const1111 int fpu_pop_count() const { return _fpu_pop_count; }
pop_fpu_stack()1112 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1113
source() const1114 Instruction* source() const { return _source; }
set_source(Instruction * ins)1115 void set_source(Instruction* ins) { _source = ins; }
1116
1117 virtual void emit_code(LIR_Assembler* masm) = 0;
1118 virtual void print_instr(outputStream* out) const = 0;
1119 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1120
is_patching()1121 virtual bool is_patching() { return false; }
as_OpCall()1122 virtual LIR_OpCall* as_OpCall() { return NULL; }
as_OpJavaCall()1123 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
as_OpLabel()1124 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
as_OpDelay()1125 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
as_OpLock()1126 virtual LIR_OpLock* as_OpLock() { return NULL; }
as_OpAllocArray()1127 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
as_OpAllocObj()1128 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
as_OpRoundFP()1129 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
as_OpBranch()1130 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
as_OpRTCall()1131 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
as_OpConvert()1132 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
as_Op0()1133 virtual LIR_Op0* as_Op0() { return NULL; }
as_Op1()1134 virtual LIR_Op1* as_Op1() { return NULL; }
as_Op2()1135 virtual LIR_Op2* as_Op2() { return NULL; }
as_Op3()1136 virtual LIR_Op3* as_Op3() { return NULL; }
as_OpArrayCopy()1137 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
as_OpUpdateCRC32()1138 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
as_OpTypeCheck()1139 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
as_OpCompareAndSwap()1140 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
as_OpProfileCall()1141 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
as_OpProfileType()1142 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1143 #ifdef ASSERT
as_OpAssert()1144 virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1145 #endif
1146
verify() const1147 virtual void verify() const {}
1148 };
1149
1150 // for calls
1151 class LIR_OpCall: public LIR_Op {
1152 friend class LIR_OpVisitState;
1153
1154 protected:
1155 address _addr;
1156 LIR_OprList* _arguments;
1157 protected:
LIR_OpCall(LIR_Code code,address addr,LIR_Opr result,LIR_OprList * arguments,CodeEmitInfo * info=NULL)1158 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1159 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1160 : LIR_Op(code, result, info)
1161 , _arguments(arguments)
1162 , _addr(addr) {}
1163
1164 public:
addr() const1165 address addr() const { return _addr; }
arguments() const1166 const LIR_OprList* arguments() const { return _arguments; }
as_OpCall()1167 virtual LIR_OpCall* as_OpCall() { return this; }
1168 };
1169
1170
1171 // --------------------------------------------------
1172 // LIR_OpJavaCall
1173 // --------------------------------------------------
1174 class LIR_OpJavaCall: public LIR_OpCall {
1175 friend class LIR_OpVisitState;
1176
1177 private:
1178 ciMethod* _method;
1179 LIR_Opr _receiver;
1180 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1181
1182 public:
LIR_OpJavaCall(LIR_Code code,ciMethod * method,LIR_Opr receiver,LIR_Opr result,address addr,LIR_OprList * arguments,CodeEmitInfo * info)1183 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1184 LIR_Opr receiver, LIR_Opr result,
1185 address addr, LIR_OprList* arguments,
1186 CodeEmitInfo* info)
1187 : LIR_OpCall(code, addr, result, arguments, info)
1188 , _receiver(receiver)
1189 , _method(method)
1190 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1191 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1192
LIR_OpJavaCall(LIR_Code code,ciMethod * method,LIR_Opr receiver,LIR_Opr result,intptr_t vtable_offset,LIR_OprList * arguments,CodeEmitInfo * info)1193 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1194 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1195 LIR_OprList* arguments, CodeEmitInfo* info)
1196 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1197 , _receiver(receiver)
1198 , _method(method)
1199 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1200 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1201
receiver() const1202 LIR_Opr receiver() const { return _receiver; }
method() const1203 ciMethod* method() const { return _method; }
1204
1205 // JSR 292 support.
is_invokedynamic() const1206 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
is_method_handle_invoke() const1207 bool is_method_handle_invoke() const {
1208 return method()->is_compiled_lambda_form() || // Java-generated lambda form
1209 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic
1210 }
1211
vtable_offset() const1212 intptr_t vtable_offset() const {
1213 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1214 return (intptr_t) addr();
1215 }
1216
1217 virtual void emit_code(LIR_Assembler* masm);
as_OpJavaCall()1218 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1219 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1220 };
1221
1222 // --------------------------------------------------
1223 // LIR_OpLabel
1224 // --------------------------------------------------
1225 // Location where a branch can continue
1226 class LIR_OpLabel: public LIR_Op {
1227 friend class LIR_OpVisitState;
1228
1229 private:
1230 Label* _label;
1231 public:
LIR_OpLabel(Label * lbl)1232 LIR_OpLabel(Label* lbl)
1233 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1234 , _label(lbl) {}
label() const1235 Label* label() const { return _label; }
1236
1237 virtual void emit_code(LIR_Assembler* masm);
as_OpLabel()1238 virtual LIR_OpLabel* as_OpLabel() { return this; }
1239 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1240 };
1241
1242 // LIR_OpArrayCopy
1243 class LIR_OpArrayCopy: public LIR_Op {
1244 friend class LIR_OpVisitState;
1245
1246 private:
1247 ArrayCopyStub* _stub;
1248 LIR_Opr _src;
1249 LIR_Opr _src_pos;
1250 LIR_Opr _dst;
1251 LIR_Opr _dst_pos;
1252 LIR_Opr _length;
1253 LIR_Opr _tmp;
1254 ciArrayKlass* _expected_type;
1255 int _flags;
1256
1257 public:
1258 enum Flags {
1259 src_null_check = 1 << 0,
1260 dst_null_check = 1 << 1,
1261 src_pos_positive_check = 1 << 2,
1262 dst_pos_positive_check = 1 << 3,
1263 length_positive_check = 1 << 4,
1264 src_range_check = 1 << 5,
1265 dst_range_check = 1 << 6,
1266 type_check = 1 << 7,
1267 overlapping = 1 << 8,
1268 unaligned = 1 << 9,
1269 src_objarray = 1 << 10,
1270 dst_objarray = 1 << 11,
1271 all_flags = (1 << 12) - 1
1272 };
1273
1274 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1275 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1276
src() const1277 LIR_Opr src() const { return _src; }
src_pos() const1278 LIR_Opr src_pos() const { return _src_pos; }
dst() const1279 LIR_Opr dst() const { return _dst; }
dst_pos() const1280 LIR_Opr dst_pos() const { return _dst_pos; }
length() const1281 LIR_Opr length() const { return _length; }
tmp() const1282 LIR_Opr tmp() const { return _tmp; }
flags() const1283 int flags() const { return _flags; }
expected_type() const1284 ciArrayKlass* expected_type() const { return _expected_type; }
stub() const1285 ArrayCopyStub* stub() const { return _stub; }
1286
1287 virtual void emit_code(LIR_Assembler* masm);
as_OpArrayCopy()1288 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1289 void print_instr(outputStream* out) const PRODUCT_RETURN;
1290 };
1291
1292 // LIR_OpUpdateCRC32
1293 class LIR_OpUpdateCRC32: public LIR_Op {
1294 friend class LIR_OpVisitState;
1295
1296 private:
1297 LIR_Opr _crc;
1298 LIR_Opr _val;
1299
1300 public:
1301
1302 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1303
crc() const1304 LIR_Opr crc() const { return _crc; }
val() const1305 LIR_Opr val() const { return _val; }
1306
1307 virtual void emit_code(LIR_Assembler* masm);
as_OpUpdateCRC32()1308 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; }
1309 void print_instr(outputStream* out) const PRODUCT_RETURN;
1310 };
1311
1312 // --------------------------------------------------
1313 // LIR_Op0
1314 // --------------------------------------------------
1315 class LIR_Op0: public LIR_Op {
1316 friend class LIR_OpVisitState;
1317
1318 public:
LIR_Op0(LIR_Code code)1319 LIR_Op0(LIR_Code code)
1320 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
LIR_Op0(LIR_Code code,LIR_Opr result,CodeEmitInfo * info=NULL)1321 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1322 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1323
1324 virtual void emit_code(LIR_Assembler* masm);
as_Op0()1325 virtual LIR_Op0* as_Op0() { return this; }
1326 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1327 };
1328
1329
1330 // --------------------------------------------------
1331 // LIR_Op1
1332 // --------------------------------------------------
1333
1334 class LIR_Op1: public LIR_Op {
1335 friend class LIR_OpVisitState;
1336
1337 protected:
1338 LIR_Opr _opr; // input operand
1339 BasicType _type; // Operand types
1340 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1341
1342 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1343
set_kind(LIR_MoveKind kind)1344 void set_kind(LIR_MoveKind kind) {
1345 assert(code() == lir_move, "must be");
1346 _flags = kind;
1347 }
1348
1349 public:
LIR_Op1(LIR_Code code,LIR_Opr opr,LIR_Opr result=LIR_OprFact::illegalOpr,BasicType type=T_ILLEGAL,LIR_PatchCode patch=lir_patch_none,CodeEmitInfo * info=NULL)1350 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1351 : LIR_Op(code, result, info)
1352 , _opr(opr)
1353 , _patch(patch)
1354 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1355
LIR_Op1(LIR_Code code,LIR_Opr opr,LIR_Opr result,BasicType type,LIR_PatchCode patch,CodeEmitInfo * info,LIR_MoveKind kind)1356 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1357 : LIR_Op(code, result, info)
1358 , _opr(opr)
1359 , _patch(patch)
1360 , _type(type) {
1361 assert(code == lir_move, "must be");
1362 set_kind(kind);
1363 }
1364
LIR_Op1(LIR_Code code,LIR_Opr opr,CodeEmitInfo * info)1365 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1366 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1367 , _opr(opr)
1368 , _patch(lir_patch_none)
1369 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1370
in_opr() const1371 LIR_Opr in_opr() const { return _opr; }
patch_code() const1372 LIR_PatchCode patch_code() const { return _patch; }
type() const1373 BasicType type() const { return _type; }
1374
move_kind() const1375 LIR_MoveKind move_kind() const {
1376 assert(code() == lir_move, "must be");
1377 return (LIR_MoveKind)_flags;
1378 }
1379
is_patching()1380 virtual bool is_patching() { return _patch != lir_patch_none; }
1381 virtual void emit_code(LIR_Assembler* masm);
as_Op1()1382 virtual LIR_Op1* as_Op1() { return this; }
1383 virtual const char * name() const PRODUCT_RETURN0;
1384
set_in_opr(LIR_Opr opr)1385 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1386
1387 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1388 virtual void verify() const;
1389 };
1390
1391
1392 // for runtime calls
1393 class LIR_OpRTCall: public LIR_OpCall {
1394 friend class LIR_OpVisitState;
1395
1396 private:
1397 LIR_Opr _tmp;
1398 public:
LIR_OpRTCall(address addr,LIR_Opr tmp,LIR_Opr result,LIR_OprList * arguments,CodeEmitInfo * info=NULL)1399 LIR_OpRTCall(address addr, LIR_Opr tmp,
1400 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1401 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1402 , _tmp(tmp) {}
1403
1404 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1405 virtual void emit_code(LIR_Assembler* masm);
as_OpRTCall()1406 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1407
tmp() const1408 LIR_Opr tmp() const { return _tmp; }
1409
1410 virtual void verify() const;
1411 };
1412
1413
1414 class LIR_OpBranch: public LIR_Op {
1415 friend class LIR_OpVisitState;
1416
1417 private:
1418 LIR_Condition _cond;
1419 BasicType _type;
1420 Label* _label;
1421 BlockBegin* _block; // if this is a branch to a block, this is the block
1422 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1423 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1424
1425 public:
LIR_OpBranch(LIR_Condition cond,BasicType type,Label * lbl)1426 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1427 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1428 , _cond(cond)
1429 , _type(type)
1430 , _label(lbl)
1431 , _block(NULL)
1432 , _ublock(NULL)
1433 , _stub(NULL) { }
1434
1435 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1436 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1437
1438 // for unordered comparisons
1439 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1440
cond() const1441 LIR_Condition cond() const { return _cond; }
type() const1442 BasicType type() const { return _type; }
label() const1443 Label* label() const { return _label; }
block() const1444 BlockBegin* block() const { return _block; }
ublock() const1445 BlockBegin* ublock() const { return _ublock; }
stub() const1446 CodeStub* stub() const { return _stub; }
1447
1448 void change_block(BlockBegin* b);
1449 void change_ublock(BlockBegin* b);
1450 void negate_cond();
1451
1452 virtual void emit_code(LIR_Assembler* masm);
as_OpBranch()1453 virtual LIR_OpBranch* as_OpBranch() { return this; }
1454 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1455 };
1456
1457
1458 class ConversionStub;
1459
1460 class LIR_OpConvert: public LIR_Op1 {
1461 friend class LIR_OpVisitState;
1462
1463 private:
1464 Bytecodes::Code _bytecode;
1465 ConversionStub* _stub;
1466
1467 public:
LIR_OpConvert(Bytecodes::Code code,LIR_Opr opr,LIR_Opr result,ConversionStub * stub)1468 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1469 : LIR_Op1(lir_convert, opr, result)
1470 , _stub(stub)
1471 , _bytecode(code) {}
1472
bytecode() const1473 Bytecodes::Code bytecode() const { return _bytecode; }
stub() const1474 ConversionStub* stub() const { return _stub; }
1475
1476 virtual void emit_code(LIR_Assembler* masm);
as_OpConvert()1477 virtual LIR_OpConvert* as_OpConvert() { return this; }
1478 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1479
1480 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1481 };
1482
1483
1484 // LIR_OpAllocObj
1485 class LIR_OpAllocObj : public LIR_Op1 {
1486 friend class LIR_OpVisitState;
1487
1488 private:
1489 LIR_Opr _tmp1;
1490 LIR_Opr _tmp2;
1491 LIR_Opr _tmp3;
1492 LIR_Opr _tmp4;
1493 int _hdr_size;
1494 int _obj_size;
1495 CodeStub* _stub;
1496 bool _init_check;
1497
1498 public:
LIR_OpAllocObj(LIR_Opr klass,LIR_Opr result,LIR_Opr t1,LIR_Opr t2,LIR_Opr t3,LIR_Opr t4,int hdr_size,int obj_size,bool init_check,CodeStub * stub)1499 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1500 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1501 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1502 : LIR_Op1(lir_alloc_object, klass, result)
1503 , _tmp1(t1)
1504 , _tmp2(t2)
1505 , _tmp3(t3)
1506 , _tmp4(t4)
1507 , _hdr_size(hdr_size)
1508 , _obj_size(obj_size)
1509 , _init_check(init_check)
1510 , _stub(stub) { }
1511
klass() const1512 LIR_Opr klass() const { return in_opr(); }
obj() const1513 LIR_Opr obj() const { return result_opr(); }
tmp1() const1514 LIR_Opr tmp1() const { return _tmp1; }
tmp2() const1515 LIR_Opr tmp2() const { return _tmp2; }
tmp3() const1516 LIR_Opr tmp3() const { return _tmp3; }
tmp4() const1517 LIR_Opr tmp4() const { return _tmp4; }
header_size() const1518 int header_size() const { return _hdr_size; }
object_size() const1519 int object_size() const { return _obj_size; }
init_check() const1520 bool init_check() const { return _init_check; }
stub() const1521 CodeStub* stub() const { return _stub; }
1522
1523 virtual void emit_code(LIR_Assembler* masm);
as_OpAllocObj()1524 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1525 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1526 };
1527
1528
1529 // LIR_OpRoundFP
1530 class LIR_OpRoundFP : public LIR_Op1 {
1531 friend class LIR_OpVisitState;
1532
1533 private:
1534 LIR_Opr _tmp;
1535
1536 public:
LIR_OpRoundFP(LIR_Opr reg,LIR_Opr stack_loc_temp,LIR_Opr result)1537 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1538 : LIR_Op1(lir_roundfp, reg, result)
1539 , _tmp(stack_loc_temp) {}
1540
tmp() const1541 LIR_Opr tmp() const { return _tmp; }
as_OpRoundFP()1542 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1543 void print_instr(outputStream* out) const PRODUCT_RETURN;
1544 };
1545
1546 // LIR_OpTypeCheck
1547 class LIR_OpTypeCheck: public LIR_Op {
1548 friend class LIR_OpVisitState;
1549
1550 private:
1551 LIR_Opr _object;
1552 LIR_Opr _array;
1553 ciKlass* _klass;
1554 LIR_Opr _tmp1;
1555 LIR_Opr _tmp2;
1556 LIR_Opr _tmp3;
1557 bool _fast_check;
1558 CodeEmitInfo* _info_for_patch;
1559 CodeEmitInfo* _info_for_exception;
1560 CodeStub* _stub;
1561 ciMethod* _profiled_method;
1562 int _profiled_bci;
1563 bool _should_profile;
1564
1565 public:
1566 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1567 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1568 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1569 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1570 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1571
object() const1572 LIR_Opr object() const { return _object; }
array() const1573 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
tmp1() const1574 LIR_Opr tmp1() const { return _tmp1; }
tmp2() const1575 LIR_Opr tmp2() const { return _tmp2; }
tmp3() const1576 LIR_Opr tmp3() const { return _tmp3; }
klass() const1577 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
fast_check() const1578 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
info_for_patch() const1579 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
info_for_exception() const1580 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
stub() const1581 CodeStub* stub() const { return _stub; }
1582
1583 // MethodData* profiling
set_profiled_method(ciMethod * method)1584 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
set_profiled_bci(int bci)1585 void set_profiled_bci(int bci) { _profiled_bci = bci; }
set_should_profile(bool b)1586 void set_should_profile(bool b) { _should_profile = b; }
profiled_method() const1587 ciMethod* profiled_method() const { return _profiled_method; }
profiled_bci() const1588 int profiled_bci() const { return _profiled_bci; }
should_profile() const1589 bool should_profile() const { return _should_profile; }
1590
is_patching()1591 virtual bool is_patching() { return _info_for_patch != NULL; }
1592 virtual void emit_code(LIR_Assembler* masm);
as_OpTypeCheck()1593 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1594 void print_instr(outputStream* out) const PRODUCT_RETURN;
1595 };
1596
1597 // LIR_Op2
1598 class LIR_Op2: public LIR_Op {
1599 friend class LIR_OpVisitState;
1600
1601 int _fpu_stack_size; // for sin/cos implementation on Intel
1602
1603 protected:
1604 LIR_Opr _opr1;
1605 LIR_Opr _opr2;
1606 BasicType _type;
1607 LIR_Opr _tmp1;
1608 LIR_Opr _tmp2;
1609 LIR_Opr _tmp3;
1610 LIR_Opr _tmp4;
1611 LIR_Opr _tmp5;
1612 LIR_Condition _condition;
1613
1614 void verify() const;
1615
1616 public:
LIR_Op2(LIR_Code code,LIR_Condition condition,LIR_Opr opr1,LIR_Opr opr2,CodeEmitInfo * info=NULL)1617 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1618 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1619 , _opr1(opr1)
1620 , _opr2(opr2)
1621 , _type(T_ILLEGAL)
1622 , _condition(condition)
1623 , _fpu_stack_size(0)
1624 , _tmp1(LIR_OprFact::illegalOpr)
1625 , _tmp2(LIR_OprFact::illegalOpr)
1626 , _tmp3(LIR_OprFact::illegalOpr)
1627 , _tmp4(LIR_OprFact::illegalOpr)
1628 , _tmp5(LIR_OprFact::illegalOpr) {
1629 assert(code == lir_cmp || code == lir_assert, "code check");
1630 }
1631
LIR_Op2(LIR_Code code,LIR_Condition condition,LIR_Opr opr1,LIR_Opr opr2,LIR_Opr result,BasicType type)1632 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1633 : LIR_Op(code, result, NULL)
1634 , _opr1(opr1)
1635 , _opr2(opr2)
1636 , _type(type)
1637 , _condition(condition)
1638 , _fpu_stack_size(0)
1639 , _tmp1(LIR_OprFact::illegalOpr)
1640 , _tmp2(LIR_OprFact::illegalOpr)
1641 , _tmp3(LIR_OprFact::illegalOpr)
1642 , _tmp4(LIR_OprFact::illegalOpr)
1643 , _tmp5(LIR_OprFact::illegalOpr) {
1644 assert(code == lir_cmove, "code check");
1645 assert(type != T_ILLEGAL, "cmove should have type");
1646 }
1647
LIR_Op2(LIR_Code code,LIR_Opr opr1,LIR_Opr opr2,LIR_Opr result=LIR_OprFact::illegalOpr,CodeEmitInfo * info=NULL,BasicType type=T_ILLEGAL)1648 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1649 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1650 : LIR_Op(code, result, info)
1651 , _opr1(opr1)
1652 , _opr2(opr2)
1653 , _type(type)
1654 , _condition(lir_cond_unknown)
1655 , _fpu_stack_size(0)
1656 , _tmp1(LIR_OprFact::illegalOpr)
1657 , _tmp2(LIR_OprFact::illegalOpr)
1658 , _tmp3(LIR_OprFact::illegalOpr)
1659 , _tmp4(LIR_OprFact::illegalOpr)
1660 , _tmp5(LIR_OprFact::illegalOpr) {
1661 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1662 }
1663
LIR_Op2(LIR_Code code,LIR_Opr opr1,LIR_Opr opr2,LIR_Opr result,LIR_Opr tmp1,LIR_Opr tmp2=LIR_OprFact::illegalOpr,LIR_Opr tmp3=LIR_OprFact::illegalOpr,LIR_Opr tmp4=LIR_OprFact::illegalOpr,LIR_Opr tmp5=LIR_OprFact::illegalOpr)1664 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1665 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1666 : LIR_Op(code, result, NULL)
1667 , _opr1(opr1)
1668 , _opr2(opr2)
1669 , _type(T_ILLEGAL)
1670 , _condition(lir_cond_unknown)
1671 , _fpu_stack_size(0)
1672 , _tmp1(tmp1)
1673 , _tmp2(tmp2)
1674 , _tmp3(tmp3)
1675 , _tmp4(tmp4)
1676 , _tmp5(tmp5) {
1677 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1678 }
1679
in_opr1() const1680 LIR_Opr in_opr1() const { return _opr1; }
in_opr2() const1681 LIR_Opr in_opr2() const { return _opr2; }
type() const1682 BasicType type() const { return _type; }
tmp1_opr() const1683 LIR_Opr tmp1_opr() const { return _tmp1; }
tmp2_opr() const1684 LIR_Opr tmp2_opr() const { return _tmp2; }
tmp3_opr() const1685 LIR_Opr tmp3_opr() const { return _tmp3; }
tmp4_opr() const1686 LIR_Opr tmp4_opr() const { return _tmp4; }
tmp5_opr() const1687 LIR_Opr tmp5_opr() const { return _tmp5; }
condition() const1688 LIR_Condition condition() const {
1689 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1690 }
set_condition(LIR_Condition condition)1691 void set_condition(LIR_Condition condition) {
1692 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1693 }
1694
set_fpu_stack_size(int size)1695 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
fpu_stack_size() const1696 int fpu_stack_size() const { return _fpu_stack_size; }
1697
set_in_opr1(LIR_Opr opr)1698 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
set_in_opr2(LIR_Opr opr)1699 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1700
1701 virtual void emit_code(LIR_Assembler* masm);
as_Op2()1702 virtual LIR_Op2* as_Op2() { return this; }
1703 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1704 };
1705
1706 class LIR_OpAllocArray : public LIR_Op {
1707 friend class LIR_OpVisitState;
1708
1709 private:
1710 LIR_Opr _klass;
1711 LIR_Opr _len;
1712 LIR_Opr _tmp1;
1713 LIR_Opr _tmp2;
1714 LIR_Opr _tmp3;
1715 LIR_Opr _tmp4;
1716 BasicType _type;
1717 CodeStub* _stub;
1718
1719 public:
LIR_OpAllocArray(LIR_Opr klass,LIR_Opr len,LIR_Opr result,LIR_Opr t1,LIR_Opr t2,LIR_Opr t3,LIR_Opr t4,BasicType type,CodeStub * stub)1720 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1721 : LIR_Op(lir_alloc_array, result, NULL)
1722 , _klass(klass)
1723 , _len(len)
1724 , _tmp1(t1)
1725 , _tmp2(t2)
1726 , _tmp3(t3)
1727 , _tmp4(t4)
1728 , _type(type)
1729 , _stub(stub) {}
1730
klass() const1731 LIR_Opr klass() const { return _klass; }
len() const1732 LIR_Opr len() const { return _len; }
obj() const1733 LIR_Opr obj() const { return result_opr(); }
tmp1() const1734 LIR_Opr tmp1() const { return _tmp1; }
tmp2() const1735 LIR_Opr tmp2() const { return _tmp2; }
tmp3() const1736 LIR_Opr tmp3() const { return _tmp3; }
tmp4() const1737 LIR_Opr tmp4() const { return _tmp4; }
type() const1738 BasicType type() const { return _type; }
stub() const1739 CodeStub* stub() const { return _stub; }
1740
1741 virtual void emit_code(LIR_Assembler* masm);
as_OpAllocArray()1742 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1743 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1744 };
1745
1746
1747 class LIR_Op3: public LIR_Op {
1748 friend class LIR_OpVisitState;
1749
1750 private:
1751 LIR_Opr _opr1;
1752 LIR_Opr _opr2;
1753 LIR_Opr _opr3;
1754 public:
LIR_Op3(LIR_Code code,LIR_Opr opr1,LIR_Opr opr2,LIR_Opr opr3,LIR_Opr result,CodeEmitInfo * info=NULL)1755 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1756 : LIR_Op(code, result, info)
1757 , _opr1(opr1)
1758 , _opr2(opr2)
1759 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
in_opr1() const1760 LIR_Opr in_opr1() const { return _opr1; }
in_opr2() const1761 LIR_Opr in_opr2() const { return _opr2; }
in_opr3() const1762 LIR_Opr in_opr3() const { return _opr3; }
1763
1764 virtual void emit_code(LIR_Assembler* masm);
as_Op3()1765 virtual LIR_Op3* as_Op3() { return this; }
1766 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1767 };
1768
1769
1770 //--------------------------------
1771 class LabelObj: public CompilationResourceObj {
1772 private:
1773 Label _label;
1774 public:
LabelObj()1775 LabelObj() {}
label()1776 Label* label() { return &_label; }
1777 };
1778
1779
1780 class LIR_OpLock: public LIR_Op {
1781 friend class LIR_OpVisitState;
1782
1783 private:
1784 LIR_Opr _hdr;
1785 LIR_Opr _obj;
1786 LIR_Opr _lock;
1787 LIR_Opr _scratch;
1788 CodeStub* _stub;
1789 public:
LIR_OpLock(LIR_Code code,LIR_Opr hdr,LIR_Opr obj,LIR_Opr lock,LIR_Opr scratch,CodeStub * stub,CodeEmitInfo * info)1790 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1791 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1792 , _hdr(hdr)
1793 , _obj(obj)
1794 , _lock(lock)
1795 , _scratch(scratch)
1796 , _stub(stub) {}
1797
hdr_opr() const1798 LIR_Opr hdr_opr() const { return _hdr; }
obj_opr() const1799 LIR_Opr obj_opr() const { return _obj; }
lock_opr() const1800 LIR_Opr lock_opr() const { return _lock; }
scratch_opr() const1801 LIR_Opr scratch_opr() const { return _scratch; }
stub() const1802 CodeStub* stub() const { return _stub; }
1803
1804 virtual void emit_code(LIR_Assembler* masm);
as_OpLock()1805 virtual LIR_OpLock* as_OpLock() { return this; }
1806 void print_instr(outputStream* out) const PRODUCT_RETURN;
1807 };
1808
1809
1810 class LIR_OpDelay: public LIR_Op {
1811 friend class LIR_OpVisitState;
1812
1813 private:
1814 LIR_Op* _op;
1815
1816 public:
LIR_OpDelay(LIR_Op * op,CodeEmitInfo * info)1817 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1818 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1819 _op(op) {
1820 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1821 }
1822 virtual void emit_code(LIR_Assembler* masm);
as_OpDelay()1823 virtual LIR_OpDelay* as_OpDelay() { return this; }
1824 void print_instr(outputStream* out) const PRODUCT_RETURN;
delay_op() const1825 LIR_Op* delay_op() const { return _op; }
call_info() const1826 CodeEmitInfo* call_info() const { return info(); }
1827 };
1828
1829 #ifdef ASSERT
1830 // LIR_OpAssert
1831 class LIR_OpAssert : public LIR_Op2 {
1832 friend class LIR_OpVisitState;
1833
1834 private:
1835 const char* _msg;
1836 bool _halt;
1837
1838 public:
LIR_OpAssert(LIR_Condition condition,LIR_Opr opr1,LIR_Opr opr2,const char * msg,bool halt)1839 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
1840 : LIR_Op2(lir_assert, condition, opr1, opr2)
1841 , _halt(halt)
1842 , _msg(msg) {
1843 }
1844
msg() const1845 const char* msg() const { return _msg; }
halt() const1846 bool halt() const { return _halt; }
1847
1848 virtual void emit_code(LIR_Assembler* masm);
as_OpAssert()1849 virtual LIR_OpAssert* as_OpAssert() { return this; }
1850 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1851 };
1852 #endif
1853
1854 // LIR_OpCompareAndSwap
1855 class LIR_OpCompareAndSwap : public LIR_Op {
1856 friend class LIR_OpVisitState;
1857
1858 private:
1859 LIR_Opr _addr;
1860 LIR_Opr _cmp_value;
1861 LIR_Opr _new_value;
1862 LIR_Opr _tmp1;
1863 LIR_Opr _tmp2;
1864
1865 public:
LIR_OpCompareAndSwap(LIR_Code code,LIR_Opr addr,LIR_Opr cmp_value,LIR_Opr new_value,LIR_Opr t1,LIR_Opr t2,LIR_Opr result)1866 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1867 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1868 : LIR_Op(code, result, NULL) // no result, no info
1869 , _addr(addr)
1870 , _cmp_value(cmp_value)
1871 , _new_value(new_value)
1872 , _tmp1(t1)
1873 , _tmp2(t2) { }
1874
addr() const1875 LIR_Opr addr() const { return _addr; }
cmp_value() const1876 LIR_Opr cmp_value() const { return _cmp_value; }
new_value() const1877 LIR_Opr new_value() const { return _new_value; }
tmp1() const1878 LIR_Opr tmp1() const { return _tmp1; }
tmp2() const1879 LIR_Opr tmp2() const { return _tmp2; }
1880
1881 virtual void emit_code(LIR_Assembler* masm);
as_OpCompareAndSwap()1882 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1883 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1884 };
1885
1886 // LIR_OpProfileCall
1887 class LIR_OpProfileCall : public LIR_Op {
1888 friend class LIR_OpVisitState;
1889
1890 private:
1891 ciMethod* _profiled_method;
1892 int _profiled_bci;
1893 ciMethod* _profiled_callee;
1894 LIR_Opr _mdo;
1895 LIR_Opr _recv;
1896 LIR_Opr _tmp1;
1897 ciKlass* _known_holder;
1898
1899 public:
1900 // Destroys recv
LIR_OpProfileCall(ciMethod * profiled_method,int profiled_bci,ciMethod * profiled_callee,LIR_Opr mdo,LIR_Opr recv,LIR_Opr t1,ciKlass * known_holder)1901 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1902 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info
1903 , _profiled_method(profiled_method)
1904 , _profiled_bci(profiled_bci)
1905 , _profiled_callee(profiled_callee)
1906 , _mdo(mdo)
1907 , _recv(recv)
1908 , _tmp1(t1)
1909 , _known_holder(known_holder) { }
1910
profiled_method() const1911 ciMethod* profiled_method() const { return _profiled_method; }
profiled_bci() const1912 int profiled_bci() const { return _profiled_bci; }
profiled_callee() const1913 ciMethod* profiled_callee() const { return _profiled_callee; }
mdo() const1914 LIR_Opr mdo() const { return _mdo; }
recv() const1915 LIR_Opr recv() const { return _recv; }
tmp1() const1916 LIR_Opr tmp1() const { return _tmp1; }
known_holder() const1917 ciKlass* known_holder() const { return _known_holder; }
1918
1919 virtual void emit_code(LIR_Assembler* masm);
as_OpProfileCall()1920 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1921 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
should_profile_receiver_type() const1922 bool should_profile_receiver_type() const {
1923 bool callee_is_static = _profiled_callee->is_loaded() && _profiled_callee->is_static();
1924 Bytecodes::Code bc = _profiled_method->java_code_at_bci(_profiled_bci);
1925 bool call_is_virtual = (bc == Bytecodes::_invokevirtual && !_profiled_callee->can_be_statically_bound()) || bc == Bytecodes::_invokeinterface;
1926 return C1ProfileVirtualCalls && call_is_virtual && !callee_is_static;
1927 }
1928 };
1929
1930 // LIR_OpProfileType
1931 class LIR_OpProfileType : public LIR_Op {
1932 friend class LIR_OpVisitState;
1933
1934 private:
1935 LIR_Opr _mdp;
1936 LIR_Opr _obj;
1937 LIR_Opr _tmp;
1938 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj)
1939 intptr_t _current_klass; // what the profiling currently reports
1940 bool _not_null; // true if we know statically that _obj cannot be null
1941 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know
1942 // _exact_klass it the only possible type for this parameter in any context.
1943
1944 public:
1945 // Destroys recv
LIR_OpProfileType(LIR_Opr mdp,LIR_Opr obj,ciKlass * exact_klass,intptr_t current_klass,LIR_Opr tmp,bool not_null,bool no_conflict)1946 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
1947 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info
1948 , _mdp(mdp)
1949 , _obj(obj)
1950 , _exact_klass(exact_klass)
1951 , _current_klass(current_klass)
1952 , _tmp(tmp)
1953 , _not_null(not_null)
1954 , _no_conflict(no_conflict) { }
1955
mdp() const1956 LIR_Opr mdp() const { return _mdp; }
obj() const1957 LIR_Opr obj() const { return _obj; }
tmp() const1958 LIR_Opr tmp() const { return _tmp; }
exact_klass() const1959 ciKlass* exact_klass() const { return _exact_klass; }
current_klass() const1960 intptr_t current_klass() const { return _current_klass; }
not_null() const1961 bool not_null() const { return _not_null; }
no_conflict() const1962 bool no_conflict() const { return _no_conflict; }
1963
1964 virtual void emit_code(LIR_Assembler* masm);
as_OpProfileType()1965 virtual LIR_OpProfileType* as_OpProfileType() { return this; }
1966 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1967 };
1968
1969 class LIR_InsertionBuffer;
1970
1971 //--------------------------------LIR_List---------------------------------------------------
1972 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1973 // The LIR instructions are appended by the LIR_List class itself;
1974 //
1975 // Notes:
1976 // - all offsets are(should be) in bytes
1977 // - local positions are specified with an offset, with offset 0 being local 0
1978
1979 class LIR_List: public CompilationResourceObj {
1980 private:
1981 LIR_OpList _operations;
1982
1983 Compilation* _compilation;
1984 #ifndef PRODUCT
1985 BlockBegin* _block;
1986 #endif
1987 #ifdef ASSERT
1988 const char * _file;
1989 int _line;
1990 #endif
1991
1992 public:
append(LIR_Op * op)1993 void append(LIR_Op* op) {
1994 if (op->source() == NULL)
1995 op->set_source(_compilation->current_instruction());
1996 #ifndef PRODUCT
1997 if (PrintIRWithLIR) {
1998 _compilation->maybe_print_current_instruction();
1999 op->print(); tty->cr();
2000 }
2001 #endif // PRODUCT
2002
2003 _operations.append(op);
2004
2005 #ifdef ASSERT
2006 op->verify();
2007 op->set_file_and_line(_file, _line);
2008 _file = NULL;
2009 _line = 0;
2010 #endif
2011 }
2012
2013 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2014
2015 #ifdef ASSERT
2016 void set_file_and_line(const char * file, int line);
2017 #endif
2018
2019 //---------- accessors ---------------
instructions_list()2020 LIR_OpList* instructions_list() { return &_operations; }
length() const2021 int length() const { return _operations.length(); }
at(int i) const2022 LIR_Op* at(int i) const { return _operations.at(i); }
2023
2024 NOT_PRODUCT(BlockBegin* block() const { return _block; });
2025
2026 // insert LIR_Ops in buffer to right places in LIR_List
2027 void append(LIR_InsertionBuffer* buffer);
2028
2029 //---------- mutators ---------------
insert_before(int i,LIR_List * op_list)2030 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
insert_before(int i,LIR_Op * op)2031 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
remove_at(int i)2032 void remove_at(int i) { _operations.remove_at(i); }
2033
2034 //---------- printing -------------
2035 void print_instructions() PRODUCT_RETURN;
2036
2037
2038 //---------- instructions -------------
call_opt_virtual(ciMethod * method,LIR_Opr receiver,LIR_Opr result,address dest,LIR_OprList * arguments,CodeEmitInfo * info)2039 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2040 address dest, LIR_OprList* arguments,
2041 CodeEmitInfo* info) {
2042 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2043 }
call_static(ciMethod * method,LIR_Opr result,address dest,LIR_OprList * arguments,CodeEmitInfo * info)2044 void call_static(ciMethod* method, LIR_Opr result,
2045 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2046 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2047 }
call_icvirtual(ciMethod * method,LIR_Opr receiver,LIR_Opr result,address dest,LIR_OprList * arguments,CodeEmitInfo * info)2048 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2049 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2050 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2051 }
call_virtual(ciMethod * method,LIR_Opr receiver,LIR_Opr result,intptr_t vtable_offset,LIR_OprList * arguments,CodeEmitInfo * info)2052 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2053 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2054 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2055 }
call_dynamic(ciMethod * method,LIR_Opr receiver,LIR_Opr result,address dest,LIR_OprList * arguments,CodeEmitInfo * info)2056 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2057 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2058 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2059 }
2060
get_thread(LIR_Opr result)2061 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
word_align()2062 void word_align() { append(new LIR_Op0(lir_word_align)); }
membar()2063 void membar() { append(new LIR_Op0(lir_membar)); }
membar_acquire()2064 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
membar_release()2065 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
membar_loadload()2066 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
membar_storestore()2067 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
membar_loadstore()2068 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
membar_storeload()2069 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
2070
nop()2071 void nop() { append(new LIR_Op0(lir_nop)); }
build_frame()2072 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
2073
std_entry(LIR_Opr receiver)2074 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
osr_entry(LIR_Opr osrPointer)2075 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2076
on_spin_wait()2077 void on_spin_wait() { append(new LIR_Op0(lir_on_spin_wait)); }
2078
branch_destination(Label * lbl)2079 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
2080
leal(LIR_Opr from,LIR_Opr result_reg,LIR_PatchCode patch_code=lir_patch_none,CodeEmitInfo * info=NULL)2081 void leal(LIR_Opr from, LIR_Opr result_reg, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_leal, from, result_reg, T_ILLEGAL, patch_code, info)); }
2082
2083 // result is a stack location for old backend and vreg for UseLinearScan
2084 // stack_loc_temp is an illegal register for old backend
roundfp(LIR_Opr reg,LIR_Opr stack_loc_temp,LIR_Opr result)2085 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
unaligned_move(LIR_Address * src,LIR_Opr dst)2086 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
unaligned_move(LIR_Opr src,LIR_Address * dst)2087 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
unaligned_move(LIR_Opr src,LIR_Opr dst)2088 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
move(LIR_Opr src,LIR_Opr dst,CodeEmitInfo * info=NULL)2089 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
move(LIR_Address * src,LIR_Opr dst,CodeEmitInfo * info=NULL)2090 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
move(LIR_Opr src,LIR_Address * dst,CodeEmitInfo * info=NULL)2091 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
move_wide(LIR_Address * src,LIR_Opr dst,CodeEmitInfo * info=NULL)2092 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2093 if (UseCompressedOops) {
2094 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2095 } else {
2096 move(src, dst, info);
2097 }
2098 }
move_wide(LIR_Opr src,LIR_Address * dst,CodeEmitInfo * info=NULL)2099 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2100 if (UseCompressedOops) {
2101 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2102 } else {
2103 move(src, dst, info);
2104 }
2105 }
volatile_move(LIR_Opr src,LIR_Opr dst,BasicType type,CodeEmitInfo * info=NULL,LIR_PatchCode patch_code=lir_patch_none)2106 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2107
oop2reg(jobject o,LIR_Opr reg)2108 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
2109 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2110
metadata2reg(Metadata * o,LIR_Opr reg)2111 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); }
2112 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2113
return_op(LIR_Opr result)2114 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
2115
safepoint(LIR_Opr tmp,CodeEmitInfo * info)2116 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2117
convert(Bytecodes::Code code,LIR_Opr left,LIR_Opr dst,ConversionStub * stub=NULL)2118 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2119
logical_and(LIR_Opr left,LIR_Opr right,LIR_Opr dst)2120 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
logical_or(LIR_Opr left,LIR_Opr right,LIR_Opr dst)2121 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
logical_xor(LIR_Opr left,LIR_Opr right,LIR_Opr dst)2122 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
2123
pack64(LIR_Opr src,LIR_Opr dst)2124 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
unpack64(LIR_Opr src,LIR_Opr dst)2125 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2126
2127 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false);
throw_exception(LIR_Opr exceptionPC,LIR_Opr exceptionOop,CodeEmitInfo * info)2128 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2129 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2130 }
unwind_exception(LIR_Opr exceptionOop)2131 void unwind_exception(LIR_Opr exceptionOop) {
2132 append(new LIR_Op1(lir_unwind, exceptionOop));
2133 }
2134
compare_to(LIR_Opr left,LIR_Opr right,LIR_Opr dst)2135 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2136 append(new LIR_Op2(lir_compare_to, left, right, dst));
2137 }
2138
push(LIR_Opr opr)2139 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
pop(LIR_Opr reg)2140 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
2141
cmp(LIR_Condition condition,LIR_Opr left,LIR_Opr right,CodeEmitInfo * info=NULL)2142 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2143 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2144 }
cmp(LIR_Condition condition,LIR_Opr left,int right,CodeEmitInfo * info=NULL)2145 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2146 cmp(condition, left, LIR_OprFact::intConst(right), info);
2147 }
2148
2149 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2150 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2151
cmove(LIR_Condition condition,LIR_Opr src1,LIR_Opr src2,LIR_Opr dst,BasicType type)2152 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2153 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2154 }
2155
2156 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2157 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2158 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2159 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2160 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2161 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2162
abs(LIR_Opr from,LIR_Opr to,LIR_Opr tmp)2163 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
negate(LIR_Opr from,LIR_Opr to,LIR_Opr tmp=LIR_OprFact::illegalOpr)2164 void negate(LIR_Opr from, LIR_Opr to, LIR_Opr tmp = LIR_OprFact::illegalOpr) { append(new LIR_Op2(lir_neg, from, tmp, to)); }
sqrt(LIR_Opr from,LIR_Opr to,LIR_Opr tmp)2165 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
fmad(LIR_Opr from,LIR_Opr from1,LIR_Opr from2,LIR_Opr to)2166 void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); }
fmaf(LIR_Opr from,LIR_Opr from1,LIR_Opr from2,LIR_Opr to)2167 void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); }
log10(LIR_Opr from,LIR_Opr to,LIR_Opr tmp)2168 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
tan(LIR_Opr from,LIR_Opr to,LIR_Opr tmp1,LIR_Opr tmp2)2169 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2170
add(LIR_Opr left,LIR_Opr right,LIR_Opr res)2171 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
sub(LIR_Opr left,LIR_Opr right,LIR_Opr res,CodeEmitInfo * info=NULL)2172