1 /* 2 * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #ifndef CPU_AARCH64_INTERP_MASM_AARCH64_HPP 27 #define CPU_AARCH64_INTERP_MASM_AARCH64_HPP 28 29 #include "asm/macroAssembler.hpp" 30 #include "interpreter/invocationCounter.hpp" 31 #include "runtime/frame.hpp" 32 33 // This file specializes the assember with interpreter-specific macros 34 35 typedef ByteSize (*OffsetFunction)(uint); 36 37 class InterpreterMacroAssembler: public MacroAssembler { 38 protected: 39 40 protected: 41 // Interpreter specific version of call_VM_base 42 using MacroAssembler::call_VM_leaf_base; 43 44 virtual void call_VM_leaf_base(address entry_point, 45 int number_of_arguments); 46 47 virtual void call_VM_base(Register oop_result, 48 Register java_thread, 49 Register last_java_sp, 50 address entry_point, 51 int number_of_arguments, 52 bool check_exceptions); 53 54 // base routine for all dispatches 55 void dispatch_base(TosState state, address* table, 56 bool verifyoop = true, bool generate_poll = false); 57 58 public: InterpreterMacroAssembler(CodeBuffer * code)59 InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code) {} 60 61 void load_earlyret_value(TosState state); 62 63 void jump_to_entry(address entry); 64 65 virtual void check_and_handle_popframe(Register java_thread); 66 virtual void check_and_handle_earlyret(Register java_thread); 67 68 // Interpreter-specific registers save_bcp()69 void save_bcp() { 70 str(rbcp, Address(rfp, frame::interpreter_frame_bcp_offset * wordSize)); 71 } 72 restore_bcp()73 void restore_bcp() { 74 ldr(rbcp, Address(rfp, frame::interpreter_frame_bcp_offset * wordSize)); 75 } 76 restore_locals()77 void restore_locals() { 78 ldr(rlocals, Address(rfp, frame::interpreter_frame_locals_offset * wordSize)); 79 } 80 restore_constant_pool_cache()81 void restore_constant_pool_cache() { 82 ldr(rcpool, Address(rfp, frame::interpreter_frame_cache_offset * wordSize)); 83 } 84 85 void get_dispatch(); 86 87 // Helpers for runtime call arguments/results 88 89 // Helpers for runtime call arguments/results get_method(Register reg)90 void get_method(Register reg) { 91 ldr(reg, Address(rfp, frame::interpreter_frame_method_offset * wordSize)); 92 } 93 get_const(Register reg)94 void get_const(Register reg) { 95 get_method(reg); 96 ldr(reg, Address(reg, in_bytes(Method::const_offset()))); 97 } 98 get_constant_pool(Register reg)99 void get_constant_pool(Register reg) { 100 get_const(reg); 101 ldr(reg, Address(reg, in_bytes(ConstMethod::constants_offset()))); 102 } 103 get_constant_pool_cache(Register reg)104 void get_constant_pool_cache(Register reg) { 105 get_constant_pool(reg); 106 ldr(reg, Address(reg, ConstantPool::cache_offset_in_bytes())); 107 } 108 get_cpool_and_tags(Register cpool,Register tags)109 void get_cpool_and_tags(Register cpool, Register tags) { 110 get_constant_pool(cpool); 111 ldr(tags, Address(cpool, ConstantPool::tags_offset_in_bytes())); 112 } 113 114 void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset); 115 void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2)); 116 void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2)); 117 void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2)); 118 void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2)); 119 void get_method_counters(Register method, Register mcs, Label& skip); 120 121 // load cpool->resolved_references(index); 122 void load_resolved_reference_at_index(Register result, Register index, Register tmp = r5); 123 124 // load cpool->resolved_klass_at(index); 125 void load_resolved_klass_at_offset(Register cpool, Register index, Register klass, Register temp); 126 127 void load_resolved_method_at_index(int byte_no, Register method, Register cache); 128 129 void pop_ptr(Register r = r0); 130 void pop_i(Register r = r0); 131 void pop_l(Register r = r0); 132 void pop_f(FloatRegister r = v0); 133 void pop_d(FloatRegister r = v0); 134 void push_ptr(Register r = r0); 135 void push_i(Register r = r0); 136 void push_l(Register r = r0); 137 void push_f(FloatRegister r = v0); 138 void push_d(FloatRegister r = v0); 139 pop(Register r)140 void pop(Register r ) { ((MacroAssembler*)this)->pop(r); } 141 push(Register r)142 void push(Register r ) { ((MacroAssembler*)this)->push(r); } 143 144 void pop(TosState state); // transition vtos -> state 145 void push(TosState state); // transition state -> vtos 146 pop(RegSet regs,Register stack)147 void pop(RegSet regs, Register stack) { ((MacroAssembler*)this)->pop(regs, stack); } push(RegSet regs,Register stack)148 void push(RegSet regs, Register stack) { ((MacroAssembler*)this)->push(regs, stack); } 149 empty_expression_stack()150 void empty_expression_stack() { 151 ldr(esp, Address(rfp, frame::interpreter_frame_monitor_block_top_offset * wordSize)); 152 // NULL last_sp until next java call 153 str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); 154 } 155 156 // Helpers for swap and dup 157 void load_ptr(int n, Register val); 158 void store_ptr(int n, Register val); 159 160 // Load float value from 'address'. The value is loaded onto the FPU register v0. 161 void load_float(Address src); 162 void load_double(Address src); 163 164 // Generate a subtype check: branch to ok_is_subtype if sub_klass is 165 // a subtype of super_klass. 166 void gen_subtype_check( Register sub_klass, Label &ok_is_subtype ); 167 168 // Dispatching 169 void dispatch_prolog(TosState state, int step = 0); 170 void dispatch_epilog(TosState state, int step = 0); 171 // dispatch via rscratch1 172 void dispatch_only(TosState state, bool generate_poll = false); 173 // dispatch normal table via rscratch1 (assume rscratch1 is loaded already) 174 void dispatch_only_normal(TosState state); 175 void dispatch_only_noverify(TosState state); 176 // load rscratch1 from [rbcp + step] and dispatch via rscratch1 177 void dispatch_next(TosState state, int step = 0, bool generate_poll = false); 178 // load rscratch1 from [esi] and dispatch via rscratch1 and table 179 void dispatch_via (TosState state, address* table); 180 181 // jump to an invoked target 182 void prepare_to_jump_from_interpreted(); 183 void jump_from_interpreted(Register method, Register temp); 184 185 186 // Returning from interpreted functions 187 // 188 // Removes the current activation (incl. unlocking of monitors) 189 // and sets up the return address. This code is also used for 190 // exception unwindwing. In that case, we do not want to throw 191 // IllegalMonitorStateExceptions, since that might get us into an 192 // infinite rethrow exception loop. 193 // Additionally this code is used for popFrame and earlyReturn. 194 // In popFrame case we want to skip throwing an exception, 195 // installing an exception, and notifying jvmdi. 196 // In earlyReturn case we only want to skip throwing an exception 197 // and installing an exception. 198 void remove_activation(TosState state, 199 bool throw_monitor_exception = true, 200 bool install_monitor_exception = true, 201 bool notify_jvmdi = true); 202 203 // FIXME: Give us a valid frame at a null check. null_check(Register reg,int offset=-1)204 virtual void null_check(Register reg, int offset = -1) { 205 // #ifdef ASSERT 206 // save_bcp(); 207 // set_last_Java_frame(esp, rfp, (address) pc()); 208 // #endif 209 MacroAssembler::null_check(reg, offset); 210 // #ifdef ASSERT 211 // reset_last_Java_frame(true); 212 // #endif 213 } 214 215 // Object locking 216 void lock_object (Register lock_reg); 217 void unlock_object(Register lock_reg); 218 219 // Interpreter profiling operations 220 void set_method_data_pointer_for_bcp(); 221 void test_method_data_pointer(Register mdp, Label& zero_continue); 222 void verify_method_data_pointer(); 223 224 void set_mdp_data_at(Register mdp_in, int constant, Register value); 225 void increment_mdp_data_at(Address data, bool decrement = false); 226 void increment_mdp_data_at(Register mdp_in, int constant, 227 bool decrement = false); 228 void increment_mdp_data_at(Register mdp_in, Register reg, int constant, 229 bool decrement = false); 230 void increment_mask_and_jump(Address counter_addr, 231 int increment, Address mask, 232 Register scratch, Register scratch2, 233 bool preloaded, Condition cond, 234 Label* where); 235 void set_mdp_flag_at(Register mdp_in, int flag_constant); 236 void test_mdp_data_at(Register mdp_in, int offset, Register value, 237 Register test_value_out, 238 Label& not_equal_continue); 239 240 void record_klass_in_profile(Register receiver, Register mdp, 241 Register reg2, bool is_virtual_call); 242 void record_klass_in_profile_helper(Register receiver, Register mdp, 243 Register reg2, int start_row, 244 Label& done, bool is_virtual_call); 245 void record_item_in_profile_helper(Register item, Register mdp, 246 Register reg2, int start_row, Label& done, int total_rows, 247 OffsetFunction item_offset_fn, OffsetFunction item_count_offset_fn, 248 int non_profiled_offset); 249 250 void update_mdp_by_offset(Register mdp_in, int offset_of_offset); 251 void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp); 252 void update_mdp_by_constant(Register mdp_in, int constant); 253 void update_mdp_for_ret(Register return_bci); 254 255 // narrow int return value 256 void narrow(Register result); 257 258 void profile_taken_branch(Register mdp, Register bumped_count); 259 void profile_not_taken_branch(Register mdp); 260 void profile_call(Register mdp); 261 void profile_final_call(Register mdp); 262 void profile_virtual_call(Register receiver, Register mdp, 263 Register scratch2, 264 bool receiver_can_be_null = false); 265 void profile_ret(Register return_bci, Register mdp); 266 void profile_null_seen(Register mdp); 267 void profile_typecheck(Register mdp, Register klass, Register scratch); 268 void profile_typecheck_failed(Register mdp); 269 void profile_switch_default(Register mdp); 270 void profile_switch_case(Register index_in_scratch, Register mdp, 271 Register scratch2); 272 273 void profile_obj_type(Register obj, const Address& mdo_addr); 274 void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual); 275 void profile_return_type(Register mdp, Register ret, Register tmp); 276 void profile_parameters_type(Register mdp, Register tmp1, Register tmp2); 277 278 // Debugging 279 // only if +VerifyOops && state == atos 280 void verify_oop(Register reg, TosState state = atos); 281 // only if +VerifyFPU && (state == ftos || state == dtos) 282 void verify_FPU(int stack_depth, TosState state = ftos); 283 284 typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; 285 286 // support for jvmti/dtrace 287 void notify_method_entry(); 288 void notify_method_exit(TosState state, NotifyMethodExitMode mode); 289 _call_Unimplemented(address call_site)290 virtual void _call_Unimplemented(address call_site) { 291 save_bcp(); 292 set_last_Java_frame(esp, rfp, (address) pc(), rscratch1); 293 MacroAssembler::_call_Unimplemented(call_site); 294 } 295 }; 296 297 #endif // CPU_AARCH64_INTERP_MASM_AARCH64_HPP 298