1 /*
2 * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #if !defined(_WINDOWS) && !defined(_ALLBSD_SOURCE)
27 #include "alloca.h"
28 #endif
29 #ifdef _ALLBSD_SOURCE
30 #include <stdlib.h>
31 #endif
32 #include "asm/macroAssembler.hpp"
33 #include "asm/macroAssembler.inline.hpp"
34 #include "code/debugInfoRec.hpp"
35 #include "code/icBuffer.hpp"
36 #include "code/vtableStubs.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "oops/compiledICHolder.hpp"
39 #include "prims/jvmtiRedefineClassesTrace.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #include "runtime/vframeArray.hpp"
42 #include "vmreg_x86.inline.hpp"
43 #ifdef COMPILER1
44 #include "c1/c1_Runtime1.hpp"
45 #endif
46 #ifdef COMPILER2
47 #include "opto/runtime.hpp"
48 #endif
49
50 #define __ masm->
51
52 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
53
54 class SimpleRuntimeFrame {
55
56 public:
57
58 // Most of the runtime stubs have this simple frame layout.
59 // This class exists to make the layout shared in one place.
60 // Offsets are for compiler stack slots, which are jints.
61 enum layout {
62 // The frame sender code expects that rbp will be in the "natural" place and
63 // will override any oopMap setting for it. We must therefore force the layout
64 // so that it agrees with the frame sender code.
65 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
66 rbp_off2,
67 return_off, return_off2,
68 framesize
69 };
70 };
71
72 class RegisterSaver {
73 // Capture info about frame layout. Layout offsets are in jint
74 // units because compiler frame slots are jints.
75 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
76 enum layout {
77 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
78 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area
79 DEF_XMM_OFFS(0),
80 DEF_XMM_OFFS(1),
81 DEF_XMM_OFFS(2),
82 DEF_XMM_OFFS(3),
83 DEF_XMM_OFFS(4),
84 DEF_XMM_OFFS(5),
85 DEF_XMM_OFFS(6),
86 DEF_XMM_OFFS(7),
87 DEF_XMM_OFFS(8),
88 DEF_XMM_OFFS(9),
89 DEF_XMM_OFFS(10),
90 DEF_XMM_OFFS(11),
91 DEF_XMM_OFFS(12),
92 DEF_XMM_OFFS(13),
93 DEF_XMM_OFFS(14),
94 DEF_XMM_OFFS(15),
95 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
96 fpu_stateH_end,
97 r15_off, r15H_off,
98 r14_off, r14H_off,
99 r13_off, r13H_off,
100 r12_off, r12H_off,
101 r11_off, r11H_off,
102 r10_off, r10H_off,
103 r9_off, r9H_off,
104 r8_off, r8H_off,
105 rdi_off, rdiH_off,
106 rsi_off, rsiH_off,
107 ignore_off, ignoreH_off, // extra copy of rbp
108 rsp_off, rspH_off,
109 rbx_off, rbxH_off,
110 rdx_off, rdxH_off,
111 rcx_off, rcxH_off,
112 rax_off, raxH_off,
113 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
114 align_off, alignH_off,
115 flags_off, flagsH_off,
116 // The frame sender code expects that rbp will be in the "natural" place and
117 // will override any oopMap setting for it. We must therefore force the layout
118 // so that it agrees with the frame sender code.
119 rbp_off, rbpH_off, // copy of rbp we will restore
120 return_off, returnH_off, // slot for return address
121 reg_save_size // size in compiler stack slots
122 };
123
124 public:
125 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false);
126 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
127
128 // Offsets into the register save area
129 // Used by deoptimization when it is managing result register
130 // values on its own
131
rax_offset_in_bytes(void)132 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; }
rdx_offset_in_bytes(void)133 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; }
rbx_offset_in_bytes(void)134 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; }
xmm0_offset_in_bytes(void)135 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; }
return_offset_in_bytes(void)136 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
137
138 // During deoptimization only the result registers need to be restored,
139 // all the other values have already been extracted.
140 static void restore_result_registers(MacroAssembler* masm);
141 };
142
save_live_registers(MacroAssembler * masm,int additional_frame_words,int * total_frame_words,bool save_vectors)143 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) {
144 int vect_words = 0;
145 #ifdef COMPILER2
146 if (save_vectors) {
147 assert(UseAVX > 0, "256bit vectors are supported only with AVX");
148 assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
149 // Save upper half of YMM registes
150 vect_words = 16 * 16 / wordSize;
151 additional_frame_words += vect_words;
152 }
153 #else
154 assert(!save_vectors, "vectors are generated only by C2");
155 #endif
156
157 // Always make the frame size 16-byte aligned
158 int frame_size_in_bytes = round_to(additional_frame_words*wordSize +
159 reg_save_size*BytesPerInt, 16);
160 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
161 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
162 // The caller will allocate additional_frame_words
163 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt;
164 // CodeBlob frame size is in words.
165 int frame_size_in_words = frame_size_in_bytes / wordSize;
166 *total_frame_words = frame_size_in_words;
167
168 // Save registers, fpu state, and flags.
169 // We assume caller has already pushed the return address onto the
170 // stack, so rsp is 8-byte aligned here.
171 // We push rpb twice in this sequence because we want the real rbp
172 // to be under the return like a normal enter.
173
174 __ enter(); // rsp becomes 16-byte aligned here
175 __ push_CPU_state(); // Push a multiple of 16 bytes
176
177 if (vect_words > 0) {
178 assert(vect_words*wordSize == 256, "");
179 __ subptr(rsp, 256); // Save upper half of YMM registes
180 __ vextractf128h(Address(rsp, 0),xmm0);
181 __ vextractf128h(Address(rsp, 16),xmm1);
182 __ vextractf128h(Address(rsp, 32),xmm2);
183 __ vextractf128h(Address(rsp, 48),xmm3);
184 __ vextractf128h(Address(rsp, 64),xmm4);
185 __ vextractf128h(Address(rsp, 80),xmm5);
186 __ vextractf128h(Address(rsp, 96),xmm6);
187 __ vextractf128h(Address(rsp,112),xmm7);
188 __ vextractf128h(Address(rsp,128),xmm8);
189 __ vextractf128h(Address(rsp,144),xmm9);
190 __ vextractf128h(Address(rsp,160),xmm10);
191 __ vextractf128h(Address(rsp,176),xmm11);
192 __ vextractf128h(Address(rsp,192),xmm12);
193 __ vextractf128h(Address(rsp,208),xmm13);
194 __ vextractf128h(Address(rsp,224),xmm14);
195 __ vextractf128h(Address(rsp,240),xmm15);
196 }
197 if (frame::arg_reg_save_area_bytes != 0) {
198 // Allocate argument register save area
199 __ subptr(rsp, frame::arg_reg_save_area_bytes);
200 }
201
202 // Set an oopmap for the call site. This oopmap will map all
203 // oop-registers and debug-info registers as callee-saved. This
204 // will allow deoptimization at this safepoint to find all possible
205 // debug-info recordings, as well as let GC find all oops.
206
207 OopMapSet *oop_maps = new OopMapSet();
208 OopMap* map = new OopMap(frame_size_in_slots, 0);
209
210 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots)
211
212 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg());
213 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg());
214 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg());
215 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg());
216 // rbp location is known implicitly by the frame sender code, needs no oopmap
217 // and the location where rbp was saved by is ignored
218 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg());
219 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg());
220 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg());
221 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg());
222 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg());
223 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg());
224 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg());
225 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg());
226 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg());
227 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg());
228 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg());
229 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg());
230 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg());
231 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg());
232 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg());
233 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg());
234 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg());
235 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg());
236 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg());
237 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg());
238 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg());
240 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg());
241 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg());
242 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg());
243 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg());
244
245 // %%% These should all be a waste but we'll keep things as they were for now
246 if (true) {
247 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next());
248 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next());
249 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next());
250 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next());
251 // rbp location is known implicitly by the frame sender code, needs no oopmap
252 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next());
253 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next());
254 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next());
255 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next());
256 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next());
257 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next());
258 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next());
259 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next());
260 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next());
261 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next());
262 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next());
263 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next());
264 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next());
265 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next());
266 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next());
267 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next());
268 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next());
269 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next());
270 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next());
271 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next());
272 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next());
273 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next());
274 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next());
275 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next());
276 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next());
277 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next());
278 }
279
280 return map;
281 }
282
restore_live_registers(MacroAssembler * masm,bool restore_vectors)283 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
284 if (frame::arg_reg_save_area_bytes != 0) {
285 // Pop arg register save area
286 __ addptr(rsp, frame::arg_reg_save_area_bytes);
287 }
288 #ifdef COMPILER2
289 if (restore_vectors) {
290 // Restore upper half of YMM registes.
291 assert(UseAVX > 0, "256bit vectors are supported only with AVX");
292 assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
293 __ vinsertf128h(xmm0, Address(rsp, 0));
294 __ vinsertf128h(xmm1, Address(rsp, 16));
295 __ vinsertf128h(xmm2, Address(rsp, 32));
296 __ vinsertf128h(xmm3, Address(rsp, 48));
297 __ vinsertf128h(xmm4, Address(rsp, 64));
298 __ vinsertf128h(xmm5, Address(rsp, 80));
299 __ vinsertf128h(xmm6, Address(rsp, 96));
300 __ vinsertf128h(xmm7, Address(rsp,112));
301 __ vinsertf128h(xmm8, Address(rsp,128));
302 __ vinsertf128h(xmm9, Address(rsp,144));
303 __ vinsertf128h(xmm10, Address(rsp,160));
304 __ vinsertf128h(xmm11, Address(rsp,176));
305 __ vinsertf128h(xmm12, Address(rsp,192));
306 __ vinsertf128h(xmm13, Address(rsp,208));
307 __ vinsertf128h(xmm14, Address(rsp,224));
308 __ vinsertf128h(xmm15, Address(rsp,240));
309 __ addptr(rsp, 256);
310 }
311 #else
312 assert(!restore_vectors, "vectors are generated only by C2");
313 #endif
314 // Recover CPU state
315 __ pop_CPU_state();
316 // Get the rbp described implicitly by the calling convention (no oopMap)
317 __ pop(rbp);
318 }
319
restore_result_registers(MacroAssembler * masm)320 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
321
322 // Just restore result register. Only used by deoptimization. By
323 // now any callee save register that needs to be restored to a c2
324 // caller of the deoptee has been extracted into the vframeArray
325 // and will be stuffed into the c2i adapter we create for later
326 // restoration so only result registers need to be restored here.
327
328 // Restore fp result register
329 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
330 // Restore integer result register
331 __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
332 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
333
334 // Pop all of the register save are off the stack except the return address
335 __ addptr(rsp, return_offset_in_bytes());
336 }
337
338 // Is vector's size (in bytes) bigger than a size saved by default?
339 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions.
is_wide_vector(int size)340 bool SharedRuntime::is_wide_vector(int size) {
341 return size > 16;
342 }
343
344 // The java_calling_convention describes stack locations as ideal slots on
345 // a frame with no abi restrictions. Since we must observe abi restrictions
346 // (like the placement of the register window) the slots must be biased by
347 // the following value.
reg2offset_in(VMReg r)348 static int reg2offset_in(VMReg r) {
349 // Account for saved rbp and return address
350 // This should really be in_preserve_stack_slots
351 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
352 }
353
reg2offset_out(VMReg r)354 static int reg2offset_out(VMReg r) {
355 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
356 }
357
358 // ---------------------------------------------------------------------------
359 // Read the array of BasicTypes from a signature, and compute where the
360 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
361 // quantities. Values less than VMRegImpl::stack0 are registers, those above
362 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
363 // as framesizes are fixed.
364 // VMRegImpl::stack0 refers to the first slot 0(sp).
365 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
366 // up to RegisterImpl::number_of_registers) are the 64-bit
367 // integer registers.
368
369 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
370 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
371 // units regardless of build. Of course for i486 there is no 64 bit build
372
373 // The Java calling convention is a "shifted" version of the C ABI.
374 // By skipping the first C ABI register we can call non-static jni methods
375 // with small numbers of arguments without having to shuffle the arguments
376 // at all. Since we control the java ABI we ought to at least get some
377 // advantage out of it.
378
java_calling_convention(const BasicType * sig_bt,VMRegPair * regs,int total_args_passed,int is_outgoing)379 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
380 VMRegPair *regs,
381 int total_args_passed,
382 int is_outgoing) {
383
384 // Create the mapping between argument positions and
385 // registers.
386 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
387 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
388 };
389 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
390 j_farg0, j_farg1, j_farg2, j_farg3,
391 j_farg4, j_farg5, j_farg6, j_farg7
392 };
393
394
395 uint int_args = 0;
396 uint fp_args = 0;
397 uint stk_args = 0; // inc by 2 each time
398
399 for (int i = 0; i < total_args_passed; i++) {
400 switch (sig_bt[i]) {
401 case T_BOOLEAN:
402 case T_CHAR:
403 case T_BYTE:
404 case T_SHORT:
405 case T_INT:
406 if (int_args < Argument::n_int_register_parameters_j) {
407 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
408 } else {
409 regs[i].set1(VMRegImpl::stack2reg(stk_args));
410 stk_args += 2;
411 }
412 break;
413 case T_VOID:
414 // halves of T_LONG or T_DOUBLE
415 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
416 regs[i].set_bad();
417 break;
418 case T_LONG:
419 assert(sig_bt[i + 1] == T_VOID, "expecting half");
420 // fall through
421 case T_OBJECT:
422 case T_ARRAY:
423 case T_ADDRESS:
424 if (int_args < Argument::n_int_register_parameters_j) {
425 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
426 } else {
427 regs[i].set2(VMRegImpl::stack2reg(stk_args));
428 stk_args += 2;
429 }
430 break;
431 case T_FLOAT:
432 if (fp_args < Argument::n_float_register_parameters_j) {
433 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
434 } else {
435 regs[i].set1(VMRegImpl::stack2reg(stk_args));
436 stk_args += 2;
437 }
438 break;
439 case T_DOUBLE:
440 assert(sig_bt[i + 1] == T_VOID, "expecting half");
441 if (fp_args < Argument::n_float_register_parameters_j) {
442 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
443 } else {
444 regs[i].set2(VMRegImpl::stack2reg(stk_args));
445 stk_args += 2;
446 }
447 break;
448 default:
449 ShouldNotReachHere();
450 break;
451 }
452 }
453
454 return round_to(stk_args, 2);
455 }
456
457 // Patch the callers callsite with entry to compiled code if it exists.
patch_callers_callsite(MacroAssembler * masm)458 static void patch_callers_callsite(MacroAssembler *masm) {
459 Label L;
460 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
461 __ jcc(Assembler::equal, L);
462
463 // Save the current stack pointer
464 __ mov(r13, rsp);
465 // Schedule the branch target address early.
466 // Call into the VM to patch the caller, then jump to compiled callee
467 // rax isn't live so capture return address while we easily can
468 __ movptr(rax, Address(rsp, 0));
469
470 // align stack so push_CPU_state doesn't fault
471 __ andptr(rsp, -(StackAlignmentInBytes));
472 __ push_CPU_state();
473
474 // VM needs caller's callsite
475 // VM needs target method
476 // This needs to be a long call since we will relocate this adapter to
477 // the codeBuffer and it may not reach
478
479 // Allocate argument register save area
480 if (frame::arg_reg_save_area_bytes != 0) {
481 __ subptr(rsp, frame::arg_reg_save_area_bytes);
482 }
483 __ mov(c_rarg0, rbx);
484 __ mov(c_rarg1, rax);
485 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
486
487 // De-allocate argument register save area
488 if (frame::arg_reg_save_area_bytes != 0) {
489 __ addptr(rsp, frame::arg_reg_save_area_bytes);
490 }
491
492 __ pop_CPU_state();
493 // restore sp
494 __ mov(rsp, r13);
495 __ bind(L);
496 }
497
498
gen_c2i_adapter(MacroAssembler * masm,int total_args_passed,int comp_args_on_stack,const BasicType * sig_bt,const VMRegPair * regs,Label & skip_fixup)499 static void gen_c2i_adapter(MacroAssembler *masm,
500 int total_args_passed,
501 int comp_args_on_stack,
502 const BasicType *sig_bt,
503 const VMRegPair *regs,
504 Label& skip_fixup) {
505 // Before we get into the guts of the C2I adapter, see if we should be here
506 // at all. We've come from compiled code and are attempting to jump to the
507 // interpreter, which means the caller made a static call to get here
508 // (vcalls always get a compiled target if there is one). Check for a
509 // compiled target. If there is one, we need to patch the caller's call.
510 patch_callers_callsite(masm);
511
512 __ bind(skip_fixup);
513
514 // Since all args are passed on the stack, total_args_passed *
515 // Interpreter::stackElementSize is the space we need. Plus 1 because
516 // we also account for the return address location since
517 // we store it first rather than hold it in rax across all the shuffling
518
519 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
520
521 // stack is aligned, keep it that way
522 extraspace = round_to(extraspace, 2*wordSize);
523
524 // Get return address
525 __ pop(rax);
526
527 // set senderSP value
528 __ mov(r13, rsp);
529
530 __ subptr(rsp, extraspace);
531
532 // Store the return address in the expected location
533 __ movptr(Address(rsp, 0), rax);
534
535 // Now write the args into the outgoing interpreter space
536 for (int i = 0; i < total_args_passed; i++) {
537 if (sig_bt[i] == T_VOID) {
538 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
539 continue;
540 }
541
542 // offset to start parameters
543 int st_off = (total_args_passed - i) * Interpreter::stackElementSize;
544 int next_off = st_off - Interpreter::stackElementSize;
545
546 // Say 4 args:
547 // i st_off
548 // 0 32 T_LONG
549 // 1 24 T_VOID
550 // 2 16 T_OBJECT
551 // 3 8 T_BOOL
552 // - 0 return address
553 //
554 // However to make thing extra confusing. Because we can fit a long/double in
555 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
556 // leaves one slot empty and only stores to a single slot. In this case the
557 // slot that is occupied is the T_VOID slot. See I said it was confusing.
558
559 VMReg r_1 = regs[i].first();
560 VMReg r_2 = regs[i].second();
561 if (!r_1->is_valid()) {
562 assert(!r_2->is_valid(), "");
563 continue;
564 }
565 if (r_1->is_stack()) {
566 // memory to memory use rax
567 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
568 if (!r_2->is_valid()) {
569 // sign extend??
570 __ movl(rax, Address(rsp, ld_off));
571 __ movptr(Address(rsp, st_off), rax);
572
573 } else {
574
575 __ movq(rax, Address(rsp, ld_off));
576
577 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
578 // T_DOUBLE and T_LONG use two slots in the interpreter
579 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
580 // ld_off == LSW, ld_off+wordSize == MSW
581 // st_off == MSW, next_off == LSW
582 __ movq(Address(rsp, next_off), rax);
583 #ifdef ASSERT
584 // Overwrite the unused slot with known junk
585 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
586 __ movptr(Address(rsp, st_off), rax);
587 #endif /* ASSERT */
588 } else {
589 __ movq(Address(rsp, st_off), rax);
590 }
591 }
592 } else if (r_1->is_Register()) {
593 Register r = r_1->as_Register();
594 if (!r_2->is_valid()) {
595 // must be only an int (or less ) so move only 32bits to slot
596 // why not sign extend??
597 __ movl(Address(rsp, st_off), r);
598 } else {
599 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
600 // T_DOUBLE and T_LONG use two slots in the interpreter
601 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
602 // long/double in gpr
603 #ifdef ASSERT
604 // Overwrite the unused slot with known junk
605 __ mov64(rax, CONST64(0xdeadffffdeadaaab));
606 __ movptr(Address(rsp, st_off), rax);
607 #endif /* ASSERT */
608 __ movq(Address(rsp, next_off), r);
609 } else {
610 __ movptr(Address(rsp, st_off), r);
611 }
612 }
613 } else {
614 assert(r_1->is_XMMRegister(), "");
615 if (!r_2->is_valid()) {
616 // only a float use just part of the slot
617 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
618 } else {
619 #ifdef ASSERT
620 // Overwrite the unused slot with known junk
621 __ mov64(rax, CONST64(0xdeadffffdeadaaac));
622 __ movptr(Address(rsp, st_off), rax);
623 #endif /* ASSERT */
624 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
625 }
626 }
627 }
628
629 // Schedule the branch target address early.
630 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
631 __ jmp(rcx);
632 }
633
range_check(MacroAssembler * masm,Register pc_reg,Register temp_reg,address code_start,address code_end,Label & L_ok)634 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
635 address code_start, address code_end,
636 Label& L_ok) {
637 Label L_fail;
638 __ lea(temp_reg, ExternalAddress(code_start));
639 __ cmpptr(pc_reg, temp_reg);
640 __ jcc(Assembler::belowEqual, L_fail);
641 __ lea(temp_reg, ExternalAddress(code_end));
642 __ cmpptr(pc_reg, temp_reg);
643 __ jcc(Assembler::below, L_ok);
644 __ bind(L_fail);
645 }
646
gen_i2c_adapter(MacroAssembler * masm,int total_args_passed,int comp_args_on_stack,const BasicType * sig_bt,const VMRegPair * regs)647 static void gen_i2c_adapter(MacroAssembler *masm,
648 int total_args_passed,
649 int comp_args_on_stack,
650 const BasicType *sig_bt,
651 const VMRegPair *regs) {
652
653 // Note: r13 contains the senderSP on entry. We must preserve it since
654 // we may do a i2c -> c2i transition if we lose a race where compiled
655 // code goes non-entrant while we get args ready.
656 // In addition we use r13 to locate all the interpreter args as
657 // we must align the stack to 16 bytes on an i2c entry else we
658 // lose alignment we expect in all compiled code and register
659 // save code can segv when fxsave instructions find improperly
660 // aligned stack pointer.
661
662 // Adapters can be frameless because they do not require the caller
663 // to perform additional cleanup work, such as correcting the stack pointer.
664 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
665 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
666 // even if a callee has modified the stack pointer.
667 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
668 // routinely repairs its caller's stack pointer (from sender_sp, which is set
669 // up via the senderSP register).
670 // In other words, if *either* the caller or callee is interpreted, we can
671 // get the stack pointer repaired after a call.
672 // This is why c2i and i2c adapters cannot be indefinitely composed.
673 // In particular, if a c2i adapter were to somehow call an i2c adapter,
674 // both caller and callee would be compiled methods, and neither would
675 // clean up the stack pointer changes performed by the two adapters.
676 // If this happens, control eventually transfers back to the compiled
677 // caller, but with an uncorrected stack, causing delayed havoc.
678
679 // Pick up the return address
680 __ movptr(rax, Address(rsp, 0));
681
682 if (VerifyAdapterCalls &&
683 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
684 // So, let's test for cascading c2i/i2c adapters right now.
685 // assert(Interpreter::contains($return_addr) ||
686 // StubRoutines::contains($return_addr),
687 // "i2c adapter must return to an interpreter frame");
688 __ block_comment("verify_i2c { ");
689 Label L_ok;
690 if (Interpreter::code() != NULL)
691 range_check(masm, rax, r11,
692 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
693 L_ok);
694 if (StubRoutines::code1() != NULL)
695 range_check(masm, rax, r11,
696 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
697 L_ok);
698 if (StubRoutines::code2() != NULL)
699 range_check(masm, rax, r11,
700 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
701 L_ok);
702 const char* msg = "i2c adapter must return to an interpreter frame";
703 __ block_comment(msg);
704 __ stop(msg);
705 __ bind(L_ok);
706 __ block_comment("} verify_i2ce ");
707 }
708
709 // Must preserve original SP for loading incoming arguments because
710 // we need to align the outgoing SP for compiled code.
711 __ movptr(r11, rsp);
712
713 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
714 // in registers, we will occasionally have no stack args.
715 int comp_words_on_stack = 0;
716 if (comp_args_on_stack) {
717 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
718 // registers are below. By subtracting stack0, we either get a negative
719 // number (all values in registers) or the maximum stack slot accessed.
720
721 // Convert 4-byte c2 stack slots to words.
722 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
723 // Round up to miminum stack alignment, in wordSize
724 comp_words_on_stack = round_to(comp_words_on_stack, 2);
725 __ subptr(rsp, comp_words_on_stack * wordSize);
726 }
727
728
729 // Ensure compiled code always sees stack at proper alignment
730 __ andptr(rsp, -16);
731
732 // push the return address and misalign the stack that youngest frame always sees
733 // as far as the placement of the call instruction
734 __ push(rax);
735
736 // Put saved SP in another register
737 const Register saved_sp = rax;
738 __ movptr(saved_sp, r11);
739
740 // Will jump to the compiled code just as if compiled code was doing it.
741 // Pre-load the register-jump target early, to schedule it better.
742 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset())));
743
744 // Now generate the shuffle code. Pick up all register args and move the
745 // rest through the floating point stack top.
746 for (int i = 0; i < total_args_passed; i++) {
747 if (sig_bt[i] == T_VOID) {
748 // Longs and doubles are passed in native word order, but misaligned
749 // in the 32-bit build.
750 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
751 continue;
752 }
753
754 // Pick up 0, 1 or 2 words from SP+offset.
755
756 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
757 "scrambled load targets?");
758 // Load in argument order going down.
759 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
760 // Point to interpreter value (vs. tag)
761 int next_off = ld_off - Interpreter::stackElementSize;
762 //
763 //
764 //
765 VMReg r_1 = regs[i].first();
766 VMReg r_2 = regs[i].second();
767 if (!r_1->is_valid()) {
768 assert(!r_2->is_valid(), "");
769 continue;
770 }
771 if (r_1->is_stack()) {
772 // Convert stack slot to an SP offset (+ wordSize to account for return address )
773 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
774
775 // We can use r13 as a temp here because compiled code doesn't need r13 as an input
776 // and if we end up going thru a c2i because of a miss a reasonable value of r13
777 // will be generated.
778 if (!r_2->is_valid()) {
779 // sign extend???
780 __ movl(r13, Address(saved_sp, ld_off));
781 __ movptr(Address(rsp, st_off), r13);
782 } else {
783 //
784 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
785 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
786 // So we must adjust where to pick up the data to match the interpreter.
787 //
788 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
789 // are accessed as negative so LSW is at LOW address
790
791 // ld_off is MSW so get LSW
792 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
793 next_off : ld_off;
794 __ movq(r13, Address(saved_sp, offset));
795 // st_off is LSW (i.e. reg.first())
796 __ movq(Address(rsp, st_off), r13);
797 }
798 } else if (r_1->is_Register()) { // Register argument
799 Register r = r_1->as_Register();
800 assert(r != rax, "must be different");
801 if (r_2->is_valid()) {
802 //
803 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
804 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
805 // So we must adjust where to pick up the data to match the interpreter.
806
807 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
808 next_off : ld_off;
809
810 // this can be a misaligned move
811 __ movq(r, Address(saved_sp, offset));
812 } else {
813 // sign extend and use a full word?
814 __ movl(r, Address(saved_sp, ld_off));
815 }
816 } else {
817 if (!r_2->is_valid()) {
818 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
819 } else {
820 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
821 }
822 }
823 }
824
825 // 6243940 We might end up in handle_wrong_method if
826 // the callee is deoptimized as we race thru here. If that
827 // happens we don't want to take a safepoint because the
828 // caller frame will look interpreted and arguments are now
829 // "compiled" so it is much better to make this transition
830 // invisible to the stack walking code. Unfortunately if
831 // we try and find the callee by normal means a safepoint
832 // is possible. So we stash the desired callee in the thread
833 // and the vm will find there should this case occur.
834
835 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
836
837 // put Method* where a c2i would expect should we end up there
838 // only needed becaus eof c2 resolve stubs return Method* as a result in
839 // rax
840 __ mov(rax, rbx);
841 __ jmp(r11);
842 }
843
844 // ---------------------------------------------------------------
generate_i2c2i_adapters(MacroAssembler * masm,int total_args_passed,int comp_args_on_stack,const BasicType * sig_bt,const VMRegPair * regs,AdapterFingerPrint * fingerprint)845 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
846 int total_args_passed,
847 int comp_args_on_stack,
848 const BasicType *sig_bt,
849 const VMRegPair *regs,
850 AdapterFingerPrint* fingerprint) {
851 address i2c_entry = __ pc();
852
853 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
854
855 // -------------------------------------------------------------------------
856 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls
857 // to the interpreter. The args start out packed in the compiled layout. They
858 // need to be unpacked into the interpreter layout. This will almost always
859 // require some stack space. We grow the current (compiled) stack, then repack
860 // the args. We finally end in a jump to the generic interpreter entry point.
861 // On exit from the interpreter, the interpreter will restore our SP (lest the
862 // compiled code, which relys solely on SP and not RBP, get sick).
863
864 address c2i_unverified_entry = __ pc();
865 Label skip_fixup;
866 Label ok;
867
868 Register holder = rax;
869 Register receiver = j_rarg0;
870 Register temp = rbx;
871
872 {
873 __ load_klass(temp, receiver);
874 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
875 __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
876 __ jcc(Assembler::equal, ok);
877 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
878
879 __ bind(ok);
880 // Method might have been compiled since the call site was patched to
881 // interpreted if that is the case treat it as a miss so we can get
882 // the call site corrected.
883 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
884 __ jcc(Assembler::equal, skip_fixup);
885 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
886 }
887
888 address c2i_entry = __ pc();
889
890 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
891
892 __ flush();
893 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
894 }
895
c_calling_convention(const BasicType * sig_bt,VMRegPair * regs,VMRegPair * regs2,int total_args_passed)896 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
897 VMRegPair *regs,
898 VMRegPair *regs2,
899 int total_args_passed) {
900 assert(regs2 == NULL, "not needed on x86");
901 // We return the amount of VMRegImpl stack slots we need to reserve for all
902 // the arguments NOT counting out_preserve_stack_slots.
903
904 // NOTE: These arrays will have to change when c1 is ported
905 #ifdef _WIN64
906 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
907 c_rarg0, c_rarg1, c_rarg2, c_rarg3
908 };
909 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
910 c_farg0, c_farg1, c_farg2, c_farg3
911 };
912 #else
913 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
914 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
915 };
916 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
917 c_farg0, c_farg1, c_farg2, c_farg3,
918 c_farg4, c_farg5, c_farg6, c_farg7
919 };
920 #endif // _WIN64
921
922
923 uint int_args = 0;
924 uint fp_args = 0;
925 uint stk_args = 0; // inc by 2 each time
926
927 for (int i = 0; i < total_args_passed; i++) {
928 switch (sig_bt[i]) {
929 case T_BOOLEAN:
930 case T_CHAR:
931 case T_BYTE:
932 case T_SHORT:
933 case T_INT:
934 if (int_args < Argument::n_int_register_parameters_c) {
935 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
936 #ifdef _WIN64
937 fp_args++;
938 // Allocate slots for callee to stuff register args the stack.
939 stk_args += 2;
940 #endif
941 } else {
942 regs[i].set1(VMRegImpl::stack2reg(stk_args));
943 stk_args += 2;
944 }
945 break;
946 case T_LONG:
947 assert(sig_bt[i + 1] == T_VOID, "expecting half");
948 // fall through
949 case T_OBJECT:
950 case T_ARRAY:
951 case T_ADDRESS:
952 case T_METADATA:
953 if (int_args < Argument::n_int_register_parameters_c) {
954 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
955 #ifdef _WIN64
956 fp_args++;
957 stk_args += 2;
958 #endif
959 } else {
960 regs[i].set2(VMRegImpl::stack2reg(stk_args));
961 stk_args += 2;
962 }
963 break;
964 case T_FLOAT:
965 if (fp_args < Argument::n_float_register_parameters_c) {
966 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
967 #ifdef _WIN64
968 int_args++;
969 // Allocate slots for callee to stuff register args the stack.
970 stk_args += 2;
971 #endif
972 } else {
973 regs[i].set1(VMRegImpl::stack2reg(stk_args));
974 stk_args += 2;
975 }
976 break;
977 case T_DOUBLE:
978 assert(sig_bt[i + 1] == T_VOID, "expecting half");
979 if (fp_args < Argument::n_float_register_parameters_c) {
980 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
981 #ifdef _WIN64
982 int_args++;
983 // Allocate slots for callee to stuff register args the stack.
984 stk_args += 2;
985 #endif
986 } else {
987 regs[i].set2(VMRegImpl::stack2reg(stk_args));
988 stk_args += 2;
989 }
990 break;
991 case T_VOID: // Halves of longs and doubles
992 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
993 regs[i].set_bad();
994 break;
995 default:
996 ShouldNotReachHere();
997 break;
998 }
999 }
1000 #ifdef _WIN64
1001 // windows abi requires that we always allocate enough stack space
1002 // for 4 64bit registers to be stored down.
1003 if (stk_args < 8) {
1004 stk_args = 8;
1005 }
1006 #endif // _WIN64
1007
1008 return stk_args;
1009 }
1010
1011 // On 64 bit we will store integer like items to the stack as
1012 // 64 bits items (sparc abi) even though java would only store
1013 // 32bits for a parameter. On 32bit it will simply be 32 bits
1014 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
move32_64(MacroAssembler * masm,VMRegPair src,VMRegPair dst)1015 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1016 if (src.first()->is_stack()) {
1017 if (dst.first()->is_stack()) {
1018 // stack to stack
1019 __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
1020 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1021 } else {
1022 // stack to reg
1023 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1024 }
1025 } else if (dst.first()->is_stack()) {
1026 // reg to stack
1027 // Do we really have to sign extend???
1028 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1029 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1030 } else {
1031 // Do we really have to sign extend???
1032 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
1033 if (dst.first() != src.first()) {
1034 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1035 }
1036 }
1037 }
1038
move_ptr(MacroAssembler * masm,VMRegPair src,VMRegPair dst)1039 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1040 if (src.first()->is_stack()) {
1041 if (dst.first()->is_stack()) {
1042 // stack to stack
1043 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1044 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1045 } else {
1046 // stack to reg
1047 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1048 }
1049 } else if (dst.first()->is_stack()) {
1050 // reg to stack
1051 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1052 } else {
1053 if (dst.first() != src.first()) {
1054 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1055 }
1056 }
1057 }
1058
1059 // An oop arg. Must pass a handle not the oop itself
object_move(MacroAssembler * masm,OopMap * map,int oop_handle_offset,int framesize_in_slots,VMRegPair src,VMRegPair dst,bool is_receiver,int * receiver_offset)1060 static void object_move(MacroAssembler* masm,
1061 OopMap* map,
1062 int oop_handle_offset,
1063 int framesize_in_slots,
1064 VMRegPair src,
1065 VMRegPair dst,
1066 bool is_receiver,
1067 int* receiver_offset) {
1068
1069 // must pass a handle. First figure out the location we use as a handle
1070
1071 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
1072
1073 // See if oop is NULL if it is we need no handle
1074
1075 if (src.first()->is_stack()) {
1076
1077 // Oop is already on the stack as an argument
1078 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1079 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1080 if (is_receiver) {
1081 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1082 }
1083
1084 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1085 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1086 // conditionally move a NULL
1087 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
1088 } else {
1089
1090 // Oop is in an a register we must store it to the space we reserve
1091 // on the stack for oop_handles and pass a handle if oop is non-NULL
1092
1093 const Register rOop = src.first()->as_Register();
1094 int oop_slot;
1095 if (rOop == j_rarg0)
1096 oop_slot = 0;
1097 else if (rOop == j_rarg1)
1098 oop_slot = 1;
1099 else if (rOop == j_rarg2)
1100 oop_slot = 2;
1101 else if (rOop == j_rarg3)
1102 oop_slot = 3;
1103 else if (rOop == j_rarg4)
1104 oop_slot = 4;
1105 else {
1106 assert(rOop == j_rarg5, "wrong register");
1107 oop_slot = 5;
1108 }
1109
1110 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1111 int offset = oop_slot*VMRegImpl::stack_slot_size;
1112
1113 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1114 // Store oop in handle area, may be NULL
1115 __ movptr(Address(rsp, offset), rOop);
1116 if (is_receiver) {
1117 *receiver_offset = offset;
1118 }
1119
1120 __ cmpptr(rOop, (int32_t)NULL_WORD);
1121 __ lea(rHandle, Address(rsp, offset));
1122 // conditionally move a NULL from the handle area where it was just stored
1123 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1124 }
1125
1126 // If arg is on the stack then place it otherwise it is already in correct reg.
1127 if (dst.first()->is_stack()) {
1128 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1129 }
1130 }
1131
1132 // A float arg may have to do float reg int reg conversion
float_move(MacroAssembler * masm,VMRegPair src,VMRegPair dst)1133 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1134 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1135
1136 // The calling conventions assures us that each VMregpair is either
1137 // all really one physical register or adjacent stack slots.
1138 // This greatly simplifies the cases here compared to sparc.
1139
1140 if (src.first()->is_stack()) {
1141 if (dst.first()->is_stack()) {
1142 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1143 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1144 } else {
1145 // stack to reg
1146 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1147 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1148 }
1149 } else if (dst.first()->is_stack()) {
1150 // reg to stack
1151 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1152 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1153 } else {
1154 // reg to reg
1155 // In theory these overlap but the ordering is such that this is likely a nop
1156 if ( src.first() != dst.first()) {
1157 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1158 }
1159 }
1160 }
1161
1162 // A long move
long_move(MacroAssembler * masm,VMRegPair src,VMRegPair dst)1163 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1164
1165 // The calling conventions assures us that each VMregpair is either
1166 // all really one physical register or adjacent stack slots.
1167 // This greatly simplifies the cases here compared to sparc.
1168
1169 if (src.is_single_phys_reg() ) {
1170 if (dst.is_single_phys_reg()) {
1171 if (dst.first() != src.first()) {
1172 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1173 }
1174 } else {
1175 assert(dst.is_single_reg(), "not a stack pair");
1176 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1177 }
1178 } else if (dst.is_single_phys_reg()) {
1179 assert(src.is_single_reg(), "not a stack pair");
1180 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1181 } else {
1182 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1183 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1184 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1185 }
1186 }
1187
1188 // A double move
double_move(MacroAssembler * masm,VMRegPair src,VMRegPair dst)1189 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1190
1191 // The calling conventions assures us that each VMregpair is either
1192 // all really one physical register or adjacent stack slots.
1193 // This greatly simplifies the cases here compared to sparc.
1194
1195 if (src.is_single_phys_reg() ) {
1196 if (dst.is_single_phys_reg()) {
1197 // In theory these overlap but the ordering is such that this is likely a nop
1198 if ( src.first() != dst.first()) {
1199 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1200 }
1201 } else {
1202 assert(dst.is_single_reg(), "not a stack pair");
1203 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1204 }
1205 } else if (dst.is_single_phys_reg()) {
1206 assert(src.is_single_reg(), "not a stack pair");
1207 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1208 } else {
1209 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1210 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1211 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1212 }
1213 }
1214
1215
save_native_result(MacroAssembler * masm,BasicType ret_type,int frame_slots)1216 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1217 // We always ignore the frame_slots arg and just use the space just below frame pointer
1218 // which by this time is free to use
1219 switch (ret_type) {
1220 case T_FLOAT:
1221 __ movflt(Address(rbp, -wordSize), xmm0);
1222 break;
1223 case T_DOUBLE:
1224 __ movdbl(Address(rbp, -wordSize), xmm0);
1225 break;
1226 case T_VOID: break;
1227 default: {
1228 __ movptr(Address(rbp, -wordSize), rax);
1229 }
1230 }
1231 }
1232
restore_native_result(MacroAssembler * masm,BasicType ret_type,int frame_slots)1233 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1234 // We always ignore the frame_slots arg and just use the space just below frame pointer
1235 // which by this time is free to use
1236 switch (ret_type) {
1237 case T_FLOAT:
1238 __ movflt(xmm0, Address(rbp, -wordSize));
1239 break;
1240 case T_DOUBLE:
1241 __ movdbl(xmm0, Address(rbp, -wordSize));
1242 break;
1243 case T_VOID: break;
1244 default: {
1245 __ movptr(rax, Address(rbp, -wordSize));
1246 }
1247 }
1248 }
1249
save_args(MacroAssembler * masm,int arg_count,int first_arg,VMRegPair * args)1250 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1251 for ( int i = first_arg ; i < arg_count ; i++ ) {
1252 if (args[i].first()->is_Register()) {
1253 __ push(args[i].first()->as_Register());
1254 } else if (args[i].first()->is_XMMRegister()) {
1255 __ subptr(rsp, 2*wordSize);
1256 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1257 }
1258 }
1259 }
1260
restore_args(MacroAssembler * masm,int arg_count,int first_arg,VMRegPair * args)1261 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1262 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1263 if (args[i].first()->is_Register()) {
1264 __ pop(args[i].first()->as_Register());
1265 } else if (args[i].first()->is_XMMRegister()) {
1266 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1267 __ addptr(rsp, 2*wordSize);
1268 }
1269 }
1270 }
1271
1272
save_or_restore_arguments(MacroAssembler * masm,const int stack_slots,const int total_in_args,const int arg_save_area,OopMap * map,VMRegPair * in_regs,BasicType * in_sig_bt)1273 static void save_or_restore_arguments(MacroAssembler* masm,
1274 const int stack_slots,
1275 const int total_in_args,
1276 const int arg_save_area,
1277 OopMap* map,
1278 VMRegPair* in_regs,
1279 BasicType* in_sig_bt) {
1280 // if map is non-NULL then the code should store the values,
1281 // otherwise it should load them.
1282 int slot = arg_save_area;
1283 // Save down double word first
1284 for ( int i = 0; i < total_in_args; i++) {
1285 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1286 int offset = slot * VMRegImpl::stack_slot_size;
1287 slot += VMRegImpl::slots_per_word;
1288 assert(slot <= stack_slots, "overflow");
1289 if (map != NULL) {
1290 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1291 } else {
1292 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1293 }
1294 }
1295 if (in_regs[i].first()->is_Register() &&
1296 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1297 int offset = slot * VMRegImpl::stack_slot_size;
1298 if (map != NULL) {
1299 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
1300 if (in_sig_bt[i] == T_ARRAY) {
1301 map->set_oop(VMRegImpl::stack2reg(slot));;
1302 }
1303 } else {
1304 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
1305 }
1306 slot += VMRegImpl::slots_per_word;
1307 }
1308 }
1309 // Save or restore single word registers
1310 for ( int i = 0; i < total_in_args; i++) {
1311 if (in_regs[i].first()->is_Register()) {
1312 int offset = slot * VMRegImpl::stack_slot_size;
1313 slot++;
1314 assert(slot <= stack_slots, "overflow");
1315
1316 // Value is in an input register pass we must flush it to the stack
1317 const Register reg = in_regs[i].first()->as_Register();
1318 switch (in_sig_bt[i]) {
1319 case T_BOOLEAN:
1320 case T_CHAR:
1321 case T_BYTE:
1322 case T_SHORT:
1323 case T_INT:
1324 if (map != NULL) {
1325 __ movl(Address(rsp, offset), reg);
1326 } else {
1327 __ movl(reg, Address(rsp, offset));
1328 }
1329 break;
1330 case T_ARRAY:
1331 case T_LONG:
1332 // handled above
1333 break;
1334 case T_OBJECT:
1335 default: ShouldNotReachHere();
1336 }
1337 } else if (in_regs[i].first()->is_XMMRegister()) {
1338 if (in_sig_bt[i] == T_FLOAT) {
1339 int offset = slot * VMRegImpl::stack_slot_size;
1340 slot++;
1341 assert(slot <= stack_slots, "overflow");
1342 if (map != NULL) {
1343 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1344 } else {
1345 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1346 }
1347 }
1348 } else if (in_regs[i].first()->is_stack()) {
1349 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1350 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1351 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1352 }
1353 }
1354 }
1355 }
1356
1357
1358 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1359 // keeps a new JNI critical region from starting until a GC has been
1360 // forced. Save down any oops in registers and describe them in an
1361 // OopMap.
check_needs_gc_for_critical_native(MacroAssembler * masm,int stack_slots,int total_c_args,int total_in_args,int arg_save_area,OopMapSet * oop_maps,VMRegPair * in_regs,BasicType * in_sig_bt)1362 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1363 int stack_slots,
1364 int total_c_args,
1365 int total_in_args,
1366 int arg_save_area,
1367 OopMapSet* oop_maps,
1368 VMRegPair* in_regs,
1369 BasicType* in_sig_bt) {
1370 __ block_comment("check GC_locker::needs_gc");
1371 Label cont;
1372 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false);
1373 __ jcc(Assembler::equal, cont);
1374
1375 // Save down any incoming oops and call into the runtime to halt for a GC
1376
1377 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1378 save_or_restore_arguments(masm, stack_slots, total_in_args,
1379 arg_save_area, map, in_regs, in_sig_bt);
1380
1381 address the_pc = __ pc();
1382 oop_maps->add_gc_map( __ offset(), map);
1383 __ set_last_Java_frame(rsp, noreg, the_pc);
1384
1385 __ block_comment("block_for_jni_critical");
1386 __ movptr(c_rarg0, r15_thread);
1387 __ mov(r12, rsp); // remember sp
1388 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1389 __ andptr(rsp, -16); // align stack as required by ABI
1390 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1391 __ mov(rsp, r12); // restore sp
1392 __ reinit_heapbase();
1393
1394 __ reset_last_Java_frame(false);
1395
1396 save_or_restore_arguments(masm, stack_slots, total_in_args,
1397 arg_save_area, NULL, in_regs, in_sig_bt);
1398
1399 __ bind(cont);
1400 #ifdef ASSERT
1401 if (StressCriticalJNINatives) {
1402 // Stress register saving
1403 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1404 save_or_restore_arguments(masm, stack_slots, total_in_args,
1405 arg_save_area, map, in_regs, in_sig_bt);
1406 // Destroy argument registers
1407 for (int i = 0; i < total_in_args - 1; i++) {
1408 if (in_regs[i].first()->is_Register()) {
1409 const Register reg = in_regs[i].first()->as_Register();
1410 __ xorptr(reg, reg);
1411 } else if (in_regs[i].first()->is_XMMRegister()) {
1412 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1413 } else if (in_regs[i].first()->is_FloatRegister()) {
1414 ShouldNotReachHere();
1415 } else if (in_regs[i].first()->is_stack()) {
1416 // Nothing to do
1417 } else {
1418 ShouldNotReachHere();
1419 }
1420 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1421 i++;
1422 }
1423 }
1424
1425 save_or_restore_arguments(masm, stack_slots, total_in_args,
1426 arg_save_area, NULL, in_regs, in_sig_bt);
1427 }
1428 #endif
1429 }
1430
1431 // Unpack an array argument into a pointer to the body and the length
1432 // if the array is non-null, otherwise pass 0 for both.
unpack_array_argument(MacroAssembler * masm,VMRegPair reg,BasicType in_elem_type,VMRegPair body_arg,VMRegPair length_arg)1433 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1434 Register tmp_reg = rax;
1435 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1436 "possible collision");
1437 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1438 "possible collision");
1439
1440 __ block_comment("unpack_array_argument {");
1441
1442 // Pass the length, ptr pair
1443 Label is_null, done;
1444 VMRegPair tmp;
1445 tmp.set_ptr(tmp_reg->as_VMReg());
1446 if (reg.first()->is_stack()) {
1447 // Load the arg up from the stack
1448 move_ptr(masm, reg, tmp);
1449 reg = tmp;
1450 }
1451 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1452 __ jccb(Assembler::equal, is_null);
1453 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1454 move_ptr(masm, tmp, body_arg);
1455 // load the length relative to the body.
1456 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1457 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1458 move32_64(masm, tmp, length_arg);
1459 __ jmpb(done);
1460 __ bind(is_null);
1461 // Pass zeros
1462 __ xorptr(tmp_reg, tmp_reg);
1463 move_ptr(masm, tmp, body_arg);
1464 move32_64(masm, tmp, length_arg);
1465 __ bind(done);
1466
1467 __ block_comment("} unpack_array_argument");
1468 }
1469
1470
1471 // Different signatures may require very different orders for the move
1472 // to avoid clobbering other arguments. There's no simple way to
1473 // order them safely. Compute a safe order for issuing stores and
1474 // break any cycles in those stores. This code is fairly general but
1475 // it's not necessary on the other platforms so we keep it in the
1476 // platform dependent code instead of moving it into a shared file.
1477 // (See bugs 7013347 & 7145024.)
1478 // Note that this code is specific to LP64.
1479 class ComputeMoveOrder: public StackObj {
1480 class MoveOperation: public ResourceObj {
1481 friend class ComputeMoveOrder;
1482 private:
1483 VMRegPair _src;
1484 VMRegPair _dst;
1485 int _src_index;
1486 int _dst_index;
1487 bool _processed;
1488 MoveOperation* _next;
1489 MoveOperation* _prev;
1490
get_id(VMRegPair r)1491 static int get_id(VMRegPair r) {
1492 return r.first()->value();
1493 }
1494
1495 public:
MoveOperation(int src_index,VMRegPair src,int dst_index,VMRegPair dst)1496 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
1497 _src(src)
1498 , _src_index(src_index)
1499 , _dst(dst)
1500 , _dst_index(dst_index)
1501 , _next(NULL)
1502 , _prev(NULL)
1503 , _processed(false) {
1504 }
1505
src() const1506 VMRegPair src() const { return _src; }
src_id() const1507 int src_id() const { return get_id(src()); }
src_index() const1508 int src_index() const { return _src_index; }
dst() const1509 VMRegPair dst() const { return _dst; }
set_dst(int i,VMRegPair dst)1510 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; }
dst_index() const1511 int dst_index() const { return _dst_index; }
dst_id() const1512 int dst_id() const { return get_id(dst()); }
next() const1513 MoveOperation* next() const { return _next; }
prev() const1514 MoveOperation* prev() const { return _prev; }
set_processed()1515 void set_processed() { _processed = true; }
is_processed() const1516 bool is_processed() const { return _processed; }
1517
1518 // insert
break_cycle(VMRegPair temp_register)1519 void break_cycle(VMRegPair temp_register) {
1520 // create a new store following the last store
1521 // to move from the temp_register to the original
1522 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst());
1523
1524 // break the cycle of links and insert new_store at the end
1525 // break the reverse link.
1526 MoveOperation* p = prev();
1527 assert(p->next() == this, "must be");
1528 _prev = NULL;
1529 p->_next = new_store;
1530 new_store->_prev = p;
1531
1532 // change the original store to save it's value in the temp.
1533 set_dst(-1, temp_register);
1534 }
1535
link(GrowableArray<MoveOperation * > & killer)1536 void link(GrowableArray<MoveOperation*>& killer) {
1537 // link this store in front the store that it depends on
1538 MoveOperation* n = killer.at_grow(src_id(), NULL);
1539 if (n != NULL) {
1540 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet");
1541 _next = n;
1542 n->_prev = this;
1543 }
1544 }
1545 };
1546
1547 private:
1548 GrowableArray<MoveOperation*> edges;
1549
1550 public:
ComputeMoveOrder(int total_in_args,VMRegPair * in_regs,int total_c_args,VMRegPair * out_regs,BasicType * in_sig_bt,GrowableArray<int> & arg_order,VMRegPair tmp_vmreg)1551 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
1552 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) {
1553 // Move operations where the dest is the stack can all be
1554 // scheduled first since they can't interfere with the other moves.
1555 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1556 if (in_sig_bt[i] == T_ARRAY) {
1557 c_arg--;
1558 if (out_regs[c_arg].first()->is_stack() &&
1559 out_regs[c_arg + 1].first()->is_stack()) {
1560 arg_order.push(i);
1561 arg_order.push(c_arg);
1562 } else {
1563 if (out_regs[c_arg].first()->is_stack() ||
1564 in_regs[i].first() == out_regs[c_arg].first()) {
1565 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]);
1566 } else {
1567 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1568 }
1569 }
1570 } else if (in_sig_bt[i] == T_VOID) {
1571 arg_order.push(i);
1572 arg_order.push(c_arg);
1573 } else {
1574 if (out_regs[c_arg].first()->is_stack() ||
1575 in_regs[i].first() == out_regs[c_arg].first()) {
1576 arg_order.push(i);
1577 arg_order.push(c_arg);
1578 } else {
1579 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1580 }
1581 }
1582 }
1583 // Break any cycles in the register moves and emit the in the
1584 // proper order.
1585 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg);
1586 for (int i = 0; i < stores->length(); i++) {
1587 arg_order.push(stores->at(i)->src_index());
1588 arg_order.push(stores->at(i)->dst_index());
1589 }
1590 }
1591
1592 // Collected all the move operations
add_edge(int src_index,VMRegPair src,int dst_index,VMRegPair dst)1593 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) {
1594 if (src.first() == dst.first()) return;
1595 edges.append(new MoveOperation(src_index, src, dst_index, dst));
1596 }
1597
1598 // Walk the edges breaking cycles between moves. The result list
1599 // can be walked in order to produce the proper set of loads
get_store_order(VMRegPair temp_register)1600 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) {
1601 // Record which moves kill which values
1602 GrowableArray<MoveOperation*> killer;
1603 for (int i = 0; i < edges.length(); i++) {
1604 MoveOperation* s = edges.at(i);
1605 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer");
1606 killer.at_put_grow(s->dst_id(), s, NULL);
1607 }
1608 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL,
1609 "make sure temp isn't in the registers that are killed");
1610
1611 // create links between loads and stores
1612 for (int i = 0; i < edges.length(); i++) {
1613 edges.at(i)->link(killer);
1614 }
1615
1616 // at this point, all the move operations are chained together
1617 // in a doubly linked list. Processing it backwards finds
1618 // the beginning of the chain, forwards finds the end. If there's
1619 // a cycle it can be broken at any point, so pick an edge and walk
1620 // backward until the list ends or we end where we started.
1621 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>();
1622 for (int e = 0; e < edges.length(); e++) {
1623 MoveOperation* s = edges.at(e);
1624 if (!s->is_processed()) {
1625 MoveOperation* start = s;
1626 // search for the beginning of the chain or cycle
1627 while (start->prev() != NULL && start->prev() != s) {
1628 start = start->prev();
1629 }
1630 if (start->prev() == s) {
1631 start->break_cycle(temp_register);
1632 }
1633 // walk the chain forward inserting to store list
1634 while (start != NULL) {
1635 stores->append(start);
1636 start->set_processed();
1637 start = start->next();
1638 }
1639 }
1640 }
1641 return stores;
1642 }
1643 };
1644
verify_oop_args(MacroAssembler * masm,methodHandle method,const BasicType * sig_bt,const VMRegPair * regs)1645 static void verify_oop_args(MacroAssembler* masm,
1646 methodHandle method,
1647 const BasicType* sig_bt,
1648 const VMRegPair* regs) {
1649 Register temp_reg = rbx; // not part of any compiled calling seq
1650 if (VerifyOops) {
1651 for (int i = 0; i < method->size_of_parameters(); i++) {
1652 if (sig_bt[i] == T_OBJECT ||
1653 sig_bt[i] == T_ARRAY) {
1654 VMReg r = regs[i].first();
1655 assert(r->is_valid(), "bad oop arg");
1656 if (r->is_stack()) {
1657 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1658 __ verify_oop(temp_reg);
1659 } else {
1660 __ verify_oop(r->as_Register());
1661 }
1662 }
1663 }
1664 }
1665 }
1666
gen_special_dispatch(MacroAssembler * masm,methodHandle method,const BasicType * sig_bt,const VMRegPair * regs)1667 static void gen_special_dispatch(MacroAssembler* masm,
1668 methodHandle method,
1669 const BasicType* sig_bt,
1670 const VMRegPair* regs) {
1671 verify_oop_args(masm, method, sig_bt, regs);
1672 vmIntrinsics::ID iid = method->intrinsic_id();
1673
1674 // Now write the args into the outgoing interpreter space
1675 bool has_receiver = false;
1676 Register receiver_reg = noreg;
1677 int member_arg_pos = -1;
1678 Register member_reg = noreg;
1679 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1680 if (ref_kind != 0) {
1681 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1682 member_reg = rbx; // known to be free at this point
1683 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1684 } else if (iid == vmIntrinsics::_invokeBasic) {
1685 has_receiver = true;
1686 } else {
1687 fatal(err_msg_res("unexpected intrinsic id %d", iid));
1688 }
1689
1690 if (member_reg != noreg) {
1691 // Load the member_arg into register, if necessary.
1692 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1693 VMReg r = regs[member_arg_pos].first();
1694 if (r->is_stack()) {
1695 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1696 } else {
1697 // no data motion is needed
1698 member_reg = r->as_Register();
1699 }
1700 }
1701
1702 if (has_receiver) {
1703 // Make sure the receiver is loaded into a register.
1704 assert(method->size_of_parameters() > 0, "oob");
1705 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1706 VMReg r = regs[0].first();
1707 assert(r->is_valid(), "bad receiver arg");
1708 if (r->is_stack()) {
1709 // Porting note: This assumes that compiled calling conventions always
1710 // pass the receiver oop in a register. If this is not true on some
1711 // platform, pick a temp and load the receiver from stack.
1712 fatal("receiver always in a register");
1713 receiver_reg = j_rarg0; // known to be free at this point
1714 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1715 } else {
1716 // no data motion is needed
1717 receiver_reg = r->as_Register();
1718 }
1719 }
1720
1721 // Figure out which address we are really jumping to:
1722 MethodHandles::generate_method_handle_dispatch(masm, iid,
1723 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1724 }
1725
1726 // ---------------------------------------------------------------------------
1727 // Generate a native wrapper for a given method. The method takes arguments
1728 // in the Java compiled code convention, marshals them to the native
1729 // convention (handlizes oops, etc), transitions to native, makes the call,
1730 // returns to java state (possibly blocking), unhandlizes any result and
1731 // returns.
1732 //
1733 // Critical native functions are a shorthand for the use of
1734 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1735 // functions. The wrapper is expected to unpack the arguments before
1736 // passing them to the callee and perform checks before and after the
1737 // native call to ensure that they GC_locker
1738 // lock_critical/unlock_critical semantics are followed. Some other
1739 // parts of JNI setup are skipped like the tear down of the JNI handle
1740 // block and the check for pending exceptions it's impossible for them
1741 // to be thrown.
1742 //
1743 // They are roughly structured like this:
1744 // if (GC_locker::needs_gc())
1745 // SharedRuntime::block_for_jni_critical();
1746 // tranistion to thread_in_native
1747 // unpack arrray arguments and call native entry point
1748 // check for safepoint in progress
1749 // check if any thread suspend flags are set
1750 // call into JVM and possible unlock the JNI critical
1751 // if a GC was suppressed while in the critical native.
1752 // transition back to thread_in_Java
1753 // return to caller
1754 //
generate_native_wrapper(MacroAssembler * masm,methodHandle method,int compile_id,BasicType * in_sig_bt,VMRegPair * in_regs,BasicType ret_type)1755 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1756 methodHandle method,
1757 int compile_id,
1758 BasicType* in_sig_bt,
1759 VMRegPair* in_regs,
1760 BasicType ret_type) {
1761 if (method->is_method_handle_intrinsic()) {
1762 vmIntrinsics::ID iid = method->intrinsic_id();
1763 intptr_t start = (intptr_t)__ pc();
1764 int vep_offset = ((intptr_t)__ pc()) - start;
1765 gen_special_dispatch(masm,
1766 method,
1767 in_sig_bt,
1768 in_regs);
1769 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1770 __ flush();
1771 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1772 return nmethod::new_native_nmethod(method,
1773 compile_id,
1774 masm->code(),
1775 vep_offset,
1776 frame_complete,
1777 stack_slots / VMRegImpl::slots_per_word,
1778 in_ByteSize(-1),
1779 in_ByteSize(-1),
1780 (OopMapSet*)NULL);
1781 }
1782 bool is_critical_native = true;
1783 address native_func = method->critical_native_function();
1784 if (native_func == NULL) {
1785 native_func = method->native_function();
1786 is_critical_native = false;
1787 }
1788 assert(native_func != NULL, "must have function");
1789
1790 // An OopMap for lock (and class if static)
1791 OopMapSet *oop_maps = new OopMapSet();
1792 intptr_t start = (intptr_t)__ pc();
1793
1794 // We have received a description of where all the java arg are located
1795 // on entry to the wrapper. We need to convert these args to where
1796 // the jni function will expect them. To figure out where they go
1797 // we convert the java signature to a C signature by inserting
1798 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1799
1800 const int total_in_args = method->size_of_parameters();
1801 int total_c_args = total_in_args;
1802 if (!is_critical_native) {
1803 total_c_args += 1;
1804 if (method->is_static()) {
1805 total_c_args++;
1806 }
1807 } else {
1808 for (int i = 0; i < total_in_args; i++) {
1809 if (in_sig_bt[i] == T_ARRAY) {
1810 total_c_args++;
1811 }
1812 }
1813 }
1814
1815 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1816 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1817 BasicType* in_elem_bt = NULL;
1818
1819 int argc = 0;
1820 if (!is_critical_native) {
1821 out_sig_bt[argc++] = T_ADDRESS;
1822 if (method->is_static()) {
1823 out_sig_bt[argc++] = T_OBJECT;
1824 }
1825
1826 for (int i = 0; i < total_in_args ; i++ ) {
1827 out_sig_bt[argc++] = in_sig_bt[i];
1828 }
1829 } else {
1830 Thread* THREAD = Thread::current();
1831 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1832 SignatureStream ss(method->signature());
1833 for (int i = 0; i < total_in_args ; i++ ) {
1834 if (in_sig_bt[i] == T_ARRAY) {
1835 // Arrays are passed as int, elem* pair
1836 out_sig_bt[argc++] = T_INT;
1837 out_sig_bt[argc++] = T_ADDRESS;
1838 Symbol* atype = ss.as_symbol(CHECK_NULL);
1839 const char* at = atype->as_C_string();
1840 if (strlen(at) == 2) {
1841 assert(at[0] == '[', "must be");
1842 switch (at[1]) {
1843 case 'B': in_elem_bt[i] = T_BYTE; break;
1844 case 'C': in_elem_bt[i] = T_CHAR; break;
1845 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1846 case 'F': in_elem_bt[i] = T_FLOAT; break;
1847 case 'I': in_elem_bt[i] = T_INT; break;
1848 case 'J': in_elem_bt[i] = T_LONG; break;
1849 case 'S': in_elem_bt[i] = T_SHORT; break;
1850 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1851 default: ShouldNotReachHere();
1852 }
1853 }
1854 } else {
1855 out_sig_bt[argc++] = in_sig_bt[i];
1856 in_elem_bt[i] = T_VOID;
1857 }
1858 if (in_sig_bt[i] != T_VOID) {
1859 assert(in_sig_bt[i] == ss.type(), "must match");
1860 ss.next();
1861 }
1862 }
1863 }
1864
1865 // Now figure out where the args must be stored and how much stack space
1866 // they require.
1867 int out_arg_slots;
1868 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1869
1870 // Compute framesize for the wrapper. We need to handlize all oops in
1871 // incoming registers
1872
1873 // Calculate the total number of stack slots we will need.
1874
1875 // First count the abi requirement plus all of the outgoing args
1876 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1877
1878 // Now the space for the inbound oop handle area
1879 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers
1880 if (is_critical_native) {
1881 // Critical natives may have to call out so they need a save area
1882 // for register arguments.
1883 int double_slots = 0;
1884 int single_slots = 0;
1885 for ( int i = 0; i < total_in_args; i++) {
1886 if (in_regs[i].first()->is_Register()) {
1887 const Register reg = in_regs[i].first()->as_Register();
1888 switch (in_sig_bt[i]) {
1889 case T_BOOLEAN:
1890 case T_BYTE:
1891 case T_SHORT:
1892 case T_CHAR:
1893 case T_INT: single_slots++; break;
1894 case T_ARRAY: // specific to LP64 (7145024)
1895 case T_LONG: double_slots++; break;
1896 default: ShouldNotReachHere();
1897 }
1898 } else if (in_regs[i].first()->is_XMMRegister()) {
1899 switch (in_sig_bt[i]) {
1900 case T_FLOAT: single_slots++; break;
1901 case T_DOUBLE: double_slots++; break;
1902 default: ShouldNotReachHere();
1903 }
1904 } else if (in_regs[i].first()->is_FloatRegister()) {
1905 ShouldNotReachHere();
1906 }
1907 }
1908 total_save_slots = double_slots * 2 + single_slots;
1909 // align the save area
1910 if (double_slots != 0) {
1911 stack_slots = round_to(stack_slots, 2);
1912 }
1913 }
1914
1915 int oop_handle_offset = stack_slots;
1916 stack_slots += total_save_slots;
1917
1918 // Now any space we need for handlizing a klass if static method
1919
1920 int klass_slot_offset = 0;
1921 int klass_offset = -1;
1922 int lock_slot_offset = 0;
1923 bool is_static = false;
1924
1925 if (method->is_static()) {
1926 klass_slot_offset = stack_slots;
1927 stack_slots += VMRegImpl::slots_per_word;
1928 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1929 is_static = true;
1930 }
1931
1932 // Plus a lock if needed
1933
1934 if (method->is_synchronized()) {
1935 lock_slot_offset = stack_slots;
1936 stack_slots += VMRegImpl::slots_per_word;
1937 }
1938
1939 // Now a place (+2) to save return values or temp during shuffling
1940 // + 4 for return address (which we own) and saved rbp
1941 stack_slots += 6;
1942
1943 // Ok The space we have allocated will look like:
1944 //
1945 //
1946 // FP-> | |
1947 // |---------------------|
1948 // | 2 slots for moves |
1949 // |---------------------|
1950 // | lock box (if sync) |
1951 // |---------------------| <- lock_slot_offset
1952 // | klass (if static) |
1953 // |---------------------| <- klass_slot_offset
1954 // | oopHandle area |
1955 // |---------------------| <- oop_handle_offset (6 java arg registers)
1956 // | outbound memory |
1957 // | based arguments |
1958 // | |
1959 // |---------------------|
1960 // | |
1961 // SP-> | out_preserved_slots |
1962 //
1963 //
1964
1965
1966 // Now compute actual number of stack words we need rounding to make
1967 // stack properly aligned.
1968 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1969
1970 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1971
1972 // First thing make an ic check to see if we should even be here
1973
1974 // We are free to use all registers as temps without saving them and
1975 // restoring them except rbp. rbp is the only callee save register
1976 // as far as the interpreter and the compiler(s) are concerned.
1977
1978
1979 const Register ic_reg = rax;
1980 const Register receiver = j_rarg0;
1981
1982 Label hit;
1983 Label exception_pending;
1984
1985 assert_different_registers(ic_reg, receiver, rscratch1);
1986 __ verify_oop(receiver);
1987 __ load_klass(rscratch1, receiver);
1988 __ cmpq(ic_reg, rscratch1);
1989 __ jcc(Assembler::equal, hit);
1990
1991 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1992
1993 // Verified entry point must be aligned
1994 __ align(8);
1995
1996 __ bind(hit);
1997
1998 int vep_offset = ((intptr_t)__ pc()) - start;
1999
2000 // The instruction at the verified entry point must be 5 bytes or longer
2001 // because it can be patched on the fly by make_non_entrant. The stack bang
2002 // instruction fits that requirement.
2003
2004 // Generate stack overflow check
2005
2006 if (UseStackBanging) {
2007 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2008 } else {
2009 // need a 5 byte instruction to allow MT safe patching to non-entrant
2010 __ fat_nop();
2011 }
2012
2013 // Generate a new frame for the wrapper.
2014 __ enter();
2015 // -2 because return address is already present and so is saved rbp
2016 __ subptr(rsp, stack_size - 2*wordSize);
2017
2018 // Frame is now completed as far as size and linkage.
2019 int frame_complete = ((intptr_t)__ pc()) - start;
2020
2021 if (UseRTMLocking) {
2022 // Abort RTM transaction before calling JNI
2023 // because critical section will be large and will be
2024 // aborted anyway. Also nmethod could be deoptimized.
2025 __ xabort(0);
2026 }
2027
2028 #ifdef ASSERT
2029 {
2030 Label L;
2031 __ mov(rax, rsp);
2032 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
2033 __ cmpptr(rax, rsp);
2034 __ jcc(Assembler::equal, L);
2035 __ stop("improperly aligned stack");
2036 __ bind(L);
2037 }
2038 #endif /* ASSERT */
2039
2040
2041 // We use r14 as the oop handle for the receiver/klass
2042 // It is callee save so it survives the call to native
2043
2044 const Register oop_handle_reg = r14;
2045
2046 if (is_critical_native) {
2047 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args,
2048 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
2049 }
2050
2051 //
2052 // We immediately shuffle the arguments so that any vm call we have to
2053 // make from here on out (sync slow path, jvmti, etc.) we will have
2054 // captured the oops from our caller and have a valid oopMap for
2055 // them.
2056
2057 // -----------------
2058 // The Grand Shuffle
2059
2060 // The Java calling convention is either equal (linux) or denser (win64) than the
2061 // c calling convention. However the because of the jni_env argument the c calling
2062 // convention always has at least one more (and two for static) arguments than Java.
2063 // Therefore if we move the args from java -> c backwards then we will never have
2064 // a register->register conflict and we don't have to build a dependency graph
2065 // and figure out how to break any cycles.
2066 //
2067
2068 // Record esp-based slot for receiver on stack for non-static methods
2069 int receiver_offset = -1;
2070
2071 // This is a trick. We double the stack slots so we can claim
2072 // the oops in the caller's frame. Since we are sure to have
2073 // more args than the caller doubling is enough to make
2074 // sure we can capture all the incoming oop args from the
2075 // caller.
2076 //
2077 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2078
2079 // Mark location of rbp (someday)
2080 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
2081
2082 // Use eax, ebx as temporaries during any memory-memory moves we have to do
2083 // All inbound args are referenced based on rbp and all outbound args via rsp.
2084
2085
2086 #ifdef ASSERT
2087 bool reg_destroyed[RegisterImpl::number_of_registers];
2088 bool freg_destroyed[XMMRegisterImpl::number_of_registers];
2089 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2090 reg_destroyed[r] = false;
2091 }
2092 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
2093 freg_destroyed[f] = false;
2094 }
2095
2096 #endif /* ASSERT */
2097
2098 // This may iterate in two different directions depending on the
2099 // kind of native it is. The reason is that for regular JNI natives
2100 // the incoming and outgoing registers are offset upwards and for
2101 // critical natives they are offset down.
2102 GrowableArray<int> arg_order(2 * total_in_args);
2103 VMRegPair tmp_vmreg;
2104 tmp_vmreg.set2(rbx->as_VMReg());
2105
2106 if (!is_critical_native) {
2107 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2108 arg_order.push(i);
2109 arg_order.push(c_arg);
2110 }
2111 } else {
2112 // Compute a valid move order, using tmp_vmreg to break any cycles
2113 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
2114 }
2115
2116 int temploc = -1;
2117 for (int ai = 0; ai < arg_order.length(); ai += 2) {
2118 int i = arg_order.at(ai);
2119 int c_arg = arg_order.at(ai + 1);
2120 __ block_comment(err_msg("move %d -> %d", i, c_arg));
2121 if (c_arg == -1) {
2122 assert(is_critical_native, "should only be required for critical natives");
2123 // This arg needs to be moved to a temporary
2124 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2125 in_regs[i] = tmp_vmreg;
2126 temploc = i;
2127 continue;
2128 } else if (i == -1) {
2129 assert(is_critical_native, "should only be required for critical natives");
2130 // Read from the temporary location
2131 assert(temploc != -1, "must be valid");
2132 i = temploc;
2133 temploc = -1;
2134 }
2135 #ifdef ASSERT
2136 if (in_regs[i].first()->is_Register()) {
2137 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
2138 } else if (in_regs[i].first()->is_XMMRegister()) {
2139 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
2140 }
2141 if (out_regs[c_arg].first()->is_Register()) {
2142 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2143 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2144 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2145 }
2146 #endif /* ASSERT */
2147 switch (in_sig_bt[i]) {
2148 case T_ARRAY:
2149 if (is_critical_native) {
2150 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2151 c_arg++;
2152 #ifdef ASSERT
2153 if (out_regs[c_arg].first()->is_Register()) {
2154 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2155 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2156 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2157 }
2158 #endif
2159 break;
2160 }
2161 case T_OBJECT:
2162 assert(!is_critical_native, "no oop arguments");
2163 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2164 ((i == 0) && (!is_static)),
2165 &receiver_offset);
2166 break;
2167 case T_VOID:
2168 break;
2169
2170 case T_FLOAT:
2171 float_move(masm, in_regs[i], out_regs[c_arg]);
2172 break;
2173
2174 case T_DOUBLE:
2175 assert( i + 1 < total_in_args &&
2176 in_sig_bt[i + 1] == T_VOID &&
2177 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
2178 double_move(masm, in_regs[i], out_regs[c_arg]);
2179 break;
2180
2181 case T_LONG :
2182 long_move(masm, in_regs[i], out_regs[c_arg]);
2183 break;
2184
2185 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2186
2187 default:
2188 move32_64(masm, in_regs[i], out_regs[c_arg]);
2189 }
2190 }
2191
2192 int c_arg;
2193
2194 // Pre-load a static method's oop into r14. Used both by locking code and
2195 // the normal JNI call code.
2196 if (!is_critical_native) {
2197 // point c_arg at the first arg that is already loaded in case we
2198 // need to spill before we call out
2199 c_arg = total_c_args - total_in_args;
2200
2201 if (method->is_static()) {
2202
2203 // load oop into a register
2204 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
2205
2206 // Now handlize the static class mirror it's known not-null.
2207 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
2208 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2209
2210 // Now get the handle
2211 __ lea(oop_handle_reg, Address(rsp, klass_offset));
2212 // store the klass handle as second argument
2213 __ movptr(c_rarg1, oop_handle_reg);
2214 // and protect the arg if we must spill
2215 c_arg--;
2216 }
2217 } else {
2218 // For JNI critical methods we need to save all registers in save_args.
2219 c_arg = 0;
2220 }
2221
2222 // Change state to native (we save the return address in the thread, since it might not
2223 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
2224 // points into the right code segment. It does not have to be the correct return pc.
2225 // We use the same pc/oopMap repeatedly when we call out
2226
2227 intptr_t the_pc = (intptr_t) __ pc();
2228 oop_maps->add_gc_map(the_pc - start, map);
2229
2230 __ set_last_Java_frame(rsp, noreg, (address)the_pc);
2231
2232
2233 // We have all of the arguments setup at this point. We must not touch any register
2234 // argument registers at this point (what if we save/restore them there are no oop?
2235
2236 {
2237 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2238 // protect the args we've loaded
2239 save_args(masm, total_c_args, c_arg, out_regs);
2240 __ mov_metadata(c_rarg1, method());
2241 __ call_VM_leaf(
2242 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2243 r15_thread, c_rarg1);
2244 restore_args(masm, total_c_args, c_arg, out_regs);
2245 }
2246
2247 // RedefineClasses() tracing support for obsolete method entry
2248 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2249 // protect the args we've loaded
2250 save_args(masm, total_c_args, c_arg, out_regs);
2251 __ mov_metadata(c_rarg1, method());
2252 __ call_VM_leaf(
2253 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2254 r15_thread, c_rarg1);
2255 restore_args(masm, total_c_args, c_arg, out_regs);
2256 }
2257
2258 // Lock a synchronized method
2259
2260 // Register definitions used by locking and unlocking
2261
2262 const Register swap_reg = rax; // Must use rax for cmpxchg instruction
2263 const Register obj_reg = rbx; // Will contain the oop
2264 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
2265 const Register old_hdr = r13; // value of old header at unlock time
2266
2267 Label slow_path_lock;
2268 Label lock_done;
2269
2270 if (method->is_synchronized()) {
2271 assert(!is_critical_native, "unhandled");
2272
2273
2274 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2275
2276 // Get the handle (the 2nd argument)
2277 __ mov(oop_handle_reg, c_rarg1);
2278
2279 // Get address of the box
2280
2281 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2282
2283 // Load the oop from the handle
2284 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2285
2286 if (UseBiasedLocking) {
2287 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
2288 }
2289
2290 // Load immediate 1 into swap_reg %rax
2291 __ movl(swap_reg, 1);
2292
2293 // Load (object->mark() | 1) into swap_reg %rax
2294 __ orptr(swap_reg, Address(obj_reg, 0));
2295
2296 // Save (object->mark() | 1) into BasicLock's displaced header
2297 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2298
2299 if (os::is_MP()) {
2300 __ lock();
2301 }
2302
2303 // src -> dest iff dest == rax else rax <- dest
2304 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
2305 __ jcc(Assembler::equal, lock_done);
2306
2307 // Hmm should this move to the slow path code area???
2308
2309 // Test if the oopMark is an obvious stack pointer, i.e.,
2310 // 1) (mark & 3) == 0, and
2311 // 2) rsp <= mark < mark + os::pagesize()
2312 // These 3 tests can be done by evaluating the following
2313 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2314 // assuming both stack pointer and pagesize have their
2315 // least significant 2 bits clear.
2316 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
2317
2318 __ subptr(swap_reg, rsp);
2319 __ andptr(swap_reg, 3 - os::vm_page_size());
2320
2321 // Save the test result, for recursive case, the result is zero
2322 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2323 __ jcc(Assembler::notEqual, slow_path_lock);
2324
2325 // Slow path will re-enter here
2326
2327 __ bind(lock_done);
2328 }
2329
2330
2331 // Finally just about ready to make the JNI call
2332
2333
2334 // get JNIEnv* which is first argument to native
2335 if (!is_critical_native) {
2336 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
2337 }
2338
2339 // Now set thread in native
2340 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
2341
2342 __ call(RuntimeAddress(native_func));
2343
2344 // Verify or restore cpu control state after JNI call
2345 __ restore_cpu_control_state_after_jni();
2346
2347 // Unpack native results.
2348 switch (ret_type) {
2349 case T_BOOLEAN: __ c2bool(rax); break;
2350 case T_CHAR : __ movzwl(rax, rax); break;
2351 case T_BYTE : __ sign_extend_byte (rax); break;
2352 case T_SHORT : __ sign_extend_short(rax); break;
2353 case T_INT : /* nothing to do */ break;
2354 case T_DOUBLE :
2355 case T_FLOAT :
2356 // Result is in xmm0 we'll save as needed
2357 break;
2358 case T_ARRAY: // Really a handle
2359 case T_OBJECT: // Really a handle
2360 break; // can't de-handlize until after safepoint check
2361 case T_VOID: break;
2362 case T_LONG: break;
2363 default : ShouldNotReachHere();
2364 }
2365
2366 // Switch thread to "native transition" state before reading the synchronization state.
2367 // This additional state is necessary because reading and testing the synchronization
2368 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2369 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2370 // VM thread changes sync state to synchronizing and suspends threads for GC.
2371 // Thread A is resumed to finish this native method, but doesn't block here since it
2372 // didn't see any synchronization is progress, and escapes.
2373 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2374
2375 if(os::is_MP()) {
2376 if (UseMembar) {
2377 // Force this write out before the read below
2378 __ membar(Assembler::Membar_mask_bits(
2379 Assembler::LoadLoad | Assembler::LoadStore |
2380 Assembler::StoreLoad | Assembler::StoreStore));
2381 } else {
2382 // Write serialization page so VM thread can do a pseudo remote membar.
2383 // We use the current thread pointer to calculate a thread specific
2384 // offset to write to within the page. This minimizes bus traffic
2385 // due to cache line collision.
2386 __ serialize_memory(r15_thread, rcx);
2387 }
2388 }
2389
2390 Label after_transition;
2391
2392 // check for safepoint operation in progress and/or pending suspend requests
2393 {
2394 Label Continue;
2395
2396 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2397 SafepointSynchronize::_not_synchronized);
2398
2399 Label L;
2400 __ jcc(Assembler::notEqual, L);
2401 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
2402 __ jcc(Assembler::equal, Continue);
2403 __ bind(L);
2404
2405 // Don't use call_VM as it will see a possible pending exception and forward it
2406 // and never return here preventing us from clearing _last_native_pc down below.
2407 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2408 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2409 // by hand.
2410 //
2411 save_native_result(masm, ret_type, stack_slots);
2412 __ mov(c_rarg0, r15_thread);
2413 __ mov(r12, rsp); // remember sp
2414 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2415 __ andptr(rsp, -16); // align stack as required by ABI
2416 if (!is_critical_native) {
2417 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2418 } else {
2419 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
2420 }
2421 __ mov(rsp, r12); // restore sp
2422 __ reinit_heapbase();
2423 // Restore any method result value
2424 restore_native_result(masm, ret_type, stack_slots);
2425
2426 if (is_critical_native) {
2427 // The call above performed the transition to thread_in_Java so
2428 // skip the transition logic below.
2429 __ jmpb(after_transition);
2430 }
2431
2432 __ bind(Continue);
2433 }
2434
2435 // change thread state
2436 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
2437 __ bind(after_transition);
2438
2439 Label reguard;
2440 Label reguard_done;
2441 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
2442 __ jcc(Assembler::equal, reguard);
2443 __ bind(reguard_done);
2444
2445 // native result if any is live
2446
2447 // Unlock
2448 Label unlock_done;
2449 Label slow_path_unlock;
2450 if (method->is_synchronized()) {
2451
2452 // Get locked oop from the handle we passed to jni
2453 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2454
2455 Label done;
2456
2457 if (UseBiasedLocking) {
2458 __ biased_locking_exit(obj_reg, old_hdr, done);
2459 }
2460
2461 // Simple recursive lock?
2462
2463 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
2464 __ jcc(Assembler::equal, done);
2465
2466 // Must save rax if if it is live now because cmpxchg must use it
2467 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2468 save_native_result(masm, ret_type, stack_slots);
2469 }
2470
2471
2472 // get address of the stack lock
2473 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2474 // get old displaced header
2475 __ movptr(old_hdr, Address(rax, 0));
2476
2477 // Atomic swap old header if oop still contains the stack lock
2478 if (os::is_MP()) {
2479 __ lock();
2480 }
2481 __ cmpxchgptr(old_hdr, Address(obj_reg, 0));
2482 __ jcc(Assembler::notEqual, slow_path_unlock);
2483
2484 // slow path re-enters here
2485 __ bind(unlock_done);
2486 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2487 restore_native_result(masm, ret_type, stack_slots);
2488 }
2489
2490 __ bind(done);
2491
2492 }
2493 {
2494 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2495 save_native_result(masm, ret_type, stack_slots);
2496 __ mov_metadata(c_rarg1, method());
2497 __ call_VM_leaf(
2498 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2499 r15_thread, c_rarg1);
2500 restore_native_result(masm, ret_type, stack_slots);
2501 }
2502
2503 __ reset_last_Java_frame(false);
2504
2505 // Unbox oop result, e.g. JNIHandles::resolve value.
2506 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2507 __ resolve_jobject(rax /* value */,
2508 r15_thread /* thread */,
2509 rcx /* tmp */);
2510 }
2511
2512 if (!is_critical_native) {
2513 // reset handle block
2514 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
2515 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
2516 }
2517
2518 // pop our frame
2519
2520 __ leave();
2521
2522 if (!is_critical_native) {
2523 // Any exception pending?
2524 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2525 __ jcc(Assembler::notEqual, exception_pending);
2526 }
2527
2528 // Return
2529
2530 __ ret(0);
2531
2532 // Unexpected paths are out of line and go here
2533
2534 if (!is_critical_native) {
2535 // forward the exception
2536 __ bind(exception_pending);
2537
2538 // and forward the exception
2539 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2540 }
2541
2542 // Slow path locking & unlocking
2543 if (method->is_synchronized()) {
2544
2545 // BEGIN Slow path lock
2546 __ bind(slow_path_lock);
2547
2548 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2549 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2550
2551 // protect the args we've loaded
2552 save_args(masm, total_c_args, c_arg, out_regs);
2553
2554 __ mov(c_rarg0, obj_reg);
2555 __ mov(c_rarg1, lock_reg);
2556 __ mov(c_rarg2, r15_thread);
2557
2558 // Not a leaf but we have last_Java_frame setup as we want
2559 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2560 restore_args(masm, total_c_args, c_arg, out_regs);
2561
2562 #ifdef ASSERT
2563 { Label L;
2564 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2565 __ jcc(Assembler::equal, L);
2566 __ stop("no pending exception allowed on exit from monitorenter");
2567 __ bind(L);
2568 }
2569 #endif
2570 __ jmp(lock_done);
2571
2572 // END Slow path lock
2573
2574 // BEGIN Slow path unlock
2575 __ bind(slow_path_unlock);
2576
2577 // If we haven't already saved the native result we must save it now as xmm registers
2578 // are still exposed.
2579
2580 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2581 save_native_result(masm, ret_type, stack_slots);
2582 }
2583
2584 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2585
2586 __ mov(c_rarg0, obj_reg);
2587 __ mov(r12, rsp); // remember sp
2588 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2589 __ andptr(rsp, -16); // align stack as required by ABI
2590
2591 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2592 // NOTE that obj_reg == rbx currently
2593 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
2594 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2595
2596 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2597 __ mov(rsp, r12); // restore sp
2598 __ reinit_heapbase();
2599 #ifdef ASSERT
2600 {
2601 Label L;
2602 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2603 __ jcc(Assembler::equal, L);
2604 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2605 __ bind(L);
2606 }
2607 #endif /* ASSERT */
2608
2609 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
2610
2611 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2612 restore_native_result(masm, ret_type, stack_slots);
2613 }
2614 __ jmp(unlock_done);
2615
2616 // END Slow path unlock
2617
2618 } // synchronized
2619
2620 // SLOW PATH Reguard the stack if needed
2621
2622 __ bind(reguard);
2623 save_native_result(masm, ret_type, stack_slots);
2624 __ mov(r12, rsp); // remember sp
2625 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2626 __ andptr(rsp, -16); // align stack as required by ABI
2627 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2628 __ mov(rsp, r12); // restore sp
2629 __ reinit_heapbase();
2630 restore_native_result(masm, ret_type, stack_slots);
2631 // and continue
2632 __ jmp(reguard_done);
2633
2634
2635
2636 __ flush();
2637
2638 nmethod *nm = nmethod::new_native_nmethod(method,
2639 compile_id,
2640 masm->code(),
2641 vep_offset,
2642 frame_complete,
2643 stack_slots / VMRegImpl::slots_per_word,
2644 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2645 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2646 oop_maps);
2647
2648 if (is_critical_native) {
2649 nm->set_lazy_critical_native(true);
2650 }
2651
2652 return nm;
2653
2654 }
2655
2656 #ifdef HAVE_DTRACE_H
2657 // ---------------------------------------------------------------------------
2658 // Generate a dtrace nmethod for a given signature. The method takes arguments
2659 // in the Java compiled code convention, marshals them to the native
2660 // abi and then leaves nops at the position you would expect to call a native
2661 // function. When the probe is enabled the nops are replaced with a trap
2662 // instruction that dtrace inserts and the trace will cause a notification
2663 // to dtrace.
2664 //
2665 // The probes are only able to take primitive types and java/lang/String as
2666 // arguments. No other java types are allowed. Strings are converted to utf8
2667 // strings so that from dtrace point of view java strings are converted to C
2668 // strings. There is an arbitrary fixed limit on the total space that a method
2669 // can use for converting the strings. (256 chars per string in the signature).
2670 // So any java string larger then this is truncated.
2671
2672 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 };
2673 static bool offsets_initialized = false;
2674
2675
generate_dtrace_nmethod(MacroAssembler * masm,methodHandle method)2676 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm,
2677 methodHandle method) {
2678
2679
2680 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
2681 // be single threaded in this method.
2682 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
2683
2684 if (!offsets_initialized) {
2685 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize;
2686 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize;
2687 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize;
2688 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize;
2689 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize;
2690 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize;
2691
2692 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize;
2693 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize;
2694 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize;
2695 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize;
2696 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize;
2697 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize;
2698 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize;
2699 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize;
2700
2701 offsets_initialized = true;
2702 }
2703 // Fill in the signature array, for the calling-convention call.
2704 int total_args_passed = method->size_of_parameters();
2705
2706 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
2707 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
2708
2709 // The signature we are going to use for the trap that dtrace will see
2710 // java/lang/String is converted. We drop "this" and any other object
2711 // is converted to NULL. (A one-slot java/lang/Long object reference
2712 // is converted to a two-slot long, which is why we double the allocation).
2713 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
2714 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
2715
2716 int i=0;
2717 int total_strings = 0;
2718 int first_arg_to_pass = 0;
2719 int total_c_args = 0;
2720
2721 // Skip the receiver as dtrace doesn't want to see it
2722 if( !method->is_static() ) {
2723 in_sig_bt[i++] = T_OBJECT;
2724 first_arg_to_pass = 1;
2725 }
2726
2727 // We need to convert the java args to where a native (non-jni) function
2728 // would expect them. To figure out where they go we convert the java
2729 // signature to a C signature.
2730
2731 SignatureStream ss(method->signature());
2732 for ( ; !ss.at_return_type(); ss.next()) {
2733 BasicType bt = ss.type();
2734 in_sig_bt[i++] = bt; // Collect remaining bits of signature
2735 out_sig_bt[total_c_args++] = bt;
2736 if( bt == T_OBJECT) {
2737 Symbol* s = ss.as_symbol_or_null(); // symbol is created
2738 if (s == vmSymbols::java_lang_String()) {
2739 total_strings++;
2740 out_sig_bt[total_c_args-1] = T_ADDRESS;
2741 } else if (s == vmSymbols::java_lang_Boolean() ||
2742 s == vmSymbols::java_lang_Character() ||
2743 s == vmSymbols::java_lang_Byte() ||
2744 s == vmSymbols::java_lang_Short() ||
2745 s == vmSymbols::java_lang_Integer() ||
2746 s == vmSymbols::java_lang_Float()) {
2747 out_sig_bt[total_c_args-1] = T_INT;
2748 } else if (s == vmSymbols::java_lang_Long() ||
2749 s == vmSymbols::java_lang_Double()) {
2750 out_sig_bt[total_c_args-1] = T_LONG;
2751 out_sig_bt[total_c_args++] = T_VOID;
2752 }
2753 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
2754 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
2755 // We convert double to long
2756 out_sig_bt[total_c_args-1] = T_LONG;
2757 out_sig_bt[total_c_args++] = T_VOID;
2758 } else if ( bt == T_FLOAT) {
2759 // We convert float to int
2760 out_sig_bt[total_c_args-1] = T_INT;
2761 }
2762 }
2763
2764 assert(i==total_args_passed, "validly parsed signature");
2765
2766 // Now get the compiled-Java layout as input arguments
2767 int comp_args_on_stack;
2768 comp_args_on_stack = SharedRuntime::java_calling_convention(
2769 in_sig_bt, in_regs, total_args_passed, false);
2770
2771 // Now figure out where the args must be stored and how much stack space
2772 // they require (neglecting out_preserve_stack_slots but space for storing
2773 // the 1st six register arguments). It's weird see int_stk_helper.
2774
2775 int out_arg_slots;
2776 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
2777
2778 // Calculate the total number of stack slots we will need.
2779
2780 // First count the abi requirement plus all of the outgoing args
2781 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2782
2783 // Now space for the string(s) we must convert
2784 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2785 for (i = 0; i < total_strings ; i++) {
2786 string_locs[i] = stack_slots;
2787 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2788 }
2789
2790 // Plus the temps we might need to juggle register args
2791 // regs take two slots each
2792 stack_slots += (Argument::n_int_register_parameters_c +
2793 Argument::n_float_register_parameters_c) * 2;
2794
2795
2796 // + 4 for return address (which we own) and saved rbp,
2797
2798 stack_slots += 4;
2799
2800 // Ok The space we have allocated will look like:
2801 //
2802 //
2803 // FP-> | |
2804 // |---------------------|
2805 // | string[n] |
2806 // |---------------------| <- string_locs[n]
2807 // | string[n-1] |
2808 // |---------------------| <- string_locs[n-1]
2809 // | ... |
2810 // | ... |
2811 // |---------------------| <- string_locs[1]
2812 // | string[0] |
2813 // |---------------------| <- string_locs[0]
2814 // | outbound memory |
2815 // | based arguments |
2816 // | |
2817 // |---------------------|
2818 // | |
2819 // SP-> | out_preserved_slots |
2820 //
2821 //
2822
2823 // Now compute actual number of stack words we need rounding to make
2824 // stack properly aligned.
2825 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word);
2826
2827 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2828
2829 intptr_t start = (intptr_t)__ pc();
2830
2831 // First thing make an ic check to see if we should even be here
2832
2833 // We are free to use all registers as temps without saving them and
2834 // restoring them except rbp. rbp, is the only callee save register
2835 // as far as the interpreter and the compiler(s) are concerned.
2836
2837 const Register ic_reg = rax;
2838 const Register receiver = rcx;
2839 Label hit;
2840 Label exception_pending;
2841
2842
2843 __ verify_oop(receiver);
2844 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2845 __ jcc(Assembler::equal, hit);
2846
2847 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2848
2849 // verified entry must be aligned for code patching.
2850 // and the first 5 bytes must be in the same cache line
2851 // if we align at 8 then we will be sure 5 bytes are in the same line
2852 __ align(8);
2853
2854 __ bind(hit);
2855
2856 int vep_offset = ((intptr_t)__ pc()) - start;
2857
2858
2859 // The instruction at the verified entry point must be 5 bytes or longer
2860 // because it can be patched on the fly by make_non_entrant. The stack bang
2861 // instruction fits that requirement.
2862
2863 // Generate stack overflow check
2864
2865 if (UseStackBanging) {
2866 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2867 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2868 } else {
2869 __ movl(rax, stack_size);
2870 __ bang_stack_size(rax, rbx);
2871 }
2872 } else {
2873 // need a 5 byte instruction to allow MT safe patching to non-entrant
2874 __ fat_nop();
2875 }
2876
2877 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5,
2878 "valid size for make_non_entrant");
2879
2880 // Generate a new frame for the wrapper.
2881 __ enter();
2882
2883 // -4 because return address is already present and so is saved rbp,
2884 if (stack_size - 2*wordSize != 0) {
2885 __ subq(rsp, stack_size - 2*wordSize);
2886 }
2887
2888 // Frame is now completed as far a size and linkage.
2889
2890 int frame_complete = ((intptr_t)__ pc()) - start;
2891
2892 int c_arg, j_arg;
2893
2894 // State of input register args
2895
2896 bool live[ConcreteRegisterImpl::number_of_registers];
2897
2898 live[j_rarg0->as_VMReg()->value()] = false;
2899 live[j_rarg1->as_VMReg()->value()] = false;
2900 live[j_rarg2->as_VMReg()->value()] = false;
2901 live[j_rarg3->as_VMReg()->value()] = false;
2902 live[j_rarg4->as_VMReg()->value()] = false;
2903 live[j_rarg5->as_VMReg()->value()] = false;
2904
2905 live[j_farg0->as_VMReg()->value()] = false;
2906 live[j_farg1->as_VMReg()->value()] = false;
2907 live[j_farg2->as_VMReg()->value()] = false;
2908 live[j_farg3->as_VMReg()->value()] = false;
2909 live[j_farg4->as_VMReg()->value()] = false;
2910 live[j_farg5->as_VMReg()->value()] = false;
2911 live[j_farg6->as_VMReg()->value()] = false;
2912 live[j_farg7->as_VMReg()->value()] = false;
2913
2914
2915 bool rax_is_zero = false;
2916
2917 // All args (except strings) destined for the stack are moved first
2918 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2919 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2920 VMRegPair src = in_regs[j_arg];
2921 VMRegPair dst = out_regs[c_arg];
2922
2923 // Get the real reg value or a dummy (rsp)
2924
2925 int src_reg = src.first()->is_reg() ?
2926 src.first()->value() :
2927 rsp->as_VMReg()->value();
2928
2929 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
2930 (in_sig_bt[j_arg] == T_OBJECT &&
2931 out_sig_bt[c_arg] != T_INT &&
2932 out_sig_bt[c_arg] != T_ADDRESS &&
2933 out_sig_bt[c_arg] != T_LONG);
2934
2935 live[src_reg] = !useless;
2936
2937 if (dst.first()->is_stack()) {
2938
2939 // Even though a string arg in a register is still live after this loop
2940 // after the string conversion loop (next) it will be dead so we take
2941 // advantage of that now for simpler code to manage live.
2942
2943 live[src_reg] = false;
2944 switch (in_sig_bt[j_arg]) {
2945
2946 case T_ARRAY:
2947 case T_OBJECT:
2948 {
2949 Address stack_dst(rsp, reg2offset_out(dst.first()));
2950
2951 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2952 // need to unbox a one-word value
2953 Register in_reg = rax;
2954 if ( src.first()->is_reg() ) {
2955 in_reg = src.first()->as_Register();
2956 } else {
2957 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
2958 rax_is_zero = false;
2959 }
2960 Label skipUnbox;
2961 __ movptr(Address(rsp, reg2offset_out(dst.first())),
2962 (int32_t)NULL_WORD);
2963 __ testq(in_reg, in_reg);
2964 __ jcc(Assembler::zero, skipUnbox);
2965
2966 BasicType bt = out_sig_bt[c_arg];
2967 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2968 Address src1(in_reg, box_offset);
2969 if ( bt == T_LONG ) {
2970 __ movq(in_reg, src1);
2971 __ movq(stack_dst, in_reg);
2972 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2973 ++c_arg; // skip over T_VOID to keep the loop indices in sync
2974 } else {
2975 __ movl(in_reg, src1);
2976 __ movl(stack_dst, in_reg);
2977 }
2978
2979 __ bind(skipUnbox);
2980 } else if (out_sig_bt[c_arg] != T_ADDRESS) {
2981 // Convert the arg to NULL
2982 if (!rax_is_zero) {
2983 __ xorq(rax, rax);
2984 rax_is_zero = true;
2985 }
2986 __ movq(stack_dst, rax);
2987 }
2988 }
2989 break;
2990
2991 case T_VOID:
2992 break;
2993
2994 case T_FLOAT:
2995 // This does the right thing since we know it is destined for the
2996 // stack
2997 float_move(masm, src, dst);
2998 break;
2999
3000 case T_DOUBLE:
3001 // This does the right thing since we know it is destined for the
3002 // stack
3003 double_move(masm, src, dst);
3004 break;
3005
3006 case T_LONG :
3007 long_move(masm, src, dst);
3008 break;
3009
3010 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
3011
3012 default:
3013 move32_64(masm, src, dst);
3014 }
3015 }
3016
3017 }
3018
3019 // If we have any strings we must store any register based arg to the stack
3020 // This includes any still live xmm registers too.
3021
3022 int sid = 0;
3023
3024 if (total_strings > 0 ) {
3025 for (j_arg = first_arg_to_pass, c_arg = 0 ;
3026 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
3027 VMRegPair src = in_regs[j_arg];
3028 VMRegPair dst = out_regs[c_arg];
3029
3030 if (src.first()->is_reg()) {
3031 Address src_tmp(rbp, fp_offset[src.first()->value()]);
3032
3033 // string oops were left untouched by the previous loop even if the
3034 // eventual (converted) arg is destined for the stack so park them
3035 // away now (except for first)
3036
3037 if (out_sig_bt[c_arg] == T_ADDRESS) {
3038 Address utf8_addr = Address(
3039 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
3040 if (sid != 1) {
3041 // The first string arg won't be killed until after the utf8
3042 // conversion
3043 __ movq(utf8_addr, src.first()->as_Register());
3044 }
3045 } else if (dst.first()->is_reg()) {
3046 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) {
3047
3048 // Convert the xmm register to an int and store it in the reserved
3049 // location for the eventual c register arg
3050 XMMRegister f = src.first()->as_XMMRegister();
3051 if (in_sig_bt[j_arg] == T_FLOAT) {
3052 __ movflt(src_tmp, f);
3053 } else {
3054 __ movdbl(src_tmp, f);
3055 }
3056 } else {
3057 // If the arg is an oop type we don't support don't bother to store
3058 // it remember string was handled above.
3059 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
3060 (in_sig_bt[j_arg] == T_OBJECT &&
3061 out_sig_bt[c_arg] != T_INT &&
3062 out_sig_bt[c_arg] != T_LONG);
3063
3064 if (!useless) {
3065 __ movq(src_tmp, src.first()->as_Register());
3066 }
3067 }
3068 }
3069 }
3070 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
3071 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
3072 ++c_arg; // skip over T_VOID to keep the loop indices in sync
3073 }
3074 }
3075
3076 // Now that the volatile registers are safe, convert all the strings
3077 sid = 0;
3078
3079 for (j_arg = first_arg_to_pass, c_arg = 0 ;
3080 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
3081 if (out_sig_bt[c_arg] == T_ADDRESS) {
3082 // It's a string
3083 Address utf8_addr = Address(
3084 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
3085 // The first string we find might still be in the original java arg
3086 // register
3087
3088 VMReg src = in_regs[j_arg].first();
3089
3090 // We will need to eventually save the final argument to the trap
3091 // in the von-volatile location dedicated to src. This is the offset
3092 // from fp we will use.
3093 int src_off = src->is_reg() ?
3094 fp_offset[src->value()] : reg2offset_in(src);
3095
3096 // This is where the argument will eventually reside
3097 VMRegPair dst = out_regs[c_arg];
3098
3099 if (src->is_reg()) {
3100 if (sid == 1) {
3101 __ movq(c_rarg0, src->as_Register());
3102 } else {
3103 __ movq(c_rarg0, utf8_addr);
3104 }
3105 } else {
3106 // arg is still in the original location
3107 __ movq(c_rarg0, Address(rbp, reg2offset_in(src)));
3108 }
3109 Label done, convert;
3110
3111 // see if the oop is NULL
3112 __ testq(c_rarg0, c_rarg0);
3113 __ jcc(Assembler::notEqual, convert);
3114
3115 if (dst.first()->is_reg()) {
3116 // Save the ptr to utf string in the origina src loc or the tmp
3117 // dedicated to it
3118 __ movq(Address(rbp, src_off), c_rarg0);
3119 } else {
3120 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0);
3121 }
3122 __ jmp(done);
3123
3124 __ bind(convert);
3125
3126 __ lea(c_rarg1, utf8_addr);
3127 if (dst.first()->is_reg()) {
3128 __ movq(Address(rbp, src_off), c_rarg1);
3129 } else {
3130 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1);
3131 }
3132 // And do the conversion
3133 __ call(RuntimeAddress(
3134 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf)));
3135
3136 __ bind(done);
3137 }
3138 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
3139 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
3140 ++c_arg; // skip over T_VOID to keep the loop indices in sync
3141 }
3142 }
3143 // The get_utf call killed all the c_arg registers
3144 live[c_rarg0->as_VMReg()->value()] = false;
3145 live[c_rarg1->as_VMReg()->value()] = false;
3146 live[c_rarg2->as_VMReg()->value()] = false;
3147 live[c_rarg3->as_VMReg()->value()] = false;
3148 live[c_rarg4->as_VMReg()->value()] = false;
3149 live[c_rarg5->as_VMReg()->value()] = false;
3150
3151 live[c_farg0->as_VMReg()->value()] = false;
3152 live[c_farg1->as_VMReg()->value()] = false;
3153 live[c_farg2->as_VMReg()->value()] = false;
3154 live[c_farg3->as_VMReg()->value()] = false;
3155 live[c_farg4->as_VMReg()->value()] = false;
3156 live[c_farg5->as_VMReg()->value()] = false;
3157 live[c_farg6->as_VMReg()->value()] = false;
3158 live[c_farg7->as_VMReg()->value()] = false;
3159 }
3160
3161 // Now we can finally move the register args to their desired locations
3162
3163 rax_is_zero = false;
3164
3165 for (j_arg = first_arg_to_pass, c_arg = 0 ;
3166 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
3167
3168 VMRegPair src = in_regs[j_arg];
3169 VMRegPair dst = out_regs[c_arg];
3170
3171 // Only need to look for args destined for the interger registers (since we
3172 // convert float/double args to look like int/long outbound)
3173 if (dst.first()->is_reg()) {
3174 Register r = dst.first()->as_Register();
3175
3176 // Check if the java arg is unsupported and thereofre useless
3177 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
3178 (in_sig_bt[j_arg] == T_OBJECT &&
3179 out_sig_bt[c_arg] != T_INT &&
3180 out_sig_bt[c_arg] != T_ADDRESS &&
3181 out_sig_bt[c_arg] != T_LONG);
3182
3183
3184 // If we're going to kill an existing arg save it first
3185 if (live[dst.first()->value()]) {
3186 // you can't kill yourself
3187 if (src.first() != dst.first()) {
3188 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r);
3189 }
3190 }
3191 if (src.first()->is_reg()) {
3192 if (live[src.first()->value()] ) {
3193 if (in_sig_bt[j_arg] == T_FLOAT) {
3194 __ movdl(r, src.first()->as_XMMRegister());
3195 } else if (in_sig_bt[j_arg] == T_DOUBLE) {
3196 __ movdq(r, src.first()->as_XMMRegister());
3197 } else if (r != src.first()->as_Register()) {
3198 if (!useless) {
3199 __ movq(r, src.first()->as_Register());
3200 }
3201 }
3202 } else {
3203 // If the arg is an oop type we don't support don't bother to store
3204 // it
3205 if (!useless) {
3206 if (in_sig_bt[j_arg] == T_DOUBLE ||
3207 in_sig_bt[j_arg] == T_LONG ||
3208 in_sig_bt[j_arg] == T_OBJECT ) {
3209 __ movq(r, Address(rbp, fp_offset[src.first()->value()]));
3210 } else {
3211 __ movl(r, Address(rbp, fp_offset[src.first()->value()]));
3212 }
3213 }
3214 }
3215 live[src.first()->value()] = false;
3216 } else if (!useless) {
3217 // full sized move even for int should be ok
3218 __ movq(r, Address(rbp, reg2offset_in(src.first())));
3219 }
3220
3221 // At this point r has the original java arg in the final location
3222 // (assuming it wasn't useless). If the java arg was an oop
3223 // we have a bit more to do
3224
3225 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) {
3226 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
3227 // need to unbox a one-word value
3228 Label skip;
3229 __ testq(r, r);
3230 __ jcc(Assembler::equal, skip);
3231 BasicType bt = out_sig_bt[c_arg];
3232 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
3233 Address src1(r, box_offset);
3234 if ( bt == T_LONG ) {
3235 __ movq(r, src1);
3236 } else {
3237 __ movl(r, src1);
3238 }
3239 __ bind(skip);
3240
3241 } else if (out_sig_bt[c_arg] != T_ADDRESS) {
3242 // Convert the arg to NULL
3243 __ xorq(r, r);
3244 }
3245 }
3246
3247 // dst can longer be holding an input value
3248 live[dst.first()->value()] = false;
3249 }
3250 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
3251 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
3252 ++c_arg; // skip over T_VOID to keep the loop indices in sync
3253 }
3254 }
3255
3256
3257 // Ok now we are done. Need to place the nop that dtrace wants in order to
3258 // patch in the trap
3259 int patch_offset = ((intptr_t)__ pc()) - start;
3260
3261 __ nop();
3262
3263
3264 // Return
3265
3266 __ leave();
3267 __ ret(0);
3268
3269 __ flush();
3270
3271 nmethod *nm = nmethod::new_dtrace_nmethod(
3272 method, masm->code(), vep_offset, patch_offset, frame_complete,
3273 stack_slots / VMRegImpl::slots_per_word);
3274 return nm;
3275
3276 }
3277
3278 #endif // HAVE_DTRACE_H
3279
3280 // this function returns the adjust size (in number of words) to a c2i adapter
3281 // activation for use during deoptimization
last_frame_adjust(int callee_parameters,int callee_locals)3282 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
3283 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
3284 }
3285
3286
out_preserve_stack_slots()3287 uint SharedRuntime::out_preserve_stack_slots() {
3288 return 0;
3289 }
3290
3291 //------------------------------generate_deopt_blob----------------------------
generate_deopt_blob()3292 void SharedRuntime::generate_deopt_blob() {
3293 // Allocate space for the code
3294 ResourceMark rm;
3295 // Setup code generation tools
3296 CodeBuffer buffer("deopt_blob", 2048, 1024);
3297 MacroAssembler* masm = new MacroAssembler(&buffer);
3298 int frame_size_in_words;
3299 OopMap* map = NULL;
3300 OopMapSet *oop_maps = new OopMapSet();
3301
3302 // -------------
3303 // This code enters when returning to a de-optimized nmethod. A return
3304 // address has been pushed on the the stack, and return values are in
3305 // registers.
3306 // If we are doing a normal deopt then we were called from the patched
3307 // nmethod from the point we returned to the nmethod. So the return
3308 // address on the stack is wrong by NativeCall::instruction_size
3309 // We will adjust the value so it looks like we have the original return
3310 // address on the stack (like when we eagerly deoptimized).
3311 // In the case of an exception pending when deoptimizing, we enter
3312 // with a return address on the stack that points after the call we patched
3313 // into the exception handler. We have the following register state from,
3314 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
3315 // rax: exception oop
3316 // rbx: exception handler
3317 // rdx: throwing pc
3318 // So in this case we simply jam rdx into the useless return address and
3319 // the stack looks just like we want.
3320 //
3321 // At this point we need to de-opt. We save the argument return
3322 // registers. We call the first C routine, fetch_unroll_info(). This
3323 // routine captures the return values and returns a structure which
3324 // describes the current frame size and the sizes of all replacement frames.
3325 // The current frame is compiled code and may contain many inlined
3326 // functions, each with their own JVM state. We pop the current frame, then
3327 // push all the new frames. Then we call the C routine unpack_frames() to
3328 // populate these frames. Finally unpack_frames() returns us the new target
3329 // address. Notice that callee-save registers are BLOWN here; they have
3330 // already been captured in the vframeArray at the time the return PC was
3331 // patched.
3332 address start = __ pc();
3333 Label cont;
3334
3335 // Prolog for non exception case!
3336
3337 // Save everything in sight.
3338 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3339
3340 // Normal deoptimization. Save exec mode for unpack_frames.
3341 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
3342 __ jmp(cont);
3343
3344 int reexecute_offset = __ pc() - start;
3345
3346 // Reexecute case
3347 // return address is the pc describes what bci to do re-execute at
3348
3349 // No need to update map as each call to save_live_registers will produce identical oopmap
3350 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3351
3352 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
3353 __ jmp(cont);
3354
3355 int exception_offset = __ pc() - start;
3356
3357 // Prolog for exception case
3358
3359 // all registers are dead at this entry point, except for rax, and
3360 // rdx which contain the exception oop and exception pc
3361 // respectively. Set them in TLS and fall thru to the
3362 // unpack_with_exception_in_tls entry point.
3363
3364 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3365 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
3366
3367 int exception_in_tls_offset = __ pc() - start;
3368
3369 // new implementation because exception oop is now passed in JavaThread
3370
3371 // Prolog for exception case
3372 // All registers must be preserved because they might be used by LinearScan
3373 // Exceptiop oop and throwing PC are passed in JavaThread
3374 // tos: stack at point of call to method that threw the exception (i.e. only
3375 // args are on the stack, no return address)
3376
3377 // make room on stack for the return address
3378 // It will be patched later with the throwing pc. The correct value is not
3379 // available now because loading it from memory would destroy registers.
3380 __ push(0);
3381
3382 // Save everything in sight.
3383 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3384
3385 // Now it is safe to overwrite any register
3386
3387 // Deopt during an exception. Save exec mode for unpack_frames.
3388 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
3389
3390 // load throwing pc from JavaThread and patch it as the return address
3391 // of the current frame. Then clear the field in JavaThread
3392
3393 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3394 __ movptr(Address(rbp, wordSize), rdx);
3395 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
3396
3397 #ifdef ASSERT
3398 // verify that there is really an exception oop in JavaThread
3399 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3400 __ verify_oop(rax);
3401
3402 // verify that there is no pending exception
3403 Label no_pending_exception;
3404 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3405 __ testptr(rax, rax);
3406 __ jcc(Assembler::zero, no_pending_exception);
3407 __ stop("must not have pending exception here");
3408 __ bind(no_pending_exception);
3409 #endif
3410
3411 __ bind(cont);
3412
3413 // Call C code. Need thread and this frame, but NOT official VM entry
3414 // crud. We cannot block on this call, no GC can happen.
3415 //
3416 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
3417
3418 // fetch_unroll_info needs to call last_java_frame().
3419
3420 __ set_last_Java_frame(noreg, noreg, NULL);
3421 #ifdef ASSERT
3422 { Label L;
3423 __ cmpptr(Address(r15_thread,
3424 JavaThread::last_Java_fp_offset()),
3425 (int32_t)0);
3426 __ jcc(Assembler::equal, L);
3427 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
3428 __ bind(L);
3429 }
3430 #endif // ASSERT
3431 __ mov(c_rarg0, r15_thread);
3432 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
3433
3434 // Need to have an oopmap that tells fetch_unroll_info where to
3435 // find any register it might need.
3436 oop_maps->add_gc_map(__ pc() - start, map);
3437
3438 __ reset_last_Java_frame(false);
3439
3440 // Load UnrollBlock* into rdi
3441 __ mov(rdi, rax);
3442
3443 Label noException;
3444 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending?
3445 __ jcc(Assembler::notEqual, noException);
3446 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3447 // QQQ this is useless it was NULL above
3448 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3449 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
3450 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
3451
3452 __ verify_oop(rax);
3453
3454 // Overwrite the result registers with the exception results.
3455 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3456 // I think this is useless
3457 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
3458
3459 __ bind(noException);
3460
3461 // Only register save data is on the stack.
3462 // Now restore the result registers. Everything else is either dead
3463 // or captured in the vframeArray.
3464 RegisterSaver::restore_result_registers(masm);
3465
3466 // All of the register save area has been popped of the stack. Only the
3467 // return address remains.
3468
3469 // Pop all the frames we must move/replace.
3470 //
3471 // Frame picture (youngest to oldest)
3472 // 1: self-frame (no frame link)
3473 // 2: deopting frame (no frame link)
3474 // 3: caller of deopting frame (could be compiled/interpreted).
3475 //
3476 // Note: by leaving the return address of self-frame on the stack
3477 // and using the size of frame 2 to adjust the stack
3478 // when we are done the return to frame 3 will still be on the stack.
3479
3480 // Pop deoptimized frame
3481 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3482 __ addptr(rsp, rcx);
3483
3484 // rsp should be pointing at the return address to the caller (3)
3485
3486 // Pick up the initial fp we should save
3487 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3488 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3489
3490 #ifdef ASSERT
3491 // Compilers generate code that bang the stack by as much as the
3492 // interpreter would need. So this stack banging should never
3493 // trigger a fault. Verify that it does not on non product builds.
3494 if (UseStackBanging) {
3495 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3496 __ bang_stack_size(rbx, rcx);
3497 }
3498 #endif
3499
3500 // Load address of array of frame pcs into rcx
3501 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3502
3503 // Trash the old pc
3504 __ addptr(rsp, wordSize);
3505
3506 // Load address of array of frame sizes into rsi
3507 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3508
3509 // Load counter into rdx
3510 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3511
3512 // Now adjust the caller's stack to make up for the extra locals
3513 // but record the original sp so that we can save it in the skeletal interpreter
3514 // frame and the stack walking of interpreter_sender will get the unextended sp
3515 // value and not the "real" sp value.
3516
3517 const Register sender_sp = r8;
3518
3519 __ mov(sender_sp, rsp);
3520 __ movl(rbx, Address(rdi,
3521 Deoptimization::UnrollBlock::
3522 caller_adjustment_offset_in_bytes()));
3523 __ subptr(rsp, rbx);
3524
3525 // Push interpreter frames in a loop
3526 Label loop;
3527 __ bind(loop);
3528 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3529 #ifdef CC_INTERP
3530 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
3531 #ifdef ASSERT
3532 __ push(0xDEADDEAD); // Make a recognizable pattern
3533 __ push(0xDEADDEAD);
3534 #else /* ASSERT */
3535 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
3536 #endif /* ASSERT */
3537 #else
3538 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand
3539 #endif // CC_INTERP
3540 __ pushptr(Address(rcx, 0)); // Save return address
3541 __ enter(); // Save old & set new ebp
3542 __ subptr(rsp, rbx); // Prolog
3543 #ifdef CC_INTERP
3544 __ movptr(Address(rbp,
3545 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3546 sender_sp); // Make it walkable
3547 #else /* CC_INTERP */
3548 // This value is corrected by layout_activation_impl
3549 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3550 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
3551 #endif /* CC_INTERP */
3552 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3553 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3554 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3555 __ decrementl(rdx); // Decrement counter
3556 __ jcc(Assembler::notZero, loop);
3557 __ pushptr(Address(rcx, 0)); // Save final return address
3558
3559 // Re-push self-frame
3560 __ enter(); // Save old & set new ebp
3561
3562 // Allocate a full sized register save area.
3563 // Return address and rbp are in place, so we allocate two less words.
3564 __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
3565
3566 // Restore frame locals after moving the frame
3567 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
3568 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3569
3570 // Call C code. Need thread but NOT official VM entry
3571 // crud. We cannot block on this call, no GC can happen. Call should
3572 // restore return values to their stack-slots with the new SP.
3573 //
3574 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
3575
3576 // Use rbp because the frames look interpreted now
3577 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3578 // Don't need the precise return PC here, just precise enough to point into this code blob.
3579 address the_pc = __ pc();
3580 __ set_last_Java_frame(noreg, rbp, the_pc);
3581
3582 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI
3583 __ mov(c_rarg0, r15_thread);
3584 __ movl(c_rarg1, r14); // second arg: exec_mode
3585 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3586 // Revert SP alignment after call since we're going to do some SP relative addressing below
3587 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset()));
3588
3589 // Set an oopmap for the call site
3590 // Use the same PC we used for the last java frame
3591 oop_maps->add_gc_map(the_pc - start,
3592 new OopMap( frame_size_in_words, 0 ));
3593
3594 // Clear fp AND pc
3595 __ reset_last_Java_frame(true);
3596
3597 // Collect return values
3598 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
3599 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
3600 // I think this is useless (throwing pc?)
3601 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
3602
3603 // Pop self-frame.
3604 __ leave(); // Epilog
3605
3606 // Jump to interpreter
3607 __ ret(0);
3608
3609 // Make sure all code is generated
3610 masm->flush();
3611
3612 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3613 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3614 }
3615
3616 #ifdef COMPILER2
3617 //------------------------------generate_uncommon_trap_blob--------------------
generate_uncommon_trap_blob()3618 void SharedRuntime::generate_uncommon_trap_blob() {
3619 // Allocate space for the code
3620 ResourceMark rm;
3621 // Setup code generation tools
3622 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
3623 MacroAssembler* masm = new MacroAssembler(&buffer);
3624
3625 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3626
3627 address start = __ pc();
3628
3629 if (UseRTMLocking) {
3630 // Abort RTM transaction before possible nmethod deoptimization.
3631 __ xabort(0);
3632 }
3633
3634 // Push self-frame. We get here with a return address on the
3635 // stack, so rsp is 8-byte aligned until we allocate our frame.
3636 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
3637
3638 // No callee saved registers. rbp is assumed implicitly saved
3639 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3640
3641 // compiler left unloaded_class_index in j_rarg0 move to where the
3642 // runtime expects it.
3643 __ movl(c_rarg1, j_rarg0);
3644
3645 __ set_last_Java_frame(noreg, noreg, NULL);
3646
3647 // Call C code. Need thread but NOT official VM entry
3648 // crud. We cannot block on this call, no GC can happen. Call should
3649 // capture callee-saved registers as well as return values.
3650 // Thread is in rdi already.
3651 //
3652 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
3653
3654 __ mov(c_rarg0, r15_thread);
3655 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3656
3657 // Set an oopmap for the call site
3658 OopMapSet* oop_maps = new OopMapSet();
3659 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
3660
3661 // location of rbp is known implicitly by the frame sender code
3662
3663 oop_maps->add_gc_map(__ pc() - start, map);
3664
3665 __ reset_last_Java_frame(false);
3666
3667 // Load UnrollBlock* into rdi
3668 __ mov(rdi, rax);
3669
3670 // Pop all the frames we must move/replace.
3671 //
3672 // Frame picture (youngest to oldest)
3673 // 1: self-frame (no frame link)
3674 // 2: deopting frame (no frame link)
3675 // 3: caller of deopting frame (could be compiled/interpreted).
3676
3677 // Pop self-frame. We have no frame, and must rely only on rax and rsp.
3678 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
3679
3680 // Pop deoptimized frame (int)
3681 __ movl(rcx, Address(rdi,
3682 Deoptimization::UnrollBlock::
3683 size_of_deoptimized_frame_offset_in_bytes()));
3684 __ addptr(rsp, rcx);
3685
3686 // rsp should be pointing at the return address to the caller (3)
3687
3688 // Pick up the initial fp we should save
3689 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3690 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3691
3692 #ifdef ASSERT
3693 // Compilers generate code that bang the stack by as much as the
3694 // interpreter would need. So this stack banging should never
3695 // trigger a fault. Verify that it does not on non product builds.
3696 if (UseStackBanging) {
3697 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3698 __ bang_stack_size(rbx, rcx);
3699 }
3700 #endif
3701
3702 // Load address of array of frame pcs into rcx (address*)
3703 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3704
3705 // Trash the return pc
3706 __ addptr(rsp, wordSize);
3707
3708 // Load address of array of frame sizes into rsi (intptr_t*)
3709 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes()));
3710
3711 // Counter
3712 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int)
3713
3714 // Now adjust the caller's stack to make up for the extra locals but
3715 // record the original sp so that we can save it in the skeletal
3716 // interpreter frame and the stack walking of interpreter_sender
3717 // will get the unextended sp value and not the "real" sp value.
3718
3719 const Register sender_sp = r8;
3720
3721 __ mov(sender_sp, rsp);
3722 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int)
3723 __ subptr(rsp, rbx);
3724
3725 // Push interpreter frames in a loop
3726 Label loop;
3727 __ bind(loop);
3728 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3729 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand
3730 __ pushptr(Address(rcx, 0)); // Save return address
3731 __ enter(); // Save old & set new rbp
3732 __ subptr(rsp, rbx); // Prolog
3733 #ifdef CC_INTERP
3734 __ movptr(Address(rbp,
3735 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3736 sender_sp); // Make it walkable
3737 #else // CC_INTERP
3738 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
3739 sender_sp); // Make it walkable
3740 // This value is corrected by layout_activation_impl
3741 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3742 #endif // CC_INTERP
3743 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3744 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3745 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3746 __ decrementl(rdx); // Decrement counter
3747 __ jcc(Assembler::notZero, loop);
3748 __ pushptr(Address(rcx, 0)); // Save final return address
3749
3750 // Re-push self-frame
3751 __ enter(); // Save old & set new rbp
3752 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
3753 // Prolog
3754
3755 // Use rbp because the frames look interpreted now
3756 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3757 // Don't need the precise return PC here, just precise enough to point into this code blob.
3758 address the_pc = __ pc();
3759 __ set_last_Java_frame(noreg, rbp, the_pc);
3760
3761 // Call C code. Need thread but NOT official VM entry
3762 // crud. We cannot block on this call, no GC can happen. Call should
3763 // restore return values to their stack-slots with the new SP.
3764 // Thread is in rdi already.
3765 //
3766 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
3767
3768 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI
3769 __ mov(c_rarg0, r15_thread);
3770 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
3771 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3772
3773 // Set an oopmap for the call site
3774 // Use the same PC we used for the last java frame
3775 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3776
3777 // Clear fp AND pc
3778 __ reset_last_Java_frame(true);
3779
3780 // Pop self-frame.
3781 __ leave(); // Epilog
3782
3783 // Jump to interpreter
3784 __ ret(0);
3785
3786 // Make sure all code is generated
3787 masm->flush();
3788
3789 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
3790 SimpleRuntimeFrame::framesize >> 1);
3791 }
3792 #endif // COMPILER2
3793
3794
3795 //------------------------------generate_handler_blob------
3796 //
3797 // Generate a special Compile2Runtime blob that saves all registers,
3798 // and setup oopmap.
3799 //
generate_handler_blob(address call_ptr,int poll_type)3800 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3801 assert(StubRoutines::forward_exception_entry() != NULL,
3802 "must be generated before");
3803
3804 ResourceMark rm;
3805 OopMapSet *oop_maps = new OopMapSet();
3806 OopMap* map;
3807
3808 // Allocate space for the code. Setup code generation tools.
3809 CodeBuffer buffer("handler_blob", 2048, 1024);
3810 MacroAssembler* masm = new MacroAssembler(&buffer);
3811
3812 address start = __ pc();
3813 address call_pc = NULL;
3814 int frame_size_in_words;
3815 bool cause_return = (poll_type == POLL_AT_RETURN);
3816 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3817
3818 if (UseRTMLocking) {
3819 // Abort RTM transaction before calling runtime
3820 // because critical section will be large and will be
3821 // aborted anyway. Also nmethod could be deoptimized.
3822 __ xabort(0);
3823 }
3824
3825 // Make room for return address (or push it again)
3826 if (!cause_return) {
3827 __ push(rbx);
3828 }
3829
3830 // Save registers, fpu state, and flags
3831 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors);
3832
3833 // The following is basically a call_VM. However, we need the precise
3834 // address of the call in order to generate an oopmap. Hence, we do all the
3835 // work outselves.
3836
3837 __ set_last_Java_frame(noreg, noreg, NULL);
3838
3839 // The return address must always be correct so that frame constructor never
3840 // sees an invalid pc.
3841
3842 if (!cause_return) {
3843 // overwrite the dummy value we pushed on entry
3844 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3845 __ movptr(Address(rbp, wordSize), c_rarg0);
3846 }
3847
3848 // Do the call
3849 __ mov(c_rarg0, r15_thread);
3850 __ call(RuntimeAddress(call_ptr));
3851
3852 // Set an oopmap for the call site. This oopmap will map all
3853 // oop-registers and debug-info registers as callee-saved. This
3854 // will allow deoptimization at this safepoint to find all possible
3855 // debug-info recordings, as well as let GC find all oops.
3856
3857 oop_maps->add_gc_map( __ pc() - start, map);
3858
3859 Label noException;
3860
3861 __ reset_last_Java_frame(false);
3862
3863 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3864 __ jcc(Assembler::equal, noException);
3865
3866 // Exception pending
3867
3868 RegisterSaver::restore_live_registers(masm, save_vectors);
3869
3870 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3871
3872 // No exception case
3873 __ bind(noException);
3874
3875 // Normal exit, restore registers and exit.
3876 RegisterSaver::restore_live_registers(masm, save_vectors);
3877
3878 __ ret(0);
3879
3880 // Make sure all code is generated
3881 masm->flush();
3882
3883 // Fill-out other meta info
3884 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3885 }
3886
3887 //
3888 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3889 //
3890 // Generate a stub that calls into vm to find out the proper destination
3891 // of a java call. All the argument registers are live at this point
3892 // but since this is generic code we don't know what they are and the caller
3893 // must do any gc of the args.
3894 //
generate_resolve_blob(address destination,const char * name)3895 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3896 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3897
3898 // allocate space for the code
3899 ResourceMark rm;
3900
3901 CodeBuffer buffer(name, 1000, 512);
3902 MacroAssembler* masm = new MacroAssembler(&buffer);
3903
3904 int frame_size_in_words;
3905
3906 OopMapSet *oop_maps = new OopMapSet();
3907 OopMap* map = NULL;
3908
3909 int start = __ offset();
3910
3911 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3912
3913 int frame_complete = __ offset();
3914
3915 __ set_last_Java_frame(noreg, noreg, NULL);
3916
3917 __ mov(c_rarg0, r15_thread);
3918
3919 __ call(RuntimeAddress(destination));
3920
3921
3922 // Set an oopmap for the call site.
3923 // We need this not only for callee-saved registers, but also for volatile
3924 // registers that the compiler might be keeping live across a safepoint.
3925
3926 oop_maps->add_gc_map( __ offset() - start, map);
3927
3928 // rax contains the address we are going to jump to assuming no exception got installed
3929
3930 // clear last_Java_sp
3931 __ reset_last_Java_frame(false);
3932 // check for pending exceptions
3933 Label pending;
3934 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3935 __ jcc(Assembler::notEqual, pending);
3936
3937 // get the returned Method*
3938 __ get_vm_result_2(rbx, r15_thread);
3939 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3940
3941 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3942
3943 RegisterSaver::restore_live_registers(masm);
3944
3945 // We are back the the original state on entry and ready to go.
3946
3947 __ jmp(rax);
3948
3949 // Pending exception after the safepoint
3950
3951 __ bind(pending);
3952
3953 RegisterSaver::restore_live_registers(masm);
3954
3955 // exception pending => remove activation and forward to exception handler
3956
3957 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3958
3959 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3960 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3961
3962 // -------------
3963 // make sure all code is generated
3964 masm->flush();
3965
3966 // return the blob
3967 // frame_size_words or bytes??
3968 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3969 }
3970
3971
3972 //------------------------------Montgomery multiplication------------------------
3973 //
3974
3975 #ifndef _WINDOWS
3976
3977 #define ASM_SUBTRACT
3978
3979 #ifdef ASM_SUBTRACT
3980 // Subtract 0:b from carry:a. Return carry.
3981 static unsigned long
sub(unsigned long a[],unsigned long b[],unsigned long carry,long len)3982 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) {
3983 long i = 0, cnt = len;
3984 unsigned long tmp;
3985 asm volatile("clc; "
3986 "0: ; "
3987 "mov (%[b], %[i], 8), %[tmp]; "
3988 "sbb %[tmp], (%[a], %[i], 8); "
3989 "inc %[i]; dec %[cnt]; "
3990 "jne 0b; "
3991 "mov %[carry], %[tmp]; sbb $0, %[tmp]; "
3992 : [i]"+r"(i), [cnt]"+r"(cnt), [tmp]"=&r"(tmp)
3993 : [a]"r"(a), [b]"r"(b), [carry]"r"(carry)
3994 : "memory");
3995 return tmp;
3996 }
3997 #else // ASM_SUBTRACT
3998 typedef int __attribute__((mode(TI))) int128;
3999
4000 // Subtract 0:b from carry:a. Return carry.
4001 static unsigned long
sub(unsigned long a[],unsigned long b[],unsigned long carry,int len)4002 sub(unsigned long a[], unsigned long b[], unsigned long carry, int len) {
4003 int128 tmp = 0;
4004 int i;
4005 for (i = 0; i < len; i++) {
4006 tmp += a[i];
4007 tmp -= b[i];
4008 a[i] = tmp;
4009 tmp >>= 64;
4010 assert(-1 <= tmp && tmp <= 0, "invariant");
4011 }
4012 return tmp + carry;
4013 }
4014 #endif // ! ASM_SUBTRACT
4015
4016 // Multiply (unsigned) Long A by Long B, accumulating the double-
4017 // length result into the accumulator formed of T0, T1, and T2.
4018 #define MACC(A, B, T0, T1, T2) \
4019 do { \
4020 unsigned long hi, lo; \
4021 asm volatile("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
4022 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
4023 : "r"(A), "a"(B) : "cc"); \
4024 } while(0)
4025
4026 // As above, but add twice the double-length result into the
4027 // accumulator.
4028 #define MACC2(A, B, T0, T1, T2) \
4029 do { \
4030 unsigned long hi, lo; \
4031 asm volatile("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4;" \
4032 "add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
4033 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
4034 : "r"(A), "a"(B) : "cc"); \
4035 } while(0)
4036
4037 // Fast Montgomery multiplication. The derivation of the algorithm is
4038 // in A Cryptographic Library for the Motorola DSP56000,
4039 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237.
4040
4041 static void __attribute__((noinline))
montgomery_multiply(unsigned long a[],unsigned long b[],unsigned long n[],unsigned long m[],unsigned long inv,int len)4042 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[],
4043 unsigned long m[], unsigned long inv, int len) {
4044 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
4045 int i;
4046
4047 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
4048
4049 for (i = 0; i < len; i++) {
4050 int j;
4051 for (j = 0; j < i; j++) {
4052 MACC(a[j], b[i-j], t0, t1, t2);
4053 MACC(m[j], n[i-j], t0, t1, t2);
4054 }
4055 MACC(a[i], b[0], t0, t1, t2);
4056 m[i] = t0 * inv;
4057 MACC(m[i], n[0], t0, t1, t2);
4058
4059 assert(t0 == 0, "broken Montgomery multiply");
4060
4061 t0 = t1; t1 = t2; t2 = 0;
4062 }
4063
4064 for (i = len; i < 2*len; i++) {
4065 int j;
4066 for (j = i-len+1; j < len; j++) {
4067 MACC(a[j], b[i-j], t0, t1, t2);
4068 MACC(m[j], n[i-j], t0, t1, t2);
4069 }
4070 m[i-len] = t0;
4071 t0 = t1; t1 = t2; t2 = 0;
4072 }
4073
4074 while (t0)
4075 t0 = sub(m, n, t0, len);
4076 }
4077
4078 // Fast Montgomery squaring. This uses asymptotically 25% fewer
4079 // multiplies so it should be up to 25% faster than Montgomery
4080 // multiplication. However, its loop control is more complex and it
4081 // may actually run slower on some machines.
4082
4083 static void __attribute__((noinline))
montgomery_square(unsigned long a[],unsigned long n[],unsigned long m[],unsigned long inv,int len)4084 montgomery_square(unsigned long a[], unsigned long n[],
4085 unsigned long m[], unsigned long inv, int len) {
4086 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
4087 int i;
4088
4089 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
4090
4091 for (i = 0; i < len; i++) {
4092 int j;
4093 int end = (i+1)/2;
4094 for (j = 0; j < end; j++) {
4095 MACC2(a[j], a[i-j], t0, t1, t2);
4096 MACC(m[j], n[i-j], t0, t1, t2);
4097 }
4098 if ((i & 1) == 0) {
4099 MACC(a[j], a[j], t0, t1, t2);
4100 }
4101 for (; j < i; j++) {
4102 MACC(m[j], n[i-j], t0, t1, t2);
4103 }
4104 m[i] = t0 * inv;
4105 MACC(m[i], n[0], t0, t1, t2);
4106
4107 assert(t0 == 0, "broken Montgomery square");
4108
4109 t0 = t1; t1 = t2; t2 = 0;
4110 }
4111
4112 for (i = len; i < 2*len; i++) {
4113 int start = i-len+1;
4114 int end = start + (len - start)/2;
4115 int j;
4116 for (j = start; j < end; j++) {
4117 MACC2(a[j], a[i-j], t0, t1, t2);
4118 MACC(m[j], n[i-j], t0, t1, t2);
4119 }
4120 if ((i & 1) == 0) {
4121 MACC(a[j], a[j], t0, t1, t2);
4122 }
4123 for (; j < len; j++) {
4124 MACC(m[j], n[i-j], t0, t1, t2);
4125 }
4126 m[i-len] = t0;
4127 t0 = t1; t1 = t2; t2 = 0;
4128 }
4129
4130 while (t0)
4131 t0 = sub(m, n, t0, len);
4132 }
4133
4134 // Swap words in a longword.
swap(unsigned long x)4135 static unsigned long swap(unsigned long x) {
4136 return (x << 32) | (x >> 32);
4137 }
4138
4139 // Copy len longwords from s to d, word-swapping as we go. The
4140 // destination array is reversed.
reverse_words(unsigned long * s,unsigned long * d,int len)4141 static void reverse_words(unsigned long *s, unsigned long *d, int len) {
4142 d += len;
4143 while(len-- > 0) {
4144 d--;
4145 *d = swap(*s);
4146 s++;
4147 }
4148 }
4149
4150 // The threshold at which squaring is advantageous was determined
4151 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz.
4152 #define MONTGOMERY_SQUARING_THRESHOLD 64
4153
montgomery_multiply(jint * a_ints,jint * b_ints,jint * n_ints,jint len,jlong inv,jint * m_ints)4154 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
4155 jint len, jlong inv,
4156 jint *m_ints) {
4157 assert(len % 2 == 0, "array length in montgomery_multiply must be even");
4158 int longwords = len/2;
4159
4160 // Make very sure we don't use so much space that the stack might
4161 // overflow. 512 jints corresponds to an 16384-bit integer and
4162 // will use here a total of 8k bytes of stack space.
4163 int total_allocation = longwords * sizeof (unsigned long) * 4;
4164 guarantee(total_allocation <= 8192, "must be");
4165 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
4166
4167 // Local scratch arrays
4168 unsigned long
4169 *a = scratch + 0 * longwords,
4170 *b = scratch + 1 * longwords,
4171 *n = scratch + 2 * longwords,
4172 *m = scratch + 3 * longwords;
4173
4174 reverse_words((unsigned long *)a_ints, a, longwords);
4175 reverse_words((unsigned long *)b_ints, b, longwords);
4176 reverse_words((unsigned long *)n_ints, n, longwords);
4177
4178 ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords);
4179
4180 reverse_words(m, (unsigned long *)m_ints, longwords);
4181 }
4182
montgomery_square(jint * a_ints,jint * n_ints,jint len,jlong inv,jint * m_ints)4183 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
4184 jint len, jlong inv,
4185 jint *m_ints) {
4186 assert(len % 2 == 0, "array length in montgomery_square must be even");
4187 int longwords = len/2;
4188
4189 // Make very sure we don't use so much space that the stack might
4190 // overflow. 512 jints corresponds to an 16384-bit integer and
4191 // will use here a total of 6k bytes of stack space.
4192 int total_allocation = longwords * sizeof (unsigned long) * 3;
4193 guarantee(total_allocation <= 8192, "must be");
4194 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
4195
4196 // Local scratch arrays
4197 unsigned long
4198 *a = scratch + 0 * longwords,
4199 *n = scratch + 1 * longwords,
4200 *m = scratch + 2 * longwords;
4201
4202 reverse_words((unsigned long *)a_ints, a, longwords);
4203 reverse_words((unsigned long *)n_ints, n, longwords);
4204
4205 //montgomery_square fails to pass BigIntegerTest on solaris amd64
4206 //on jdk7 and jdk8.
4207 #ifndef SOLARIS
4208 if (len >= MONTGOMERY_SQUARING_THRESHOLD) {
4209 #else
4210 if (0) {
4211 #endif
4212 ::montgomery_square(a, n, m, (unsigned long)inv, longwords);
4213 } else {
4214 ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords);
4215 }
4216
4217 reverse_words(m, (unsigned long *)m_ints, longwords);
4218 }
4219
4220 #endif // WINDOWS
4221
4222 #ifdef COMPILER2
4223 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
4224 //
4225 //------------------------------generate_exception_blob---------------------------
4226 // creates exception blob at the end
4227 // Using exception blob, this code is jumped from a compiled method.
4228 // (see emit_exception_handler in x86_64.ad file)
4229 //
4230 // Given an exception pc at a call we call into the runtime for the
4231 // handler in this method. This handler might merely restore state
4232 // (i.e. callee save registers) unwind the frame and jump to the
4233 // exception handler for the nmethod if there is no Java level handler
4234 // for the nmethod.
4235 //
4236 // This code is entered with a jmp.
4237 //
4238 // Arguments:
4239 // rax: exception oop
4240 // rdx: exception pc
4241 //
4242 // Results:
4243 // rax: exception oop
4244 // rdx: exception pc in caller or ???
4245 // destination: exception handler of caller
4246 //
4247 // Note: the exception pc MUST be at a call (precise debug information)
4248 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
4249 //
4250
4251 void OptoRuntime::generate_exception_blob() {
4252 assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
4253 assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
4254 assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
4255
4256 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
4257
4258 // Allocate space for the code
4259 ResourceMark rm;
4260 // Setup code generation tools
4261 CodeBuffer buffer("exception_blob", 2048, 1024);
4262 MacroAssembler* masm = new MacroAssembler(&buffer);
4263
4264
4265 address start = __ pc();
4266
4267 // Exception pc is 'return address' for stack walker
4268 __ push(rdx);
4269 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
4270
4271 // Save callee-saved registers. See x86_64.ad.
4272
4273 // rbp is an implicitly saved callee saved register (i.e., the calling
4274 // convention will save/restore it in the prolog/epilog). Other than that
4275 // there are no callee save registers now that adapter frames are gone.
4276
4277 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
4278
4279 // Store exception in Thread object. We cannot pass any arguments to the
4280 // handle_exception call, since we do not want to make any assumption
4281 // about the size of the frame where the exception happened in.
4282 // c_rarg0 is either rdi (Linux) or rcx (Windows).
4283 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
4284 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
4285
4286 // This call does all the hard work. It checks if an exception handler
4287 // exists in the method.
4288 // If so, it returns the handler address.
4289 // If not, it prepares for stack-unwinding, restoring the callee-save
4290 // registers of the frame being removed.
4291 //
4292 // address OptoRuntime::handle_exception_C(JavaThread* thread)
4293
4294 // At a method handle call, the stack may not be properly aligned
4295 // when returning with an exception.
4296 address the_pc = __ pc();
4297 __ set_last_Java_frame(noreg, noreg, the_pc);
4298 __ mov(c_rarg0, r15_thread);
4299 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
4300 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
4301
4302 // Set an oopmap for the call site. This oopmap will only be used if we
4303 // are unwinding the stack. Hence, all locations will be dead.
4304 // Callee-saved registers will be the same as the frame above (i.e.,
4305 // handle_exception_stub), since they were restored when we got the
4306 // exception.
4307
4308 OopMapSet* oop_maps = new OopMapSet();
4309
4310 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
4311
4312 __ reset_last_Java_frame(false);
4313
4314 // Restore callee-saved registers
4315
4316 // rbp is an implicitly saved callee-saved register (i.e., the calling
4317 // convention will save restore it in prolog/epilog) Other than that
4318 // there are no callee save registers now that adapter frames are gone.
4319
4320 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
4321
4322 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
4323 __ pop(rdx); // No need for exception pc anymore
4324
4325 // rax: exception handler
4326
4327 // We have a handler in rax (could be deopt blob).
4328 __ mov(r8, rax);
4329
4330 // Get the exception oop
4331 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
4332 // Get the exception pc in case we are deoptimized
4333 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
4334 #ifdef ASSERT
4335 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
4336 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
4337 #endif
4338 // Clear the exception oop so GC no longer processes it as a root.
4339 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
4340
4341 // rax: exception oop
4342 // r8: exception handler
4343 // rdx: exception pc
4344 // Jump to handler
4345
4346 __ jmp(r8);
4347
4348 // Make sure all code is generated
4349 masm->flush();
4350
4351 // Set exception blob
4352 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
4353 }
4354 #endif // COMPILER2
4355