1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
7 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
8 // RUN: %clang_cc1 -fopenmp -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
9 // RUN: %clang_cc1 -fopenmp -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
10 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
11 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK8
12 
13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
16 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
19 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
20 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
21 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
22 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 // expected-no-diagnostics
24 #ifndef HEADER
25 #define HEADER
26 
27 #ifdef OMP5
28 #define CONDITIONAL conditional :
29 #else
30 #define CONDITIONAL
31 #endif //OMP5
32 
33 enum omp_allocator_handle_t {
34   omp_null_allocator = 0,
35   omp_default_mem_alloc = 1,
36   omp_large_cap_mem_alloc = 2,
37   omp_const_mem_alloc = 3,
38   omp_high_bw_mem_alloc = 4,
39   omp_low_lat_mem_alloc = 5,
40   omp_cgroup_mem_alloc = 6,
41   omp_pteam_mem_alloc = 7,
42   omp_thread_mem_alloc = 8,
43   KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__
44 };
45 
46 struct SS {
47   int a;
48   char e[4];
49   int b : 4;
50   int &c;
SSSS51   SS(int &d) : a(0), b(0), c(d) {
52 #pragma omp parallel
53 #pragma omp for firstprivate(e) lastprivate(a, b, c, e)
54     for (int i = 0; i < 2; ++i)
55 #ifdef LAMBDA
56       [&]() {
57         ++this->a, --b, (this)->c /= 1;
58 #pragma omp parallel
59 #pragma omp for lastprivate(a, b, c)
60         for (int i = 0; i < 2; ++i)
61           ++(this)->a, --b, this->c /= 1;
62       }();
63 #elif defined(BLOCKS)
64       ^{
65         ++a;
66         --this->b;
67         (this)->c /= 1;
68 #pragma omp parallel
69 #pragma omp for lastprivate(a, b, c)
70         for (int i = 0; i < 2; ++i)
71           ++(this)->a, --b, this->c /= 1;
72       }();
73 #else
74       ++this->a, --b, c /= 1;
75 #endif
76 #pragma omp for
77     for (a = 0; a < 2; ++a)
78 #ifdef LAMBDA
79       [&]() {
80         --this->a, ++b, (this)->c *= 2;
81 #pragma omp parallel
82 #pragma omp for lastprivate(b)
83         for (b = 0; b < 2; ++b)
84           ++(this)->a, --b, this->c /= 1;
85       }();
86 #elif defined(BLOCKS)
87       ^{
88         ++a;
89         --this->b;
90         (this)->c /= 1;
91 #pragma omp parallel
92 #pragma omp for
93         for (c = 0; c < 2; ++c)
94           ++(this)->a, --b, this->c /= 1;
95       }();
96 #else
97       ++this->a, --b, c /= 1;
98 #endif
99   }
100 };
101 
102 template <typename T>
103 struct SST {
104   T a;
SSTSST105   SST() : a(T()) {
106 #pragma omp parallel
107 #pragma omp for lastprivate(a)
108     for (int i = 0; i < 2; ++i)
109 #ifdef LAMBDA
110       [&]() {
111         [&]() {
112           ++this->a;
113 #pragma omp parallel
114 #pragma omp for lastprivate(a)
115           for (int i = 0; i < 2; ++i)
116             ++(this)->a;
117         }();
118       }();
119 #elif defined(BLOCKS)
120       ^{
121         ^{
122           ++a;
123 #pragma omp parallel
124 #pragma omp for lastprivate(a)
125           for (int i = 0; i < 2; ++i)
126             ++(this)->a;
127         }();
128       }();
129 #else
130       ++(this)->a;
131 #endif
132 #pragma omp for
133     for (a = 0; a < 2; ++a)
134 #ifdef LAMBDA
135       [&]() {
136         ++this->a;
137 #pragma omp parallel
138 #pragma omp for
139         for (a = 0; a < 2; ++(this)->a)
140           ++(this)->a;
141       }();
142 #elif defined(BLOCKS)
143       ^{
144         ++a;
145 #pragma omp parallel
146 #pragma omp for
147         for (this->a = 0; a < 2; ++a)
148           ++(this)->a;
149       }();
150 #else
151       ++(this)->a;
152 #endif
153   }
154 };
155 
156 template <class T>
157 struct S {
158   T f;
SS159   S(T a) : f(a) {}
SS160   S() : f() {}
161   S<T> &operator=(const S<T> &);
operator TS162   operator T() { return T(); }
~SS163   ~S() {}
164 };
165 
166 volatile int g __attribute__((aligned(128)))= 1212;
167 volatile int &g1 = g;
168 float f;
169 char cnt;
170 
171 
172 template <typename T>
tmain()173 T tmain() {
174   S<T> test;
175   SST<T> sst;
176   T t_var __attribute__((aligned(128))) = T();
177   T vec[] __attribute__((aligned(128))) = {1, 2};
178   S<T> s_arr[] __attribute__((aligned(128))) = {1, 2};
179   S<T> &var __attribute__((aligned(128))) = test;
180 #pragma omp parallel
181 #pragma omp for lastprivate(t_var, vec, s_arr, var)
182   for (int i = 0; i < 2; ++i) {
183     vec[i] = t_var;
184     s_arr[i] = var;
185   }
186   return T();
187 }
188 
189 namespace A {
190 double x;
191 }
192 namespace B {
193 using A::x;
194 }
195 
main()196 int main() {
197   static int sivar;
198   SS ss(sivar);
199 #ifdef LAMBDA
200   // FIXME: The outer lambda should not capture 'sivar'; that capture is not
201   // used for anything.
202   [&]() {
203 #pragma omp parallel
204 #pragma omp for lastprivate(g, g1, sivar)
205   for (int i = 0; i < 2; ++i) {
206 
207 
208 
209 
210 
211 
212     g = 1;
213     g1 = 1;
214     sivar = 2;
215     // Check for final copying of private values back to original vars.
216     // Actual copying.
217 
218     // original g=private_g;
219 
220     // original sivar=private_sivar;
221     [&]() {
222       g = 2;
223       g1 = 2;
224       sivar = 4;
225     }();
226   }
227   }();
228   return 0;
229 #elif defined(BLOCKS)
230   ^{
231 #pragma omp parallel
232 #pragma omp for lastprivate(g, g1, sivar)
233   for (int i = 0; i < 2; ++i) {
234     g = 1;
235     g1 = 1;
236     sivar = 2;
237     // Check for final copying of private values back to original vars.
238     // Actual copying.
239 
240     // original g=private_g;
241     g = 1;
242     g1 = 1;
243     ^{
244       g = 2;
245       g1 = 1;
246       sivar = 4;
247     }();
248   }
249   }();
250   return 0;
251 
252 
253 #else
254   S<float> test;
255   int t_var = 0;
256   int vec[] = {1, 2};
257   S<float> s_arr[] = {1, 2};
258   S<float> var(3);
259 #pragma omp parallel
260 #pragma omp for lastprivate(t_var, vec, s_arr, var, sivar)
261   for (int i = 0; i < 2; ++i) {
262     vec[i] = t_var;
263     s_arr[i] = var;
264     sivar += i;
265   }
266 #pragma omp parallel
267 #pragma omp for lastprivate(A::x, B::x) firstprivate(f) lastprivate(f)
268   for (int i = 0; i < 2; ++i) {
269     A::x++;
270   }
271 #pragma omp parallel
272 #pragma omp for allocate(omp_const_mem_alloc: f) firstprivate(f) lastprivate(f)
273   for (int i = 0; i < 2; ++i) {
274     A::x++;
275   }
276 #pragma omp parallel
277 #pragma omp for allocate(omp_const_mem_alloc :cnt) lastprivate(cnt) lastprivate(CONDITIONAL f)
278   for (cnt = 0; cnt < 2; ++cnt) {
279     A::x++;
280     f = 0;
281   }
282   return tmain<int>();
283 #endif
284 }
285 
286 
287 
288 
289 // Check for default initialization.
290 // <Skip loop body>
291 
292 // Check for final copying of private values back to original vars.
293 // Actual copying.
294 
295 // original t_var=private_t_var;
296 
297 // original vec[]=private_vec[];
298 
299 // original s_arr[]=private_s_arr[];
300 
301 // original var=private_var;
302 
303 
304 // Check for default initialization.
305 
306 // <Skip loop body>
307 
308 // Check for final copying of private values back to original vars.
309 // Actual copying.
310 
311 // original x=private_x;
312 
313 // original f=private_f;
314 
315 
316 
317 
318 // Check for default initialization.
319 
320 // <Skip loop body>
321 
322 // Check for final copying of private values back to original vars.
323 // Actual copying.
324 
325 // original f=private_f;
326 
327 
328 
329 
330 // UB = min(UB, GlobalUB)
331 // <Skip loop body>
332 
333 
334 
335 // Check for final copying of private values back to original vars.
336 
337 // Calculate private cnt value.
338 // original cnt=private_cnt;
339 
340 
341 
342 
343 
344 
345 
346 
347 // Check for default initialization.
348 // <Skip loop body>
349 
350 // Check for final copying of private values back to original vars.
351 // Actual copying.
352 
353 // original t_var=private_t_var;
354 
355 // original vec[]=private_vec[];
356 
357 // original s_arr[]=private_s_arr[];
358 
359 // original var=private_var;
360 #endif
361 
362 // CHECK1-LABEL: define {{[^@]+}}@main
363 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
364 // CHECK1-NEXT:  entry:
365 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
366 // CHECK1-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
367 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
368 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
369 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
370 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
371 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
372 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
373 // CHECK1-NEXT:    call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
374 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
375 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR]], align 4
376 // CHECK1-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
377 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
378 // CHECK1-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
379 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
380 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
381 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
382 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00)
383 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar)
384 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
385 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
386 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*))
387 // CHECK1-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
388 // CHECK1-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
389 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
390 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
391 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
392 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
393 // CHECK1:       arraydestroy.body:
394 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
395 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
396 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
397 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
398 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
399 // CHECK1:       arraydestroy.done1:
400 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
401 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
402 // CHECK1-NEXT:    ret i32 [[TMP2]]
403 //
404 //
405 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
406 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
407 // CHECK1-NEXT:  entry:
408 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
409 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
410 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
411 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
412 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
413 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
414 // CHECK1-NEXT:    call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]])
415 // CHECK1-NEXT:    ret void
416 //
417 //
418 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
419 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
420 // CHECK1-NEXT:  entry:
421 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
422 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
423 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
424 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
425 // CHECK1-NEXT:    ret void
426 //
427 //
428 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
429 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
430 // CHECK1-NEXT:  entry:
431 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
432 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
433 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
434 // CHECK1-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
435 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
436 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
437 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
438 // CHECK1-NEXT:    ret void
439 //
440 //
441 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
442 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
443 // CHECK1-NEXT:  entry:
444 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
445 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
446 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
447 // CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
448 // CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
449 // CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
450 // CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
451 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
452 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
453 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
454 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
455 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
456 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
457 // CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
458 // CHECK1-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4
459 // CHECK1-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
460 // CHECK1-NEXT:    [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
461 // CHECK1-NEXT:    [[SIVAR5:%.*]] = alloca i32, align 4
462 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
463 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
464 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
465 // CHECK1-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
466 // CHECK1-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
467 // CHECK1-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
468 // CHECK1-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
469 // CHECK1-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
470 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
471 // CHECK1-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
472 // CHECK1-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
473 // CHECK1-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
474 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
475 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
476 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
477 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
478 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
479 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
480 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
481 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
482 // CHECK1:       arrayctor.loop:
483 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
484 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
485 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
486 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
487 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
488 // CHECK1:       arrayctor.cont:
489 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
490 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
491 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
492 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
493 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
494 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
495 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
496 // CHECK1:       cond.true:
497 // CHECK1-NEXT:    br label [[COND_END:%.*]]
498 // CHECK1:       cond.false:
499 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
500 // CHECK1-NEXT:    br label [[COND_END]]
501 // CHECK1:       cond.end:
502 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
503 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
504 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
505 // CHECK1-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
506 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
507 // CHECK1:       omp.inner.for.cond:
508 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
509 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
510 // CHECK1-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
511 // CHECK1-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
512 // CHECK1:       omp.inner.for.cond.cleanup:
513 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
514 // CHECK1:       omp.inner.for.body:
515 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
516 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
517 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
518 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
519 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4
520 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I]], align 4
521 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
522 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]]
523 // CHECK1-NEXT:    store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4
524 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
525 // CHECK1-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64
526 // CHECK1-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM7]]
527 // CHECK1-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
528 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
529 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[SIVAR5]], align 4
530 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]]
531 // CHECK1-NEXT:    store i32 [[ADD9]], i32* [[SIVAR5]], align 4
532 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
533 // CHECK1:       omp.body.continue:
534 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
535 // CHECK1:       omp.inner.for.inc:
536 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
537 // CHECK1-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
538 // CHECK1-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
539 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
540 // CHECK1:       omp.inner.for.end:
541 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
542 // CHECK1:       omp.loop.exit:
543 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
544 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
545 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
546 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
547 // CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
548 // CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
549 // CHECK1:       .omp.lastprivate.then:
550 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR1]], align 4
551 // CHECK1-NEXT:    store i32 [[TMP23]], i32* [[TMP0]], align 4
552 // CHECK1-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
553 // CHECK1-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
554 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
555 // CHECK1-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
556 // CHECK1-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S*
557 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
558 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]]
559 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
560 // CHECK1:       omp.arraycpy.body:
561 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
562 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
563 // CHECK1-NEXT:    [[CALL12:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
564 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
565 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
566 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
567 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
568 // CHECK1:       omp.arraycpy.done13:
569 // CHECK1-NEXT:    [[CALL14:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
570 // CHECK1-NEXT:    [[TMP28:%.*]] = load i32, i32* [[SIVAR5]], align 4
571 // CHECK1-NEXT:    store i32 [[TMP28]], i32* [[TMP4]], align 4
572 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
573 // CHECK1:       .omp.lastprivate.done:
574 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
575 // CHECK1-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
576 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
577 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
578 // CHECK1:       arraydestroy.body:
579 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
580 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
581 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
582 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
583 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
584 // CHECK1:       arraydestroy.done16:
585 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
586 // CHECK1-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
587 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP31]])
588 // CHECK1-NEXT:    ret void
589 //
590 //
591 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
592 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
593 // CHECK1-NEXT:  entry:
594 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
595 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
596 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
597 // CHECK1-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
598 // CHECK1-NEXT:    ret void
599 //
600 //
601 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
602 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
603 // CHECK1-NEXT:  entry:
604 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
605 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
606 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
607 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
608 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
609 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
610 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
611 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
612 // CHECK1-NEXT:    [[F:%.*]] = alloca float, align 4
613 // CHECK1-NEXT:    [[X:%.*]] = alloca double, align 8
614 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
615 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
616 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
617 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
618 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
619 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
620 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
621 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, float* @f, align 4
622 // CHECK1-NEXT:    store float [[TMP0]], float* [[F]], align 4
623 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
624 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
625 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
626 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
627 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
628 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
629 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
630 // CHECK1:       cond.true:
631 // CHECK1-NEXT:    br label [[COND_END:%.*]]
632 // CHECK1:       cond.false:
633 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
634 // CHECK1-NEXT:    br label [[COND_END]]
635 // CHECK1:       cond.end:
636 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
637 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
638 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
639 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
640 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
641 // CHECK1:       omp.inner.for.cond:
642 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
643 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
644 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
645 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
646 // CHECK1:       omp.inner.for.body:
647 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
648 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
649 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
650 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
651 // CHECK1-NEXT:    [[TMP9:%.*]] = load double, double* [[X]], align 8
652 // CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
653 // CHECK1-NEXT:    store double [[INC]], double* [[X]], align 8
654 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
655 // CHECK1:       omp.body.continue:
656 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
657 // CHECK1:       omp.inner.for.inc:
658 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
659 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
660 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
661 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
662 // CHECK1:       omp.inner.for.end:
663 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
664 // CHECK1:       omp.loop.exit:
665 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
666 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
667 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
668 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
669 // CHECK1:       .omp.lastprivate.then:
670 // CHECK1-NEXT:    [[TMP13:%.*]] = load double, double* [[X]], align 8
671 // CHECK1-NEXT:    store double [[TMP13]], double* @_ZN1A1xE, align 8
672 // CHECK1-NEXT:    [[TMP14:%.*]] = load float, float* [[F]], align 4
673 // CHECK1-NEXT:    store float [[TMP14]], float* @f, align 4
674 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
675 // CHECK1:       .omp.lastprivate.done:
676 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
677 // CHECK1-NEXT:    ret void
678 //
679 //
680 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
681 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
682 // CHECK1-NEXT:  entry:
683 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
684 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
685 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
686 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
687 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
688 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
689 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
690 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
691 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
692 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
693 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
694 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
695 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
696 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
697 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
698 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
699 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
700 // CHECK1-NEXT:    [[DOTF__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 4, i8* inttoptr (i64 3 to i8*))
701 // CHECK1-NEXT:    [[DOTF__ADDR:%.*]] = bitcast i8* [[DOTF__VOID_ADDR]] to float*
702 // CHECK1-NEXT:    [[TMP2:%.*]] = load float, float* @f, align 4
703 // CHECK1-NEXT:    store float [[TMP2]], float* [[DOTF__ADDR]], align 4
704 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
705 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
706 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
707 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
708 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
709 // CHECK1:       cond.true:
710 // CHECK1-NEXT:    br label [[COND_END:%.*]]
711 // CHECK1:       cond.false:
712 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
713 // CHECK1-NEXT:    br label [[COND_END]]
714 // CHECK1:       cond.end:
715 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
716 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
717 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
718 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
719 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
720 // CHECK1:       omp.inner.for.cond:
721 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
722 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
723 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
724 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
725 // CHECK1:       omp.inner.for.cond.cleanup:
726 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
727 // CHECK1:       omp.inner.for.body:
728 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
729 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
730 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
731 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
732 // CHECK1-NEXT:    [[TMP9:%.*]] = load double, double* @_ZN1A1xE, align 8
733 // CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
734 // CHECK1-NEXT:    store double [[INC]], double* @_ZN1A1xE, align 8
735 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
736 // CHECK1:       omp.body.continue:
737 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
738 // CHECK1:       omp.inner.for.inc:
739 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
740 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
741 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
742 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
743 // CHECK1:       omp.inner.for.end:
744 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
745 // CHECK1:       omp.loop.exit:
746 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
747 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
748 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
749 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
750 // CHECK1:       .omp.lastprivate.then:
751 // CHECK1-NEXT:    [[TMP13:%.*]] = load float, float* [[DOTF__ADDR]], align 4
752 // CHECK1-NEXT:    store float [[TMP13]], float* @f, align 4
753 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
754 // CHECK1:       .omp.lastprivate.done:
755 // CHECK1-NEXT:    [[TMP14:%.*]] = bitcast float* [[DOTF__ADDR]] to i8*
756 // CHECK1-NEXT:    call void @__kmpc_free(i32 [[TMP1]], i8* [[TMP14]], i8* inttoptr (i64 3 to i8*))
757 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
758 // CHECK1-NEXT:    ret void
759 //
760 //
761 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
762 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
763 // CHECK1-NEXT:  entry:
764 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
765 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
766 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
767 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i8, align 1
768 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
769 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
770 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
771 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
772 // CHECK1-NEXT:    [[F:%.*]] = alloca float, align 4
773 // CHECK1-NEXT:    [[CNT:%.*]] = alloca i8, align 1
774 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
775 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
776 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
777 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
778 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
779 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
780 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
781 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
782 // CHECK1-NEXT:    [[DOTCNT__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 1, i8* inttoptr (i64 3 to i8*))
783 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
784 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
785 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
786 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
787 // CHECK1:       cond.true:
788 // CHECK1-NEXT:    br label [[COND_END:%.*]]
789 // CHECK1:       cond.false:
790 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
791 // CHECK1-NEXT:    br label [[COND_END]]
792 // CHECK1:       cond.end:
793 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
794 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
795 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
796 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
797 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
798 // CHECK1:       omp.inner.for.cond:
799 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
800 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
801 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
802 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
803 // CHECK1:       omp.inner.for.cond.cleanup:
804 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
805 // CHECK1:       omp.inner.for.body:
806 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
807 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
808 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
809 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i32 [[ADD]] to i8
810 // CHECK1-NEXT:    store i8 [[CONV]], i8* [[DOTCNT__VOID_ADDR]], align 1
811 // CHECK1-NEXT:    [[TMP8:%.*]] = load double, double* @_ZN1A1xE, align 8
812 // CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP8]], 1.000000e+00
813 // CHECK1-NEXT:    store double [[INC]], double* @_ZN1A1xE, align 8
814 // CHECK1-NEXT:    store float 0.000000e+00, float* [[F]], align 4
815 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
816 // CHECK1:       omp.body.continue:
817 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
818 // CHECK1:       omp.inner.for.inc:
819 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
820 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
821 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
822 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
823 // CHECK1:       omp.inner.for.end:
824 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
825 // CHECK1:       omp.loop.exit:
826 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
827 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
828 // CHECK1-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
829 // CHECK1-NEXT:    br i1 [[TMP11]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
830 // CHECK1:       .omp.lastprivate.then:
831 // CHECK1-NEXT:    store i8 2, i8* [[DOTCNT__VOID_ADDR]], align 1
832 // CHECK1-NEXT:    [[TMP12:%.*]] = load i8, i8* [[DOTCNT__VOID_ADDR]], align 1
833 // CHECK1-NEXT:    store i8 [[TMP12]], i8* @cnt, align 1
834 // CHECK1-NEXT:    [[TMP13:%.*]] = load float, float* [[F]], align 4
835 // CHECK1-NEXT:    store float [[TMP13]], float* @f, align 4
836 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
837 // CHECK1:       .omp.lastprivate.done:
838 // CHECK1-NEXT:    call void @__kmpc_free(i32 [[TMP1]], i8* [[DOTCNT__VOID_ADDR]], i8* inttoptr (i64 3 to i8*))
839 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
840 // CHECK1-NEXT:    ret void
841 //
842 //
843 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
844 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] {
845 // CHECK1-NEXT:  entry:
846 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
847 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
848 // CHECK1-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
849 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128
850 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 128
851 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
852 // CHECK1-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 128
853 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
854 // CHECK1-NEXT:    call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]])
855 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR]], align 128
856 // CHECK1-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
857 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
858 // CHECK1-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
859 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
860 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
861 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
862 // CHECK1-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 128
863 // CHECK1-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 128
864 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP1]])
865 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
866 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
867 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
868 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
869 // CHECK1:       arraydestroy.body:
870 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
871 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
872 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
873 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
874 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
875 // CHECK1:       arraydestroy.done1:
876 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
877 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[RETVAL]], align 4
878 // CHECK1-NEXT:    ret i32 [[TMP3]]
879 //
880 //
881 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
882 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
883 // CHECK1-NEXT:  entry:
884 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
885 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
886 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
887 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
888 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
889 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
890 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
891 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
892 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
893 // CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 4
894 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
895 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
896 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
897 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
898 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
899 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
900 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 8
901 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
902 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
903 // CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
904 // CHECK1-NEXT:    store i8 [[BF_CLEAR]], i8* [[B]], align 8
905 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
906 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
907 // CHECK1-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
908 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
909 // CHECK1-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
910 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
911 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
912 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
913 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
914 // CHECK1-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
915 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
916 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
917 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
918 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
919 // CHECK1:       cond.true:
920 // CHECK1-NEXT:    br label [[COND_END:%.*]]
921 // CHECK1:       cond.false:
922 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
923 // CHECK1-NEXT:    br label [[COND_END]]
924 // CHECK1:       cond.end:
925 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
926 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
927 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
928 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
929 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
930 // CHECK1:       omp.inner.for.cond:
931 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
932 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
933 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
934 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
935 // CHECK1:       omp.inner.for.body:
936 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
937 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
938 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
939 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
940 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[TMP8]], align 4
941 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8
942 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
943 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP10]], 1
944 // CHECK1-NEXT:    store i32 [[INC]], i32* [[TMP9]], align 4
945 // CHECK1-NEXT:    [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
946 // CHECK1-NEXT:    [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8
947 // CHECK1-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
948 // CHECK1-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
949 // CHECK1-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
950 // CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
951 // CHECK1-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
952 // CHECK1-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8
953 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
954 // CHECK1-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
955 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
956 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B6]], align 8
957 // CHECK1-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
958 // CHECK1-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
959 // CHECK1-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
960 // CHECK1-NEXT:    [[C10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
961 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C10]], align 8
962 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
963 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
964 // CHECK1-NEXT:    store i32 [[DIV]], i32* [[TMP12]], align 4
965 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
966 // CHECK1:       omp.body.continue:
967 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
968 // CHECK1:       omp.inner.for.inc:
969 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
970 // CHECK1-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP14]], 1
971 // CHECK1-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
972 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
973 // CHECK1:       omp.inner.for.end:
974 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
975 // CHECK1:       omp.loop.exit:
976 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
977 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
978 // CHECK1-NEXT:    ret void
979 //
980 //
981 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
982 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] {
983 // CHECK1-NEXT:  entry:
984 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
985 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
986 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
987 // CHECK1-NEXT:    [[E:%.*]] = alloca [4 x i8]*, align 8
988 // CHECK1-NEXT:    [[A:%.*]] = alloca i32*, align 8
989 // CHECK1-NEXT:    [[B:%.*]] = alloca i32, align 4
990 // CHECK1-NEXT:    [[C:%.*]] = alloca i32*, align 8
991 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
992 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
993 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca [4 x i8]*, align 8
994 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
995 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
996 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
997 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
998 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
999 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1000 // CHECK1-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
1001 // CHECK1-NEXT:    [[_TMP8:%.*]] = alloca [4 x i8]*, align 8
1002 // CHECK1-NEXT:    [[A9:%.*]] = alloca i32, align 4
1003 // CHECK1-NEXT:    [[_TMP10:%.*]] = alloca i32*, align 8
1004 // CHECK1-NEXT:    [[B11:%.*]] = alloca i32, align 4
1005 // CHECK1-NEXT:    [[C12:%.*]] = alloca i32, align 4
1006 // CHECK1-NEXT:    [[_TMP13:%.*]] = alloca i32*, align 8
1007 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1008 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1009 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1010 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1011 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1012 // CHECK1-NEXT:    [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
1013 // CHECK1-NEXT:    store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8
1014 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
1015 // CHECK1-NEXT:    store i32* [[A2]], i32** [[A]], align 8
1016 // CHECK1-NEXT:    [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3
1017 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8
1018 // CHECK1-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
1019 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A]], align 8
1020 // CHECK1-NEXT:    store i32* [[TMP2]], i32** [[TMP]], align 8
1021 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
1022 // CHECK1-NEXT:    store i32* [[TMP3]], i32** [[_TMP4]], align 8
1023 // CHECK1-NEXT:    [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8
1024 // CHECK1-NEXT:    store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8
1025 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1026 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1027 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1028 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1029 // CHECK1-NEXT:    [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
1030 // CHECK1-NEXT:    [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8*
1031 // CHECK1-NEXT:    [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8*
1032 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false)
1033 // CHECK1-NEXT:    store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8
1034 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1035 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
1036 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
1037 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8
1038 // CHECK1-NEXT:    store i32* [[A9]], i32** [[_TMP10]], align 8
1039 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
1040 // CHECK1-NEXT:    store i32* [[C12]], i32** [[_TMP13]], align 8
1041 // CHECK1-NEXT:    [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
1042 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1043 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1044 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
1045 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1046 // CHECK1:       cond.true:
1047 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1048 // CHECK1:       cond.false:
1049 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1050 // CHECK1-NEXT:    br label [[COND_END]]
1051 // CHECK1:       cond.end:
1052 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
1053 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1054 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1055 // CHECK1-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
1056 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1057 // CHECK1:       omp.inner.for.cond:
1058 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1059 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1060 // CHECK1-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1061 // CHECK1-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1062 // CHECK1:       omp.inner.for.body:
1063 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1064 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1065 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1066 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1067 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8
1068 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1069 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP20]], 1
1070 // CHECK1-NEXT:    store i32 [[INC]], i32* [[TMP19]], align 4
1071 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, i32* [[B11]], align 4
1072 // CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP21]], -1
1073 // CHECK1-NEXT:    store i32 [[DEC]], i32* [[B11]], align 4
1074 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[_TMP13]], align 8
1075 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1076 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP23]], 1
1077 // CHECK1-NEXT:    store i32 [[DIV]], i32* [[TMP22]], align 4
1078 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1079 // CHECK1:       omp.body.continue:
1080 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1081 // CHECK1:       omp.inner.for.inc:
1082 // CHECK1-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1083 // CHECK1-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP24]], 1
1084 // CHECK1-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
1085 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1086 // CHECK1:       omp.inner.for.end:
1087 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1088 // CHECK1:       omp.loop.exit:
1089 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
1090 // CHECK1-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1091 // CHECK1-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1092 // CHECK1-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1093 // CHECK1:       .omp.lastprivate.then:
1094 // CHECK1-NEXT:    [[TMP27:%.*]] = load i32*, i32** [[_TMP10]], align 8
1095 // CHECK1-NEXT:    [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
1096 // CHECK1-NEXT:    store i32 [[TMP28]], i32* [[TMP10]], align 4
1097 // CHECK1-NEXT:    [[TMP29:%.*]] = load i32, i32* [[B11]], align 4
1098 // CHECK1-NEXT:    store i32 [[TMP29]], i32* [[B]], align 4
1099 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[_TMP13]], align 8
1100 // CHECK1-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
1101 // CHECK1-NEXT:    store i32 [[TMP31]], i32* [[TMP11]], align 4
1102 // CHECK1-NEXT:    [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
1103 // CHECK1-NEXT:    [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1
1104 // CHECK1-NEXT:    store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1
1105 // CHECK1-NEXT:    [[TMP34:%.*]] = load i32, i32* [[B11]], align 4
1106 // CHECK1-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
1107 // CHECK1-NEXT:    [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8
1108 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
1109 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15
1110 // CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1111 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
1112 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
1113 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1114 // CHECK1:       .omp.lastprivate.done:
1115 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
1116 // CHECK1-NEXT:    ret void
1117 //
1118 //
1119 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1120 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1121 // CHECK1-NEXT:  entry:
1122 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1123 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1124 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1125 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1126 // CHECK1-NEXT:    store float 0.000000e+00, float* [[F]], align 4
1127 // CHECK1-NEXT:    ret void
1128 //
1129 //
1130 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1131 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1132 // CHECK1-NEXT:  entry:
1133 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1134 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1135 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1136 // CHECK1-NEXT:    ret void
1137 //
1138 //
1139 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1140 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1141 // CHECK1-NEXT:  entry:
1142 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1143 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1144 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1145 // CHECK1-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1146 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1147 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1148 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1149 // CHECK1-NEXT:    store float [[TMP0]], float* [[F]], align 4
1150 // CHECK1-NEXT:    ret void
1151 //
1152 //
1153 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1154 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1155 // CHECK1-NEXT:  entry:
1156 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1157 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1158 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1159 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1160 // CHECK1-NEXT:    ret void
1161 //
1162 //
1163 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
1164 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1165 // CHECK1-NEXT:  entry:
1166 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1167 // CHECK1-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1168 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1169 // CHECK1-NEXT:    call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]])
1170 // CHECK1-NEXT:    ret void
1171 //
1172 //
1173 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1174 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1175 // CHECK1-NEXT:  entry:
1176 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1177 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1178 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1179 // CHECK1-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1180 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1181 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1182 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
1183 // CHECK1-NEXT:    ret void
1184 //
1185 //
1186 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
1187 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1188 // CHECK1-NEXT:  entry:
1189 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1190 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1191 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1192 // CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1193 // CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1194 // CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1195 // CHECK1-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
1196 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1197 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1198 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1199 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1200 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1201 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1202 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1203 // CHECK1-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 128
1204 // CHECK1-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 128
1205 // CHECK1-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 128
1206 // CHECK1-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
1207 // CHECK1-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
1208 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1209 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1210 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1211 // CHECK1-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1212 // CHECK1-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1213 // CHECK1-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1214 // CHECK1-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1215 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1216 // CHECK1-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1217 // CHECK1-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1218 // CHECK1-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1219 // CHECK1-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1220 // CHECK1-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1221 // CHECK1-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
1222 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1223 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1224 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1225 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1226 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1227 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1228 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1229 // CHECK1:       arrayctor.loop:
1230 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1231 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1232 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1233 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1234 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1235 // CHECK1:       arrayctor.cont:
1236 // CHECK1-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
1237 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
1238 // CHECK1-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
1239 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1240 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1241 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1242 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1243 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1244 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1245 // CHECK1:       cond.true:
1246 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1247 // CHECK1:       cond.false:
1248 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1249 // CHECK1-NEXT:    br label [[COND_END]]
1250 // CHECK1:       cond.end:
1251 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1252 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1253 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1254 // CHECK1-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
1255 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1256 // CHECK1:       omp.inner.for.cond:
1257 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1258 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1259 // CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1260 // CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1261 // CHECK1:       omp.inner.for.cond.cleanup:
1262 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1263 // CHECK1:       omp.inner.for.body:
1264 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1265 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1266 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1267 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1268 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 128
1269 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1270 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1271 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1272 // CHECK1-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
1273 // CHECK1-NEXT:    [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
1274 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4
1275 // CHECK1-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
1276 // CHECK1-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
1277 // CHECK1-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP16]])
1278 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1279 // CHECK1:       omp.body.continue:
1280 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1281 // CHECK1:       omp.inner.for.inc:
1282 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1283 // CHECK1-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1
1284 // CHECK1-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
1285 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1286 // CHECK1:       omp.inner.for.end:
1287 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1288 // CHECK1:       omp.loop.exit:
1289 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1290 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1291 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
1292 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1293 // CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1294 // CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1295 // CHECK1:       .omp.lastprivate.then:
1296 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 128
1297 // CHECK1-NEXT:    store i32 [[TMP23]], i32* [[TMP0]], align 128
1298 // CHECK1-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1299 // CHECK1-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1300 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP24]], i8* align 128 [[TMP25]], i64 8, i1 false)
1301 // CHECK1-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
1302 // CHECK1-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
1303 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
1304 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP27]]
1305 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1306 // CHECK1:       omp.arraycpy.body:
1307 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1308 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1309 // CHECK1-NEXT:    [[CALL13:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
1310 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1311 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1312 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1313 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1314 // CHECK1:       omp.arraycpy.done14:
1315 // CHECK1-NEXT:    [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
1316 // CHECK1-NEXT:    [[CALL15:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[TMP5]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP28]])
1317 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1318 // CHECK1:       .omp.lastprivate.done:
1319 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]]
1320 // CHECK1-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1321 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN16]], i64 2
1322 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1323 // CHECK1:       arraydestroy.body:
1324 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1325 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1326 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1327 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]]
1328 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]]
1329 // CHECK1:       arraydestroy.done17:
1330 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1331 // CHECK1-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
1332 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP31]])
1333 // CHECK1-NEXT:    ret void
1334 //
1335 //
1336 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1337 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1338 // CHECK1-NEXT:  entry:
1339 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1340 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1341 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1342 // CHECK1-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
1343 // CHECK1-NEXT:    ret void
1344 //
1345 //
1346 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1347 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1348 // CHECK1-NEXT:  entry:
1349 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1350 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1351 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1352 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1353 // CHECK1-NEXT:    store i32 0, i32* [[F]], align 4
1354 // CHECK1-NEXT:    ret void
1355 //
1356 //
1357 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
1358 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1359 // CHECK1-NEXT:  entry:
1360 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1361 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1362 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1363 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
1364 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1365 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1366 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1367 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1368 // CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 4
1369 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
1370 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
1371 // CHECK1-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1372 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1373 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0
1374 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 4
1375 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]])
1376 // CHECK1-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
1377 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1378 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1379 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1380 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1381 // CHECK1-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
1382 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1383 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1384 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1
1385 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1386 // CHECK1:       cond.true:
1387 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1388 // CHECK1:       cond.false:
1389 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1390 // CHECK1-NEXT:    br label [[COND_END]]
1391 // CHECK1:       cond.end:
1392 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]
1393 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1394 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1395 // CHECK1-NEXT:    store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4
1396 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1397 // CHECK1:       omp.inner.for.cond:
1398 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1399 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1400 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
1401 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1402 // CHECK1:       omp.inner.for.body:
1403 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1404 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
1405 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1406 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[_TMP4]], align 8
1407 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[TMP7]], align 4
1408 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
1409 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
1410 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 1
1411 // CHECK1-NEXT:    store i32 [[INC]], i32* [[TMP8]], align 4
1412 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1413 // CHECK1:       omp.body.continue:
1414 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1415 // CHECK1:       omp.inner.for.inc:
1416 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1417 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
1418 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1419 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1420 // CHECK1:       omp.inner.for.end:
1421 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1422 // CHECK1:       omp.loop.exit:
1423 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
1424 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
1425 // CHECK1-NEXT:    ret void
1426 //
1427 //
1428 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
1429 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] {
1430 // CHECK1-NEXT:  entry:
1431 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1432 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1433 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1434 // CHECK1-NEXT:    [[A:%.*]] = alloca i32*, align 8
1435 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
1436 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1437 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1438 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1439 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1440 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1441 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1442 // CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 4
1443 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
1444 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1445 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1446 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1447 // CHECK1-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1448 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1449 // CHECK1-NEXT:    [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0
1450 // CHECK1-NEXT:    store i32* [[A1]], i32** [[A]], align 8
1451 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A]], align 8
1452 // CHECK1-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
1453 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1454 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1455 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1456 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1457 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
1458 // CHECK1-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
1459 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1460 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1461 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1462 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1463 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1464 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1465 // CHECK1:       cond.true:
1466 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1467 // CHECK1:       cond.false:
1468 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1469 // CHECK1-NEXT:    br label [[COND_END]]
1470 // CHECK1:       cond.end:
1471 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1472 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1473 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1474 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1475 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1476 // CHECK1:       omp.inner.for.cond:
1477 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1478 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1479 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1480 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1481 // CHECK1:       omp.inner.for.body:
1482 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1483 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1484 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1485 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1486 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
1487 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1488 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
1489 // CHECK1-NEXT:    store i32 [[INC]], i32* [[TMP11]], align 4
1490 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1491 // CHECK1:       omp.body.continue:
1492 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1493 // CHECK1:       omp.inner.for.inc:
1494 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1495 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP13]], 1
1496 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1497 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1498 // CHECK1:       omp.inner.for.end:
1499 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1500 // CHECK1:       omp.loop.exit:
1501 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1502 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1503 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1504 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1505 // CHECK1:       .omp.lastprivate.then:
1506 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[_TMP4]], align 8
1507 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
1508 // CHECK1-NEXT:    store i32 [[TMP17]], i32* [[TMP2]], align 4
1509 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1510 // CHECK1:       .omp.lastprivate.done:
1511 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
1512 // CHECK1-NEXT:    ret void
1513 //
1514 //
1515 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1516 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1517 // CHECK1-NEXT:  entry:
1518 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1519 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1520 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1521 // CHECK1-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
1522 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1523 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1524 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1525 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
1526 // CHECK1-NEXT:    ret void
1527 //
1528 //
1529 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1530 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1531 // CHECK1-NEXT:  entry:
1532 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1533 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1534 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1535 // CHECK1-NEXT:    ret void
1536 //
1537 //
1538 // CHECK2-LABEL: define {{[^@]+}}@main
1539 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
1540 // CHECK2-NEXT:  entry:
1541 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1542 // CHECK2-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
1543 // CHECK2-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1544 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1545 // CHECK2-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1546 // CHECK2-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1547 // CHECK2-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
1548 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1549 // CHECK2-NEXT:    call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
1550 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
1551 // CHECK2-NEXT:    store i32 0, i32* [[T_VAR]], align 4
1552 // CHECK2-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1553 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1554 // CHECK2-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1555 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
1556 // CHECK2-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1557 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
1558 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00)
1559 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar)
1560 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
1561 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1562 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*))
1563 // CHECK2-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
1564 // CHECK2-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
1565 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
1566 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1567 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1568 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1569 // CHECK2:       arraydestroy.body:
1570 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1571 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1572 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1573 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1574 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1575 // CHECK2:       arraydestroy.done1:
1576 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
1577 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
1578 // CHECK2-NEXT:    ret i32 [[TMP2]]
1579 //
1580 //
1581 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
1582 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
1583 // CHECK2-NEXT:  entry:
1584 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1585 // CHECK2-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
1586 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1587 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
1588 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1589 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
1590 // CHECK2-NEXT:    call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]])
1591 // CHECK2-NEXT:    ret void
1592 //
1593 //
1594 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1595 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1596 // CHECK2-NEXT:  entry:
1597 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1598 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1599 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1600 // CHECK2-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
1601 // CHECK2-NEXT:    ret void
1602 //
1603 //
1604 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1605 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1606 // CHECK2-NEXT:  entry:
1607 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1608 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1609 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1610 // CHECK2-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
1611 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1612 // CHECK2-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1613 // CHECK2-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
1614 // CHECK2-NEXT:    ret void
1615 //
1616 //
1617 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1618 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1619 // CHECK2-NEXT:  entry:
1620 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1621 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1622 // CHECK2-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1623 // CHECK2-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1624 // CHECK2-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1625 // CHECK2-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1626 // CHECK2-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1627 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1628 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1629 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1630 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1631 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1632 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1633 // CHECK2-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
1634 // CHECK2-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4
1635 // CHECK2-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
1636 // CHECK2-NEXT:    [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1637 // CHECK2-NEXT:    [[SIVAR5:%.*]] = alloca i32, align 4
1638 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1639 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1640 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1641 // CHECK2-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1642 // CHECK2-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1643 // CHECK2-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1644 // CHECK2-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1645 // CHECK2-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1646 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1647 // CHECK2-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1648 // CHECK2-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1649 // CHECK2-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1650 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1651 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1652 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1653 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1654 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1655 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
1656 // CHECK2-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1657 // CHECK2-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1658 // CHECK2:       arrayctor.loop:
1659 // CHECK2-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1660 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1661 // CHECK2-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1662 // CHECK2-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1663 // CHECK2-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1664 // CHECK2:       arrayctor.cont:
1665 // CHECK2-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
1666 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1667 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1668 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1669 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1670 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
1671 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1672 // CHECK2:       cond.true:
1673 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1674 // CHECK2:       cond.false:
1675 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1676 // CHECK2-NEXT:    br label [[COND_END]]
1677 // CHECK2:       cond.end:
1678 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1679 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1680 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1681 // CHECK2-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1682 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1683 // CHECK2:       omp.inner.for.cond:
1684 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1685 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1686 // CHECK2-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1687 // CHECK2-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1688 // CHECK2:       omp.inner.for.cond.cleanup:
1689 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1690 // CHECK2:       omp.inner.for.body:
1691 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1692 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
1693 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1694 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1695 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4
1696 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I]], align 4
1697 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
1698 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]]
1699 // CHECK2-NEXT:    store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4
1700 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1701 // CHECK2-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64
1702 // CHECK2-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM7]]
1703 // CHECK2-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
1704 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
1705 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[SIVAR5]], align 4
1706 // CHECK2-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]]
1707 // CHECK2-NEXT:    store i32 [[ADD9]], i32* [[SIVAR5]], align 4
1708 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1709 // CHECK2:       omp.body.continue:
1710 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1711 // CHECK2:       omp.inner.for.inc:
1712 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1713 // CHECK2-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
1714 // CHECK2-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1715 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1716 // CHECK2:       omp.inner.for.end:
1717 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1718 // CHECK2:       omp.loop.exit:
1719 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1720 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1721 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
1722 // CHECK2-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1723 // CHECK2-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1724 // CHECK2-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1725 // CHECK2:       .omp.lastprivate.then:
1726 // CHECK2-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR1]], align 4
1727 // CHECK2-NEXT:    store i32 [[TMP23]], i32* [[TMP0]], align 4
1728 // CHECK2-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1729 // CHECK2-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
1730 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
1731 // CHECK2-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1732 // CHECK2-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S*
1733 // CHECK2-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
1734 // CHECK2-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]]
1735 // CHECK2-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1736 // CHECK2:       omp.arraycpy.body:
1737 // CHECK2-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1738 // CHECK2-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1739 // CHECK2-NEXT:    [[CALL12:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
1740 // CHECK2-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1741 // CHECK2-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1742 // CHECK2-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1743 // CHECK2-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1744 // CHECK2:       omp.arraycpy.done13:
1745 // CHECK2-NEXT:    [[CALL14:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
1746 // CHECK2-NEXT:    [[TMP28:%.*]] = load i32, i32* [[SIVAR5]], align 4
1747 // CHECK2-NEXT:    store i32 [[TMP28]], i32* [[TMP4]], align 4
1748 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1749 // CHECK2:       .omp.lastprivate.done:
1750 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
1751 // CHECK2-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
1752 // CHECK2-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
1753 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1754 // CHECK2:       arraydestroy.body:
1755 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1756 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1757 // CHECK2-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1758 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1759 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1760 // CHECK2:       arraydestroy.done16:
1761 // CHECK2-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1762 // CHECK2-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
1763 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP31]])
1764 // CHECK2-NEXT:    ret void
1765 //
1766 //
1767 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1768 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1769 // CHECK2-NEXT:  entry:
1770 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1771 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1772 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1773 // CHECK2-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
1774 // CHECK2-NEXT:    ret void
1775 //
1776 //
1777 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1778 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1779 // CHECK2-NEXT:  entry:
1780 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1781 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1782 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1783 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1784 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1785 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1786 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1787 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1788 // CHECK2-NEXT:    [[F:%.*]] = alloca float, align 4
1789 // CHECK2-NEXT:    [[X:%.*]] = alloca double, align 8
1790 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1791 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1792 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1793 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1794 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1795 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1796 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1797 // CHECK2-NEXT:    [[TMP0:%.*]] = load float, float* @f, align 4
1798 // CHECK2-NEXT:    store float [[TMP0]], float* [[F]], align 4
1799 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1800 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1801 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
1802 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1803 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1804 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1805 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1806 // CHECK2:       cond.true:
1807 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1808 // CHECK2:       cond.false:
1809 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1810 // CHECK2-NEXT:    br label [[COND_END]]
1811 // CHECK2:       cond.end:
1812 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1813 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1814 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1815 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1816 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1817 // CHECK2:       omp.inner.for.cond:
1818 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1819 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1820 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1821 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1822 // CHECK2:       omp.inner.for.body:
1823 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1824 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1825 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1826 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1827 // CHECK2-NEXT:    [[TMP9:%.*]] = load double, double* [[X]], align 8
1828 // CHECK2-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
1829 // CHECK2-NEXT:    store double [[INC]], double* [[X]], align 8
1830 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1831 // CHECK2:       omp.body.continue:
1832 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1833 // CHECK2:       omp.inner.for.inc:
1834 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1835 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1836 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1837 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1838 // CHECK2:       omp.inner.for.end:
1839 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1840 // CHECK2:       omp.loop.exit:
1841 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1842 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1843 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1844 // CHECK2-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1845 // CHECK2:       .omp.lastprivate.then:
1846 // CHECK2-NEXT:    [[TMP13:%.*]] = load double, double* [[X]], align 8
1847 // CHECK2-NEXT:    store double [[TMP13]], double* @_ZN1A1xE, align 8
1848 // CHECK2-NEXT:    [[TMP14:%.*]] = load float, float* [[F]], align 4
1849 // CHECK2-NEXT:    store float [[TMP14]], float* @f, align 4
1850 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1851 // CHECK2:       .omp.lastprivate.done:
1852 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
1853 // CHECK2-NEXT:    ret void
1854 //
1855 //
1856 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1857 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1858 // CHECK2-NEXT:  entry:
1859 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1860 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1861 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1862 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1863 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1864 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1865 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1866 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1867 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1868 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1869 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1870 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1871 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1872 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1873 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1874 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1875 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1876 // CHECK2-NEXT:    [[DOTF__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 4, i8* inttoptr (i64 3 to i8*))
1877 // CHECK2-NEXT:    [[DOTF__ADDR:%.*]] = bitcast i8* [[DOTF__VOID_ADDR]] to float*
1878 // CHECK2-NEXT:    [[TMP2:%.*]] = load float, float* @f, align 4
1879 // CHECK2-NEXT:    store float [[TMP2]], float* [[DOTF__ADDR]], align 4
1880 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
1881 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1882 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1883 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1884 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1885 // CHECK2:       cond.true:
1886 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1887 // CHECK2:       cond.false:
1888 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1889 // CHECK2-NEXT:    br label [[COND_END]]
1890 // CHECK2:       cond.end:
1891 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1892 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1893 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1894 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1895 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1896 // CHECK2:       omp.inner.for.cond:
1897 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1898 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1899 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1900 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1901 // CHECK2:       omp.inner.for.cond.cleanup:
1902 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1903 // CHECK2:       omp.inner.for.body:
1904 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1905 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1906 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1907 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1908 // CHECK2-NEXT:    [[TMP9:%.*]] = load double, double* @_ZN1A1xE, align 8
1909 // CHECK2-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
1910 // CHECK2-NEXT:    store double [[INC]], double* @_ZN1A1xE, align 8
1911 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1912 // CHECK2:       omp.body.continue:
1913 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1914 // CHECK2:       omp.inner.for.inc:
1915 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1916 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1917 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1918 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1919 // CHECK2:       omp.inner.for.end:
1920 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1921 // CHECK2:       omp.loop.exit:
1922 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1923 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1924 // CHECK2-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1925 // CHECK2-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1926 // CHECK2:       .omp.lastprivate.then:
1927 // CHECK2-NEXT:    [[TMP13:%.*]] = load float, float* [[DOTF__ADDR]], align 4
1928 // CHECK2-NEXT:    store float [[TMP13]], float* @f, align 4
1929 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1930 // CHECK2:       .omp.lastprivate.done:
1931 // CHECK2-NEXT:    [[TMP14:%.*]] = bitcast float* [[DOTF__ADDR]] to i8*
1932 // CHECK2-NEXT:    call void @__kmpc_free(i32 [[TMP1]], i8* [[TMP14]], i8* inttoptr (i64 3 to i8*))
1933 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
1934 // CHECK2-NEXT:    ret void
1935 //
1936 //
1937 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1938 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1939 // CHECK2-NEXT:  entry:
1940 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1941 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1942 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1943 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i8, align 1
1944 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1945 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1946 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1947 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1948 // CHECK2-NEXT:    [[F:%.*]] = alloca float, align 4
1949 // CHECK2-NEXT:    [[CNT:%.*]] = alloca i8, align 1
1950 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1951 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1952 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1953 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1954 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1955 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1956 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1957 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1958 // CHECK2-NEXT:    [[DOTCNT__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 1, i8* inttoptr (i64 3 to i8*))
1959 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1960 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1961 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1962 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1963 // CHECK2:       cond.true:
1964 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1965 // CHECK2:       cond.false:
1966 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1967 // CHECK2-NEXT:    br label [[COND_END]]
1968 // CHECK2:       cond.end:
1969 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1970 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1971 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1972 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1973 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1974 // CHECK2:       omp.inner.for.cond:
1975 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1976 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1977 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1978 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1979 // CHECK2:       omp.inner.for.cond.cleanup:
1980 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1981 // CHECK2:       omp.inner.for.body:
1982 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1983 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
1984 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1985 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i32 [[ADD]] to i8
1986 // CHECK2-NEXT:    store i8 [[CONV]], i8* [[DOTCNT__VOID_ADDR]], align 1
1987 // CHECK2-NEXT:    [[TMP8:%.*]] = load double, double* @_ZN1A1xE, align 8
1988 // CHECK2-NEXT:    [[INC:%.*]] = fadd double [[TMP8]], 1.000000e+00
1989 // CHECK2-NEXT:    store double [[INC]], double* @_ZN1A1xE, align 8
1990 // CHECK2-NEXT:    store float 0.000000e+00, float* [[F]], align 4
1991 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1992 // CHECK2:       omp.body.continue:
1993 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1994 // CHECK2:       omp.inner.for.inc:
1995 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1996 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
1997 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1998 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1999 // CHECK2:       omp.inner.for.end:
2000 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2001 // CHECK2:       omp.loop.exit:
2002 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2003 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2004 // CHECK2-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
2005 // CHECK2-NEXT:    br i1 [[TMP11]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2006 // CHECK2:       .omp.lastprivate.then:
2007 // CHECK2-NEXT:    store i8 2, i8* [[DOTCNT__VOID_ADDR]], align 1
2008 // CHECK2-NEXT:    [[TMP12:%.*]] = load i8, i8* [[DOTCNT__VOID_ADDR]], align 1
2009 // CHECK2-NEXT:    store i8 [[TMP12]], i8* @cnt, align 1
2010 // CHECK2-NEXT:    [[TMP13:%.*]] = load float, float* [[F]], align 4
2011 // CHECK2-NEXT:    store float [[TMP13]], float* @f, align 4
2012 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2013 // CHECK2:       .omp.lastprivate.done:
2014 // CHECK2-NEXT:    call void @__kmpc_free(i32 [[TMP1]], i8* [[DOTCNT__VOID_ADDR]], i8* inttoptr (i64 3 to i8*))
2015 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
2016 // CHECK2-NEXT:    ret void
2017 //
2018 //
2019 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2020 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] {
2021 // CHECK2-NEXT:  entry:
2022 // CHECK2-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2023 // CHECK2-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2024 // CHECK2-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
2025 // CHECK2-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128
2026 // CHECK2-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 128
2027 // CHECK2-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
2028 // CHECK2-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 128
2029 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
2030 // CHECK2-NEXT:    call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]])
2031 // CHECK2-NEXT:    store i32 0, i32* [[T_VAR]], align 128
2032 // CHECK2-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2033 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
2034 // CHECK2-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
2035 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
2036 // CHECK2-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
2037 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
2038 // CHECK2-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 128
2039 // CHECK2-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 128
2040 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP1]])
2041 // CHECK2-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2042 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2043 // CHECK2-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2044 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2045 // CHECK2:       arraydestroy.body:
2046 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2047 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2048 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
2049 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2050 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
2051 // CHECK2:       arraydestroy.done1:
2052 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
2053 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[RETVAL]], align 4
2054 // CHECK2-NEXT:    ret i32 [[TMP3]]
2055 //
2056 //
2057 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
2058 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2059 // CHECK2-NEXT:  entry:
2060 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2061 // CHECK2-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
2062 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2063 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2064 // CHECK2-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
2065 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2066 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2067 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2068 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2069 // CHECK2-NEXT:    [[A3:%.*]] = alloca i32, align 4
2070 // CHECK2-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
2071 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
2072 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2073 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
2074 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2075 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2076 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 8
2077 // CHECK2-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
2078 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
2079 // CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2080 // CHECK2-NEXT:    store i8 [[BF_CLEAR]], i8* [[B]], align 8
2081 // CHECK2-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
2082 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
2083 // CHECK2-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
2084 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
2085 // CHECK2-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
2086 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2087 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2088 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2089 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2090 // CHECK2-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
2091 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2092 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2093 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2094 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2095 // CHECK2:       cond.true:
2096 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2097 // CHECK2:       cond.false:
2098 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2099 // CHECK2-NEXT:    br label [[COND_END]]
2100 // CHECK2:       cond.end:
2101 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2102 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2103 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2104 // CHECK2-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2105 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2106 // CHECK2:       omp.inner.for.cond:
2107 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2108 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2109 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2110 // CHECK2-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2111 // CHECK2:       omp.inner.for.body:
2112 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2113 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2114 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2115 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
2116 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[TMP8]], align 4
2117 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8
2118 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2119 // CHECK2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP10]], 1
2120 // CHECK2-NEXT:    store i32 [[INC]], i32* [[TMP9]], align 4
2121 // CHECK2-NEXT:    [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
2122 // CHECK2-NEXT:    [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8
2123 // CHECK2-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
2124 // CHECK2-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
2125 // CHECK2-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
2126 // CHECK2-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
2127 // CHECK2-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
2128 // CHECK2-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8
2129 // CHECK2-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
2130 // CHECK2-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
2131 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
2132 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B6]], align 8
2133 // CHECK2-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
2134 // CHECK2-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
2135 // CHECK2-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
2136 // CHECK2-NEXT:    [[C10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
2137 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C10]], align 8
2138 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2139 // CHECK2-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
2140 // CHECK2-NEXT:    store i32 [[DIV]], i32* [[TMP12]], align 4
2141 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2142 // CHECK2:       omp.body.continue:
2143 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2144 // CHECK2:       omp.inner.for.inc:
2145 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2146 // CHECK2-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP14]], 1
2147 // CHECK2-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
2148 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2149 // CHECK2:       omp.inner.for.end:
2150 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2151 // CHECK2:       omp.loop.exit:
2152 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2153 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
2154 // CHECK2-NEXT:    ret void
2155 //
2156 //
2157 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
2158 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] {
2159 // CHECK2-NEXT:  entry:
2160 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2161 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2162 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2163 // CHECK2-NEXT:    [[E:%.*]] = alloca [4 x i8]*, align 8
2164 // CHECK2-NEXT:    [[A:%.*]] = alloca i32*, align 8
2165 // CHECK2-NEXT:    [[B:%.*]] = alloca i32, align 4
2166 // CHECK2-NEXT:    [[C:%.*]] = alloca i32*, align 8
2167 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
2168 // CHECK2-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
2169 // CHECK2-NEXT:    [[_TMP5:%.*]] = alloca [4 x i8]*, align 8
2170 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2171 // CHECK2-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2172 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2173 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2174 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2175 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2176 // CHECK2-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
2177 // CHECK2-NEXT:    [[_TMP8:%.*]] = alloca [4 x i8]*, align 8
2178 // CHECK2-NEXT:    [[A9:%.*]] = alloca i32, align 4
2179 // CHECK2-NEXT:    [[_TMP10:%.*]] = alloca i32*, align 8
2180 // CHECK2-NEXT:    [[B11:%.*]] = alloca i32, align 4
2181 // CHECK2-NEXT:    [[C12:%.*]] = alloca i32, align 4
2182 // CHECK2-NEXT:    [[_TMP13:%.*]] = alloca i32*, align 8
2183 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2184 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2185 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2186 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2187 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2188 // CHECK2-NEXT:    [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
2189 // CHECK2-NEXT:    store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8
2190 // CHECK2-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
2191 // CHECK2-NEXT:    store i32* [[A2]], i32** [[A]], align 8
2192 // CHECK2-NEXT:    [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3
2193 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8
2194 // CHECK2-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
2195 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A]], align 8
2196 // CHECK2-NEXT:    store i32* [[TMP2]], i32** [[TMP]], align 8
2197 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
2198 // CHECK2-NEXT:    store i32* [[TMP3]], i32** [[_TMP4]], align 8
2199 // CHECK2-NEXT:    [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8
2200 // CHECK2-NEXT:    store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8
2201 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2202 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2203 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2204 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2205 // CHECK2-NEXT:    [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
2206 // CHECK2-NEXT:    [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8*
2207 // CHECK2-NEXT:    [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8*
2208 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false)
2209 // CHECK2-NEXT:    store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8
2210 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2211 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
2212 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
2213 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8
2214 // CHECK2-NEXT:    store i32* [[A9]], i32** [[_TMP10]], align 8
2215 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
2216 // CHECK2-NEXT:    store i32* [[C12]], i32** [[_TMP13]], align 8
2217 // CHECK2-NEXT:    [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
2218 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2219 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2220 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
2221 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2222 // CHECK2:       cond.true:
2223 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2224 // CHECK2:       cond.false:
2225 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2226 // CHECK2-NEXT:    br label [[COND_END]]
2227 // CHECK2:       cond.end:
2228 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
2229 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2230 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2231 // CHECK2-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
2232 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2233 // CHECK2:       omp.inner.for.cond:
2234 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2235 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2236 // CHECK2-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2237 // CHECK2-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2238 // CHECK2:       omp.inner.for.body:
2239 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2240 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2241 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2242 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2243 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8
2244 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
2245 // CHECK2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP20]], 1
2246 // CHECK2-NEXT:    store i32 [[INC]], i32* [[TMP19]], align 4
2247 // CHECK2-NEXT:    [[TMP21:%.*]] = load i32, i32* [[B11]], align 4
2248 // CHECK2-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP21]], -1
2249 // CHECK2-NEXT:    store i32 [[DEC]], i32* [[B11]], align 4
2250 // CHECK2-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[_TMP13]], align 8
2251 // CHECK2-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
2252 // CHECK2-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP23]], 1
2253 // CHECK2-NEXT:    store i32 [[DIV]], i32* [[TMP22]], align 4
2254 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2255 // CHECK2:       omp.body.continue:
2256 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2257 // CHECK2:       omp.inner.for.inc:
2258 // CHECK2-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2259 // CHECK2-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP24]], 1
2260 // CHECK2-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
2261 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2262 // CHECK2:       omp.inner.for.end:
2263 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2264 // CHECK2:       omp.loop.exit:
2265 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
2266 // CHECK2-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2267 // CHECK2-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2268 // CHECK2-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2269 // CHECK2:       .omp.lastprivate.then:
2270 // CHECK2-NEXT:    [[TMP27:%.*]] = load i32*, i32** [[_TMP10]], align 8
2271 // CHECK2-NEXT:    [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
2272 // CHECK2-NEXT:    store i32 [[TMP28]], i32* [[TMP10]], align 4
2273 // CHECK2-NEXT:    [[TMP29:%.*]] = load i32, i32* [[B11]], align 4
2274 // CHECK2-NEXT:    store i32 [[TMP29]], i32* [[B]], align 4
2275 // CHECK2-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[_TMP13]], align 8
2276 // CHECK2-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
2277 // CHECK2-NEXT:    store i32 [[TMP31]], i32* [[TMP11]], align 4
2278 // CHECK2-NEXT:    [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
2279 // CHECK2-NEXT:    [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1
2280 // CHECK2-NEXT:    store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1
2281 // CHECK2-NEXT:    [[TMP34:%.*]] = load i32, i32* [[B11]], align 4
2282 // CHECK2-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
2283 // CHECK2-NEXT:    [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8
2284 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
2285 // CHECK2-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15
2286 // CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2287 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
2288 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
2289 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2290 // CHECK2:       .omp.lastprivate.done:
2291 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
2292 // CHECK2-NEXT:    ret void
2293 //
2294 //
2295 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2296 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2297 // CHECK2-NEXT:  entry:
2298 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2299 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2300 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2301 // CHECK2-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2302 // CHECK2-NEXT:    store float 0.000000e+00, float* [[F]], align 4
2303 // CHECK2-NEXT:    ret void
2304 //
2305 //
2306 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2307 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2308 // CHECK2-NEXT:  entry:
2309 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2310 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2311 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2312 // CHECK2-NEXT:    ret void
2313 //
2314 //
2315 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2316 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2317 // CHECK2-NEXT:  entry:
2318 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2319 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2320 // CHECK2-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2321 // CHECK2-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
2322 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2323 // CHECK2-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2324 // CHECK2-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2325 // CHECK2-NEXT:    store float [[TMP0]], float* [[F]], align 4
2326 // CHECK2-NEXT:    ret void
2327 //
2328 //
2329 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2330 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2331 // CHECK2-NEXT:  entry:
2332 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2333 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2334 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2335 // CHECK2-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2336 // CHECK2-NEXT:    ret void
2337 //
2338 //
2339 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
2340 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2341 // CHECK2-NEXT:  entry:
2342 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
2343 // CHECK2-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
2344 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
2345 // CHECK2-NEXT:    call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]])
2346 // CHECK2-NEXT:    ret void
2347 //
2348 //
2349 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2350 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2351 // CHECK2-NEXT:  entry:
2352 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2353 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2354 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2355 // CHECK2-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2356 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2357 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2358 // CHECK2-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
2359 // CHECK2-NEXT:    ret void
2360 //
2361 //
2362 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5
2363 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2364 // CHECK2-NEXT:  entry:
2365 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2366 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2367 // CHECK2-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2368 // CHECK2-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2369 // CHECK2-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2370 // CHECK2-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2371 // CHECK2-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
2372 // CHECK2-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
2373 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2374 // CHECK2-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2375 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2376 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2377 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2378 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2379 // CHECK2-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 128
2380 // CHECK2-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 128
2381 // CHECK2-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 128
2382 // CHECK2-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
2383 // CHECK2-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
2384 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2385 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2386 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2387 // CHECK2-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2388 // CHECK2-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2389 // CHECK2-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2390 // CHECK2-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2391 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2392 // CHECK2-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2393 // CHECK2-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2394 // CHECK2-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2395 // CHECK2-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
2396 // CHECK2-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2397 // CHECK2-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
2398 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2399 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2400 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2401 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2402 // CHECK2-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2403 // CHECK2-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2404 // CHECK2-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2405 // CHECK2:       arrayctor.loop:
2406 // CHECK2-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2407 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2408 // CHECK2-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2409 // CHECK2-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2410 // CHECK2-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2411 // CHECK2:       arrayctor.cont:
2412 // CHECK2-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
2413 // CHECK2-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
2414 // CHECK2-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
2415 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2416 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2417 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2418 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2419 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2420 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2421 // CHECK2:       cond.true:
2422 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2423 // CHECK2:       cond.false:
2424 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2425 // CHECK2-NEXT:    br label [[COND_END]]
2426 // CHECK2:       cond.end:
2427 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2428 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2429 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2430 // CHECK2-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2431 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2432 // CHECK2:       omp.inner.for.cond:
2433 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2434 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2435 // CHECK2-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2436 // CHECK2-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2437 // CHECK2:       omp.inner.for.cond.cleanup:
2438 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2439 // CHECK2:       omp.inner.for.body:
2440 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2441 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
2442 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2443 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2444 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 128
2445 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2446 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2447 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
2448 // CHECK2-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
2449 // CHECK2-NEXT:    [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2450 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4
2451 // CHECK2-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
2452 // CHECK2-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
2453 // CHECK2-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP16]])
2454 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2455 // CHECK2:       omp.body.continue:
2456 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2457 // CHECK2:       omp.inner.for.inc:
2458 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2459 // CHECK2-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1
2460 // CHECK2-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
2461 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2462 // CHECK2:       omp.inner.for.end:
2463 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2464 // CHECK2:       omp.loop.exit:
2465 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2466 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
2467 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
2468 // CHECK2-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2469 // CHECK2-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2470 // CHECK2-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2471 // CHECK2:       .omp.lastprivate.then:
2472 // CHECK2-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 128
2473 // CHECK2-NEXT:    store i32 [[TMP23]], i32* [[TMP0]], align 128
2474 // CHECK2-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2475 // CHECK2-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2476 // CHECK2-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP24]], i8* align 128 [[TMP25]], i64 8, i1 false)
2477 // CHECK2-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2478 // CHECK2-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
2479 // CHECK2-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
2480 // CHECK2-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP27]]
2481 // CHECK2-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2482 // CHECK2:       omp.arraycpy.body:
2483 // CHECK2-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2484 // CHECK2-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2485 // CHECK2-NEXT:    [[CALL13:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
2486 // CHECK2-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2487 // CHECK2-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2488 // CHECK2-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
2489 // CHECK2-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
2490 // CHECK2:       omp.arraycpy.done14:
2491 // CHECK2-NEXT:    [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2492 // CHECK2-NEXT:    [[CALL15:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[TMP5]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP28]])
2493 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2494 // CHECK2:       .omp.lastprivate.done:
2495 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]]
2496 // CHECK2-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2497 // CHECK2-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN16]], i64 2
2498 // CHECK2-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2499 // CHECK2:       arraydestroy.body:
2500 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2501 // CHECK2-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2502 // CHECK2-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
2503 // CHECK2-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]]
2504 // CHECK2-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]]
2505 // CHECK2:       arraydestroy.done17:
2506 // CHECK2-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2507 // CHECK2-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
2508 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP31]])
2509 // CHECK2-NEXT:    ret void
2510 //
2511 //
2512 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2513 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2514 // CHECK2-NEXT:  entry:
2515 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2516 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2517 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2518 // CHECK2-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
2519 // CHECK2-NEXT:    ret void
2520 //
2521 //
2522 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2523 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2524 // CHECK2-NEXT:  entry:
2525 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2526 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2527 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2528 // CHECK2-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2529 // CHECK2-NEXT:    store i32 0, i32* [[F]], align 4
2530 // CHECK2-NEXT:    ret void
2531 //
2532 //
2533 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
2534 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2535 // CHECK2-NEXT:  entry:
2536 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
2537 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2538 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2539 // CHECK2-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
2540 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2541 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2542 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2543 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2544 // CHECK2-NEXT:    [[A3:%.*]] = alloca i32, align 4
2545 // CHECK2-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
2546 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
2547 // CHECK2-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
2548 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
2549 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0
2550 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 4
2551 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]])
2552 // CHECK2-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
2553 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2554 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2555 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2556 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2557 // CHECK2-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
2558 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2559 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2560 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1
2561 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2562 // CHECK2:       cond.true:
2563 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2564 // CHECK2:       cond.false:
2565 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2566 // CHECK2-NEXT:    br label [[COND_END]]
2567 // CHECK2:       cond.end:
2568 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]
2569 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2570 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2571 // CHECK2-NEXT:    store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4
2572 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2573 // CHECK2:       omp.inner.for.cond:
2574 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2575 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2576 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
2577 // CHECK2-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2578 // CHECK2:       omp.inner.for.body:
2579 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2580 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
2581 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2582 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[_TMP4]], align 8
2583 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[TMP7]], align 4
2584 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
2585 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
2586 // CHECK2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 1
2587 // CHECK2-NEXT:    store i32 [[INC]], i32* [[TMP8]], align 4
2588 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2589 // CHECK2:       omp.body.continue:
2590 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2591 // CHECK2:       omp.inner.for.inc:
2592 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2593 // CHECK2-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
2594 // CHECK2-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2595 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2596 // CHECK2:       omp.inner.for.end:
2597 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2598 // CHECK2:       omp.loop.exit:
2599 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
2600 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
2601 // CHECK2-NEXT:    ret void
2602 //
2603 //
2604 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
2605 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] {
2606 // CHECK2-NEXT:  entry:
2607 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2608 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2609 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
2610 // CHECK2-NEXT:    [[A:%.*]] = alloca i32*, align 8
2611 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
2612 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2613 // CHECK2-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2614 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2615 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2616 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2617 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2618 // CHECK2-NEXT:    [[A3:%.*]] = alloca i32, align 4
2619 // CHECK2-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
2620 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
2621 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2622 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2623 // CHECK2-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
2624 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
2625 // CHECK2-NEXT:    [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0
2626 // CHECK2-NEXT:    store i32* [[A1]], i32** [[A]], align 8
2627 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A]], align 8
2628 // CHECK2-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
2629 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2630 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2631 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2632 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2633 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
2634 // CHECK2-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
2635 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2636 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2637 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2638 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2639 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
2640 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2641 // CHECK2:       cond.true:
2642 // CHECK2-NEXT:    br label [[COND_END:%.*]]
2643 // CHECK2:       cond.false:
2644 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2645 // CHECK2-NEXT:    br label [[COND_END]]
2646 // CHECK2:       cond.end:
2647 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2648 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2649 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2650 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2651 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2652 // CHECK2:       omp.inner.for.cond:
2653 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2654 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2655 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2656 // CHECK2-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2657 // CHECK2:       omp.inner.for.body:
2658 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2659 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2660 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2661 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2662 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
2663 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2664 // CHECK2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
2665 // CHECK2-NEXT:    store i32 [[INC]], i32* [[TMP11]], align 4
2666 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2667 // CHECK2:       omp.body.continue:
2668 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2669 // CHECK2:       omp.inner.for.inc:
2670 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2671 // CHECK2-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP13]], 1
2672 // CHECK2-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2673 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
2674 // CHECK2:       omp.inner.for.end:
2675 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2676 // CHECK2:       omp.loop.exit:
2677 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2678 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2679 // CHECK2-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2680 // CHECK2-NEXT:    br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2681 // CHECK2:       .omp.lastprivate.then:
2682 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[_TMP4]], align 8
2683 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
2684 // CHECK2-NEXT:    store i32 [[TMP17]], i32* [[TMP2]], align 4
2685 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2686 // CHECK2:       .omp.lastprivate.done:
2687 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
2688 // CHECK2-NEXT:    ret void
2689 //
2690 //
2691 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2692 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2693 // CHECK2-NEXT:  entry:
2694 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2695 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2696 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2697 // CHECK2-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
2698 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2699 // CHECK2-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2700 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2701 // CHECK2-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
2702 // CHECK2-NEXT:    ret void
2703 //
2704 //
2705 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2706 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2707 // CHECK2-NEXT:  entry:
2708 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2709 // CHECK2-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2710 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2711 // CHECK2-NEXT:    ret void
2712 //
2713 //
2714 // CHECK3-LABEL: define {{[^@]+}}@main
2715 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
2716 // CHECK3-NEXT:  entry:
2717 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2718 // CHECK3-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
2719 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
2720 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
2721 // CHECK3-NEXT:    call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
2722 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
2723 // CHECK3-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP0]], align 8
2724 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]])
2725 // CHECK3-NEXT:    ret i32 0
2726 //
2727 //
2728 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
2729 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
2730 // CHECK3-NEXT:  entry:
2731 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2732 // CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
2733 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2734 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
2735 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2736 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
2737 // CHECK3-NEXT:    call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]])
2738 // CHECK3-NEXT:    ret void
2739 //
2740 //
2741 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
2742 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2743 // CHECK3-NEXT:  entry:
2744 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2745 // CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
2746 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2747 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2748 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
2749 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2750 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2751 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2752 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2753 // CHECK3-NEXT:    [[A3:%.*]] = alloca i32, align 4
2754 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
2755 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8
2756 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
2757 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2758 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
2759 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2760 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2761 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 8
2762 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
2763 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
2764 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2765 // CHECK3-NEXT:    store i8 [[BF_CLEAR]], i8* [[B]], align 8
2766 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
2767 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
2768 // CHECK3-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
2769 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
2770 // CHECK3-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
2771 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2772 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2773 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2774 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2775 // CHECK3-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
2776 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2777 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2778 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2779 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2780 // CHECK3:       cond.true:
2781 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2782 // CHECK3:       cond.false:
2783 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2784 // CHECK3-NEXT:    br label [[COND_END]]
2785 // CHECK3:       cond.end:
2786 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2787 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2788 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2789 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2790 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2791 // CHECK3:       omp.inner.for.cond:
2792 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2793 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2794 // CHECK3-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2795 // CHECK3-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2796 // CHECK3:       omp.inner.for.body:
2797 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2798 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2799 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2800 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
2801 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[TMP8]], align 4
2802 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0
2803 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP9]], align 8
2804 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1
2805 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
2806 // CHECK3-NEXT:    store i32* [[TMP11]], i32** [[TMP10]], align 8
2807 // CHECK3-NEXT:    call void @_ZZN2SSC1ERiENKUlvE0_clEv(%class.anon.1* nonnull align 8 dereferenceable(16) [[REF_TMP]])
2808 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2809 // CHECK3:       omp.body.continue:
2810 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2811 // CHECK3:       omp.inner.for.inc:
2812 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2813 // CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1
2814 // CHECK3-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2815 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2816 // CHECK3:       omp.inner.for.end:
2817 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2818 // CHECK3:       omp.loop.exit:
2819 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
2820 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP0]])
2821 // CHECK3-NEXT:    ret void
2822 //
2823 //
2824 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
2825 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
2826 // CHECK3-NEXT:  entry:
2827 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2828 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2829 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2830 // CHECK3-NEXT:    [[E:%.*]] = alloca [4 x i8]*, align 8
2831 // CHECK3-NEXT:    [[A:%.*]] = alloca i32*, align 8
2832 // CHECK3-NEXT:    [[B:%.*]] = alloca i32, align 4
2833 // CHECK3-NEXT:    [[C:%.*]] = alloca i32*, align 8
2834 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
2835 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
2836 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca [4 x i8]*, align 8
2837 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2838 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2839 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2840 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2841 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2842 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2843 // CHECK3-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
2844 // CHECK3-NEXT:    [[_TMP8:%.*]] = alloca [4 x i8]*, align 8
2845 // CHECK3-NEXT:    [[A9:%.*]] = alloca i32, align 4
2846 // CHECK3-NEXT:    [[_TMP10:%.*]] = alloca i32*, align 8
2847 // CHECK3-NEXT:    [[B11:%.*]] = alloca i32, align 4
2848 // CHECK3-NEXT:    [[C12:%.*]] = alloca i32, align 4
2849 // CHECK3-NEXT:    [[_TMP13:%.*]] = alloca i32*, align 8
2850 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2851 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
2852 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2853 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2854 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2855 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2856 // CHECK3-NEXT:    [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
2857 // CHECK3-NEXT:    store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8
2858 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
2859 // CHECK3-NEXT:    store i32* [[A2]], i32** [[A]], align 8
2860 // CHECK3-NEXT:    [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3
2861 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8
2862 // CHECK3-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
2863 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A]], align 8
2864 // CHECK3-NEXT:    store i32* [[TMP2]], i32** [[TMP]], align 8
2865 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
2866 // CHECK3-NEXT:    store i32* [[TMP3]], i32** [[_TMP4]], align 8
2867 // CHECK3-NEXT:    [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8
2868 // CHECK3-NEXT:    store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8
2869 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2870 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
2871 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2872 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2873 // CHECK3-NEXT:    [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
2874 // CHECK3-NEXT:    [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8*
2875 // CHECK3-NEXT:    [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8*
2876 // CHECK3-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false)
2877 // CHECK3-NEXT:    store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8
2878 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2879 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
2880 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
2881 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8
2882 // CHECK3-NEXT:    store i32* [[A9]], i32** [[_TMP10]], align 8
2883 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
2884 // CHECK3-NEXT:    store i32* [[C12]], i32** [[_TMP13]], align 8
2885 // CHECK3-NEXT:    [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
2886 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2887 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2888 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
2889 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2890 // CHECK3:       cond.true:
2891 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2892 // CHECK3:       cond.false:
2893 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2894 // CHECK3-NEXT:    br label [[COND_END]]
2895 // CHECK3:       cond.end:
2896 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
2897 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2898 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2899 // CHECK3-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
2900 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2901 // CHECK3:       omp.inner.for.cond:
2902 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2903 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2904 // CHECK3-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2905 // CHECK3-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2906 // CHECK3:       omp.inner.for.body:
2907 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2908 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2909 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2910 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2911 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
2912 // CHECK3-NEXT:    store %struct.SS* [[TMP0]], %struct.SS** [[TMP19]], align 8
2913 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
2914 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[_TMP10]], align 8
2915 // CHECK3-NEXT:    store i32* [[TMP21]], i32** [[TMP20]], align 8
2916 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
2917 // CHECK3-NEXT:    store i32* [[B11]], i32** [[TMP22]], align 8
2918 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
2919 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[_TMP13]], align 8
2920 // CHECK3-NEXT:    store i32* [[TMP24]], i32** [[TMP23]], align 8
2921 // CHECK3-NEXT:    call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
2922 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2923 // CHECK3:       omp.body.continue:
2924 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2925 // CHECK3:       omp.inner.for.inc:
2926 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2927 // CHECK3-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP25]], 1
2928 // CHECK3-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
2929 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2930 // CHECK3:       omp.inner.for.end:
2931 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2932 // CHECK3:       omp.loop.exit:
2933 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
2934 // CHECK3-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2935 // CHECK3-NEXT:    [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
2936 // CHECK3-NEXT:    br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2937 // CHECK3:       .omp.lastprivate.then:
2938 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32*, i32** [[_TMP10]], align 8
2939 // CHECK3-NEXT:    [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
2940 // CHECK3-NEXT:    store i32 [[TMP29]], i32* [[TMP10]], align 4
2941 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, i32* [[B11]], align 4
2942 // CHECK3-NEXT:    store i32 [[TMP30]], i32* [[B]], align 4
2943 // CHECK3-NEXT:    [[TMP31:%.*]] = load i32*, i32** [[_TMP13]], align 8
2944 // CHECK3-NEXT:    [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
2945 // CHECK3-NEXT:    store i32 [[TMP32]], i32* [[TMP11]], align 4
2946 // CHECK3-NEXT:    [[TMP33:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
2947 // CHECK3-NEXT:    [[TMP34:%.*]] = load [4 x i8], [4 x i8]* [[TMP33]], align 1
2948 // CHECK3-NEXT:    store [4 x i8] [[TMP34]], [4 x i8]* [[TMP12]], align 1
2949 // CHECK3-NEXT:    [[TMP35:%.*]] = load i32, i32* [[B11]], align 4
2950 // CHECK3-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
2951 // CHECK3-NEXT:    [[TMP36:%.*]] = trunc i32 [[TMP35]] to i8
2952 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
2953 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP36]], 15
2954 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2955 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
2956 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
2957 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2958 // CHECK3:       .omp.lastprivate.done:
2959 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
2960 // CHECK3-NEXT:    ret void
2961 //
2962 //
2963 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv
2964 // CHECK3-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 {
2965 // CHECK3-NEXT:  entry:
2966 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8
2967 // CHECK3-NEXT:    store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8
2968 // CHECK3-NEXT:    [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8
2969 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0
2970 // CHECK3-NEXT:    [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8
2971 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1
2972 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8
2973 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2974 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
2975 // CHECK3-NEXT:    store i32 [[INC]], i32* [[TMP3]], align 4
2976 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2
2977 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8
2978 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2979 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
2980 // CHECK3-NEXT:    store i32 [[DEC]], i32* [[TMP6]], align 4
2981 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3
2982 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8
2983 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2984 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
2985 // CHECK3-NEXT:    store i32 [[DIV]], i32* [[TMP9]], align 4
2986 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1
2987 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
2988 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2
2989 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8
2990 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3
2991 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[TMP15]], align 8
2992 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP12]], i32* [[TMP14]], i32* [[TMP16]])
2993 // CHECK3-NEXT:    ret void
2994 //
2995 //
2996 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE0_clEv
2997 // CHECK3-SAME: (%class.anon.1* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2]] align 2 {
2998 // CHECK3-NEXT:  entry:
2999 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %class.anon.1*, align 8
3000 // CHECK3-NEXT:    store %class.anon.1* [[THIS]], %class.anon.1** [[THIS_ADDR]], align 8
3001 // CHECK3-NEXT:    [[THIS1:%.*]] = load %class.anon.1*, %class.anon.1** [[THIS_ADDR]], align 8
3002 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1:%.*]], %class.anon.1* [[THIS1]], i32 0, i32 0
3003 // CHECK3-NEXT:    [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8
3004 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 1
3005 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8
3006 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3007 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP4]], -1
3008 // CHECK3-NEXT:    store i32 [[DEC]], i32* [[TMP3]], align 4
3009 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 2
3010 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
3011 // CHECK3-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
3012 // CHECK3-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
3013 // CHECK3-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
3014 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
3015 // CHECK3-NEXT:    [[TMP5:%.*]] = trunc i32 [[INC]] to i8
3016 // CHECK3-NEXT:    [[BF_LOAD2:%.*]] = load i8, i8* [[B]], align 8
3017 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
3018 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD2]], -16
3019 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
3020 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
3021 // CHECK3-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
3022 // CHECK3-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
3023 // CHECK3-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
3024 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 3
3025 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[C]], align 8
3026 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3027 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 2
3028 // CHECK3-NEXT:    store i32 [[MUL]], i32* [[TMP6]], align 4
3029 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 1
3030 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8
3031 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP9]])
3032 // CHECK3-NEXT:    ret void
3033 //
3034 //
3035 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
3036 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[B:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] {
3037 // CHECK3-NEXT:  entry:
3038 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3039 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3040 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3041 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
3042 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca i32*, align 8
3043 // CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca i32*, align 8
3044 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
3045 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
3046 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
3047 // CHECK3-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
3048 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3049 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
3050 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3051 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3052 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3053 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3054 // CHECK3-NEXT:    [[A5:%.*]] = alloca i32, align 4
3055 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32*, align 8
3056 // CHECK3-NEXT:    [[B7:%.*]] = alloca i32, align 4
3057 // CHECK3-NEXT:    [[C8:%.*]] = alloca i32, align 4
3058 // CHECK3-NEXT:    [[_TMP9:%.*]] = alloca i32*, align 8
3059 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3060 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3061 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3062 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3063 // CHECK3-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
3064 // CHECK3-NEXT:    store i32* [[B]], i32** [[B_ADDR]], align 8
3065 // CHECK3-NEXT:    store i32* [[C]], i32** [[C_ADDR]], align 8
3066 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3067 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3068 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
3069 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
3070 // CHECK3-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
3071 // CHECK3-NEXT:    store i32* [[TMP3]], i32** [[_TMP1]], align 8
3072 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
3073 // CHECK3-NEXT:    store i32* [[TMP4]], i32** [[_TMP2]], align 8
3074 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
3075 // CHECK3-NEXT:    store i32* [[TMP5]], i32** [[_TMP3]], align 8
3076 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3077 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3078 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3079 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3080 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8
3081 // CHECK3-NEXT:    store i32* [[A5]], i32** [[_TMP6]], align 8
3082 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8
3083 // CHECK3-NEXT:    store i32* [[C8]], i32** [[_TMP9]], align 8
3084 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3085 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
3086 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3087 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3088 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
3089 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3090 // CHECK3:       cond.true:
3091 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3092 // CHECK3:       cond.false:
3093 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3094 // CHECK3-NEXT:    br label [[COND_END]]
3095 // CHECK3:       cond.end:
3096 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
3097 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3098 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3099 // CHECK3-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
3100 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3101 // CHECK3:       omp.inner.for.cond:
3102 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3103 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3104 // CHECK3-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3105 // CHECK3-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3106 // CHECK3:       omp.inner.for.body:
3107 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3108 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
3109 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3110 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3111 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[_TMP6]], align 8
3112 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
3113 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP17]], 1
3114 // CHECK3-NEXT:    store i32 [[INC]], i32* [[TMP16]], align 4
3115 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[B7]], align 4
3116 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP18]], -1
3117 // CHECK3-NEXT:    store i32 [[DEC]], i32* [[B7]], align 4
3118 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP9]], align 8
3119 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
3120 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP20]], 1
3121 // CHECK3-NEXT:    store i32 [[DIV]], i32* [[TMP19]], align 4
3122 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3123 // CHECK3:       omp.body.continue:
3124 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3125 // CHECK3:       omp.inner.for.inc:
3126 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3127 // CHECK3-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
3128 // CHECK3-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
3129 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
3130 // CHECK3:       omp.inner.for.end:
3131 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3132 // CHECK3:       omp.loop.exit:
3133 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
3134 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3135 // CHECK3-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
3136 // CHECK3-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3137 // CHECK3:       .omp.lastprivate.then:
3138 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[_TMP6]], align 8
3139 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
3140 // CHECK3-NEXT:    store i32 [[TMP25]], i32* [[TMP6]], align 4
3141 // CHECK3-NEXT:    [[TMP26:%.*]] = load i32, i32* [[B7]], align 4
3142 // CHECK3-NEXT:    store i32 [[TMP26]], i32* [[TMP2]], align 4
3143 // CHECK3-NEXT:    [[TMP27:%.*]] = load i32*, i32** [[_TMP9]], align 8
3144 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
3145 // CHECK3-NEXT:    store i32 [[TMP28]], i32* [[TMP7]], align 4
3146 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3147 // CHECK3:       .omp.lastprivate.done:
3148 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
3149 // CHECK3-NEXT:    ret void
3150 //
3151 //
3152 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
3153 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
3154 // CHECK3-NEXT:  entry:
3155 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3156 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3157 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3158 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
3159 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
3160 // CHECK3-NEXT:    [[B:%.*]] = alloca i32, align 4
3161 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
3162 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3163 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3164 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3165 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3166 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3167 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3168 // CHECK3-NEXT:    [[B3:%.*]] = alloca i32, align 4
3169 // CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 4
3170 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3171 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3172 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3173 // CHECK3-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
3174 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3175 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3176 // CHECK3-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
3177 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
3178 // CHECK3-NEXT:    store i32* [[TMP2]], i32** [[_TMP1]], align 8
3179 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3180 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3181 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3182 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3183 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3184 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3185 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3186 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3187 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
3188 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3189 // CHECK3:       cond.true:
3190 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3191 // CHECK3:       cond.false:
3192 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3193 // CHECK3-NEXT:    br label [[COND_END]]
3194 // CHECK3:       cond.end:
3195 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3196 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3197 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3198 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3199 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3200 // CHECK3:       omp.inner.for.cond:
3201 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3202 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3203 // CHECK3-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3204 // CHECK3-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3205 // CHECK3:       omp.inner.for.body:
3206 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3207 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3208 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3209 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[B3]], align 4
3210 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP1]], align 8
3211 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3212 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
3213 // CHECK3-NEXT:    store i32 [[INC]], i32* [[TMP11]], align 4
3214 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[B3]], align 4
3215 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP13]], -1
3216 // CHECK3-NEXT:    store i32 [[DEC]], i32* [[B3]], align 4
3217 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 3
3218 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[C]], align 8
3219 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
3220 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP15]], 1
3221 // CHECK3-NEXT:    store i32 [[DIV]], i32* [[TMP14]], align 4
3222 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3223 // CHECK3:       omp.body.continue:
3224 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3225 // CHECK3:       omp.inner.for.inc:
3226 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3227 // CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
3228 // CHECK3-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
3229 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
3230 // CHECK3:       omp.inner.for.end:
3231 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3232 // CHECK3:       omp.loop.exit:
3233 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
3234 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3235 // CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
3236 // CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3237 // CHECK3:       .omp.lastprivate.then:
3238 // CHECK3-NEXT:    store i32 2, i32* [[B3]], align 4
3239 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[B3]], align 4
3240 // CHECK3-NEXT:    store i32 [[TMP19]], i32* [[B]], align 4
3241 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[B3]], align 4
3242 // CHECK3-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
3243 // CHECK3-NEXT:    [[TMP21:%.*]] = trunc i32 [[TMP20]] to i8
3244 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B7]], align 8
3245 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP21]], 15
3246 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
3247 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
3248 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B7]], align 8
3249 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3250 // CHECK3:       .omp.lastprivate.done:
3251 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3252 // CHECK3-NEXT:    ret void
3253 //
3254 //
3255 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
3256 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3]] {
3257 // CHECK3-NEXT:  entry:
3258 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3259 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3260 // CHECK3-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
3261 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
3262 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3263 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3264 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3265 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3266 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3267 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3268 // CHECK3-NEXT:    [[G:%.*]] = alloca i32, align 128
3269 // CHECK3-NEXT:    [[G1:%.*]] = alloca i32, align 4
3270 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
3271 // CHECK3-NEXT:    [[SIVAR3:%.*]] = alloca i32, align 4
3272 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3273 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 8
3274 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3275 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3276 // CHECK3-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
3277 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
3278 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** @g1, align 8
3279 // CHECK3-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
3280 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3281 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3282 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3283 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3284 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** @g1, align 8
3285 // CHECK3-NEXT:    store i32* [[G1]], i32** [[_TMP2]], align 8
3286 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3287 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3288 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3289 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3290 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
3291 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3292 // CHECK3:       cond.true:
3293 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3294 // CHECK3:       cond.false:
3295 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3296 // CHECK3-NEXT:    br label [[COND_END]]
3297 // CHECK3:       cond.end:
3298 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3299 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3300 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3301 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3302 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3303 // CHECK3:       omp.inner.for.cond:
3304 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3305 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3306 // CHECK3-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3307 // CHECK3-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3308 // CHECK3:       omp.inner.for.body:
3309 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3310 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3311 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3312 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3313 // CHECK3-NEXT:    store i32 1, i32* [[G]], align 128
3314 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8
3315 // CHECK3-NEXT:    store volatile i32 1, i32* [[TMP11]], align 4
3316 // CHECK3-NEXT:    store i32 2, i32* [[SIVAR3]], align 4
3317 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0
3318 // CHECK3-NEXT:    store i32* [[G]], i32** [[TMP12]], align 8
3319 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1
3320 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[_TMP2]], align 8
3321 // CHECK3-NEXT:    store i32* [[TMP14]], i32** [[TMP13]], align 8
3322 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2
3323 // CHECK3-NEXT:    store i32* [[SIVAR3]], i32** [[TMP15]], align 8
3324 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.2* nonnull align 8 dereferenceable(24) [[REF_TMP]])
3325 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3326 // CHECK3:       omp.body.continue:
3327 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3328 // CHECK3:       omp.inner.for.inc:
3329 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3330 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
3331 // CHECK3-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
3332 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
3333 // CHECK3:       omp.inner.for.end:
3334 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3335 // CHECK3:       omp.loop.exit:
3336 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
3337 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3338 // CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
3339 // CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3340 // CHECK3:       .omp.lastprivate.then:
3341 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[G]], align 128
3342 // CHECK3-NEXT:    store volatile i32 [[TMP19]], i32* @g, align 128
3343 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[_TMP2]], align 8
3344 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
3345 // CHECK3-NEXT:    store volatile i32 [[TMP21]], i32* [[TMP2]], align 4
3346 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, i32* [[SIVAR3]], align 4
3347 // CHECK3-NEXT:    store i32 [[TMP22]], i32* [[TMP0]], align 4
3348 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3349 // CHECK3:       .omp.lastprivate.done:
3350 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3351 // CHECK3-NEXT:    ret void
3352 //
3353 //
3354 // CHECK4-LABEL: define {{[^@]+}}@main
3355 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
3356 // CHECK4-NEXT:  entry:
3357 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3358 // CHECK4-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
3359 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 8
3360 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
3361 // CHECK4-NEXT:    call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
3362 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0
3363 // CHECK4-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
3364 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1
3365 // CHECK4-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
3366 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2
3367 // CHECK4-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
3368 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3
3369 // CHECK4-NEXT:    store i8* bitcast (void (i8*)* @__main_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8
3370 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4
3371 // CHECK4-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
3372 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5
3373 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
3374 // CHECK4-NEXT:    store i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 8
3375 // CHECK4-NEXT:    [[TMP1:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()*
3376 // CHECK4-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP1]] to %struct.__block_literal_generic*
3377 // CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
3378 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
3379 // CHECK4-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[TMP2]], align 8
3380 // CHECK4-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to void (i8*)*
3381 // CHECK4-NEXT:    call void [[TMP5]](i8* [[TMP3]])
3382 // CHECK4-NEXT:    ret i32 0
3383 //
3384 //
3385 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
3386 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
3387 // CHECK4-NEXT:  entry:
3388 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3389 // CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
3390 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3391 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
3392 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3393 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
3394 // CHECK4-NEXT:    call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]])
3395 // CHECK4-NEXT:    ret void
3396 //
3397 //
3398 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke
3399 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
3400 // CHECK4-NEXT:  entry:
3401 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
3402 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 8
3403 // CHECK4-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
3404 // CHECK4-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*
3405 // CHECK4-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 8
3406 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* @_ZZ4mainE5sivar)
3407 // CHECK4-NEXT:    ret void
3408 //
3409 //
3410 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
3411 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
3412 // CHECK4-NEXT:  entry:
3413 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3414 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3415 // CHECK4-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
3416 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
3417 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3418 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3419 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3420 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3421 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3422 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3423 // CHECK4-NEXT:    [[G:%.*]] = alloca i32, align 128
3424 // CHECK4-NEXT:    [[G1:%.*]] = alloca i32, align 4
3425 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
3426 // CHECK4-NEXT:    [[SIVAR3:%.*]] = alloca i32, align 4
3427 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3428 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, align 128
3429 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3430 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3431 // CHECK4-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
3432 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
3433 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** @g1, align 8
3434 // CHECK4-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
3435 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3436 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3437 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3438 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3439 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** @g1, align 8
3440 // CHECK4-NEXT:    store i32* [[G1]], i32** [[_TMP2]], align 8
3441 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3442 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3443 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3444 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3445 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
3446 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3447 // CHECK4:       cond.true:
3448 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3449 // CHECK4:       cond.false:
3450 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3451 // CHECK4-NEXT:    br label [[COND_END]]
3452 // CHECK4:       cond.end:
3453 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3454 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3455 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3456 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3457 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3458 // CHECK4:       omp.inner.for.cond:
3459 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3460 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3461 // CHECK4-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3462 // CHECK4-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3463 // CHECK4:       omp.inner.for.body:
3464 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3465 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3466 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3467 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3468 // CHECK4-NEXT:    store i32 1, i32* [[G]], align 128
3469 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8
3470 // CHECK4-NEXT:    store volatile i32 1, i32* [[TMP11]], align 4
3471 // CHECK4-NEXT:    store i32 2, i32* [[SIVAR3]], align 4
3472 // CHECK4-NEXT:    store i32 1, i32* [[G]], align 128
3473 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[_TMP2]], align 8
3474 // CHECK4-NEXT:    store volatile i32 1, i32* [[TMP12]], align 4
3475 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 0
3476 // CHECK4-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128
3477 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 1
3478 // CHECK4-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
3479 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 2
3480 // CHECK4-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
3481 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 3
3482 // CHECK4-NEXT:    store i8* bitcast (void (i8*)* @g1_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16
3483 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 4
3484 // CHECK4-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
3485 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 8
3486 // CHECK4-NEXT:    [[TMP13:%.*]] = load volatile i32, i32* [[G]], align 128
3487 // CHECK4-NEXT:    store volatile i32 [[TMP13]], i32* [[BLOCK_CAPTURED]], align 128
3488 // CHECK4-NEXT:    [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 5
3489 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[_TMP2]], align 8
3490 // CHECK4-NEXT:    store i32* [[TMP14]], i32** [[BLOCK_CAPTURED5]], align 32
3491 // CHECK4-NEXT:    [[BLOCK_CAPTURED6:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 6
3492 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[SIVAR3]], align 4
3493 // CHECK4-NEXT:    store i32 [[TMP15]], i32* [[BLOCK_CAPTURED6]], align 8
3494 // CHECK4-NEXT:    [[TMP16:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]] to void ()*
3495 // CHECK4-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP16]] to %struct.__block_literal_generic*
3496 // CHECK4-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
3497 // CHECK4-NEXT:    [[TMP18:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
3498 // CHECK4-NEXT:    [[TMP19:%.*]] = load i8*, i8** [[TMP17]], align 8
3499 // CHECK4-NEXT:    [[TMP20:%.*]] = bitcast i8* [[TMP19]] to void (i8*)*
3500 // CHECK4-NEXT:    call void [[TMP20]](i8* [[TMP18]])
3501 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3502 // CHECK4:       omp.body.continue:
3503 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3504 // CHECK4:       omp.inner.for.inc:
3505 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3506 // CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
3507 // CHECK4-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
3508 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3509 // CHECK4:       omp.inner.for.end:
3510 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3511 // CHECK4:       omp.loop.exit:
3512 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3513 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3514 // CHECK4-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
3515 // CHECK4-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3516 // CHECK4:       .omp.lastprivate.then:
3517 // CHECK4-NEXT:    [[TMP24:%.*]] = load i32, i32* [[G]], align 128
3518 // CHECK4-NEXT:    store volatile i32 [[TMP24]], i32* @g, align 128
3519 // CHECK4-NEXT:    [[TMP25:%.*]] = load i32*, i32** [[_TMP2]], align 8
3520 // CHECK4-NEXT:    [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
3521 // CHECK4-NEXT:    store volatile i32 [[TMP26]], i32* [[TMP2]], align 4
3522 // CHECK4-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SIVAR3]], align 4
3523 // CHECK4-NEXT:    store i32 [[TMP27]], i32* [[TMP0]], align 4
3524 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3525 // CHECK4:       .omp.lastprivate.done:
3526 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]])
3527 // CHECK4-NEXT:    ret void
3528 //
3529 //
3530 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke
3531 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
3532 // CHECK4-NEXT:  entry:
3533 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
3534 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>*, align 8
3535 // CHECK4-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
3536 // CHECK4-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>*
3537 // CHECK4-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>** [[BLOCK_ADDR]], align 8
3538 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 8
3539 // CHECK4-NEXT:    store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128
3540 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 5
3541 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR1]], align 32
3542 // CHECK4-NEXT:    store i32 1, i32* [[TMP0]], align 4
3543 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 6
3544 // CHECK4-NEXT:    store i32 4, i32* [[BLOCK_CAPTURE_ADDR2]], align 8
3545 // CHECK4-NEXT:    ret void
3546 //
3547 //
3548 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
3549 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3550 // CHECK4-NEXT:  entry:
3551 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3552 // CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
3553 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3554 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3555 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
3556 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3557 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3558 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3559 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3560 // CHECK4-NEXT:    [[A3:%.*]] = alloca i32, align 4
3561 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
3562 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, align 8
3563 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
3564 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3565 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
3566 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3567 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
3568 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 8
3569 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
3570 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
3571 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
3572 // CHECK4-NEXT:    store i8 [[BF_CLEAR]], i8* [[B]], align 8
3573 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
3574 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
3575 // CHECK4-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
3576 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
3577 // CHECK4-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
3578 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3579 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3580 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3581 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3582 // CHECK4-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
3583 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3584 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3585 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
3586 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3587 // CHECK4:       cond.true:
3588 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3589 // CHECK4:       cond.false:
3590 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3591 // CHECK4-NEXT:    br label [[COND_END]]
3592 // CHECK4:       cond.end:
3593 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3594 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3595 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3596 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3597 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3598 // CHECK4:       omp.inner.for.cond:
3599 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3600 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3601 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3602 // CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3603 // CHECK4:       omp.inner.for.body:
3604 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3605 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
3606 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3607 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
3608 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[TMP8]], align 4
3609 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 0
3610 // CHECK4-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
3611 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 1
3612 // CHECK4-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
3613 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 2
3614 // CHECK4-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
3615 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 3
3616 // CHECK4-NEXT:    store i8* bitcast (void (i8*)* @___ZN2SSC2ERi_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8
3617 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 4
3618 // CHECK4-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.6 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
3619 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 5
3620 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8
3621 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6
3622 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8
3623 // CHECK4-NEXT:    store i32* [[TMP9]], i32** [[BLOCK_CAPTURED]], align 8
3624 // CHECK4-NEXT:    [[TMP10:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]] to void ()*
3625 // CHECK4-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP10]] to %struct.__block_literal_generic*
3626 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
3627 // CHECK4-NEXT:    [[TMP12:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
3628 // CHECK4-NEXT:    [[TMP13:%.*]] = load i8*, i8** [[TMP11]], align 8
3629 // CHECK4-NEXT:    [[TMP14:%.*]] = bitcast i8* [[TMP13]] to void (i8*)*
3630 // CHECK4-NEXT:    call void [[TMP14]](i8* [[TMP12]])
3631 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3632 // CHECK4:       omp.body.continue:
3633 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3634 // CHECK4:       omp.inner.for.inc:
3635 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3636 // CHECK4-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1
3637 // CHECK4-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
3638 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3639 // CHECK4:       omp.inner.for.end:
3640 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3641 // CHECK4:       omp.loop.exit:
3642 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
3643 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
3644 // CHECK4-NEXT:    ret void
3645 //
3646 //
3647 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
3648 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
3649 // CHECK4-NEXT:  entry:
3650 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3651 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3652 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3653 // CHECK4-NEXT:    [[E:%.*]] = alloca [4 x i8]*, align 8
3654 // CHECK4-NEXT:    [[A:%.*]] = alloca i32*, align 8
3655 // CHECK4-NEXT:    [[B:%.*]] = alloca i32, align 4
3656 // CHECK4-NEXT:    [[C:%.*]] = alloca i32*, align 8
3657 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
3658 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
3659 // CHECK4-NEXT:    [[_TMP5:%.*]] = alloca [4 x i8]*, align 8
3660 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3661 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
3662 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3663 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3664 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3665 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3666 // CHECK4-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
3667 // CHECK4-NEXT:    [[_TMP8:%.*]] = alloca [4 x i8]*, align 8
3668 // CHECK4-NEXT:    [[A9:%.*]] = alloca i32, align 4
3669 // CHECK4-NEXT:    [[_TMP10:%.*]] = alloca i32*, align 8
3670 // CHECK4-NEXT:    [[B11:%.*]] = alloca i32, align 4
3671 // CHECK4-NEXT:    [[C12:%.*]] = alloca i32, align 4
3672 // CHECK4-NEXT:    [[_TMP13:%.*]] = alloca i32*, align 8
3673 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3674 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8
3675 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3676 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3677 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3678 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3679 // CHECK4-NEXT:    [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
3680 // CHECK4-NEXT:    store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8
3681 // CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
3682 // CHECK4-NEXT:    store i32* [[A2]], i32** [[A]], align 8
3683 // CHECK4-NEXT:    [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3
3684 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8
3685 // CHECK4-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
3686 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A]], align 8
3687 // CHECK4-NEXT:    store i32* [[TMP2]], i32** [[TMP]], align 8
3688 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
3689 // CHECK4-NEXT:    store i32* [[TMP3]], i32** [[_TMP4]], align 8
3690 // CHECK4-NEXT:    [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8
3691 // CHECK4-NEXT:    store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8
3692 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3693 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3694 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3695 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3696 // CHECK4-NEXT:    [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
3697 // CHECK4-NEXT:    [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8*
3698 // CHECK4-NEXT:    [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8*
3699 // CHECK4-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false)
3700 // CHECK4-NEXT:    store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8
3701 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3702 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
3703 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
3704 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8
3705 // CHECK4-NEXT:    store i32* [[A9]], i32** [[_TMP10]], align 8
3706 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
3707 // CHECK4-NEXT:    store i32* [[C12]], i32** [[_TMP13]], align 8
3708 // CHECK4-NEXT:    [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
3709 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3710 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3711 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
3712 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3713 // CHECK4:       cond.true:
3714 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3715 // CHECK4:       cond.false:
3716 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3717 // CHECK4-NEXT:    br label [[COND_END]]
3718 // CHECK4:       cond.end:
3719 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
3720 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3721 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3722 // CHECK4-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
3723 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3724 // CHECK4:       omp.inner.for.cond:
3725 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3726 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3727 // CHECK4-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
3728 // CHECK4-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3729 // CHECK4:       omp.inner.for.body:
3730 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3731 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
3732 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3733 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3734 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0
3735 // CHECK4-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
3736 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1
3737 // CHECK4-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
3738 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2
3739 // CHECK4-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
3740 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3
3741 // CHECK4-NEXT:    store i8* bitcast (void (i8*)* @g1_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8
3742 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4
3743 // CHECK4-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
3744 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5
3745 // CHECK4-NEXT:    store %struct.SS* [[TMP0]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8
3746 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
3747 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8
3748 // CHECK4-NEXT:    store i32* [[TMP19]], i32** [[BLOCK_CAPTURED]], align 8
3749 // CHECK4-NEXT:    [[BLOCK_CAPTURED15:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
3750 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[B11]], align 4
3751 // CHECK4-NEXT:    store i32 [[TMP20]], i32* [[BLOCK_CAPTURED15]], align 8
3752 // CHECK4-NEXT:    [[BLOCK_CAPTURED16:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
3753 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[_TMP13]], align 8
3754 // CHECK4-NEXT:    store i32* [[TMP21]], i32** [[BLOCK_CAPTURED16]], align 8
3755 // CHECK4-NEXT:    [[TMP22:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()*
3756 // CHECK4-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP22]] to %struct.__block_literal_generic*
3757 // CHECK4-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
3758 // CHECK4-NEXT:    [[TMP24:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
3759 // CHECK4-NEXT:    [[TMP25:%.*]] = load i8*, i8** [[TMP23]], align 8
3760 // CHECK4-NEXT:    [[TMP26:%.*]] = bitcast i8* [[TMP25]] to void (i8*)*
3761 // CHECK4-NEXT:    call void [[TMP26]](i8* [[TMP24]])
3762 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3763 // CHECK4:       omp.body.continue:
3764 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3765 // CHECK4:       omp.inner.for.inc:
3766 // CHECK4-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3767 // CHECK4-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP27]], 1
3768 // CHECK4-NEXT:    store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
3769 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3770 // CHECK4:       omp.inner.for.end:
3771 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3772 // CHECK4:       omp.loop.exit:
3773 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
3774 // CHECK4-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3775 // CHECK4-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3776 // CHECK4-NEXT:    br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3777 // CHECK4:       .omp.lastprivate.then:
3778 // CHECK4-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[_TMP10]], align 8
3779 // CHECK4-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
3780 // CHECK4-NEXT:    store i32 [[TMP31]], i32* [[TMP10]], align 4
3781 // CHECK4-NEXT:    [[TMP32:%.*]] = load i32, i32* [[B11]], align 4
3782 // CHECK4-NEXT:    store i32 [[TMP32]], i32* [[B]], align 4
3783 // CHECK4-NEXT:    [[TMP33:%.*]] = load i32*, i32** [[_TMP13]], align 8
3784 // CHECK4-NEXT:    [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
3785 // CHECK4-NEXT:    store i32 [[TMP34]], i32* [[TMP11]], align 4
3786 // CHECK4-NEXT:    [[TMP35:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
3787 // CHECK4-NEXT:    [[TMP36:%.*]] = load [4 x i8], [4 x i8]* [[TMP35]], align 1
3788 // CHECK4-NEXT:    store [4 x i8] [[TMP36]], [4 x i8]* [[TMP12]], align 1
3789 // CHECK4-NEXT:    [[TMP37:%.*]] = load i32, i32* [[B11]], align 4
3790 // CHECK4-NEXT:    [[B18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
3791 // CHECK4-NEXT:    [[TMP38:%.*]] = trunc i32 [[TMP37]] to i8
3792 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B18]], align 8
3793 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP38]], 15
3794 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
3795 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
3796 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B18]], align 8
3797 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3798 // CHECK4:       .omp.lastprivate.done:
3799 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
3800 // CHECK4-NEXT:    ret void
3801 //
3802 //
3803 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2
3804 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
3805 // CHECK4-NEXT:  entry:
3806 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
3807 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8
3808 // CHECK4-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
3809 // CHECK4-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*
3810 // CHECK4-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8
3811 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5
3812 // CHECK4-NEXT:    [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8
3813 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
3814 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8
3815 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3816 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
3817 // CHECK4-NEXT:    store i32 [[INC]], i32* [[TMP0]], align 4
3818 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
3819 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8
3820 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP2]], -1
3821 // CHECK4-NEXT:    store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8
3822 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
3823 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8
3824 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3825 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
3826 // CHECK4-NEXT:    store i32 [[DIV]], i32* [[TMP3]], align 4
3827 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
3828 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8
3829 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
3830 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
3831 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8
3832 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]], i32* [[BLOCK_CAPTURE_ADDR4]], i32* [[TMP6]])
3833 // CHECK4-NEXT:    ret void
3834 //
3835 //
3836 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
3837 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[B:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
3838 // CHECK4-NEXT:  entry:
3839 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3840 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3841 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3842 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
3843 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca i32*, align 8
3844 // CHECK4-NEXT:    [[C_ADDR:%.*]] = alloca i32*, align 8
3845 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
3846 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
3847 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
3848 // CHECK4-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
3849 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3850 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
3851 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3852 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3853 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3854 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3855 // CHECK4-NEXT:    [[A5:%.*]] = alloca i32, align 4
3856 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca i32*, align 8
3857 // CHECK4-NEXT:    [[B7:%.*]] = alloca i32, align 4
3858 // CHECK4-NEXT:    [[C8:%.*]] = alloca i32, align 4
3859 // CHECK4-NEXT:    [[_TMP9:%.*]] = alloca i32*, align 8
3860 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3861 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3862 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3863 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3864 // CHECK4-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
3865 // CHECK4-NEXT:    store i32* [[B]], i32** [[B_ADDR]], align 8
3866 // CHECK4-NEXT:    store i32* [[C]], i32** [[C_ADDR]], align 8
3867 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3868 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3869 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
3870 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
3871 // CHECK4-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
3872 // CHECK4-NEXT:    store i32* [[TMP3]], i32** [[_TMP1]], align 8
3873 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
3874 // CHECK4-NEXT:    store i32* [[TMP4]], i32** [[_TMP2]], align 8
3875 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
3876 // CHECK4-NEXT:    store i32* [[TMP5]], i32** [[_TMP3]], align 8
3877 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3878 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
3879 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3880 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3881 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8
3882 // CHECK4-NEXT:    store i32* [[A5]], i32** [[_TMP6]], align 8
3883 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8
3884 // CHECK4-NEXT:    store i32* [[C8]], i32** [[_TMP9]], align 8
3885 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3886 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
3887 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3888 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3889 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
3890 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3891 // CHECK4:       cond.true:
3892 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3893 // CHECK4:       cond.false:
3894 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3895 // CHECK4-NEXT:    br label [[COND_END]]
3896 // CHECK4:       cond.end:
3897 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
3898 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3899 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3900 // CHECK4-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
3901 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3902 // CHECK4:       omp.inner.for.cond:
3903 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3904 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3905 // CHECK4-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3906 // CHECK4-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3907 // CHECK4:       omp.inner.for.body:
3908 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3909 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
3910 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3911 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3912 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[_TMP6]], align 8
3913 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
3914 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP17]], 1
3915 // CHECK4-NEXT:    store i32 [[INC]], i32* [[TMP16]], align 4
3916 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[B7]], align 4
3917 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP18]], -1
3918 // CHECK4-NEXT:    store i32 [[DEC]], i32* [[B7]], align 4
3919 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP9]], align 8
3920 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
3921 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP20]], 1
3922 // CHECK4-NEXT:    store i32 [[DIV]], i32* [[TMP19]], align 4
3923 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3924 // CHECK4:       omp.body.continue:
3925 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3926 // CHECK4:       omp.inner.for.inc:
3927 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3928 // CHECK4-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
3929 // CHECK4-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
3930 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3931 // CHECK4:       omp.inner.for.end:
3932 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3933 // CHECK4:       omp.loop.exit:
3934 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
3935 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3936 // CHECK4-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
3937 // CHECK4-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3938 // CHECK4:       .omp.lastprivate.then:
3939 // CHECK4-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[_TMP6]], align 8
3940 // CHECK4-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
3941 // CHECK4-NEXT:    store i32 [[TMP25]], i32* [[TMP6]], align 4
3942 // CHECK4-NEXT:    [[TMP26:%.*]] = load i32, i32* [[B7]], align 4
3943 // CHECK4-NEXT:    store i32 [[TMP26]], i32* [[TMP2]], align 4
3944 // CHECK4-NEXT:    [[TMP27:%.*]] = load i32*, i32** [[_TMP9]], align 8
3945 // CHECK4-NEXT:    [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
3946 // CHECK4-NEXT:    store i32 [[TMP28]], i32* [[TMP7]], align 4
3947 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3948 // CHECK4:       .omp.lastprivate.done:
3949 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
3950 // CHECK4-NEXT:    ret void
3951 //
3952 //
3953 // CHECK4-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke
3954 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
3955 // CHECK4-NEXT:  entry:
3956 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
3957 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>*, align 8
3958 // CHECK4-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
3959 // CHECK4-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>*
3960 // CHECK4-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>** [[BLOCK_ADDR]], align 8
3961 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 5
3962 // CHECK4-NEXT:    [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8
3963 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6
3964 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8
3965 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3966 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
3967 // CHECK4-NEXT:    store i32 [[INC]], i32* [[TMP0]], align 4
3968 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS]], i32 0, i32 2
3969 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
3970 // CHECK4-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
3971 // CHECK4-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
3972 // CHECK4-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
3973 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
3974 // CHECK4-NEXT:    [[TMP2:%.*]] = trunc i32 [[DEC]] to i8
3975 // CHECK4-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[B]], align 8
3976 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP2]], 15
3977 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD1]], -16
3978 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
3979 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
3980 // CHECK4-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
3981 // CHECK4-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
3982 // CHECK4-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
3983 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS]], i32 0, i32 3
3984 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
3985 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3986 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
3987 // CHECK4-NEXT:    store i32 [[DIV]], i32* [[TMP3]], align 4
3988 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6
3989 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8
3990 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]])
3991 // CHECK4-NEXT:    ret void
3992 //
3993 //
3994 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..5
3995 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3996 // CHECK4-NEXT:  entry:
3997 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3998 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3999 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4000 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
4001 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
4002 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
4003 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4004 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4005 // CHECK4-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
4006 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4007 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4008 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4009 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4010 // CHECK4-NEXT:    [[C:%.*]] = alloca i32, align 4
4011 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
4012 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4013 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4014 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4015 // CHECK4-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
4016 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4017 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4018 // CHECK4-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
4019 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
4020 // CHECK4-NEXT:    store i32* [[TMP2]], i32** [[_TMP1]], align 8
4021 // CHECK4-NEXT:    store i32* [[_TMP2]], i32** [[_TMP3]], align 8
4022 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4023 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4024 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4025 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4026 // CHECK4-NEXT:    store i32* [[C]], i32** [[_TMP4]], align 8
4027 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4028 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4029 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4030 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4031 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
4032 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4033 // CHECK4:       cond.true:
4034 // CHECK4-NEXT:    br label [[COND_END:%.*]]
4035 // CHECK4:       cond.false:
4036 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4037 // CHECK4-NEXT:    br label [[COND_END]]
4038 // CHECK4:       cond.end:
4039 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4040 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4041 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4042 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4043 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4044 // CHECK4:       omp.inner.for.cond:
4045 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4046 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4047 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4048 // CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4049 // CHECK4:       omp.inner.for.body:
4050 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4051 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4052 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4053 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
4054 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
4055 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[_TMP1]], align 8
4056 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
4057 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP13]], 1
4058 // CHECK4-NEXT:    store i32 [[INC]], i32* [[TMP12]], align 4
4059 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 2
4060 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
4061 // CHECK4-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
4062 // CHECK4-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
4063 // CHECK4-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
4064 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
4065 // CHECK4-NEXT:    [[TMP14:%.*]] = trunc i32 [[DEC]] to i8
4066 // CHECK4-NEXT:    [[BF_LOAD6:%.*]] = load i8, i8* [[B]], align 8
4067 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP14]], 15
4068 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD6]], -16
4069 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
4070 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
4071 // CHECK4-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
4072 // CHECK4-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
4073 // CHECK4-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
4074 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32*, i32** [[_TMP4]], align 8
4075 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
4076 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP16]], 1
4077 // CHECK4-NEXT:    store i32 [[DIV]], i32* [[TMP15]], align 4
4078 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4079 // CHECK4:       omp.body.continue:
4080 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4081 // CHECK4:       omp.inner.for.inc:
4082 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4083 // CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
4084 // CHECK4-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
4085 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
4086 // CHECK4:       omp.inner.for.end:
4087 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4088 // CHECK4:       omp.loop.exit:
4089 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4090 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
4091 // CHECK4-NEXT:    ret void
4092 //
4093 //
4094 // CHECK5-LABEL: define {{[^@]+}}@main
4095 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
4096 // CHECK5-NEXT:  entry:
4097 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4098 // CHECK5-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
4099 // CHECK5-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4100 // CHECK5-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
4101 // CHECK5-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
4102 // CHECK5-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4103 // CHECK5-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
4104 // CHECK5-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4105 // CHECK5-NEXT:    call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
4106 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
4107 // CHECK5-NEXT:    store i32 0, i32* [[T_VAR]], align 4
4108 // CHECK5-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4109 // CHECK5-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
4110 // CHECK5-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
4111 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
4112 // CHECK5-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
4113 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
4114 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00)
4115 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar)
4116 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
4117 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
4118 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*))
4119 // CHECK5-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
4120 // CHECK5-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
4121 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
4122 // CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4123 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
4124 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4125 // CHECK5:       arraydestroy.body:
4126 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4127 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4128 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
4129 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
4130 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
4131 // CHECK5:       arraydestroy.done1:
4132 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
4133 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
4134 // CHECK5-NEXT:    ret i32 [[TMP2]]
4135 //
4136 //
4137 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
4138 // CHECK5-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
4139 // CHECK5-NEXT:  entry:
4140 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4141 // CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
4142 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4143 // CHECK5-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
4144 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4145 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
4146 // CHECK5-NEXT:    call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]])
4147 // CHECK5-NEXT:    ret void
4148 //
4149 //
4150 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4151 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4152 // CHECK5-NEXT:  entry:
4153 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4154 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4155 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4156 // CHECK5-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
4157 // CHECK5-NEXT:    ret void
4158 //
4159 //
4160 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4161 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4162 // CHECK5-NEXT:  entry:
4163 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4164 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4165 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4166 // CHECK5-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4167 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4168 // CHECK5-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4169 // CHECK5-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
4170 // CHECK5-NEXT:    ret void
4171 //
4172 //
4173 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
4174 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
4175 // CHECK5-NEXT:  entry:
4176 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4177 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4178 // CHECK5-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
4179 // CHECK5-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
4180 // CHECK5-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
4181 // CHECK5-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
4182 // CHECK5-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
4183 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4184 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4185 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4186 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4187 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4188 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4189 // CHECK5-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
4190 // CHECK5-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4
4191 // CHECK5-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
4192 // CHECK5-NEXT:    [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4193 // CHECK5-NEXT:    [[SIVAR5:%.*]] = alloca i32, align 4
4194 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4195 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4196 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4197 // CHECK5-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
4198 // CHECK5-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
4199 // CHECK5-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
4200 // CHECK5-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
4201 // CHECK5-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
4202 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
4203 // CHECK5-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
4204 // CHECK5-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
4205 // CHECK5-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
4206 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
4207 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4208 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4209 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4210 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4211 // CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
4212 // CHECK5-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
4213 // CHECK5-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4214 // CHECK5:       arrayctor.loop:
4215 // CHECK5-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4216 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4217 // CHECK5-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
4218 // CHECK5-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4219 // CHECK5-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4220 // CHECK5:       arrayctor.cont:
4221 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
4222 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4223 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4224 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4225 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4226 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
4227 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4228 // CHECK5:       cond.true:
4229 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4230 // CHECK5:       cond.false:
4231 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4232 // CHECK5-NEXT:    br label [[COND_END]]
4233 // CHECK5:       cond.end:
4234 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
4235 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4236 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4237 // CHECK5-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
4238 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4239 // CHECK5:       omp.inner.for.cond:
4240 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4241 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4242 // CHECK5-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
4243 // CHECK5-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4244 // CHECK5:       omp.inner.for.cond.cleanup:
4245 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4246 // CHECK5:       omp.inner.for.body:
4247 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4248 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
4249 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4250 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4251 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4
4252 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I]], align 4
4253 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
4254 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]]
4255 // CHECK5-NEXT:    store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4
4256 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
4257 // CHECK5-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64
4258 // CHECK5-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM7]]
4259 // CHECK5-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
4260 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
4261 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[SIVAR5]], align 4
4262 // CHECK5-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]]
4263 // CHECK5-NEXT:    store i32 [[ADD9]], i32* [[SIVAR5]], align 4
4264 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4265 // CHECK5:       omp.body.continue:
4266 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4267 // CHECK5:       omp.inner.for.inc:
4268 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4269 // CHECK5-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
4270 // CHECK5-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
4271 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4272 // CHECK5:       omp.inner.for.end:
4273 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4274 // CHECK5:       omp.loop.exit:
4275 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4276 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
4277 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
4278 // CHECK5-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4279 // CHECK5-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
4280 // CHECK5-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4281 // CHECK5:       .omp.lastprivate.then:
4282 // CHECK5-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR1]], align 4
4283 // CHECK5-NEXT:    store i32 [[TMP23]], i32* [[TMP0]], align 4
4284 // CHECK5-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
4285 // CHECK5-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
4286 // CHECK5-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
4287 // CHECK5-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
4288 // CHECK5-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S*
4289 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
4290 // CHECK5-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]]
4291 // CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4292 // CHECK5:       omp.arraycpy.body:
4293 // CHECK5-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4294 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4295 // CHECK5-NEXT:    [[CALL12:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
4296 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4297 // CHECK5-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4298 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
4299 // CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
4300 // CHECK5:       omp.arraycpy.done13:
4301 // CHECK5-NEXT:    [[CALL14:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
4302 // CHECK5-NEXT:    [[TMP28:%.*]] = load i32, i32* [[SIVAR5]], align 4
4303 // CHECK5-NEXT:    store i32 [[TMP28]], i32* [[TMP4]], align 4
4304 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
4305 // CHECK5:       .omp.lastprivate.done:
4306 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
4307 // CHECK5-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
4308 // CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
4309 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4310 // CHECK5:       arraydestroy.body:
4311 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4312 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4313 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
4314 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
4315 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
4316 // CHECK5:       arraydestroy.done16:
4317 // CHECK5-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4318 // CHECK5-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
4319 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP31]])
4320 // CHECK5-NEXT:    ret void
4321 //
4322 //
4323 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4324 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4325 // CHECK5-NEXT:  entry:
4326 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4327 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4328 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4329 // CHECK5-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
4330 // CHECK5-NEXT:    ret void
4331 //
4332 //
4333 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
4334 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4335 // CHECK5-NEXT:  entry:
4336 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4337 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4338 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4339 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4340 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4341 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4342 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4343 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4344 // CHECK5-NEXT:    [[F:%.*]] = alloca float, align 4
4345 // CHECK5-NEXT:    [[X:%.*]] = alloca double, align 8
4346 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4347 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4348 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4349 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4350 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4351 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4352 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4353 // CHECK5-NEXT:    [[TMP0:%.*]] = load float, float* @f, align 4
4354 // CHECK5-NEXT:    store float [[TMP0]], float* [[F]], align 4
4355 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4356 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4357 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
4358 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4359 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4360 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
4361 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4362 // CHECK5:       cond.true:
4363 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4364 // CHECK5:       cond.false:
4365 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4366 // CHECK5-NEXT:    br label [[COND_END]]
4367 // CHECK5:       cond.end:
4368 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4369 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4370 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4371 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4372 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4373 // CHECK5:       omp.inner.for.cond:
4374 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4375 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4376 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4377 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4378 // CHECK5:       omp.inner.for.body:
4379 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4380 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4381 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4382 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4383 // CHECK5-NEXT:    [[TMP9:%.*]] = load double, double* [[X]], align 8
4384 // CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
4385 // CHECK5-NEXT:    store double [[INC]], double* [[X]], align 8
4386 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4387 // CHECK5:       omp.body.continue:
4388 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4389 // CHECK5:       omp.inner.for.inc:
4390 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4391 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
4392 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
4393 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4394 // CHECK5:       omp.inner.for.end:
4395 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4396 // CHECK5:       omp.loop.exit:
4397 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4398 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4399 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4400 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4401 // CHECK5:       .omp.lastprivate.then:
4402 // CHECK5-NEXT:    [[TMP13:%.*]] = load double, double* [[X]], align 8
4403 // CHECK5-NEXT:    store double [[TMP13]], double* @_ZN1A1xE, align 8
4404 // CHECK5-NEXT:    [[TMP14:%.*]] = load float, float* [[F]], align 4
4405 // CHECK5-NEXT:    store float [[TMP14]], float* @f, align 4
4406 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
4407 // CHECK5:       .omp.lastprivate.done:
4408 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
4409 // CHECK5-NEXT:    ret void
4410 //
4411 //
4412 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
4413 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4414 // CHECK5-NEXT:  entry:
4415 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4416 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4417 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4418 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4419 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4420 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4421 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4422 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4423 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4424 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4425 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4426 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4427 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4428 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4429 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4430 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4431 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4432 // CHECK5-NEXT:    [[DOTF__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 4, i8* inttoptr (i64 3 to i8*))
4433 // CHECK5-NEXT:    [[DOTF__ADDR:%.*]] = bitcast i8* [[DOTF__VOID_ADDR]] to float*
4434 // CHECK5-NEXT:    [[TMP2:%.*]] = load float, float* @f, align 4
4435 // CHECK5-NEXT:    store float [[TMP2]], float* [[DOTF__ADDR]], align 4
4436 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
4437 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4438 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4439 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
4440 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4441 // CHECK5:       cond.true:
4442 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4443 // CHECK5:       cond.false:
4444 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4445 // CHECK5-NEXT:    br label [[COND_END]]
4446 // CHECK5:       cond.end:
4447 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4448 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4449 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4450 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4451 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4452 // CHECK5:       omp.inner.for.cond:
4453 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4454 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4455 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4456 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4457 // CHECK5:       omp.inner.for.cond.cleanup:
4458 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4459 // CHECK5:       omp.inner.for.body:
4460 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4461 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4462 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4463 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4464 // CHECK5-NEXT:    [[TMP9:%.*]] = load double, double* @_ZN1A1xE, align 8
4465 // CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
4466 // CHECK5-NEXT:    store double [[INC]], double* @_ZN1A1xE, align 8
4467 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4468 // CHECK5:       omp.body.continue:
4469 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4470 // CHECK5:       omp.inner.for.inc:
4471 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4472 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
4473 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
4474 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4475 // CHECK5:       omp.inner.for.end:
4476 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4477 // CHECK5:       omp.loop.exit:
4478 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4479 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4480 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4481 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4482 // CHECK5:       .omp.lastprivate.then:
4483 // CHECK5-NEXT:    [[TMP13:%.*]] = load float, float* [[DOTF__ADDR]], align 4
4484 // CHECK5-NEXT:    store float [[TMP13]], float* @f, align 4
4485 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
4486 // CHECK5:       .omp.lastprivate.done:
4487 // CHECK5-NEXT:    [[TMP14:%.*]] = bitcast float* [[DOTF__ADDR]] to i8*
4488 // CHECK5-NEXT:    call void @__kmpc_free(i32 [[TMP1]], i8* [[TMP14]], i8* inttoptr (i64 3 to i8*))
4489 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
4490 // CHECK5-NEXT:    ret void
4491 //
4492 //
4493 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
4494 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4495 // CHECK5-NEXT:  entry:
4496 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4497 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4498 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4499 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i8, align 1
4500 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4501 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4502 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4503 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4504 // CHECK5-NEXT:    [[F:%.*]] = alloca [[STRUCT_LASPRIVATE_CONDITIONAL:%.*]], align 4
4505 // CHECK5-NEXT:    [[CNT:%.*]] = alloca i8, align 1
4506 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4507 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4508 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4509 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4510 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4511 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4512 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4513 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4514 // CHECK5-NEXT:    [[DOTCNT__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 1, i8* inttoptr (i64 3 to i8*))
4515 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[F]], i32 0, i32 1
4516 // CHECK5-NEXT:    store i8 0, i8* [[TMP2]], align 4
4517 // CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[F]], i32 0, i32 0
4518 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4519 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4520 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
4521 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4522 // CHECK5:       cond.true:
4523 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4524 // CHECK5:       cond.false:
4525 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4526 // CHECK5-NEXT:    br label [[COND_END]]
4527 // CHECK5:       cond.end:
4528 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4529 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4530 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4531 // CHECK5-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4532 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4533 // CHECK5:       omp.inner.for.cond:
4534 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4535 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4536 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4537 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4538 // CHECK5:       omp.inner.for.cond.cleanup:
4539 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
4540 // CHECK5:       omp.inner.for.body:
4541 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4542 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4543 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4544 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i32 [[ADD]] to i8
4545 // CHECK5-NEXT:    store i8 [[CONV]], i8* [[DOTCNT__VOID_ADDR]], align 1
4546 // CHECK5-NEXT:    [[TMP10:%.*]] = load double, double* @_ZN1A1xE, align 8
4547 // CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP10]], 1.000000e+00
4548 // CHECK5-NEXT:    store double [[INC]], double* @_ZN1A1xE, align 8
4549 // CHECK5-NEXT:    store float 0.000000e+00, float* [[TMP3]], align 4
4550 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4551 // CHECK5-NEXT:    call void @__kmpc_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
4552 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* @.{{pl_cond[.].+[.|,]}} align 4
4553 // CHECK5-NEXT:    [[TMP13:%.*]] = icmp sle i32 [[TMP12]], [[TMP11]]
4554 // CHECK5-NEXT:    br i1 [[TMP13]], label [[LP_COND_THEN:%.*]], label [[LP_COND_EXIT:%.*]]
4555 // CHECK5:       lp_cond_then:
4556 // CHECK5-NEXT:    store i32 [[TMP11]], i32* @.{{pl_cond[.].+[.|,]}} align 4
4557 // CHECK5-NEXT:    [[TMP14:%.*]] = load float, float* [[TMP3]], align 4
4558 // CHECK5-NEXT:    store float [[TMP14]], float* @{{pl_cond[.].+[.|,]}} align 4
4559 // CHECK5-NEXT:    br label [[LP_COND_EXIT]]
4560 // CHECK5:       lp_cond_exit:
4561 // CHECK5-NEXT:    call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
4562 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4563 // CHECK5:       omp.body.continue:
4564 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4565 // CHECK5:       omp.inner.for.inc:
4566 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4567 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP15]], 1
4568 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
4569 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4570 // CHECK5:       omp.inner.for.end:
4571 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4572 // CHECK5:       omp.loop.exit:
4573 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4574 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4575 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4576 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
4577 // CHECK5-NEXT:    br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4578 // CHECK5:       .omp.lastprivate.then:
4579 // CHECK5-NEXT:    store i8 2, i8* [[DOTCNT__VOID_ADDR]], align 1
4580 // CHECK5-NEXT:    [[TMP18:%.*]] = load i8, i8* [[DOTCNT__VOID_ADDR]], align 1
4581 // CHECK5-NEXT:    store i8 [[TMP18]], i8* @cnt, align 1
4582 // CHECK5-NEXT:    [[TMP19:%.*]] = load float, float* @{{pl_cond[.].+[.|,]}} align 4
4583 // CHECK5-NEXT:    store float [[TMP19]], float* [[TMP3]], align 4
4584 // CHECK5-NEXT:    [[TMP20:%.*]] = load float, float* [[TMP3]], align 4
4585 // CHECK5-NEXT:    store float [[TMP20]], float* @f, align 4
4586 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
4587 // CHECK5:       .omp.lastprivate.done:
4588 // CHECK5-NEXT:    call void @__kmpc_free(i32 [[TMP1]], i8* [[DOTCNT__VOID_ADDR]], i8* inttoptr (i64 3 to i8*))
4589 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
4590 // CHECK5-NEXT:    ret void
4591 //
4592 //
4593 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4594 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] {
4595 // CHECK5-NEXT:  entry:
4596 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4597 // CHECK5-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4598 // CHECK5-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
4599 // CHECK5-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128
4600 // CHECK5-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 128
4601 // CHECK5-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
4602 // CHECK5-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 128
4603 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
4604 // CHECK5-NEXT:    call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]])
4605 // CHECK5-NEXT:    store i32 0, i32* [[T_VAR]], align 128
4606 // CHECK5-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4607 // CHECK5-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
4608 // CHECK5-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
4609 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
4610 // CHECK5-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
4611 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
4612 // CHECK5-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 128
4613 // CHECK5-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 128
4614 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP1]])
4615 // CHECK5-NEXT:    store i32 0, i32* [[RETVAL]], align 4
4616 // CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4617 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
4618 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
4619 // CHECK5:       arraydestroy.body:
4620 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4621 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
4622 // CHECK5-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
4623 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
4624 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
4625 // CHECK5:       arraydestroy.done1:
4626 // CHECK5-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
4627 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[RETVAL]], align 4
4628 // CHECK5-NEXT:    ret i32 [[TMP3]]
4629 //
4630 //
4631 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
4632 // CHECK5-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4633 // CHECK5-NEXT:  entry:
4634 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4635 // CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
4636 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4637 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4638 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
4639 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4640 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4641 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4642 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4643 // CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 4
4644 // CHECK5-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
4645 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
4646 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4647 // CHECK5-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
4648 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4649 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
4650 // CHECK5-NEXT:    store i32 0, i32* [[A]], align 8
4651 // CHECK5-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
4652 // CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
4653 // CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
4654 // CHECK5-NEXT:    store i8 [[BF_CLEAR]], i8* [[B]], align 8
4655 // CHECK5-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
4656 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
4657 // CHECK5-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
4658 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
4659 // CHECK5-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
4660 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4661 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4662 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4663 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4664 // CHECK5-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
4665 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4666 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4667 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
4668 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4669 // CHECK5:       cond.true:
4670 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4671 // CHECK5:       cond.false:
4672 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4673 // CHECK5-NEXT:    br label [[COND_END]]
4674 // CHECK5:       cond.end:
4675 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4676 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4677 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4678 // CHECK5-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4679 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4680 // CHECK5:       omp.inner.for.cond:
4681 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4682 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4683 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4684 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4685 // CHECK5:       omp.inner.for.body:
4686 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4687 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4688 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4689 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
4690 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[TMP8]], align 4
4691 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8
4692 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
4693 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP10]], 1
4694 // CHECK5-NEXT:    store i32 [[INC]], i32* [[TMP9]], align 4
4695 // CHECK5-NEXT:    [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
4696 // CHECK5-NEXT:    [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8
4697 // CHECK5-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
4698 // CHECK5-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
4699 // CHECK5-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
4700 // CHECK5-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
4701 // CHECK5-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
4702 // CHECK5-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8
4703 // CHECK5-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
4704 // CHECK5-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
4705 // CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
4706 // CHECK5-NEXT:    store i8 [[BF_SET]], i8* [[B6]], align 8
4707 // CHECK5-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
4708 // CHECK5-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
4709 // CHECK5-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
4710 // CHECK5-NEXT:    [[C10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
4711 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C10]], align 8
4712 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
4713 // CHECK5-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
4714 // CHECK5-NEXT:    store i32 [[DIV]], i32* [[TMP12]], align 4
4715 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4716 // CHECK5:       omp.body.continue:
4717 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4718 // CHECK5:       omp.inner.for.inc:
4719 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4720 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP14]], 1
4721 // CHECK5-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
4722 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4723 // CHECK5:       omp.inner.for.end:
4724 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4725 // CHECK5:       omp.loop.exit:
4726 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
4727 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
4728 // CHECK5-NEXT:    ret void
4729 //
4730 //
4731 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4
4732 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] {
4733 // CHECK5-NEXT:  entry:
4734 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4735 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4736 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4737 // CHECK5-NEXT:    [[E:%.*]] = alloca [4 x i8]*, align 8
4738 // CHECK5-NEXT:    [[A:%.*]] = alloca i32*, align 8
4739 // CHECK5-NEXT:    [[B:%.*]] = alloca i32, align 4
4740 // CHECK5-NEXT:    [[C:%.*]] = alloca i32*, align 8
4741 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
4742 // CHECK5-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
4743 // CHECK5-NEXT:    [[_TMP5:%.*]] = alloca [4 x i8]*, align 8
4744 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4745 // CHECK5-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
4746 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4747 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4748 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4749 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4750 // CHECK5-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
4751 // CHECK5-NEXT:    [[_TMP8:%.*]] = alloca [4 x i8]*, align 8
4752 // CHECK5-NEXT:    [[A9:%.*]] = alloca i32, align 4
4753 // CHECK5-NEXT:    [[_TMP10:%.*]] = alloca i32*, align 8
4754 // CHECK5-NEXT:    [[B11:%.*]] = alloca i32, align 4
4755 // CHECK5-NEXT:    [[C12:%.*]] = alloca i32, align 4
4756 // CHECK5-NEXT:    [[_TMP13:%.*]] = alloca i32*, align 8
4757 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4758 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4759 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4760 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4761 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4762 // CHECK5-NEXT:    [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
4763 // CHECK5-NEXT:    store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8
4764 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
4765 // CHECK5-NEXT:    store i32* [[A2]], i32** [[A]], align 8
4766 // CHECK5-NEXT:    [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3
4767 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8
4768 // CHECK5-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
4769 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A]], align 8
4770 // CHECK5-NEXT:    store i32* [[TMP2]], i32** [[TMP]], align 8
4771 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
4772 // CHECK5-NEXT:    store i32* [[TMP3]], i32** [[_TMP4]], align 8
4773 // CHECK5-NEXT:    [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8
4774 // CHECK5-NEXT:    store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8
4775 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4776 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4777 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4778 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4779 // CHECK5-NEXT:    [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
4780 // CHECK5-NEXT:    [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8*
4781 // CHECK5-NEXT:    [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8*
4782 // CHECK5-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false)
4783 // CHECK5-NEXT:    store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8
4784 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4785 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
4786 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
4787 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8
4788 // CHECK5-NEXT:    store i32* [[A9]], i32** [[_TMP10]], align 8
4789 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
4790 // CHECK5-NEXT:    store i32* [[C12]], i32** [[_TMP13]], align 8
4791 // CHECK5-NEXT:    [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
4792 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4793 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4794 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
4795 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4796 // CHECK5:       cond.true:
4797 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4798 // CHECK5:       cond.false:
4799 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4800 // CHECK5-NEXT:    br label [[COND_END]]
4801 // CHECK5:       cond.end:
4802 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
4803 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4804 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4805 // CHECK5-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
4806 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4807 // CHECK5:       omp.inner.for.cond:
4808 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4809 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4810 // CHECK5-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
4811 // CHECK5-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4812 // CHECK5:       omp.inner.for.body:
4813 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4814 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
4815 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4816 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4817 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8
4818 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
4819 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP20]], 1
4820 // CHECK5-NEXT:    store i32 [[INC]], i32* [[TMP19]], align 4
4821 // CHECK5-NEXT:    [[TMP21:%.*]] = load i32, i32* [[B11]], align 4
4822 // CHECK5-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP21]], -1
4823 // CHECK5-NEXT:    store i32 [[DEC]], i32* [[B11]], align 4
4824 // CHECK5-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[_TMP13]], align 8
4825 // CHECK5-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
4826 // CHECK5-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP23]], 1
4827 // CHECK5-NEXT:    store i32 [[DIV]], i32* [[TMP22]], align 4
4828 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4829 // CHECK5:       omp.body.continue:
4830 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4831 // CHECK5:       omp.inner.for.inc:
4832 // CHECK5-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4833 // CHECK5-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP24]], 1
4834 // CHECK5-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
4835 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4836 // CHECK5:       omp.inner.for.end:
4837 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4838 // CHECK5:       omp.loop.exit:
4839 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
4840 // CHECK5-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4841 // CHECK5-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4842 // CHECK5-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4843 // CHECK5:       .omp.lastprivate.then:
4844 // CHECK5-NEXT:    [[TMP27:%.*]] = load i32*, i32** [[_TMP10]], align 8
4845 // CHECK5-NEXT:    [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
4846 // CHECK5-NEXT:    store i32 [[TMP28]], i32* [[TMP10]], align 4
4847 // CHECK5-NEXT:    [[TMP29:%.*]] = load i32, i32* [[B11]], align 4
4848 // CHECK5-NEXT:    store i32 [[TMP29]], i32* [[B]], align 4
4849 // CHECK5-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[_TMP13]], align 8
4850 // CHECK5-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
4851 // CHECK5-NEXT:    store i32 [[TMP31]], i32* [[TMP11]], align 4
4852 // CHECK5-NEXT:    [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
4853 // CHECK5-NEXT:    [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1
4854 // CHECK5-NEXT:    store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1
4855 // CHECK5-NEXT:    [[TMP34:%.*]] = load i32, i32* [[B11]], align 4
4856 // CHECK5-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
4857 // CHECK5-NEXT:    [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8
4858 // CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
4859 // CHECK5-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15
4860 // CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
4861 // CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
4862 // CHECK5-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
4863 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
4864 // CHECK5:       .omp.lastprivate.done:
4865 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
4866 // CHECK5-NEXT:    ret void
4867 //
4868 //
4869 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4870 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4871 // CHECK5-NEXT:  entry:
4872 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4873 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4874 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4875 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4876 // CHECK5-NEXT:    store float 0.000000e+00, float* [[F]], align 4
4877 // CHECK5-NEXT:    ret void
4878 //
4879 //
4880 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4881 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4882 // CHECK5-NEXT:  entry:
4883 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4884 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
4885 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4886 // CHECK5-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
4887 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4888 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4889 // CHECK5-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4890 // CHECK5-NEXT:    store float [[TMP0]], float* [[F]], align 4
4891 // CHECK5-NEXT:    ret void
4892 //
4893 //
4894 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4895 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4896 // CHECK5-NEXT:  entry:
4897 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4898 // CHECK5-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4899 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4900 // CHECK5-NEXT:    ret void
4901 //
4902 //
4903 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4904 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4905 // CHECK5-NEXT:  entry:
4906 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4907 // CHECK5-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4908 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4909 // CHECK5-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
4910 // CHECK5-NEXT:    ret void
4911 //
4912 //
4913 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
4914 // CHECK5-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4915 // CHECK5-NEXT:  entry:
4916 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
4917 // CHECK5-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
4918 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
4919 // CHECK5-NEXT:    call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]])
4920 // CHECK5-NEXT:    ret void
4921 //
4922 //
4923 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4924 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
4925 // CHECK5-NEXT:  entry:
4926 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
4927 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4928 // CHECK5-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
4929 // CHECK5-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
4930 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
4931 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4932 // CHECK5-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
4933 // CHECK5-NEXT:    ret void
4934 //
4935 //
4936 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5
4937 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
4938 // CHECK5-NEXT:  entry:
4939 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4940 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4941 // CHECK5-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
4942 // CHECK5-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
4943 // CHECK5-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
4944 // CHECK5-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
4945 // CHECK5-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
4946 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
4947 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4948 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4949 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4950 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4951 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4952 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4953 // CHECK5-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 128
4954 // CHECK5-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 128
4955 // CHECK5-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 128
4956 // CHECK5-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
4957 // CHECK5-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
4958 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4959 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4960 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4961 // CHECK5-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
4962 // CHECK5-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
4963 // CHECK5-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
4964 // CHECK5-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
4965 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
4966 // CHECK5-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
4967 // CHECK5-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
4968 // CHECK5-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
4969 // CHECK5-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
4970 // CHECK5-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
4971 // CHECK5-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
4972 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4973 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
4974 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4975 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4976 // CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4977 // CHECK5-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
4978 // CHECK5-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
4979 // CHECK5:       arrayctor.loop:
4980 // CHECK5-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4981 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4982 // CHECK5-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
4983 // CHECK5-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4984 // CHECK5-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4985 // CHECK5:       arrayctor.cont:
4986 // CHECK5-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
4987 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
4988 // CHECK5-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
4989 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4990 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
4991 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4992 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4993 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
4994 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4995 // CHECK5:       cond.true:
4996 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4997 // CHECK5:       cond.false:
4998 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4999 // CHECK5-NEXT:    br label [[COND_END]]
5000 // CHECK5:       cond.end:
5001 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
5002 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5003 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5004 // CHECK5-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
5005 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5006 // CHECK5:       omp.inner.for.cond:
5007 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5008 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5009 // CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
5010 // CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5011 // CHECK5:       omp.inner.for.cond.cleanup:
5012 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5013 // CHECK5:       omp.inner.for.body:
5014 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5015 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
5016 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5017 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5018 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 128
5019 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
5020 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
5021 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
5022 // CHECK5-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
5023 // CHECK5-NEXT:    [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
5024 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4
5025 // CHECK5-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
5026 // CHECK5-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
5027 // CHECK5-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP16]])
5028 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5029 // CHECK5:       omp.body.continue:
5030 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5031 // CHECK5:       omp.inner.for.inc:
5032 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5033 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1
5034 // CHECK5-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
5035 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
5036 // CHECK5:       omp.inner.for.end:
5037 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5038 // CHECK5:       omp.loop.exit:
5039 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5040 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
5041 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
5042 // CHECK5-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5043 // CHECK5-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
5044 // CHECK5-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5045 // CHECK5:       .omp.lastprivate.then:
5046 // CHECK5-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 128
5047 // CHECK5-NEXT:    store i32 [[TMP23]], i32* [[TMP0]], align 128
5048 // CHECK5-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
5049 // CHECK5-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
5050 // CHECK5-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP24]], i8* align 128 [[TMP25]], i64 8, i1 false)
5051 // CHECK5-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
5052 // CHECK5-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
5053 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
5054 // CHECK5-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP27]]
5055 // CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
5056 // CHECK5:       omp.arraycpy.body:
5057 // CHECK5-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5058 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5059 // CHECK5-NEXT:    [[CALL13:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
5060 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
5061 // CHECK5-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
5062 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
5063 // CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
5064 // CHECK5:       omp.arraycpy.done14:
5065 // CHECK5-NEXT:    [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
5066 // CHECK5-NEXT:    [[CALL15:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[TMP5]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP28]])
5067 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
5068 // CHECK5:       .omp.lastprivate.done:
5069 // CHECK5-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]]
5070 // CHECK5-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
5071 // CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN16]], i64 2
5072 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5073 // CHECK5:       arraydestroy.body:
5074 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5075 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5076 // CHECK5-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
5077 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]]
5078 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]]
5079 // CHECK5:       arraydestroy.done17:
5080 // CHECK5-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5081 // CHECK5-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
5082 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP31]])
5083 // CHECK5-NEXT:    ret void
5084 //
5085 //
5086 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
5087 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5088 // CHECK5-NEXT:  entry:
5089 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
5090 // CHECK5-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
5091 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
5092 // CHECK5-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
5093 // CHECK5-NEXT:    ret void
5094 //
5095 //
5096 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
5097 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5098 // CHECK5-NEXT:  entry:
5099 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
5100 // CHECK5-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
5101 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
5102 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5103 // CHECK5-NEXT:    store i32 0, i32* [[F]], align 4
5104 // CHECK5-NEXT:    ret void
5105 //
5106 //
5107 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
5108 // CHECK5-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5109 // CHECK5-NEXT:  entry:
5110 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
5111 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5112 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5113 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
5114 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5115 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5116 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5117 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5118 // CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 4
5119 // CHECK5-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
5120 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
5121 // CHECK5-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
5122 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
5123 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0
5124 // CHECK5-NEXT:    store i32 0, i32* [[A]], align 4
5125 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]])
5126 // CHECK5-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
5127 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5128 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5129 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5130 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5131 // CHECK5-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
5132 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5133 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5134 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1
5135 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5136 // CHECK5:       cond.true:
5137 // CHECK5-NEXT:    br label [[COND_END:%.*]]
5138 // CHECK5:       cond.false:
5139 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5140 // CHECK5-NEXT:    br label [[COND_END]]
5141 // CHECK5:       cond.end:
5142 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]
5143 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5144 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5145 // CHECK5-NEXT:    store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4
5146 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5147 // CHECK5:       omp.inner.for.cond:
5148 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5149 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5150 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
5151 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5152 // CHECK5:       omp.inner.for.body:
5153 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5154 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
5155 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5156 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[_TMP4]], align 8
5157 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[TMP7]], align 4
5158 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
5159 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
5160 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 1
5161 // CHECK5-NEXT:    store i32 [[INC]], i32* [[TMP8]], align 4
5162 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5163 // CHECK5:       omp.body.continue:
5164 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5165 // CHECK5:       omp.inner.for.inc:
5166 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5167 // CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
5168 // CHECK5-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
5169 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
5170 // CHECK5:       omp.inner.for.end:
5171 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5172 // CHECK5:       omp.loop.exit:
5173 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5174 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
5175 // CHECK5-NEXT:    ret void
5176 //
5177 //
5178 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
5179 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] {
5180 // CHECK5-NEXT:  entry:
5181 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5182 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5183 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
5184 // CHECK5-NEXT:    [[A:%.*]] = alloca i32*, align 8
5185 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
5186 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5187 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
5188 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5189 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5190 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5191 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5192 // CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 4
5193 // CHECK5-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
5194 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
5195 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5196 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5197 // CHECK5-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
5198 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
5199 // CHECK5-NEXT:    [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0
5200 // CHECK5-NEXT:    store i32* [[A1]], i32** [[A]], align 8
5201 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A]], align 8
5202 // CHECK5-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
5203 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5204 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5205 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5206 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5207 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
5208 // CHECK5-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
5209 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5210 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5211 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5212 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5213 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
5214 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5215 // CHECK5:       cond.true:
5216 // CHECK5-NEXT:    br label [[COND_END:%.*]]
5217 // CHECK5:       cond.false:
5218 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5219 // CHECK5-NEXT:    br label [[COND_END]]
5220 // CHECK5:       cond.end:
5221 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5222 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5223 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5224 // CHECK5-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5225 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5226 // CHECK5:       omp.inner.for.cond:
5227 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5228 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5229 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5230 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5231 // CHECK5:       omp.inner.for.body:
5232 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5233 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5234 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5235 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5236 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
5237 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
5238 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
5239 // CHECK5-NEXT:    store i32 [[INC]], i32* [[TMP11]], align 4
5240 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5241 // CHECK5:       omp.body.continue:
5242 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5243 // CHECK5:       omp.inner.for.inc:
5244 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5245 // CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP13]], 1
5246 // CHECK5-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
5247 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
5248 // CHECK5:       omp.inner.for.end:
5249 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5250 // CHECK5:       omp.loop.exit:
5251 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5252 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5253 // CHECK5-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5254 // CHECK5-NEXT:    br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5255 // CHECK5:       .omp.lastprivate.then:
5256 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[_TMP4]], align 8
5257 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
5258 // CHECK5-NEXT:    store i32 [[TMP17]], i32* [[TMP2]], align 4
5259 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
5260 // CHECK5:       .omp.lastprivate.done:
5261 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
5262 // CHECK5-NEXT:    ret void
5263 //
5264 //
5265 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
5266 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5267 // CHECK5-NEXT:  entry:
5268 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
5269 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5270 // CHECK5-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
5271 // CHECK5-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
5272 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
5273 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5274 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5275 // CHECK5-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
5276 // CHECK5-NEXT:    ret void
5277 //
5278 //
5279 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
5280 // CHECK5-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5281 // CHECK5-NEXT:  entry:
5282 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
5283 // CHECK5-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
5284 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
5285 // CHECK5-NEXT:    ret void
5286 //
5287 //
5288 // CHECK6-LABEL: define {{[^@]+}}@main
5289 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
5290 // CHECK6-NEXT:  entry:
5291 // CHECK6-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5292 // CHECK6-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
5293 // CHECK6-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
5294 // CHECK6-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
5295 // CHECK6-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
5296 // CHECK6-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
5297 // CHECK6-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
5298 // CHECK6-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5299 // CHECK6-NEXT:    call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
5300 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
5301 // CHECK6-NEXT:    store i32 0, i32* [[T_VAR]], align 4
5302 // CHECK6-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5303 // CHECK6-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
5304 // CHECK6-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
5305 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
5306 // CHECK6-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
5307 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
5308 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00)
5309 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], i32* @_ZZ4mainE5sivar)
5310 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
5311 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
5312 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*))
5313 // CHECK6-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
5314 // CHECK6-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
5315 // CHECK6-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5:[0-9]+]]
5316 // CHECK6-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
5317 // CHECK6-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
5318 // CHECK6-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5319 // CHECK6:       arraydestroy.body:
5320 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5321 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5322 // CHECK6-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
5323 // CHECK6-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
5324 // CHECK6-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
5325 // CHECK6:       arraydestroy.done1:
5326 // CHECK6-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
5327 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
5328 // CHECK6-NEXT:    ret i32 [[TMP2]]
5329 //
5330 //
5331 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
5332 // CHECK6-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
5333 // CHECK6-NEXT:  entry:
5334 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5335 // CHECK6-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
5336 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5337 // CHECK6-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
5338 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5339 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
5340 // CHECK6-NEXT:    call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]])
5341 // CHECK6-NEXT:    ret void
5342 //
5343 //
5344 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
5345 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5346 // CHECK6-NEXT:  entry:
5347 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5348 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5349 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5350 // CHECK6-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
5351 // CHECK6-NEXT:    ret void
5352 //
5353 //
5354 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
5355 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5356 // CHECK6-NEXT:  entry:
5357 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5358 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
5359 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5360 // CHECK6-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
5361 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5362 // CHECK6-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
5363 // CHECK6-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
5364 // CHECK6-NEXT:    ret void
5365 //
5366 //
5367 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
5368 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
5369 // CHECK6-NEXT:  entry:
5370 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5371 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5372 // CHECK6-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
5373 // CHECK6-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
5374 // CHECK6-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
5375 // CHECK6-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
5376 // CHECK6-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
5377 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5378 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5379 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5380 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5381 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5382 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5383 // CHECK6-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
5384 // CHECK6-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4
5385 // CHECK6-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
5386 // CHECK6-NEXT:    [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
5387 // CHECK6-NEXT:    [[SIVAR5:%.*]] = alloca i32, align 4
5388 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5389 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5390 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5391 // CHECK6-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
5392 // CHECK6-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
5393 // CHECK6-NEXT:    store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
5394 // CHECK6-NEXT:    store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
5395 // CHECK6-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
5396 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
5397 // CHECK6-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
5398 // CHECK6-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
5399 // CHECK6-NEXT:    [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
5400 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
5401 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5402 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5403 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5404 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5405 // CHECK6-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
5406 // CHECK6-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
5407 // CHECK6-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
5408 // CHECK6:       arrayctor.loop:
5409 // CHECK6-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5410 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
5411 // CHECK6-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
5412 // CHECK6-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5413 // CHECK6-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5414 // CHECK6:       arrayctor.cont:
5415 // CHECK6-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
5416 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5417 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5418 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5419 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5420 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
5421 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5422 // CHECK6:       cond.true:
5423 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5424 // CHECK6:       cond.false:
5425 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5426 // CHECK6-NEXT:    br label [[COND_END]]
5427 // CHECK6:       cond.end:
5428 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
5429 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5430 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5431 // CHECK6-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5432 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5433 // CHECK6:       omp.inner.for.cond:
5434 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5435 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5436 // CHECK6-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5437 // CHECK6-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5438 // CHECK6:       omp.inner.for.cond.cleanup:
5439 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5440 // CHECK6:       omp.inner.for.body:
5441 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5442 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
5443 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5444 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5445 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[T_VAR1]], align 4
5446 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I]], align 4
5447 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
5448 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]]
5449 // CHECK6-NEXT:    store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4
5450 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
5451 // CHECK6-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64
5452 // CHECK6-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM7]]
5453 // CHECK6-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
5454 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
5455 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[SIVAR5]], align 4
5456 // CHECK6-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]]
5457 // CHECK6-NEXT:    store i32 [[ADD9]], i32* [[SIVAR5]], align 4
5458 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5459 // CHECK6:       omp.body.continue:
5460 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5461 // CHECK6:       omp.inner.for.inc:
5462 // CHECK6-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5463 // CHECK6-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
5464 // CHECK6-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
5465 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5466 // CHECK6:       omp.inner.for.end:
5467 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5468 // CHECK6:       omp.loop.exit:
5469 // CHECK6-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5470 // CHECK6-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
5471 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
5472 // CHECK6-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5473 // CHECK6-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
5474 // CHECK6-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5475 // CHECK6:       .omp.lastprivate.then:
5476 // CHECK6-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR1]], align 4
5477 // CHECK6-NEXT:    store i32 [[TMP23]], i32* [[TMP0]], align 4
5478 // CHECK6-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
5479 // CHECK6-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
5480 // CHECK6-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
5481 // CHECK6-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
5482 // CHECK6-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR3]] to %struct.S*
5483 // CHECK6-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i64 2
5484 // CHECK6-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP27]]
5485 // CHECK6-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
5486 // CHECK6:       omp.arraycpy.body:
5487 // CHECK6-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5488 // CHECK6-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5489 // CHECK6-NEXT:    [[CALL12:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
5490 // CHECK6-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
5491 // CHECK6-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
5492 // CHECK6-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
5493 // CHECK6-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
5494 // CHECK6:       omp.arraycpy.done13:
5495 // CHECK6-NEXT:    [[CALL14:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR4]])
5496 // CHECK6-NEXT:    [[TMP28:%.*]] = load i32, i32* [[SIVAR5]], align 4
5497 // CHECK6-NEXT:    store i32 [[TMP28]], i32* [[TMP4]], align 4
5498 // CHECK6-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
5499 // CHECK6:       .omp.lastprivate.done:
5500 // CHECK6-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR5]]
5501 // CHECK6-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
5502 // CHECK6-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
5503 // CHECK6-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5504 // CHECK6:       arraydestroy.body:
5505 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5506 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5507 // CHECK6-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
5508 // CHECK6-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
5509 // CHECK6-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
5510 // CHECK6:       arraydestroy.done16:
5511 // CHECK6-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5512 // CHECK6-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
5513 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP31]])
5514 // CHECK6-NEXT:    ret void
5515 //
5516 //
5517 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
5518 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5519 // CHECK6-NEXT:  entry:
5520 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5521 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5522 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5523 // CHECK6-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
5524 // CHECK6-NEXT:    ret void
5525 //
5526 //
5527 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
5528 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
5529 // CHECK6-NEXT:  entry:
5530 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5531 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5532 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5533 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5534 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5535 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5536 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5537 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5538 // CHECK6-NEXT:    [[F:%.*]] = alloca float, align 4
5539 // CHECK6-NEXT:    [[X:%.*]] = alloca double, align 8
5540 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5541 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5542 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5543 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5544 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5545 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5546 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5547 // CHECK6-NEXT:    [[TMP0:%.*]] = load float, float* @f, align 4
5548 // CHECK6-NEXT:    store float [[TMP0]], float* [[F]], align 4
5549 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5550 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5551 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
5552 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5553 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5554 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
5555 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5556 // CHECK6:       cond.true:
5557 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5558 // CHECK6:       cond.false:
5559 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5560 // CHECK6-NEXT:    br label [[COND_END]]
5561 // CHECK6:       cond.end:
5562 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5563 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5564 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5565 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5566 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5567 // CHECK6:       omp.inner.for.cond:
5568 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5569 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5570 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5571 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5572 // CHECK6:       omp.inner.for.body:
5573 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5574 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5575 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5576 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5577 // CHECK6-NEXT:    [[TMP9:%.*]] = load double, double* [[X]], align 8
5578 // CHECK6-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
5579 // CHECK6-NEXT:    store double [[INC]], double* [[X]], align 8
5580 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5581 // CHECK6:       omp.body.continue:
5582 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5583 // CHECK6:       omp.inner.for.inc:
5584 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5585 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
5586 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5587 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5588 // CHECK6:       omp.inner.for.end:
5589 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5590 // CHECK6:       omp.loop.exit:
5591 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5592 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5593 // CHECK6-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5594 // CHECK6-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5595 // CHECK6:       .omp.lastprivate.then:
5596 // CHECK6-NEXT:    [[TMP13:%.*]] = load double, double* [[X]], align 8
5597 // CHECK6-NEXT:    store double [[TMP13]], double* @_ZN1A1xE, align 8
5598 // CHECK6-NEXT:    [[TMP14:%.*]] = load float, float* [[F]], align 4
5599 // CHECK6-NEXT:    store float [[TMP14]], float* @f, align 4
5600 // CHECK6-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
5601 // CHECK6:       .omp.lastprivate.done:
5602 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
5603 // CHECK6-NEXT:    ret void
5604 //
5605 //
5606 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
5607 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
5608 // CHECK6-NEXT:  entry:
5609 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5610 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5611 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5612 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5613 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5614 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5615 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5616 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5617 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5618 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5619 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5620 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5621 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5622 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5623 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5624 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5625 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5626 // CHECK6-NEXT:    [[DOTF__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 4, i8* inttoptr (i64 3 to i8*))
5627 // CHECK6-NEXT:    [[DOTF__ADDR:%.*]] = bitcast i8* [[DOTF__VOID_ADDR]] to float*
5628 // CHECK6-NEXT:    [[TMP2:%.*]] = load float, float* @f, align 4
5629 // CHECK6-NEXT:    store float [[TMP2]], float* [[DOTF__ADDR]], align 4
5630 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
5631 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5632 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5633 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
5634 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5635 // CHECK6:       cond.true:
5636 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5637 // CHECK6:       cond.false:
5638 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5639 // CHECK6-NEXT:    br label [[COND_END]]
5640 // CHECK6:       cond.end:
5641 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5642 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5643 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5644 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5645 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5646 // CHECK6:       omp.inner.for.cond:
5647 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5648 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5649 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5650 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5651 // CHECK6:       omp.inner.for.cond.cleanup:
5652 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5653 // CHECK6:       omp.inner.for.body:
5654 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5655 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5656 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5657 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5658 // CHECK6-NEXT:    [[TMP9:%.*]] = load double, double* @_ZN1A1xE, align 8
5659 // CHECK6-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
5660 // CHECK6-NEXT:    store double [[INC]], double* @_ZN1A1xE, align 8
5661 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5662 // CHECK6:       omp.body.continue:
5663 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5664 // CHECK6:       omp.inner.for.inc:
5665 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5666 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
5667 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5668 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5669 // CHECK6:       omp.inner.for.end:
5670 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5671 // CHECK6:       omp.loop.exit:
5672 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5673 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5674 // CHECK6-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5675 // CHECK6-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5676 // CHECK6:       .omp.lastprivate.then:
5677 // CHECK6-NEXT:    [[TMP13:%.*]] = load float, float* [[DOTF__ADDR]], align 4
5678 // CHECK6-NEXT:    store float [[TMP13]], float* @f, align 4
5679 // CHECK6-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
5680 // CHECK6:       .omp.lastprivate.done:
5681 // CHECK6-NEXT:    [[TMP14:%.*]] = bitcast float* [[DOTF__ADDR]] to i8*
5682 // CHECK6-NEXT:    call void @__kmpc_free(i32 [[TMP1]], i8* [[TMP14]], i8* inttoptr (i64 3 to i8*))
5683 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
5684 // CHECK6-NEXT:    ret void
5685 //
5686 //
5687 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
5688 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
5689 // CHECK6-NEXT:  entry:
5690 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5691 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5692 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5693 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i8, align 1
5694 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5695 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5696 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5697 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5698 // CHECK6-NEXT:    [[F:%.*]] = alloca [[STRUCT_LASPRIVATE_CONDITIONAL:%.*]], align 4
5699 // CHECK6-NEXT:    [[CNT:%.*]] = alloca i8, align 1
5700 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5701 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5702 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5703 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5704 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5705 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5706 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5707 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5708 // CHECK6-NEXT:    [[DOTCNT__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP1]], i64 1, i8* inttoptr (i64 3 to i8*))
5709 // CHECK6-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[F]], i32 0, i32 1
5710 // CHECK6-NEXT:    store i8 0, i8* [[TMP2]], align 4
5711 // CHECK6-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_LASPRIVATE_CONDITIONAL]], %struct.lasprivate.conditional* [[F]], i32 0, i32 0
5712 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5713 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5714 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
5715 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5716 // CHECK6:       cond.true:
5717 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5718 // CHECK6:       cond.false:
5719 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5720 // CHECK6-NEXT:    br label [[COND_END]]
5721 // CHECK6:       cond.end:
5722 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5723 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5724 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5725 // CHECK6-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5726 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5727 // CHECK6:       omp.inner.for.cond:
5728 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5729 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5730 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5731 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5732 // CHECK6:       omp.inner.for.cond.cleanup:
5733 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
5734 // CHECK6:       omp.inner.for.body:
5735 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5736 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5737 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5738 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i32 [[ADD]] to i8
5739 // CHECK6-NEXT:    store i8 [[CONV]], i8* [[DOTCNT__VOID_ADDR]], align 1
5740 // CHECK6-NEXT:    [[TMP10:%.*]] = load double, double* @_ZN1A1xE, align 8
5741 // CHECK6-NEXT:    [[INC:%.*]] = fadd double [[TMP10]], 1.000000e+00
5742 // CHECK6-NEXT:    store double [[INC]], double* @_ZN1A1xE, align 8
5743 // CHECK6-NEXT:    store float 0.000000e+00, float* [[TMP3]], align 4
5744 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5745 // CHECK6-NEXT:    call void @__kmpc_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
5746 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* @.{{pl_cond[.].+[.|,]}} align 4
5747 // CHECK6-NEXT:    [[TMP13:%.*]] = icmp sle i32 [[TMP12]], [[TMP11]]
5748 // CHECK6-NEXT:    br i1 [[TMP13]], label [[LP_COND_THEN:%.*]], label [[LP_COND_EXIT:%.*]]
5749 // CHECK6:       lp_cond_then:
5750 // CHECK6-NEXT:    store i32 [[TMP11]], i32* @.{{pl_cond[.].+[.|,]}} align 4
5751 // CHECK6-NEXT:    [[TMP14:%.*]] = load float, float* [[TMP3]], align 4
5752 // CHECK6-NEXT:    store float [[TMP14]], float* @{{pl_cond[.].+[.|,]}} align 4
5753 // CHECK6-NEXT:    br label [[LP_COND_EXIT]]
5754 // CHECK6:       lp_cond_exit:
5755 // CHECK6-NEXT:    call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], [8 x i32]* @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
5756 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5757 // CHECK6:       omp.body.continue:
5758 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5759 // CHECK6:       omp.inner.for.inc:
5760 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5761 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP15]], 1
5762 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5763 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5764 // CHECK6:       omp.inner.for.end:
5765 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5766 // CHECK6:       omp.loop.exit:
5767 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5768 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5769 // CHECK6-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5770 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
5771 // CHECK6-NEXT:    br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5772 // CHECK6:       .omp.lastprivate.then:
5773 // CHECK6-NEXT:    store i8 2, i8* [[DOTCNT__VOID_ADDR]], align 1
5774 // CHECK6-NEXT:    [[TMP18:%.*]] = load i8, i8* [[DOTCNT__VOID_ADDR]], align 1
5775 // CHECK6-NEXT:    store i8 [[TMP18]], i8* @cnt, align 1
5776 // CHECK6-NEXT:    [[TMP19:%.*]] = load float, float* @{{pl_cond[.].+[.|,]}} align 4
5777 // CHECK6-NEXT:    store float [[TMP19]], float* [[TMP3]], align 4
5778 // CHECK6-NEXT:    [[TMP20:%.*]] = load float, float* [[TMP3]], align 4
5779 // CHECK6-NEXT:    store float [[TMP20]], float* @f, align 4
5780 // CHECK6-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
5781 // CHECK6:       .omp.lastprivate.done:
5782 // CHECK6-NEXT:    call void @__kmpc_free(i32 [[TMP1]], i8* [[DOTCNT__VOID_ADDR]], i8* inttoptr (i64 3 to i8*))
5783 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
5784 // CHECK6-NEXT:    ret void
5785 //
5786 //
5787 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
5788 // CHECK6-SAME: () #[[ATTR7:[0-9]+]] {
5789 // CHECK6-NEXT:  entry:
5790 // CHECK6-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
5791 // CHECK6-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
5792 // CHECK6-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
5793 // CHECK6-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128
5794 // CHECK6-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 128
5795 // CHECK6-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
5796 // CHECK6-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 128
5797 // CHECK6-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
5798 // CHECK6-NEXT:    call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]])
5799 // CHECK6-NEXT:    store i32 0, i32* [[T_VAR]], align 128
5800 // CHECK6-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
5801 // CHECK6-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
5802 // CHECK6-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
5803 // CHECK6-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
5804 // CHECK6-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
5805 // CHECK6-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
5806 // CHECK6-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 128
5807 // CHECK6-NEXT:    [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 128
5808 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[T_VAR]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP1]])
5809 // CHECK6-NEXT:    store i32 0, i32* [[RETVAL]], align 4
5810 // CHECK6-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
5811 // CHECK6-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
5812 // CHECK6-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
5813 // CHECK6:       arraydestroy.body:
5814 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5815 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
5816 // CHECK6-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
5817 // CHECK6-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
5818 // CHECK6-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
5819 // CHECK6:       arraydestroy.done1:
5820 // CHECK6-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
5821 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[RETVAL]], align 4
5822 // CHECK6-NEXT:    ret i32 [[TMP3]]
5823 //
5824 //
5825 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
5826 // CHECK6-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
5827 // CHECK6-NEXT:  entry:
5828 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5829 // CHECK6-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
5830 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5831 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5832 // CHECK6-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
5833 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5834 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5835 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5836 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5837 // CHECK6-NEXT:    [[A3:%.*]] = alloca i32, align 4
5838 // CHECK6-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
5839 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
5840 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5841 // CHECK6-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
5842 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5843 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5844 // CHECK6-NEXT:    store i32 0, i32* [[A]], align 8
5845 // CHECK6-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
5846 // CHECK6-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
5847 // CHECK6-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
5848 // CHECK6-NEXT:    store i8 [[BF_CLEAR]], i8* [[B]], align 8
5849 // CHECK6-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
5850 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
5851 // CHECK6-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
5852 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
5853 // CHECK6-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
5854 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5855 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5856 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5857 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5858 // CHECK6-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
5859 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5860 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5861 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
5862 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5863 // CHECK6:       cond.true:
5864 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5865 // CHECK6:       cond.false:
5866 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5867 // CHECK6-NEXT:    br label [[COND_END]]
5868 // CHECK6:       cond.end:
5869 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5870 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5871 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5872 // CHECK6-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5873 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5874 // CHECK6:       omp.inner.for.cond:
5875 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5876 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5877 // CHECK6-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5878 // CHECK6-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5879 // CHECK6:       omp.inner.for.body:
5880 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5881 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
5882 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5883 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
5884 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[TMP8]], align 4
5885 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8
5886 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
5887 // CHECK6-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP10]], 1
5888 // CHECK6-NEXT:    store i32 [[INC]], i32* [[TMP9]], align 4
5889 // CHECK6-NEXT:    [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
5890 // CHECK6-NEXT:    [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8
5891 // CHECK6-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
5892 // CHECK6-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
5893 // CHECK6-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
5894 // CHECK6-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
5895 // CHECK6-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
5896 // CHECK6-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8
5897 // CHECK6-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
5898 // CHECK6-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
5899 // CHECK6-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
5900 // CHECK6-NEXT:    store i8 [[BF_SET]], i8* [[B6]], align 8
5901 // CHECK6-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
5902 // CHECK6-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
5903 // CHECK6-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
5904 // CHECK6-NEXT:    [[C10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
5905 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C10]], align 8
5906 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
5907 // CHECK6-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
5908 // CHECK6-NEXT:    store i32 [[DIV]], i32* [[TMP12]], align 4
5909 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5910 // CHECK6:       omp.body.continue:
5911 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5912 // CHECK6:       omp.inner.for.inc:
5913 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5914 // CHECK6-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP14]], 1
5915 // CHECK6-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
5916 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5917 // CHECK6:       omp.inner.for.end:
5918 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5919 // CHECK6:       omp.loop.exit:
5920 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
5921 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
5922 // CHECK6-NEXT:    ret void
5923 //
5924 //
5925 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..4
5926 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3]] {
5927 // CHECK6-NEXT:  entry:
5928 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5929 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5930 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5931 // CHECK6-NEXT:    [[E:%.*]] = alloca [4 x i8]*, align 8
5932 // CHECK6-NEXT:    [[A:%.*]] = alloca i32*, align 8
5933 // CHECK6-NEXT:    [[B:%.*]] = alloca i32, align 4
5934 // CHECK6-NEXT:    [[C:%.*]] = alloca i32*, align 8
5935 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
5936 // CHECK6-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
5937 // CHECK6-NEXT:    [[_TMP5:%.*]] = alloca [4 x i8]*, align 8
5938 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5939 // CHECK6-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
5940 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5941 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5942 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5943 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5944 // CHECK6-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
5945 // CHECK6-NEXT:    [[_TMP8:%.*]] = alloca [4 x i8]*, align 8
5946 // CHECK6-NEXT:    [[A9:%.*]] = alloca i32, align 4
5947 // CHECK6-NEXT:    [[_TMP10:%.*]] = alloca i32*, align 8
5948 // CHECK6-NEXT:    [[B11:%.*]] = alloca i32, align 4
5949 // CHECK6-NEXT:    [[C12:%.*]] = alloca i32, align 4
5950 // CHECK6-NEXT:    [[_TMP13:%.*]] = alloca i32*, align 8
5951 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5952 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5953 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5954 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5955 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5956 // CHECK6-NEXT:    [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
5957 // CHECK6-NEXT:    store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8
5958 // CHECK6-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
5959 // CHECK6-NEXT:    store i32* [[A2]], i32** [[A]], align 8
5960 // CHECK6-NEXT:    [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3
5961 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8
5962 // CHECK6-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
5963 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A]], align 8
5964 // CHECK6-NEXT:    store i32* [[TMP2]], i32** [[TMP]], align 8
5965 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
5966 // CHECK6-NEXT:    store i32* [[TMP3]], i32** [[_TMP4]], align 8
5967 // CHECK6-NEXT:    [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8
5968 // CHECK6-NEXT:    store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8
5969 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5970 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
5971 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5972 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5973 // CHECK6-NEXT:    [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
5974 // CHECK6-NEXT:    [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8*
5975 // CHECK6-NEXT:    [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8*
5976 // CHECK6-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false)
5977 // CHECK6-NEXT:    store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8
5978 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5979 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
5980 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
5981 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8
5982 // CHECK6-NEXT:    store i32* [[A9]], i32** [[_TMP10]], align 8
5983 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
5984 // CHECK6-NEXT:    store i32* [[C12]], i32** [[_TMP13]], align 8
5985 // CHECK6-NEXT:    [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
5986 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5987 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5988 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
5989 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5990 // CHECK6:       cond.true:
5991 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5992 // CHECK6:       cond.false:
5993 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5994 // CHECK6-NEXT:    br label [[COND_END]]
5995 // CHECK6:       cond.end:
5996 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
5997 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5998 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5999 // CHECK6-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
6000 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6001 // CHECK6:       omp.inner.for.cond:
6002 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6003 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6004 // CHECK6-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
6005 // CHECK6-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6006 // CHECK6:       omp.inner.for.body:
6007 // CHECK6-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6008 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
6009 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6010 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6011 // CHECK6-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8
6012 // CHECK6-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
6013 // CHECK6-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP20]], 1
6014 // CHECK6-NEXT:    store i32 [[INC]], i32* [[TMP19]], align 4
6015 // CHECK6-NEXT:    [[TMP21:%.*]] = load i32, i32* [[B11]], align 4
6016 // CHECK6-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP21]], -1
6017 // CHECK6-NEXT:    store i32 [[DEC]], i32* [[B11]], align 4
6018 // CHECK6-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[_TMP13]], align 8
6019 // CHECK6-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
6020 // CHECK6-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP23]], 1
6021 // CHECK6-NEXT:    store i32 [[DIV]], i32* [[TMP22]], align 4
6022 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6023 // CHECK6:       omp.body.continue:
6024 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6025 // CHECK6:       omp.inner.for.inc:
6026 // CHECK6-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6027 // CHECK6-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP24]], 1
6028 // CHECK6-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
6029 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
6030 // CHECK6:       omp.inner.for.end:
6031 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6032 // CHECK6:       omp.loop.exit:
6033 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
6034 // CHECK6-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6035 // CHECK6-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
6036 // CHECK6-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
6037 // CHECK6:       .omp.lastprivate.then:
6038 // CHECK6-NEXT:    [[TMP27:%.*]] = load i32*, i32** [[_TMP10]], align 8
6039 // CHECK6-NEXT:    [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
6040 // CHECK6-NEXT:    store i32 [[TMP28]], i32* [[TMP10]], align 4
6041 // CHECK6-NEXT:    [[TMP29:%.*]] = load i32, i32* [[B11]], align 4
6042 // CHECK6-NEXT:    store i32 [[TMP29]], i32* [[B]], align 4
6043 // CHECK6-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[_TMP13]], align 8
6044 // CHECK6-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
6045 // CHECK6-NEXT:    store i32 [[TMP31]], i32* [[TMP11]], align 4
6046 // CHECK6-NEXT:    [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
6047 // CHECK6-NEXT:    [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1
6048 // CHECK6-NEXT:    store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1
6049 // CHECK6-NEXT:    [[TMP34:%.*]] = load i32, i32* [[B11]], align 4
6050 // CHECK6-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
6051 // CHECK6-NEXT:    [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8
6052 // CHECK6-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
6053 // CHECK6-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15
6054 // CHECK6-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
6055 // CHECK6-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
6056 // CHECK6-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
6057 // CHECK6-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
6058 // CHECK6:       .omp.lastprivate.done:
6059 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
6060 // CHECK6-NEXT:    ret void
6061 //
6062 //
6063 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
6064 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6065 // CHECK6-NEXT:  entry:
6066 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6067 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6068 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6069 // CHECK6-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
6070 // CHECK6-NEXT:    store float 0.000000e+00, float* [[F]], align 4
6071 // CHECK6-NEXT:    ret void
6072 //
6073 //
6074 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
6075 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6076 // CHECK6-NEXT:  entry:
6077 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6078 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
6079 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6080 // CHECK6-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
6081 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6082 // CHECK6-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
6083 // CHECK6-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
6084 // CHECK6-NEXT:    store float [[TMP0]], float* [[F]], align 4
6085 // CHECK6-NEXT:    ret void
6086 //
6087 //
6088 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
6089 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6090 // CHECK6-NEXT:  entry:
6091 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
6092 // CHECK6-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
6093 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
6094 // CHECK6-NEXT:    ret void
6095 //
6096 //
6097 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
6098 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6099 // CHECK6-NEXT:  entry:
6100 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6101 // CHECK6-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6102 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6103 // CHECK6-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
6104 // CHECK6-NEXT:    ret void
6105 //
6106 //
6107 // CHECK6-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
6108 // CHECK6-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6109 // CHECK6-NEXT:  entry:
6110 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
6111 // CHECK6-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
6112 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
6113 // CHECK6-NEXT:    call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]])
6114 // CHECK6-NEXT:    ret void
6115 //
6116 //
6117 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
6118 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6119 // CHECK6-NEXT:  entry:
6120 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6121 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6122 // CHECK6-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6123 // CHECK6-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6124 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6125 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
6126 // CHECK6-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
6127 // CHECK6-NEXT:    ret void
6128 //
6129 //
6130 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..5
6131 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
6132 // CHECK6-NEXT:  entry:
6133 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6134 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6135 // CHECK6-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
6136 // CHECK6-NEXT:    [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
6137 // CHECK6-NEXT:    [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
6138 // CHECK6-NEXT:    [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
6139 // CHECK6-NEXT:    [[TMP:%.*]] = alloca %struct.S.0*, align 8
6140 // CHECK6-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
6141 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6142 // CHECK6-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
6143 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6144 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6145 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6146 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6147 // CHECK6-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 128
6148 // CHECK6-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 128
6149 // CHECK6-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 128
6150 // CHECK6-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
6151 // CHECK6-NEXT:    [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
6152 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
6153 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6154 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6155 // CHECK6-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
6156 // CHECK6-NEXT:    store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
6157 // CHECK6-NEXT:    store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
6158 // CHECK6-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
6159 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
6160 // CHECK6-NEXT:    [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
6161 // CHECK6-NEXT:    [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
6162 // CHECK6-NEXT:    [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
6163 // CHECK6-NEXT:    store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
6164 // CHECK6-NEXT:    [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
6165 // CHECK6-NEXT:    store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
6166 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6167 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6168 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6169 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6170 // CHECK6-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
6171 // CHECK6-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
6172 // CHECK6-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
6173 // CHECK6:       arrayctor.loop:
6174 // CHECK6-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
6175 // CHECK6-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
6176 // CHECK6-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
6177 // CHECK6-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
6178 // CHECK6-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
6179 // CHECK6:       arrayctor.cont:
6180 // CHECK6-NEXT:    [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
6181 // CHECK6-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
6182 // CHECK6-NEXT:    store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
6183 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6184 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
6185 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6186 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6187 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
6188 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6189 // CHECK6:       cond.true:
6190 // CHECK6-NEXT:    br label [[COND_END:%.*]]
6191 // CHECK6:       cond.false:
6192 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6193 // CHECK6-NEXT:    br label [[COND_END]]
6194 // CHECK6:       cond.end:
6195 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
6196 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6197 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6198 // CHECK6-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
6199 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6200 // CHECK6:       omp.inner.for.cond:
6201 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6202 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6203 // CHECK6-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
6204 // CHECK6-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
6205 // CHECK6:       omp.inner.for.cond.cleanup:
6206 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
6207 // CHECK6:       omp.inner.for.body:
6208 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6209 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
6210 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6211 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6212 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[T_VAR3]], align 128
6213 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
6214 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
6215 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
6216 // CHECK6-NEXT:    store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4
6217 // CHECK6-NEXT:    [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
6218 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I]], align 4
6219 // CHECK6-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
6220 // CHECK6-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
6221 // CHECK6-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP16]])
6222 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6223 // CHECK6:       omp.body.continue:
6224 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6225 // CHECK6:       omp.inner.for.inc:
6226 // CHECK6-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6227 // CHECK6-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1
6228 // CHECK6-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
6229 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
6230 // CHECK6:       omp.inner.for.end:
6231 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6232 // CHECK6:       omp.loop.exit:
6233 // CHECK6-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6234 // CHECK6-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
6235 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
6236 // CHECK6-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6237 // CHECK6-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
6238 // CHECK6-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
6239 // CHECK6:       .omp.lastprivate.then:
6240 // CHECK6-NEXT:    [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 128
6241 // CHECK6-NEXT:    store i32 [[TMP23]], i32* [[TMP0]], align 128
6242 // CHECK6-NEXT:    [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
6243 // CHECK6-NEXT:    [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
6244 // CHECK6-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP24]], i8* align 128 [[TMP25]], i64 8, i1 false)
6245 // CHECK6-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
6246 // CHECK6-NEXT:    [[TMP26:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
6247 // CHECK6-NEXT:    [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
6248 // CHECK6-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP27]]
6249 // CHECK6-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
6250 // CHECK6:       omp.arraycpy.body:
6251 // CHECK6-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
6252 // CHECK6-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
6253 // CHECK6-NEXT:    [[CALL13:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], %struct.S.0* nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
6254 // CHECK6-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
6255 // CHECK6-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
6256 // CHECK6-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
6257 // CHECK6-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
6258 // CHECK6:       omp.arraycpy.done14:
6259 // CHECK6-NEXT:    [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
6260 // CHECK6-NEXT:    [[CALL15:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEaSERKS0_(%struct.S.0* nonnull align 4 dereferenceable(4) [[TMP5]], %struct.S.0* nonnull align 4 dereferenceable(4) [[TMP28]])
6261 // CHECK6-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
6262 // CHECK6:       .omp.lastprivate.done:
6263 // CHECK6-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR5]]
6264 // CHECK6-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
6265 // CHECK6-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN16]], i64 2
6266 // CHECK6-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
6267 // CHECK6:       arraydestroy.body:
6268 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
6269 // CHECK6-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
6270 // CHECK6-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
6271 // CHECK6-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]]
6272 // CHECK6-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]]
6273 // CHECK6:       arraydestroy.done17:
6274 // CHECK6-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6275 // CHECK6-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
6276 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP31]])
6277 // CHECK6-NEXT:    ret void
6278 //
6279 //
6280 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
6281 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6282 // CHECK6-NEXT:  entry:
6283 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6284 // CHECK6-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6285 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6286 // CHECK6-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
6287 // CHECK6-NEXT:    ret void
6288 //
6289 //
6290 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
6291 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6292 // CHECK6-NEXT:  entry:
6293 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6294 // CHECK6-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6295 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6296 // CHECK6-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
6297 // CHECK6-NEXT:    store i32 0, i32* [[F]], align 4
6298 // CHECK6-NEXT:    ret void
6299 //
6300 //
6301 // CHECK6-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
6302 // CHECK6-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6303 // CHECK6-NEXT:  entry:
6304 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
6305 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6306 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6307 // CHECK6-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
6308 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6309 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6310 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6311 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6312 // CHECK6-NEXT:    [[A3:%.*]] = alloca i32, align 4
6313 // CHECK6-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
6314 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
6315 // CHECK6-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
6316 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
6317 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0
6318 // CHECK6-NEXT:    store i32 0, i32* [[A]], align 4
6319 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]])
6320 // CHECK6-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
6321 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6322 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6323 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6324 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6325 // CHECK6-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
6326 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6327 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6328 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1
6329 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6330 // CHECK6:       cond.true:
6331 // CHECK6-NEXT:    br label [[COND_END:%.*]]
6332 // CHECK6:       cond.false:
6333 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6334 // CHECK6-NEXT:    br label [[COND_END]]
6335 // CHECK6:       cond.end:
6336 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]
6337 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6338 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6339 // CHECK6-NEXT:    store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4
6340 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6341 // CHECK6:       omp.inner.for.cond:
6342 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6343 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6344 // CHECK6-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
6345 // CHECK6-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6346 // CHECK6:       omp.inner.for.body:
6347 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6348 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
6349 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6350 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[_TMP4]], align 8
6351 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[TMP7]], align 4
6352 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
6353 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
6354 // CHECK6-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 1
6355 // CHECK6-NEXT:    store i32 [[INC]], i32* [[TMP8]], align 4
6356 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6357 // CHECK6:       omp.body.continue:
6358 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6359 // CHECK6:       omp.inner.for.inc:
6360 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6361 // CHECK6-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
6362 // CHECK6-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
6363 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
6364 // CHECK6:       omp.inner.for.end:
6365 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6366 // CHECK6:       omp.loop.exit:
6367 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
6368 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
6369 // CHECK6-NEXT:    ret void
6370 //
6371 //
6372 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
6373 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SST* [[THIS:%.*]]) #[[ATTR3]] {
6374 // CHECK6-NEXT:  entry:
6375 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6376 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6377 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
6378 // CHECK6-NEXT:    [[A:%.*]] = alloca i32*, align 8
6379 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
6380 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6381 // CHECK6-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
6382 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6383 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6384 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6385 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6386 // CHECK6-NEXT:    [[A3:%.*]] = alloca i32, align 4
6387 // CHECK6-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
6388 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
6389 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6390 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6391 // CHECK6-NEXT:    store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
6392 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
6393 // CHECK6-NEXT:    [[A1:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[TMP0]], i32 0, i32 0
6394 // CHECK6-NEXT:    store i32* [[A1]], i32** [[A]], align 8
6395 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A]], align 8
6396 // CHECK6-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
6397 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6398 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6399 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6400 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6401 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
6402 // CHECK6-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
6403 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6404 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6405 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6406 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6407 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
6408 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6409 // CHECK6:       cond.true:
6410 // CHECK6-NEXT:    br label [[COND_END:%.*]]
6411 // CHECK6:       cond.false:
6412 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6413 // CHECK6-NEXT:    br label [[COND_END]]
6414 // CHECK6:       cond.end:
6415 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6416 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6417 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6418 // CHECK6-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6419 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6420 // CHECK6:       omp.inner.for.cond:
6421 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6422 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6423 // CHECK6-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6424 // CHECK6-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6425 // CHECK6:       omp.inner.for.body:
6426 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6427 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6428 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6429 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6430 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
6431 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
6432 // CHECK6-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
6433 // CHECK6-NEXT:    store i32 [[INC]], i32* [[TMP11]], align 4
6434 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6435 // CHECK6:       omp.body.continue:
6436 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6437 // CHECK6:       omp.inner.for.inc:
6438 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6439 // CHECK6-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP13]], 1
6440 // CHECK6-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
6441 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
6442 // CHECK6:       omp.inner.for.end:
6443 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6444 // CHECK6:       omp.loop.exit:
6445 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6446 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6447 // CHECK6-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6448 // CHECK6-NEXT:    br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
6449 // CHECK6:       .omp.lastprivate.then:
6450 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[_TMP4]], align 8
6451 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
6452 // CHECK6-NEXT:    store i32 [[TMP17]], i32* [[TMP2]], align 4
6453 // CHECK6-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
6454 // CHECK6:       .omp.lastprivate.done:
6455 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
6456 // CHECK6-NEXT:    ret void
6457 //
6458 //
6459 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
6460 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6461 // CHECK6-NEXT:  entry:
6462 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6463 // CHECK6-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6464 // CHECK6-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6465 // CHECK6-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
6466 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6467 // CHECK6-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
6468 // CHECK6-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
6469 // CHECK6-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
6470 // CHECK6-NEXT:    ret void
6471 //
6472 //
6473 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
6474 // CHECK6-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6475 // CHECK6-NEXT:  entry:
6476 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
6477 // CHECK6-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
6478 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
6479 // CHECK6-NEXT:    ret void
6480 //
6481 //
6482 // CHECK7-LABEL: define {{[^@]+}}@main
6483 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
6484 // CHECK7-NEXT:  entry:
6485 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
6486 // CHECK7-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
6487 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
6488 // CHECK7-NEXT:    store i32 0, i32* [[RETVAL]], align 4
6489 // CHECK7-NEXT:    call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
6490 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
6491 // CHECK7-NEXT:    store i32* @_ZZ4mainE5sivar, i32** [[TMP0]], align 8
6492 // CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(8) [[REF_TMP]])
6493 // CHECK7-NEXT:    ret i32 0
6494 //
6495 //
6496 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
6497 // CHECK7-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
6498 // CHECK7-NEXT:  entry:
6499 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
6500 // CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
6501 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
6502 // CHECK7-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
6503 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
6504 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
6505 // CHECK7-NEXT:    call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]])
6506 // CHECK7-NEXT:    ret void
6507 //
6508 //
6509 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
6510 // CHECK7-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
6511 // CHECK7-NEXT:  entry:
6512 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
6513 // CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
6514 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6515 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6516 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
6517 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6518 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6519 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6520 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6521 // CHECK7-NEXT:    [[A3:%.*]] = alloca i32, align 4
6522 // CHECK7-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
6523 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8
6524 // CHECK7-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
6525 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
6526 // CHECK7-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
6527 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
6528 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6529 // CHECK7-NEXT:    store i32 0, i32* [[A]], align 8
6530 // CHECK7-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
6531 // CHECK7-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
6532 // CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
6533 // CHECK7-NEXT:    store i8 [[BF_CLEAR]], i8* [[B]], align 8
6534 // CHECK7-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
6535 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
6536 // CHECK7-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
6537 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
6538 // CHECK7-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
6539 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6540 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6541 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6542 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6543 // CHECK7-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
6544 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6545 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6546 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
6547 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6548 // CHECK7:       cond.true:
6549 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6550 // CHECK7:       cond.false:
6551 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6552 // CHECK7-NEXT:    br label [[COND_END]]
6553 // CHECK7:       cond.end:
6554 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6555 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6556 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6557 // CHECK7-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6558 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6559 // CHECK7:       omp.inner.for.cond:
6560 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6561 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6562 // CHECK7-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6563 // CHECK7-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6564 // CHECK7:       omp.inner.for.body:
6565 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6566 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6567 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6568 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
6569 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[TMP8]], align 4
6570 // CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0
6571 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP9]], align 8
6572 // CHECK7-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1
6573 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
6574 // CHECK7-NEXT:    store i32* [[TMP11]], i32** [[TMP10]], align 8
6575 // CHECK7-NEXT:    call void @_ZZN2SSC1ERiENKUlvE0_clEv(%class.anon.1* nonnull align 8 dereferenceable(16) [[REF_TMP]])
6576 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6577 // CHECK7:       omp.body.continue:
6578 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6579 // CHECK7:       omp.inner.for.inc:
6580 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6581 // CHECK7-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1
6582 // CHECK7-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
6583 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6584 // CHECK7:       omp.inner.for.end:
6585 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6586 // CHECK7:       omp.loop.exit:
6587 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
6588 // CHECK7-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP0]])
6589 // CHECK7-NEXT:    ret void
6590 //
6591 //
6592 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
6593 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
6594 // CHECK7-NEXT:  entry:
6595 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6596 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6597 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
6598 // CHECK7-NEXT:    [[E:%.*]] = alloca [4 x i8]*, align 8
6599 // CHECK7-NEXT:    [[A:%.*]] = alloca i32*, align 8
6600 // CHECK7-NEXT:    [[B:%.*]] = alloca i32, align 4
6601 // CHECK7-NEXT:    [[C:%.*]] = alloca i32*, align 8
6602 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
6603 // CHECK7-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
6604 // CHECK7-NEXT:    [[_TMP5:%.*]] = alloca [4 x i8]*, align 8
6605 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6606 // CHECK7-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
6607 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6608 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6609 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6610 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6611 // CHECK7-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
6612 // CHECK7-NEXT:    [[_TMP8:%.*]] = alloca [4 x i8]*, align 8
6613 // CHECK7-NEXT:    [[A9:%.*]] = alloca i32, align 4
6614 // CHECK7-NEXT:    [[_TMP10:%.*]] = alloca i32*, align 8
6615 // CHECK7-NEXT:    [[B11:%.*]] = alloca i32, align 4
6616 // CHECK7-NEXT:    [[C12:%.*]] = alloca i32, align 4
6617 // CHECK7-NEXT:    [[_TMP13:%.*]] = alloca i32*, align 8
6618 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6619 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
6620 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6621 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6622 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
6623 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
6624 // CHECK7-NEXT:    [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
6625 // CHECK7-NEXT:    store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8
6626 // CHECK7-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
6627 // CHECK7-NEXT:    store i32* [[A2]], i32** [[A]], align 8
6628 // CHECK7-NEXT:    [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3
6629 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8
6630 // CHECK7-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
6631 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A]], align 8
6632 // CHECK7-NEXT:    store i32* [[TMP2]], i32** [[TMP]], align 8
6633 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
6634 // CHECK7-NEXT:    store i32* [[TMP3]], i32** [[_TMP4]], align 8
6635 // CHECK7-NEXT:    [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8
6636 // CHECK7-NEXT:    store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8
6637 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6638 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6639 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6640 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6641 // CHECK7-NEXT:    [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
6642 // CHECK7-NEXT:    [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8*
6643 // CHECK7-NEXT:    [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8*
6644 // CHECK7-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false)
6645 // CHECK7-NEXT:    store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8
6646 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6647 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
6648 // CHECK7-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
6649 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8
6650 // CHECK7-NEXT:    store i32* [[A9]], i32** [[_TMP10]], align 8
6651 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
6652 // CHECK7-NEXT:    store i32* [[C12]], i32** [[_TMP13]], align 8
6653 // CHECK7-NEXT:    [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
6654 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6655 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6656 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
6657 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6658 // CHECK7:       cond.true:
6659 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6660 // CHECK7:       cond.false:
6661 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6662 // CHECK7-NEXT:    br label [[COND_END]]
6663 // CHECK7:       cond.end:
6664 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
6665 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6666 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6667 // CHECK7-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
6668 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6669 // CHECK7:       omp.inner.for.cond:
6670 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6671 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6672 // CHECK7-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
6673 // CHECK7-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6674 // CHECK7:       omp.inner.for.body:
6675 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6676 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
6677 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6678 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6679 // CHECK7-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
6680 // CHECK7-NEXT:    store %struct.SS* [[TMP0]], %struct.SS** [[TMP19]], align 8
6681 // CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
6682 // CHECK7-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[_TMP10]], align 8
6683 // CHECK7-NEXT:    store i32* [[TMP21]], i32** [[TMP20]], align 8
6684 // CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
6685 // CHECK7-NEXT:    store i32* [[B11]], i32** [[TMP22]], align 8
6686 // CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
6687 // CHECK7-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[_TMP13]], align 8
6688 // CHECK7-NEXT:    store i32* [[TMP24]], i32** [[TMP23]], align 8
6689 // CHECK7-NEXT:    call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
6690 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6691 // CHECK7:       omp.body.continue:
6692 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6693 // CHECK7:       omp.inner.for.inc:
6694 // CHECK7-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6695 // CHECK7-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP25]], 1
6696 // CHECK7-NEXT:    store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
6697 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6698 // CHECK7:       omp.inner.for.end:
6699 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6700 // CHECK7:       omp.loop.exit:
6701 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
6702 // CHECK7-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6703 // CHECK7-NEXT:    [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
6704 // CHECK7-NEXT:    br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
6705 // CHECK7:       .omp.lastprivate.then:
6706 // CHECK7-NEXT:    [[TMP28:%.*]] = load i32*, i32** [[_TMP10]], align 8
6707 // CHECK7-NEXT:    [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
6708 // CHECK7-NEXT:    store i32 [[TMP29]], i32* [[TMP10]], align 4
6709 // CHECK7-NEXT:    [[TMP30:%.*]] = load i32, i32* [[B11]], align 4
6710 // CHECK7-NEXT:    store i32 [[TMP30]], i32* [[B]], align 4
6711 // CHECK7-NEXT:    [[TMP31:%.*]] = load i32*, i32** [[_TMP13]], align 8
6712 // CHECK7-NEXT:    [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
6713 // CHECK7-NEXT:    store i32 [[TMP32]], i32* [[TMP11]], align 4
6714 // CHECK7-NEXT:    [[TMP33:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
6715 // CHECK7-NEXT:    [[TMP34:%.*]] = load [4 x i8], [4 x i8]* [[TMP33]], align 1
6716 // CHECK7-NEXT:    store [4 x i8] [[TMP34]], [4 x i8]* [[TMP12]], align 1
6717 // CHECK7-NEXT:    [[TMP35:%.*]] = load i32, i32* [[B11]], align 4
6718 // CHECK7-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
6719 // CHECK7-NEXT:    [[TMP36:%.*]] = trunc i32 [[TMP35]] to i8
6720 // CHECK7-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
6721 // CHECK7-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP36]], 15
6722 // CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
6723 // CHECK7-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
6724 // CHECK7-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
6725 // CHECK7-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
6726 // CHECK7:       .omp.lastprivate.done:
6727 // CHECK7-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
6728 // CHECK7-NEXT:    ret void
6729 //
6730 //
6731 // CHECK7-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv
6732 // CHECK7-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 {
6733 // CHECK7-NEXT:  entry:
6734 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8
6735 // CHECK7-NEXT:    store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8
6736 // CHECK7-NEXT:    [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8
6737 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0
6738 // CHECK7-NEXT:    [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8
6739 // CHECK7-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1
6740 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8
6741 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6742 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
6743 // CHECK7-NEXT:    store i32 [[INC]], i32* [[TMP3]], align 4
6744 // CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2
6745 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8
6746 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
6747 // CHECK7-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
6748 // CHECK7-NEXT:    store i32 [[DEC]], i32* [[TMP6]], align 4
6749 // CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3
6750 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8
6751 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
6752 // CHECK7-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
6753 // CHECK7-NEXT:    store i32 [[DIV]], i32* [[TMP9]], align 4
6754 // CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1
6755 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
6756 // CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2
6757 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8
6758 // CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3
6759 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[TMP15]], align 8
6760 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP12]], i32* [[TMP14]], i32* [[TMP16]])
6761 // CHECK7-NEXT:    ret void
6762 //
6763 //
6764 // CHECK7-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE0_clEv
6765 // CHECK7-SAME: (%class.anon.1* nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2]] align 2 {
6766 // CHECK7-NEXT:  entry:
6767 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %class.anon.1*, align 8
6768 // CHECK7-NEXT:    store %class.anon.1* [[THIS]], %class.anon.1** [[THIS_ADDR]], align 8
6769 // CHECK7-NEXT:    [[THIS1:%.*]] = load %class.anon.1*, %class.anon.1** [[THIS_ADDR]], align 8
6770 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1:%.*]], %class.anon.1* [[THIS1]], i32 0, i32 0
6771 // CHECK7-NEXT:    [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8
6772 // CHECK7-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 1
6773 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8
6774 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6775 // CHECK7-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP4]], -1
6776 // CHECK7-NEXT:    store i32 [[DEC]], i32* [[TMP3]], align 4
6777 // CHECK7-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 2
6778 // CHECK7-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
6779 // CHECK7-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
6780 // CHECK7-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
6781 // CHECK7-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
6782 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
6783 // CHECK7-NEXT:    [[TMP5:%.*]] = trunc i32 [[INC]] to i8
6784 // CHECK7-NEXT:    [[BF_LOAD2:%.*]] = load i8, i8* [[B]], align 8
6785 // CHECK7-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
6786 // CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD2]], -16
6787 // CHECK7-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
6788 // CHECK7-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
6789 // CHECK7-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
6790 // CHECK7-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
6791 // CHECK7-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
6792 // CHECK7-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 3
6793 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[C]], align 8
6794 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
6795 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 2
6796 // CHECK7-NEXT:    store i32 [[MUL]], i32* [[TMP6]], align 4
6797 // CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 1
6798 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8
6799 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP9]])
6800 // CHECK7-NEXT:    ret void
6801 //
6802 //
6803 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
6804 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[B:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] {
6805 // CHECK7-NEXT:  entry:
6806 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6807 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6808 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
6809 // CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
6810 // CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca i32*, align 8
6811 // CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca i32*, align 8
6812 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
6813 // CHECK7-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
6814 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
6815 // CHECK7-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
6816 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6817 // CHECK7-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
6818 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6819 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6820 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6821 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6822 // CHECK7-NEXT:    [[A5:%.*]] = alloca i32, align 4
6823 // CHECK7-NEXT:    [[_TMP6:%.*]] = alloca i32*, align 8
6824 // CHECK7-NEXT:    [[B7:%.*]] = alloca i32, align 4
6825 // CHECK7-NEXT:    [[C8:%.*]] = alloca i32, align 4
6826 // CHECK7-NEXT:    [[_TMP9:%.*]] = alloca i32*, align 8
6827 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6828 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6829 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6830 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
6831 // CHECK7-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
6832 // CHECK7-NEXT:    store i32* [[B]], i32** [[B_ADDR]], align 8
6833 // CHECK7-NEXT:    store i32* [[C]], i32** [[C_ADDR]], align 8
6834 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
6835 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6836 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
6837 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
6838 // CHECK7-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
6839 // CHECK7-NEXT:    store i32* [[TMP3]], i32** [[_TMP1]], align 8
6840 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
6841 // CHECK7-NEXT:    store i32* [[TMP4]], i32** [[_TMP2]], align 8
6842 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
6843 // CHECK7-NEXT:    store i32* [[TMP5]], i32** [[_TMP3]], align 8
6844 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6845 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6846 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6847 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6848 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8
6849 // CHECK7-NEXT:    store i32* [[A5]], i32** [[_TMP6]], align 8
6850 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8
6851 // CHECK7-NEXT:    store i32* [[C8]], i32** [[_TMP9]], align 8
6852 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6853 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
6854 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6855 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6856 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
6857 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6858 // CHECK7:       cond.true:
6859 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6860 // CHECK7:       cond.false:
6861 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6862 // CHECK7-NEXT:    br label [[COND_END]]
6863 // CHECK7:       cond.end:
6864 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
6865 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6866 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6867 // CHECK7-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
6868 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6869 // CHECK7:       omp.inner.for.cond:
6870 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6871 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6872 // CHECK7-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6873 // CHECK7-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6874 // CHECK7:       omp.inner.for.body:
6875 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6876 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
6877 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6878 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6879 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[_TMP6]], align 8
6880 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
6881 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP17]], 1
6882 // CHECK7-NEXT:    store i32 [[INC]], i32* [[TMP16]], align 4
6883 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, i32* [[B7]], align 4
6884 // CHECK7-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP18]], -1
6885 // CHECK7-NEXT:    store i32 [[DEC]], i32* [[B7]], align 4
6886 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP9]], align 8
6887 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
6888 // CHECK7-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP20]], 1
6889 // CHECK7-NEXT:    store i32 [[DIV]], i32* [[TMP19]], align 4
6890 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6891 // CHECK7:       omp.body.continue:
6892 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6893 // CHECK7:       omp.inner.for.inc:
6894 // CHECK7-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6895 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
6896 // CHECK7-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
6897 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6898 // CHECK7:       omp.inner.for.end:
6899 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6900 // CHECK7:       omp.loop.exit:
6901 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
6902 // CHECK7-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6903 // CHECK7-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
6904 // CHECK7-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
6905 // CHECK7:       .omp.lastprivate.then:
6906 // CHECK7-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[_TMP6]], align 8
6907 // CHECK7-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
6908 // CHECK7-NEXT:    store i32 [[TMP25]], i32* [[TMP6]], align 4
6909 // CHECK7-NEXT:    [[TMP26:%.*]] = load i32, i32* [[B7]], align 4
6910 // CHECK7-NEXT:    store i32 [[TMP26]], i32* [[TMP2]], align 4
6911 // CHECK7-NEXT:    [[TMP27:%.*]] = load i32*, i32** [[_TMP9]], align 8
6912 // CHECK7-NEXT:    [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
6913 // CHECK7-NEXT:    store i32 [[TMP28]], i32* [[TMP7]], align 4
6914 // CHECK7-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
6915 // CHECK7:       .omp.lastprivate.done:
6916 // CHECK7-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
6917 // CHECK7-NEXT:    ret void
6918 //
6919 //
6920 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
6921 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
6922 // CHECK7-NEXT:  entry:
6923 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6924 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6925 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
6926 // CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
6927 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
6928 // CHECK7-NEXT:    [[B:%.*]] = alloca i32, align 4
6929 // CHECK7-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
6930 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6931 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
6932 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6933 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6934 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6935 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6936 // CHECK7-NEXT:    [[B3:%.*]] = alloca i32, align 4
6937 // CHECK7-NEXT:    [[B4:%.*]] = alloca i32, align 4
6938 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6939 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6940 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
6941 // CHECK7-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
6942 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
6943 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6944 // CHECK7-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
6945 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
6946 // CHECK7-NEXT:    store i32* [[TMP2]], i32** [[_TMP1]], align 8
6947 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6948 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
6949 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6950 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6951 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6952 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6953 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6954 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6955 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
6956 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6957 // CHECK7:       cond.true:
6958 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6959 // CHECK7:       cond.false:
6960 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6961 // CHECK7-NEXT:    br label [[COND_END]]
6962 // CHECK7:       cond.end:
6963 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6964 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6965 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6966 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6967 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6968 // CHECK7:       omp.inner.for.cond:
6969 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6970 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6971 // CHECK7-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6972 // CHECK7-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6973 // CHECK7:       omp.inner.for.body:
6974 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6975 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6976 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6977 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[B3]], align 4
6978 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP1]], align 8
6979 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
6980 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
6981 // CHECK7-NEXT:    store i32 [[INC]], i32* [[TMP11]], align 4
6982 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[B3]], align 4
6983 // CHECK7-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP13]], -1
6984 // CHECK7-NEXT:    store i32 [[DEC]], i32* [[B3]], align 4
6985 // CHECK7-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 3
6986 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[C]], align 8
6987 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
6988 // CHECK7-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP15]], 1
6989 // CHECK7-NEXT:    store i32 [[DIV]], i32* [[TMP14]], align 4
6990 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6991 // CHECK7:       omp.body.continue:
6992 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6993 // CHECK7:       omp.inner.for.inc:
6994 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6995 // CHECK7-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
6996 // CHECK7-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
6997 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6998 // CHECK7:       omp.inner.for.end:
6999 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7000 // CHECK7:       omp.loop.exit:
7001 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
7002 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7003 // CHECK7-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
7004 // CHECK7-NEXT:    br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
7005 // CHECK7:       .omp.lastprivate.then:
7006 // CHECK7-NEXT:    store i32 2, i32* [[B3]], align 4
7007 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, i32* [[B3]], align 4
7008 // CHECK7-NEXT:    store i32 [[TMP19]], i32* [[B]], align 4
7009 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, i32* [[B3]], align 4
7010 // CHECK7-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
7011 // CHECK7-NEXT:    [[TMP21:%.*]] = trunc i32 [[TMP20]] to i8
7012 // CHECK7-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B7]], align 8
7013 // CHECK7-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP21]], 15
7014 // CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
7015 // CHECK7-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
7016 // CHECK7-NEXT:    store i8 [[BF_SET]], i8* [[B7]], align 8
7017 // CHECK7-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
7018 // CHECK7:       .omp.lastprivate.done:
7019 // CHECK7-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7020 // CHECK7-NEXT:    ret void
7021 //
7022 //
7023 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
7024 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3]] {
7025 // CHECK7-NEXT:  entry:
7026 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7027 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7028 // CHECK7-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
7029 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
7030 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7031 // CHECK7-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
7032 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7033 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7034 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7035 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7036 // CHECK7-NEXT:    [[G:%.*]] = alloca i32, align 128
7037 // CHECK7-NEXT:    [[G1:%.*]] = alloca i32, align 4
7038 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
7039 // CHECK7-NEXT:    [[SIVAR3:%.*]] = alloca i32, align 4
7040 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
7041 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 8
7042 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7043 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7044 // CHECK7-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
7045 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
7046 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** @g1, align 8
7047 // CHECK7-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
7048 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7049 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7050 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7051 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7052 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32*, i32** @g1, align 8
7053 // CHECK7-NEXT:    store i32* [[G1]], i32** [[_TMP2]], align 8
7054 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7055 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7056 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7057 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7058 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
7059 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7060 // CHECK7:       cond.true:
7061 // CHECK7-NEXT:    br label [[COND_END:%.*]]
7062 // CHECK7:       cond.false:
7063 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7064 // CHECK7-NEXT:    br label [[COND_END]]
7065 // CHECK7:       cond.end:
7066 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
7067 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7068 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7069 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
7070 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7071 // CHECK7:       omp.inner.for.cond:
7072 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7073 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7074 // CHECK7-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
7075 // CHECK7-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7076 // CHECK7:       omp.inner.for.body:
7077 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7078 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
7079 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7080 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7081 // CHECK7-NEXT:    store i32 1, i32* [[G]], align 128
7082 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8
7083 // CHECK7-NEXT:    store volatile i32 1, i32* [[TMP11]], align 4
7084 // CHECK7-NEXT:    store i32 2, i32* [[SIVAR3]], align 4
7085 // CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 0
7086 // CHECK7-NEXT:    store i32* [[G]], i32** [[TMP12]], align 8
7087 // CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 1
7088 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[_TMP2]], align 8
7089 // CHECK7-NEXT:    store i32* [[TMP14]], i32** [[TMP13]], align 8
7090 // CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_2]], %class.anon.2* [[REF_TMP]], i32 0, i32 2
7091 // CHECK7-NEXT:    store i32* [[SIVAR3]], i32** [[TMP15]], align 8
7092 // CHECK7-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.2* nonnull align 8 dereferenceable(24) [[REF_TMP]])
7093 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7094 // CHECK7:       omp.body.continue:
7095 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7096 // CHECK7:       omp.inner.for.inc:
7097 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7098 // CHECK7-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
7099 // CHECK7-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
7100 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
7101 // CHECK7:       omp.inner.for.end:
7102 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7103 // CHECK7:       omp.loop.exit:
7104 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
7105 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7106 // CHECK7-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
7107 // CHECK7-NEXT:    br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
7108 // CHECK7:       .omp.lastprivate.then:
7109 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, i32* [[G]], align 128
7110 // CHECK7-NEXT:    store volatile i32 [[TMP19]], i32* @g, align 128
7111 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[_TMP2]], align 8
7112 // CHECK7-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
7113 // CHECK7-NEXT:    store volatile i32 [[TMP21]], i32* [[TMP2]], align 4
7114 // CHECK7-NEXT:    [[TMP22:%.*]] = load i32, i32* [[SIVAR3]], align 4
7115 // CHECK7-NEXT:    store i32 [[TMP22]], i32* [[TMP0]], align 4
7116 // CHECK7-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
7117 // CHECK7:       .omp.lastprivate.done:
7118 // CHECK7-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7119 // CHECK7-NEXT:    ret void
7120 //
7121 //
7122 // CHECK8-LABEL: define {{[^@]+}}@main
7123 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
7124 // CHECK8-NEXT:  entry:
7125 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7126 // CHECK8-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
7127 // CHECK8-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 8
7128 // CHECK8-NEXT:    store i32 0, i32* [[RETVAL]], align 4
7129 // CHECK8-NEXT:    call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
7130 // CHECK8-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0
7131 // CHECK8-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
7132 // CHECK8-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1
7133 // CHECK8-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
7134 // CHECK8-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2
7135 // CHECK8-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
7136 // CHECK8-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3
7137 // CHECK8-NEXT:    store i8* bitcast (void (i8*)* @__main_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8
7138 // CHECK8-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4
7139 // CHECK8-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
7140 // CHECK8-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5
7141 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
7142 // CHECK8-NEXT:    store i32 [[TMP0]], i32* [[BLOCK_CAPTURED]], align 8
7143 // CHECK8-NEXT:    [[TMP1:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()*
7144 // CHECK8-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP1]] to %struct.__block_literal_generic*
7145 // CHECK8-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
7146 // CHECK8-NEXT:    [[TMP3:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
7147 // CHECK8-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[TMP2]], align 8
7148 // CHECK8-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to void (i8*)*
7149 // CHECK8-NEXT:    call void [[TMP5]](i8* [[TMP3]])
7150 // CHECK8-NEXT:    ret i32 0
7151 //
7152 //
7153 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
7154 // CHECK8-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
7155 // CHECK8-NEXT:  entry:
7156 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
7157 // CHECK8-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
7158 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
7159 // CHECK8-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
7160 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
7161 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
7162 // CHECK8-NEXT:    call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(24) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]])
7163 // CHECK8-NEXT:    ret void
7164 //
7165 //
7166 // CHECK8-LABEL: define {{[^@]+}}@__main_block_invoke
7167 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
7168 // CHECK8-NEXT:  entry:
7169 // CHECK8-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
7170 // CHECK8-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 8
7171 // CHECK8-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
7172 // CHECK8-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*
7173 // CHECK8-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 8
7174 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* @_ZZ4mainE5sivar)
7175 // CHECK8-NEXT:    ret void
7176 //
7177 //
7178 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined.
7179 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
7180 // CHECK8-NEXT:  entry:
7181 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7182 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7183 // CHECK8-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
7184 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
7185 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7186 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
7187 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7188 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7189 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7190 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7191 // CHECK8-NEXT:    [[G:%.*]] = alloca i32, align 128
7192 // CHECK8-NEXT:    [[G1:%.*]] = alloca i32, align 4
7193 // CHECK8-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
7194 // CHECK8-NEXT:    [[SIVAR3:%.*]] = alloca i32, align 4
7195 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7196 // CHECK8-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, align 128
7197 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7198 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7199 // CHECK8-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
7200 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
7201 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** @g1, align 8
7202 // CHECK8-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
7203 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7204 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7205 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7206 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7207 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32*, i32** @g1, align 8
7208 // CHECK8-NEXT:    store i32* [[G1]], i32** [[_TMP2]], align 8
7209 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7210 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7211 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7212 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7213 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
7214 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7215 // CHECK8:       cond.true:
7216 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7217 // CHECK8:       cond.false:
7218 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7219 // CHECK8-NEXT:    br label [[COND_END]]
7220 // CHECK8:       cond.end:
7221 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
7222 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7223 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7224 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
7225 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7226 // CHECK8:       omp.inner.for.cond:
7227 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7228 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7229 // CHECK8-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
7230 // CHECK8-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7231 // CHECK8:       omp.inner.for.body:
7232 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7233 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
7234 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7235 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7236 // CHECK8-NEXT:    store i32 1, i32* [[G]], align 128
7237 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8
7238 // CHECK8-NEXT:    store volatile i32 1, i32* [[TMP11]], align 4
7239 // CHECK8-NEXT:    store i32 2, i32* [[SIVAR3]], align 4
7240 // CHECK8-NEXT:    store i32 1, i32* [[G]], align 128
7241 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[_TMP2]], align 8
7242 // CHECK8-NEXT:    store volatile i32 1, i32* [[TMP12]], align 4
7243 // CHECK8-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 0
7244 // CHECK8-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128
7245 // CHECK8-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 1
7246 // CHECK8-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
7247 // CHECK8-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 2
7248 // CHECK8-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
7249 // CHECK8-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 3
7250 // CHECK8-NEXT:    store i8* bitcast (void (i8*)* @g1_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16
7251 // CHECK8-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 4
7252 // CHECK8-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
7253 // CHECK8-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 8
7254 // CHECK8-NEXT:    [[TMP13:%.*]] = load volatile i32, i32* [[G]], align 128
7255 // CHECK8-NEXT:    store volatile i32 [[TMP13]], i32* [[BLOCK_CAPTURED]], align 128
7256 // CHECK8-NEXT:    [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 5
7257 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[_TMP2]], align 8
7258 // CHECK8-NEXT:    store i32* [[TMP14]], i32** [[BLOCK_CAPTURED5]], align 32
7259 // CHECK8-NEXT:    [[BLOCK_CAPTURED6:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 6
7260 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, i32* [[SIVAR3]], align 4
7261 // CHECK8-NEXT:    store i32 [[TMP15]], i32* [[BLOCK_CAPTURED6]], align 8
7262 // CHECK8-NEXT:    [[TMP16:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]] to void ()*
7263 // CHECK8-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP16]] to %struct.__block_literal_generic*
7264 // CHECK8-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
7265 // CHECK8-NEXT:    [[TMP18:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
7266 // CHECK8-NEXT:    [[TMP19:%.*]] = load i8*, i8** [[TMP17]], align 8
7267 // CHECK8-NEXT:    [[TMP20:%.*]] = bitcast i8* [[TMP19]] to void (i8*)*
7268 // CHECK8-NEXT:    call void [[TMP20]](i8* [[TMP18]])
7269 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7270 // CHECK8:       omp.body.continue:
7271 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7272 // CHECK8:       omp.inner.for.inc:
7273 // CHECK8-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7274 // CHECK8-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
7275 // CHECK8-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7276 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7277 // CHECK8:       omp.inner.for.end:
7278 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7279 // CHECK8:       omp.loop.exit:
7280 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7281 // CHECK8-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7282 // CHECK8-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
7283 // CHECK8-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
7284 // CHECK8:       .omp.lastprivate.then:
7285 // CHECK8-NEXT:    [[TMP24:%.*]] = load i32, i32* [[G]], align 128
7286 // CHECK8-NEXT:    store volatile i32 [[TMP24]], i32* @g, align 128
7287 // CHECK8-NEXT:    [[TMP25:%.*]] = load i32*, i32** [[_TMP2]], align 8
7288 // CHECK8-NEXT:    [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
7289 // CHECK8-NEXT:    store volatile i32 [[TMP26]], i32* [[TMP2]], align 4
7290 // CHECK8-NEXT:    [[TMP27:%.*]] = load i32, i32* [[SIVAR3]], align 4
7291 // CHECK8-NEXT:    store i32 [[TMP27]], i32* [[TMP0]], align 4
7292 // CHECK8-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
7293 // CHECK8:       .omp.lastprivate.done:
7294 // CHECK8-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]])
7295 // CHECK8-NEXT:    ret void
7296 //
7297 //
7298 // CHECK8-LABEL: define {{[^@]+}}@g1_block_invoke
7299 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
7300 // CHECK8-NEXT:  entry:
7301 // CHECK8-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
7302 // CHECK8-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>*, align 8
7303 // CHECK8-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
7304 // CHECK8-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>*
7305 // CHECK8-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>** [[BLOCK_ADDR]], align 8
7306 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 8
7307 // CHECK8-NEXT:    store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128
7308 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 5
7309 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR1]], align 32
7310 // CHECK8-NEXT:    store i32 1, i32* [[TMP0]], align 4
7311 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32*, i32, [84 x i8], i32 }>* [[BLOCK]], i32 0, i32 6
7312 // CHECK8-NEXT:    store i32 4, i32* [[BLOCK_CAPTURE_ADDR2]], align 8
7313 // CHECK8-NEXT:    ret void
7314 //
7315 //
7316 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
7317 // CHECK8-SAME: (%struct.SS* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
7318 // CHECK8-NEXT:  entry:
7319 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
7320 // CHECK8-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
7321 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7322 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7323 // CHECK8-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
7324 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7325 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7326 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7327 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7328 // CHECK8-NEXT:    [[A3:%.*]] = alloca i32, align 4
7329 // CHECK8-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
7330 // CHECK8-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, align 8
7331 // CHECK8-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
7332 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
7333 // CHECK8-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
7334 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
7335 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
7336 // CHECK8-NEXT:    store i32 0, i32* [[A]], align 8
7337 // CHECK8-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
7338 // CHECK8-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
7339 // CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
7340 // CHECK8-NEXT:    store i8 [[BF_CLEAR]], i8* [[B]], align 8
7341 // CHECK8-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
7342 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
7343 // CHECK8-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
7344 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
7345 // CHECK8-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
7346 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7347 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7348 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7349 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7350 // CHECK8-NEXT:    store i32* [[A3]], i32** [[_TMP4]], align 8
7351 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7352 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7353 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
7354 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7355 // CHECK8:       cond.true:
7356 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7357 // CHECK8:       cond.false:
7358 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7359 // CHECK8-NEXT:    br label [[COND_END]]
7360 // CHECK8:       cond.end:
7361 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7362 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7363 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7364 // CHECK8-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7365 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7366 // CHECK8:       omp.inner.for.cond:
7367 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7368 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7369 // CHECK8-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7370 // CHECK8-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7371 // CHECK8:       omp.inner.for.body:
7372 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7373 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7374 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7375 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[_TMP4]], align 8
7376 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[TMP8]], align 4
7377 // CHECK8-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 0
7378 // CHECK8-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
7379 // CHECK8-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 1
7380 // CHECK8-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
7381 // CHECK8-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 2
7382 // CHECK8-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
7383 // CHECK8-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 3
7384 // CHECK8-NEXT:    store i8* bitcast (void (i8*)* @___ZN2SSC2ERi_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8
7385 // CHECK8-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 4
7386 // CHECK8-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.6 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
7387 // CHECK8-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 5
7388 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8
7389 // CHECK8-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6
7390 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[_TMP4]], align 8
7391 // CHECK8-NEXT:    store i32* [[TMP9]], i32** [[BLOCK_CAPTURED]], align 8
7392 // CHECK8-NEXT:    [[TMP10:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]] to void ()*
7393 // CHECK8-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP10]] to %struct.__block_literal_generic*
7394 // CHECK8-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
7395 // CHECK8-NEXT:    [[TMP12:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
7396 // CHECK8-NEXT:    [[TMP13:%.*]] = load i8*, i8** [[TMP11]], align 8
7397 // CHECK8-NEXT:    [[TMP14:%.*]] = bitcast i8* [[TMP13]] to void (i8*)*
7398 // CHECK8-NEXT:    call void [[TMP14]](i8* [[TMP12]])
7399 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7400 // CHECK8:       omp.body.continue:
7401 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7402 // CHECK8:       omp.inner.for.inc:
7403 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7404 // CHECK8-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1
7405 // CHECK8-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
7406 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7407 // CHECK8:       omp.inner.for.end:
7408 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7409 // CHECK8:       omp.loop.exit:
7410 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
7411 // CHECK8-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
7412 // CHECK8-NEXT:    ret void
7413 //
7414 //
7415 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2
7416 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR2]] {
7417 // CHECK8-NEXT:  entry:
7418 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7419 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7420 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
7421 // CHECK8-NEXT:    [[E:%.*]] = alloca [4 x i8]*, align 8
7422 // CHECK8-NEXT:    [[A:%.*]] = alloca i32*, align 8
7423 // CHECK8-NEXT:    [[B:%.*]] = alloca i32, align 4
7424 // CHECK8-NEXT:    [[C:%.*]] = alloca i32*, align 8
7425 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
7426 // CHECK8-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
7427 // CHECK8-NEXT:    [[_TMP5:%.*]] = alloca [4 x i8]*, align 8
7428 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7429 // CHECK8-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
7430 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7431 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7432 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7433 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7434 // CHECK8-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
7435 // CHECK8-NEXT:    [[_TMP8:%.*]] = alloca [4 x i8]*, align 8
7436 // CHECK8-NEXT:    [[A9:%.*]] = alloca i32, align 4
7437 // CHECK8-NEXT:    [[_TMP10:%.*]] = alloca i32*, align 8
7438 // CHECK8-NEXT:    [[B11:%.*]] = alloca i32, align 4
7439 // CHECK8-NEXT:    [[C12:%.*]] = alloca i32, align 4
7440 // CHECK8-NEXT:    [[_TMP13:%.*]] = alloca i32*, align 8
7441 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7442 // CHECK8-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8
7443 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7444 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7445 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
7446 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
7447 // CHECK8-NEXT:    [[E1:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 1
7448 // CHECK8-NEXT:    store [4 x i8]* [[E1]], [4 x i8]** [[E]], align 8
7449 // CHECK8-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 0
7450 // CHECK8-NEXT:    store i32* [[A2]], i32** [[A]], align 8
7451 // CHECK8-NEXT:    [[C3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 3
7452 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C3]], align 8
7453 // CHECK8-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
7454 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A]], align 8
7455 // CHECK8-NEXT:    store i32* [[TMP2]], i32** [[TMP]], align 8
7456 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
7457 // CHECK8-NEXT:    store i32* [[TMP3]], i32** [[_TMP4]], align 8
7458 // CHECK8-NEXT:    [[TMP4:%.*]] = load [4 x i8]*, [4 x i8]** [[E]], align 8
7459 // CHECK8-NEXT:    store [4 x i8]* [[TMP4]], [4 x i8]** [[_TMP5]], align 8
7460 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7461 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7462 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7463 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7464 // CHECK8-NEXT:    [[TMP5:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
7465 // CHECK8-NEXT:    [[TMP6:%.*]] = bitcast [4 x i8]* [[E7]] to i8*
7466 // CHECK8-NEXT:    [[TMP7:%.*]] = bitcast [4 x i8]* [[TMP5]] to i8*
7467 // CHECK8-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 [[TMP6]], i8* align 1 [[TMP7]], i64 4, i1 false)
7468 // CHECK8-NEXT:    store [4 x i8]* [[E7]], [4 x i8]** [[_TMP8]], align 8
7469 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7470 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7471 // CHECK8-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
7472 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32*, i32** [[TMP]], align 8
7473 // CHECK8-NEXT:    store i32* [[A9]], i32** [[_TMP10]], align 8
7474 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
7475 // CHECK8-NEXT:    store i32* [[C12]], i32** [[_TMP13]], align 8
7476 // CHECK8-NEXT:    [[TMP12:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP5]], align 8
7477 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7478 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7479 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
7480 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7481 // CHECK8:       cond.true:
7482 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7483 // CHECK8:       cond.false:
7484 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7485 // CHECK8-NEXT:    br label [[COND_END]]
7486 // CHECK8:       cond.end:
7487 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7488 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7489 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7490 // CHECK8-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
7491 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7492 // CHECK8:       omp.inner.for.cond:
7493 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7494 // CHECK8-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7495 // CHECK8-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7496 // CHECK8-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7497 // CHECK8:       omp.inner.for.body:
7498 // CHECK8-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7499 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7500 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7501 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7502 // CHECK8-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0
7503 // CHECK8-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
7504 // CHECK8-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1
7505 // CHECK8-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
7506 // CHECK8-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2
7507 // CHECK8-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
7508 // CHECK8-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3
7509 // CHECK8-NEXT:    store i8* bitcast (void (i8*)* @g1_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8
7510 // CHECK8-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4
7511 // CHECK8-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
7512 // CHECK8-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5
7513 // CHECK8-NEXT:    store %struct.SS* [[TMP0]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8
7514 // CHECK8-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
7515 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP10]], align 8
7516 // CHECK8-NEXT:    store i32* [[TMP19]], i32** [[BLOCK_CAPTURED]], align 8
7517 // CHECK8-NEXT:    [[BLOCK_CAPTURED15:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
7518 // CHECK8-NEXT:    [[TMP20:%.*]] = load i32, i32* [[B11]], align 4
7519 // CHECK8-NEXT:    store i32 [[TMP20]], i32* [[BLOCK_CAPTURED15]], align 8
7520 // CHECK8-NEXT:    [[BLOCK_CAPTURED16:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
7521 // CHECK8-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[_TMP13]], align 8
7522 // CHECK8-NEXT:    store i32* [[TMP21]], i32** [[BLOCK_CAPTURED16]], align 8
7523 // CHECK8-NEXT:    [[TMP22:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()*
7524 // CHECK8-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP22]] to %struct.__block_literal_generic*
7525 // CHECK8-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
7526 // CHECK8-NEXT:    [[TMP24:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
7527 // CHECK8-NEXT:    [[TMP25:%.*]] = load i8*, i8** [[TMP23]], align 8
7528 // CHECK8-NEXT:    [[TMP26:%.*]] = bitcast i8* [[TMP25]] to void (i8*)*
7529 // CHECK8-NEXT:    call void [[TMP26]](i8* [[TMP24]])
7530 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7531 // CHECK8:       omp.body.continue:
7532 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7533 // CHECK8:       omp.inner.for.inc:
7534 // CHECK8-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7535 // CHECK8-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP27]], 1
7536 // CHECK8-NEXT:    store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
7537 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7538 // CHECK8:       omp.inner.for.end:
7539 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7540 // CHECK8:       omp.loop.exit:
7541 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
7542 // CHECK8-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7543 // CHECK8-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
7544 // CHECK8-NEXT:    br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
7545 // CHECK8:       .omp.lastprivate.then:
7546 // CHECK8-NEXT:    [[TMP30:%.*]] = load i32*, i32** [[_TMP10]], align 8
7547 // CHECK8-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
7548 // CHECK8-NEXT:    store i32 [[TMP31]], i32* [[TMP10]], align 4
7549 // CHECK8-NEXT:    [[TMP32:%.*]] = load i32, i32* [[B11]], align 4
7550 // CHECK8-NEXT:    store i32 [[TMP32]], i32* [[B]], align 4
7551 // CHECK8-NEXT:    [[TMP33:%.*]] = load i32*, i32** [[_TMP13]], align 8
7552 // CHECK8-NEXT:    [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
7553 // CHECK8-NEXT:    store i32 [[TMP34]], i32* [[TMP11]], align 4
7554 // CHECK8-NEXT:    [[TMP35:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
7555 // CHECK8-NEXT:    [[TMP36:%.*]] = load [4 x i8], [4 x i8]* [[TMP35]], align 1
7556 // CHECK8-NEXT:    store [4 x i8] [[TMP36]], [4 x i8]* [[TMP12]], align 1
7557 // CHECK8-NEXT:    [[TMP37:%.*]] = load i32, i32* [[B11]], align 4
7558 // CHECK8-NEXT:    [[B18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
7559 // CHECK8-NEXT:    [[TMP38:%.*]] = trunc i32 [[TMP37]] to i8
7560 // CHECK8-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B18]], align 8
7561 // CHECK8-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP38]], 15
7562 // CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
7563 // CHECK8-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
7564 // CHECK8-NEXT:    store i8 [[BF_SET]], i8* [[B18]], align 8
7565 // CHECK8-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
7566 // CHECK8:       .omp.lastprivate.done:
7567 // CHECK8-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
7568 // CHECK8-NEXT:    ret void
7569 //
7570 //
7571 // CHECK8-LABEL: define {{[^@]+}}@g1_block_invoke_2
7572 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
7573 // CHECK8-NEXT:  entry:
7574 // CHECK8-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
7575 // CHECK8-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8
7576 // CHECK8-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
7577 // CHECK8-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*
7578 // CHECK8-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8
7579 // CHECK8-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5
7580 // CHECK8-NEXT:    [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8
7581 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
7582 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8
7583 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7584 // CHECK8-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
7585 // CHECK8-NEXT:    store i32 [[INC]], i32* [[TMP0]], align 4
7586 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
7587 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8
7588 // CHECK8-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP2]], -1
7589 // CHECK8-NEXT:    store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8
7590 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
7591 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8
7592 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7593 // CHECK8-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
7594 // CHECK8-NEXT:    store i32 [[DIV]], i32* [[TMP3]], align 4
7595 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
7596 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8
7597 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
7598 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
7599 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8
7600 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]], i32* [[BLOCK_CAPTURE_ADDR4]], i32* [[TMP6]])
7601 // CHECK8-NEXT:    ret void
7602 //
7603 //
7604 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3
7605 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32* nonnull align 4 dereferenceable(4) [[B:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
7606 // CHECK8-NEXT:  entry:
7607 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7608 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7609 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
7610 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
7611 // CHECK8-NEXT:    [[B_ADDR:%.*]] = alloca i32*, align 8
7612 // CHECK8-NEXT:    [[C_ADDR:%.*]] = alloca i32*, align 8
7613 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
7614 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
7615 // CHECK8-NEXT:    [[_TMP2:%.*]] = alloca i32*, align 8
7616 // CHECK8-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
7617 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7618 // CHECK8-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
7619 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7620 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7621 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7622 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7623 // CHECK8-NEXT:    [[A5:%.*]] = alloca i32, align 4
7624 // CHECK8-NEXT:    [[_TMP6:%.*]] = alloca i32*, align 8
7625 // CHECK8-NEXT:    [[B7:%.*]] = alloca i32, align 4
7626 // CHECK8-NEXT:    [[C8:%.*]] = alloca i32, align 4
7627 // CHECK8-NEXT:    [[_TMP9:%.*]] = alloca i32*, align 8
7628 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7629 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7630 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7631 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
7632 // CHECK8-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
7633 // CHECK8-NEXT:    store i32* [[B]], i32** [[B_ADDR]], align 8
7634 // CHECK8-NEXT:    store i32* [[C]], i32** [[C_ADDR]], align 8
7635 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
7636 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7637 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
7638 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
7639 // CHECK8-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
7640 // CHECK8-NEXT:    store i32* [[TMP3]], i32** [[_TMP1]], align 8
7641 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
7642 // CHECK8-NEXT:    store i32* [[TMP4]], i32** [[_TMP2]], align 8
7643 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
7644 // CHECK8-NEXT:    store i32* [[TMP5]], i32** [[_TMP3]], align 8
7645 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7646 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7647 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7648 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7649 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[_TMP2]], align 8
7650 // CHECK8-NEXT:    store i32* [[A5]], i32** [[_TMP6]], align 8
7651 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[_TMP3]], align 8
7652 // CHECK8-NEXT:    store i32* [[C8]], i32** [[_TMP9]], align 8
7653 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7654 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7655 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7656 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7657 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
7658 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7659 // CHECK8:       cond.true:
7660 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7661 // CHECK8:       cond.false:
7662 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7663 // CHECK8-NEXT:    br label [[COND_END]]
7664 // CHECK8:       cond.end:
7665 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
7666 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7667 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7668 // CHECK8-NEXT:    store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
7669 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7670 // CHECK8:       omp.inner.for.cond:
7671 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7672 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7673 // CHECK8-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7674 // CHECK8-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7675 // CHECK8:       omp.inner.for.body:
7676 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7677 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
7678 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7679 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7680 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32*, i32** [[_TMP6]], align 8
7681 // CHECK8-NEXT:    [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4
7682 // CHECK8-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP17]], 1
7683 // CHECK8-NEXT:    store i32 [[INC]], i32* [[TMP16]], align 4
7684 // CHECK8-NEXT:    [[TMP18:%.*]] = load i32, i32* [[B7]], align 4
7685 // CHECK8-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP18]], -1
7686 // CHECK8-NEXT:    store i32 [[DEC]], i32* [[B7]], align 4
7687 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[_TMP9]], align 8
7688 // CHECK8-NEXT:    [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
7689 // CHECK8-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP20]], 1
7690 // CHECK8-NEXT:    store i32 [[DIV]], i32* [[TMP19]], align 4
7691 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7692 // CHECK8:       omp.body.continue:
7693 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7694 // CHECK8:       omp.inner.for.inc:
7695 // CHECK8-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7696 // CHECK8-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
7697 // CHECK8-NEXT:    store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
7698 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7699 // CHECK8:       omp.inner.for.end:
7700 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7701 // CHECK8:       omp.loop.exit:
7702 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
7703 // CHECK8-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7704 // CHECK8-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
7705 // CHECK8-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
7706 // CHECK8:       .omp.lastprivate.then:
7707 // CHECK8-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[_TMP6]], align 8
7708 // CHECK8-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
7709 // CHECK8-NEXT:    store i32 [[TMP25]], i32* [[TMP6]], align 4
7710 // CHECK8-NEXT:    [[TMP26:%.*]] = load i32, i32* [[B7]], align 4
7711 // CHECK8-NEXT:    store i32 [[TMP26]], i32* [[TMP2]], align 4
7712 // CHECK8-NEXT:    [[TMP27:%.*]] = load i32*, i32** [[_TMP9]], align 8
7713 // CHECK8-NEXT:    [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
7714 // CHECK8-NEXT:    store i32 [[TMP28]], i32* [[TMP7]], align 4
7715 // CHECK8-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
7716 // CHECK8:       .omp.lastprivate.done:
7717 // CHECK8-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
7718 // CHECK8-NEXT:    ret void
7719 //
7720 //
7721 // CHECK8-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke
7722 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR1]] {
7723 // CHECK8-NEXT:  entry:
7724 // CHECK8-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
7725 // CHECK8-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>*, align 8
7726 // CHECK8-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
7727 // CHECK8-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>*
7728 // CHECK8-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>** [[BLOCK_ADDR]], align 8
7729 // CHECK8-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 5
7730 // CHECK8-NEXT:    [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8
7731 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6
7732 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8
7733 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7734 // CHECK8-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
7735 // CHECK8-NEXT:    store i32 [[INC]], i32* [[TMP0]], align 4
7736 // CHECK8-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS]], i32 0, i32 2
7737 // CHECK8-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
7738 // CHECK8-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
7739 // CHECK8-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
7740 // CHECK8-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
7741 // CHECK8-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
7742 // CHECK8-NEXT:    [[TMP2:%.*]] = trunc i32 [[DEC]] to i8
7743 // CHECK8-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[B]], align 8
7744 // CHECK8-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP2]], 15
7745 // CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD1]], -16
7746 // CHECK8-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
7747 // CHECK8-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
7748 // CHECK8-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
7749 // CHECK8-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
7750 // CHECK8-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
7751 // CHECK8-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS]], i32 0, i32 3
7752 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
7753 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7754 // CHECK8-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
7755 // CHECK8-NEXT:    store i32 [[DIV]], i32* [[TMP3]], align 4
7756 // CHECK8-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32* }>* [[BLOCK]], i32 0, i32 6
7757 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8
7758 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]])
7759 // CHECK8-NEXT:    ret void
7760 //
7761 //
7762 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..5
7763 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7764 // CHECK8-NEXT:  entry:
7765 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7766 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7767 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
7768 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
7769 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32*, align 8
7770 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca i32*, align 8
7771 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7772 // CHECK8-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7773 // CHECK8-NEXT:    [[_TMP3:%.*]] = alloca i32*, align 8
7774 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7775 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7776 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7777 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7778 // CHECK8-NEXT:    [[C:%.*]] = alloca i32, align 4
7779 // CHECK8-NEXT:    [[_TMP4:%.*]] = alloca i32*, align 8
7780 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7781 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7782 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
7783 // CHECK8-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
7784 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
7785 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7786 // CHECK8-NEXT:    store i32* [[TMP1]], i32** [[TMP]], align 8
7787 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
7788 // CHECK8-NEXT:    store i32* [[TMP2]], i32** [[_TMP1]], align 8
7789 // CHECK8-NEXT:    store i32* [[_TMP2]], i32** [[_TMP3]], align 8
7790 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7791 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
7792 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7793 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7794 // CHECK8-NEXT:    store i32* [[C]], i32** [[_TMP4]], align 8
7795 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7796 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7797 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7798 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7799 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
7800 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7801 // CHECK8:       cond.true:
7802 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7803 // CHECK8:       cond.false:
7804 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7805 // CHECK8-NEXT:    br label [[COND_END]]
7806 // CHECK8:       cond.end:
7807 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
7808 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7809 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7810 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
7811 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7812 // CHECK8:       omp.inner.for.cond:
7813 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7814 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7815 // CHECK8-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
7816 // CHECK8-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7817 // CHECK8:       omp.inner.for.body:
7818 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7819 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
7820 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7821 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[_TMP4]], align 8
7822 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
7823 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[_TMP1]], align 8
7824 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
7825 // CHECK8-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP13]], 1
7826 // CHECK8-NEXT:    store i32 [[INC]], i32* [[TMP12]], align 4
7827 // CHECK8-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 2
7828 // CHECK8-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
7829 // CHECK8-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
7830 // CHECK8-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
7831 // CHECK8-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
7832 // CHECK8-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
7833 // CHECK8-NEXT:    [[TMP14:%.*]] = trunc i32 [[DEC]] to i8
7834 // CHECK8-NEXT:    [[BF_LOAD6:%.*]] = load i8, i8* [[B]], align 8
7835 // CHECK8-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP14]], 15
7836 // CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD6]], -16
7837 // CHECK8-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
7838 // CHECK8-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
7839 // CHECK8-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
7840 // CHECK8-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
7841 // CHECK8-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
7842 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32*, i32** [[_TMP4]], align 8
7843 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
7844 // CHECK8-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP16]], 1
7845 // CHECK8-NEXT:    store i32 [[DIV]], i32* [[TMP15]], align 4
7846 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7847 // CHECK8:       omp.body.continue:
7848 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7849 // CHECK8:       omp.inner.for.inc:
7850 // CHECK8-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7851 // CHECK8-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
7852 // CHECK8-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7853 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7854 // CHECK8:       omp.inner.for.end:
7855 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7856 // CHECK8:       omp.loop.exit:
7857 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7858 // CHECK8-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
7859 // CHECK8-NEXT:    ret void
7860 //
7861 //