1%% -*- erlang-indent-level: 2 -*-
2%%
3%% Licensed under the Apache License, Version 2.0 (the "License");
4%% you may not use this file except in compliance with the License.
5%% You may obtain a copy of the License at
6%%
7%%     http://www.apache.org/licenses/LICENSE-2.0
8%%
9%% Unless required by applicable law or agreed to in writing, software
10%% distributed under the License is distributed on an "AS IS" BASIS,
11%% WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12%% See the License for the specific language governing permissions and
13%% limitations under the License.
14
15-ifdef(HIPE_AMD64).
16-define(HIPE_X86_SPECIFIC_X87, hipe_amd64_specific_x87).
17-define(HIPE_X86_LIVENESS, hipe_amd64_liveness).
18-define(HIPE_X86_REGISTERS, hipe_amd64_registers).
19-define(HIPE_X86_DEFUSE, hipe_amd64_defuse).
20-else.
21-define(HIPE_X86_SPECIFIC_X87, hipe_x86_specific_x87).
22-define(HIPE_X86_LIVENESS, hipe_x86_liveness).
23-define(HIPE_X86_REGISTERS, hipe_x86_registers).
24-define(HIPE_X86_DEFUSE, hipe_x86_defuse).
25-endif.
26
27-module(?HIPE_X86_SPECIFIC_X87).
28-export([allocatable/2,
29	 is_precoloured/2,
30	 %% var_range/2,
31	 %% def_use/2,
32	 %% is_fixed/2,
33	 is_arg/2,
34	 %% non_alloc/2,
35	 new_spill_index/2,
36	 number_of_temporaries/2
37	]).
38
39%% The following exports are used as M:F(...) calls from other modules;
40%% e.g. hipe_x86_ra_ls.
41-export([analyze/2,
42	 bb/3,
43	 args/2,
44	 labels/2,
45	 livein/3,
46	 liveout/3,
47	 uses/2,
48	 defines/2,
49	 defines_all_alloc/2,
50	 is_spill_move/2,
51	 is_global/2,
52	 reg_nr/2,
53	 physical_name/2,
54	 breadthorder/2,
55	 postorder/2,
56	 reverse_postorder/2]).
57
58%% callbacks for hipe_x86_ra_ls
59-export([check_and_rewrite/4]).
60
61%% Rewrite happens in hipe_x86_ra_finalise:finalise/4
62check_and_rewrite(CFG, _Coloring, 'linearscan', _) ->
63  {CFG, false}.
64
65breadthorder(CFG, _) ->
66  hipe_x86_cfg:breadthorder(CFG).
67postorder(CFG, _) ->
68  hipe_x86_cfg:postorder(CFG).
69reverse_postorder(CFG, _) ->
70  hipe_x86_cfg:reverse_postorder(CFG).
71
72is_global(_, _) ->
73  false.
74
75-ifdef(notdef).
76is_fixed(_, _) ->
77  false.
78-endif.
79
80is_arg(_, _) ->
81  false.
82
83args(_, _) ->
84  [].
85
86-ifdef(notdef).
87non_alloc(_, _) ->
88  [].
89-endif.
90
91%% Liveness stuff
92
93analyze(CFG, _) ->
94  ?HIPE_X86_LIVENESS:analyze(CFG).
95
96livein(Liveness,L,_) ->
97  [X || X <- ?HIPE_X86_LIVENESS:livein(Liveness,L),
98 	     hipe_x86:temp_is_allocatable(X),
99 	     hipe_x86:temp_type(X) =:= 'double'].
100
101liveout(BB_in_out_liveness,Label,_) ->
102  [X || X <- ?HIPE_X86_LIVENESS:liveout(BB_in_out_liveness,Label),
103	     hipe_x86:temp_is_allocatable(X),
104	     hipe_x86:temp_type(X) =:= 'double'].
105
106%% Registers stuff
107
108allocatable('linearscan', _) ->
109  ?HIPE_X86_REGISTERS:allocatable_x87().
110
111is_precoloured(Reg, _) ->
112  ?HIPE_X86_REGISTERS:is_precoloured_x87(Reg).
113
114physical_name(Reg, _) ->
115  Reg.
116
117%% CFG stuff
118
119labels(CFG, _) ->
120  hipe_x86_cfg:labels(CFG).
121
122-ifdef(notdef).
123var_range(_CFG, _) ->
124  {Min,Max} = hipe_gensym:var_range(x86),
125  %% io:format("Var_range: ~w\n",[{Min,Max}]),
126  {Min,Max}.
127-endif.
128
129number_of_temporaries(_CFG, _) ->
130  Highest_temporary = hipe_gensym:get_var(x86),
131  %% Since we can have temps from 0 to Max adjust by +1.
132  Highest_temporary + 1.
133
134bb(CFG,L,_) ->
135  hipe_x86_cfg:bb(CFG,L).
136
137%% X86 stuff
138
139-ifdef(notdef).
140def_use(Instruction, _) ->
141  {[X || X <- ?HIPE_X86_DEFUSE:insn_def(Instruction),
142	      hipe_x86:temp_is_allocatable(X),
143	      temp_is_double(X)],
144   [X || X <- ?HIPE_X86_DEFUSE:insn_use(Instruction),
145	      hipe_x86:temp_is_allocatable(X),
146	      temp_is_double(X)]
147  }.
148-endif.
149
150uses(I, _) ->
151  [X || X <- ?HIPE_X86_DEFUSE:insn_use(I),
152 	     hipe_x86:temp_is_allocatable(X),
153 	     temp_is_double(X)].
154
155defines(I, _) ->
156  [X || X <- ?HIPE_X86_DEFUSE:insn_def(I),
157 	     hipe_x86:temp_is_allocatable(X),
158 	     temp_is_double(X)].
159
160defines_all_alloc(I, _) -> hipe_amd64_defuse:insn_defs_all(I).
161
162is_spill_move(I, _) ->
163  hipe_x86:is_pseudo_spill_fmove(I).
164
165temp_is_double(Temp) ->
166  hipe_x86:temp_type(Temp) =:= 'double'.
167
168reg_nr(Reg, _) ->
169  hipe_x86:temp_reg(Reg).
170
171new_spill_index(SpillIndex, _) ->
172  SpillIndex+1.
173