1 /*
2  * Copyright (c) 2003 Hewlett-Packard Development Company, L.P.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a copy
5  * of this software and associated documentation files (the "Software"), to deal
6  * in the Software without restriction, including without limitation the rights
7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8  * copies of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20  * SOFTWARE.
21  *
22  * Derived from the corresponding header file for gcc.
23  */
24 
25 #include "../loadstore/atomic_load.h"
26 #include "../loadstore/atomic_store.h"
27 
28 /* Some architecture set descriptions include special "ordered" memory  */
29 /* operations.  As far as we can tell, no existing processors actually  */
30 /* require those.  Nor does it appear likely that future processors     */
31 /* will.                                                                */
32 /* FIXME: The PA emulator on Itanium may obey weaker restrictions.      */
33 /* There should be a mode in which we don't assume sequential           */
34 /* consistency here.                                                    */
35 #include "../ordered.h"
36 
37 #include <machine/inline.h>
38 
39 /* GCC will not guarantee the alignment we need, use four lock words    */
40 /* and select the correctly aligned datum. See the glibc 2.3.2          */
41 /* linuxthread port for the original implementation.                    */
42 struct AO_pa_clearable_loc {
43   int data[4];
44 };
45 
46 #undef AO_TS_INITIALIZER
47 #define AO_TS_t struct AO_pa_clearable_loc
48 #define AO_TS_INITIALIZER {1,1,1,1}
49 /* Switch meaning of set and clear, since we only have an atomic clear  */
50 /* instruction.                                                         */
51 typedef enum {AO_PA_TS_set = 0, AO_PA_TS_clear = 1} AO_PA_TS_val;
52 #define AO_TS_VAL_t AO_PA_TS_val
53 #define AO_TS_CLEAR AO_PA_TS_clear
54 #define AO_TS_SET AO_PA_TS_set
55 
56 /* The hppa only has one atomic read and modify memory operation,       */
57 /* load and clear, so hppa spinlocks must use zero to signify that      */
58 /* someone is holding the lock.  The address used for the ldcw          */
59 /* semaphore must be 16-byte aligned.                                   */
60 #define AO_ldcw(a, ret) \
61   _LDCWX(0 /* index */, 0 /* s */, a /* base */, ret)
62 
63 /* Because malloc only guarantees 8-byte alignment for malloc'd data,   */
64 /* and GCC only guarantees 8-byte alignment for stack locals, we can't  */
65 /* be assured of 16-byte alignment for atomic lock data even if we      */
66 /* specify "__attribute ((aligned(16)))" in the type declaration.  So,  */
67 /* we use a struct containing an array of four ints for the atomic lock */
68 /* type and dynamically select the 16-byte aligned int from the array   */
69 /* for the semaphore.                                                   */
70 #define AO_PA_LDCW_ALIGNMENT 16
71 #define AO_ldcw_align(addr) \
72             ((volatile unsigned *)(((unsigned long)(addr) \
73                                         + (AO_PA_LDCW_ALIGNMENT - 1)) \
74                                    & ~(AO_PA_LDCW_ALIGNMENT - 1)))
75 
76 /* Works on PA 1.1 and PA 2.0 systems */
77 AO_INLINE AO_TS_VAL_t
AO_test_and_set_full(volatile AO_TS_t * addr)78 AO_test_and_set_full(volatile AO_TS_t * addr)
79 {
80   register unsigned int ret;
81   register unsigned long a = (unsigned long)AO_ldcw_align(addr);
82 
83 # if defined(CPPCHECK)
84     ret = 0; /* to void 'uninitialized variable' warning */
85 # endif
86   AO_ldcw(a, ret);
87   return (AO_TS_VAL_t)ret;
88 }
89 #define AO_HAVE_test_and_set_full
90 
91 AO_INLINE void
AO_pa_clear(volatile AO_TS_t * addr)92 AO_pa_clear(volatile AO_TS_t * addr)
93 {
94   volatile unsigned *a = AO_ldcw_align(addr);
95 
96   AO_compiler_barrier();
97   *a = 1;
98 }
99 #define AO_CLEAR(addr) AO_pa_clear(addr)
100 #define AO_HAVE_CLEAR
101 
102 #undef AO_PA_LDCW_ALIGNMENT
103 #undef AO_ldcw
104 #undef AO_ldcw_align
105