1 /* { dg-do compile } */
2 /* { dg-options "-O2" } */
3 /* { dg-final { scan-assembler-times "addi\tr., r., %lo" 4 } } */
4 /* { dg-final { scan-assembler-times "ldbu\tr., %lo" 20 } } */
5 /* { dg-final { scan-assembler-times "stb\tr., %lo" 4 } } */
6 
7 /* Check that various address forms involving a symbolic constant
8    with a possible constant offset and/or index register are optimized
9    to generate a %lo relocation in the load/store instructions instead
10    of a plain register indirect addressing mode.  */
11 
12 #define TYPE unsigned char
13 
14 struct ss
15 {
16   TYPE x1,x2;
17 };
18 
19 extern TYPE S1;
20 extern TYPE S2[];
21 
22 extern struct ss S3;
23 extern struct ss S4[];
24 
addr1(void)25 TYPE *addr1 (void) { return &S1; }
get1(void)26 TYPE get1 (void) { return S1; }
set1(TYPE value)27 void set1 (TYPE value) { S1 = value; }
28 
addr2(int i)29 TYPE *addr2 (int i) { return &(S2[i]); }
get2(int i)30 TYPE get2 (int i) { return S2[i]; }
set2(int i,TYPE value)31 void set2 (int i, TYPE value) { S2[i] = value; }
32 
addr3(void)33 TYPE *addr3 (void) { return &(S3.x2); }
get3(void)34 TYPE get3 (void) { return S3.x2; }
set3(TYPE value)35 void set3 (TYPE value) { S3.x2 = value; }
36 
addr4(int i)37 TYPE *addr4 (int i) { return &(S4[i].x2); }
get4(int i)38 TYPE get4 (int i) { return S4[i].x2; }
set4(int i,TYPE value)39 void set4 (int i, TYPE value) { S4[i].x2 = value; }
40 
extw1(void)41 int extw1 (void) { return (int)(S1); }
extw2(int i)42 int extw2 (int i) { return (int)(S2[i]); }
extw3(void)43 int extw3 (void) { return (int)(S3.x2); }
extw4(int i)44 int extw4 (int i) { return (int)(S4[i].x2); }
extwu1(void)45 unsigned int extwu1 (void) { return (unsigned int)(S1); }
extwu2(int i)46 unsigned int extwu2 (int i) { return (unsigned int)(S2[i]); }
extwu3(void)47 unsigned int extwu3 (void) { return (unsigned int)(S3.x2); }
extwu4(int i)48 unsigned int extwu4 (int i) { return (unsigned int)(S4[i].x2); }
49 
exth1(void)50 short exth1 (void) { return (short)(S1); }
exth2(int i)51 short exth2 (int i) { return (short)(S2[i]); }
exth3(void)52 short exth3 (void) { return (short)(S3.x2); }
exth4(int i)53 short exth4 (int i) { return (short)(S4[i].x2); }
exthu1(void)54 unsigned short exthu1 (void) { return (unsigned short)(S1); }
exthu2(int i)55 unsigned short exthu2 (int i) { return (unsigned short)(S2[i]); }
exthu3(void)56 unsigned short exthu3 (void) { return (unsigned short)(S3.x2); }
exthu4(int i)57 unsigned short exthu4 (int i) { return (unsigned short)(S4[i].x2); }
58 
59