1; Options for the IA-32 and AMD64 ports of the compiler. 2 3; Copyright (C) 2005-2020 Free Software Foundation, Inc. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it under 8; the terms of the GNU General Public License as published by the Free 9; Software Foundation; either version 3, or (at your option) any later 10; version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13; WARRANTY; without even the implied warranty of MERCHANTABILITY or 14; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15; for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20 21HeaderInclude 22config/i386/i386-opts.h 23 24; Bit flags that specify the ISA we are compiling for. 25Variable 26HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT 27 28Variable 29HOST_WIDE_INT ix86_isa_flags2 = 0 30 31; A mask of ix86_isa_flags that includes bit X if X was set or cleared 32; on the command line. 33Variable 34HOST_WIDE_INT ix86_isa_flags_explicit 35 36Variable 37HOST_WIDE_INT ix86_isa_flags2_explicit 38 39; Additional target flags 40Variable 41int ix86_target_flags 42 43TargetVariable 44int recip_mask = RECIP_MASK_DEFAULT 45 46Variable 47int recip_mask_explicit 48 49TargetSave 50int x_recip_mask_explicit 51 52;; A copy of flag_excess_precision as a target variable that should 53;; force a different DECL_FUNCTION_SPECIFIC_TARGET upon 54;; flag_excess_precision changes. 55TargetVariable 56enum excess_precision ix86_excess_precision = EXCESS_PRECISION_DEFAULT 57 58;; Similarly for flag_unsafe_math_optimizations. 59TargetVariable 60bool ix86_unsafe_math_optimizations = false 61 62;; Definitions to add to the cl_target_option structure 63;; -march= processor 64TargetSave 65unsigned char arch 66 67;; -mtune= processor 68TargetSave 69unsigned char tune 70 71;; -march= processor-string 72TargetSave 73const char *x_ix86_arch_string 74 75;; -mtune= processor-string 76TargetSave 77const char *x_ix86_tune_string 78 79;; CPU schedule model 80TargetSave 81unsigned char schedule 82 83;; True if processor has SSE prefetch instruction. 84TargetSave 85unsigned char prefetch_sse 86 87;; branch cost 88TargetSave 89unsigned char branch_cost 90 91;; which flags were passed by the user 92TargetSave 93HOST_WIDE_INT x_ix86_isa_flags2_explicit 94 95;; which flags were passed by the user 96TargetSave 97HOST_WIDE_INT x_ix86_isa_flags_explicit 98 99;; whether -mtune was not specified 100TargetSave 101unsigned char tune_defaulted 102 103;; whether -march was specified 104TargetSave 105unsigned char arch_specified 106 107;; -mcmodel= model 108TargetSave 109enum cmodel x_ix86_cmodel 110 111;; -mabi= 112TargetSave 113enum calling_abi x_ix86_abi 114 115;; -masm= 116TargetSave 117enum asm_dialect x_ix86_asm_dialect 118 119;; -mbranch-cost= 120TargetSave 121int x_ix86_branch_cost 122 123;; -mdump-tune-features= 124TargetSave 125int x_ix86_dump_tunes 126 127;; -mstackrealign= 128TargetSave 129int x_ix86_force_align_arg_pointer 130 131;; -mforce-drap= 132TargetSave 133int x_ix86_force_drap 134 135;; -mincoming-stack-boundary= 136TargetSave 137int x_ix86_incoming_stack_boundary_arg 138 139;; -maddress-mode= 140TargetSave 141enum pmode x_ix86_pmode 142 143;; -mpreferred-stack-boundary= 144TargetSave 145int x_ix86_preferred_stack_boundary_arg 146 147;; -mrecip= 148TargetSave 149const char *x_ix86_recip_name 150 151;; -mregparm= 152TargetSave 153int x_ix86_regparm 154 155;; -mlarge-data-threshold= 156TargetSave 157int x_ix86_section_threshold 158 159;; -msse2avx= 160TargetSave 161int x_ix86_sse2avx 162 163;; -mstack-protector-guard= 164TargetSave 165enum stack_protector_guard x_ix86_stack_protector_guard 166 167;; -mstringop-strategy= 168TargetSave 169enum stringop_alg x_ix86_stringop_alg 170 171;; -mtls-dialect= 172TargetSave 173enum tls_dialect x_ix86_tls_dialect 174 175;; -mtune-ctrl= 176TargetSave 177const char *x_ix86_tune_ctrl_string 178 179;; -mmemcpy-strategy= 180TargetSave 181const char *x_ix86_tune_memcpy_strategy 182 183;; -mmemset-strategy= 184TargetSave 185const char *x_ix86_tune_memset_strategy 186 187;; -mno-default= 188TargetSave 189int x_ix86_tune_no_default 190 191;; -mveclibabi= 192TargetSave 193enum ix86_veclibabi x_ix86_veclibabi_type 194 195;; x86 options 196m128bit-long-double 197Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save 198sizeof(long double) is 16. 199 200m80387 201Target Report Mask(80387) Save 202Use hardware fp. 203 204m96bit-long-double 205Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save 206sizeof(long double) is 12. 207 208mlong-double-80 209Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save 210Use 80-bit long double. 211 212mlong-double-64 213Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save 214Use 64-bit long double. 215 216mlong-double-128 217Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save 218Use 128-bit long double. 219 220maccumulate-outgoing-args 221Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save 222Reserve space for outgoing arguments in the function prologue. 223 224malign-double 225Target Report Mask(ALIGN_DOUBLE) Save 226Align some doubles on dword boundary. 227 228malign-functions= 229Target RejectNegative Joined UInteger 230Function starts are aligned to this power of 2. 231 232malign-jumps= 233Target RejectNegative Joined UInteger 234Jump targets are aligned to this power of 2. 235 236malign-loops= 237Target RejectNegative Joined UInteger 238Loop code aligned to this power of 2. 239 240malign-stringops 241Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save 242Align destination of the string operations. 243 244malign-data= 245Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat) 246Use the given data alignment. 247 248Enum 249Name(ix86_align_data) Type(enum ix86_align_data) 250Known data alignment choices (for use with the -malign-data= option): 251 252EnumValue 253Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat) 254 255EnumValue 256Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi) 257 258EnumValue 259Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline) 260 261march= 262Target RejectNegative Negative(march=) Joined Var(ix86_arch_string) 263Generate code for given CPU. 264 265masm= 266Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT) 267Use given assembler dialect. 268 269Enum 270Name(asm_dialect) Type(enum asm_dialect) 271Known assembler dialects (for use with the -masm= option): 272 273EnumValue 274Enum(asm_dialect) String(intel) Value(ASM_INTEL) 275 276EnumValue 277Enum(asm_dialect) String(att) Value(ASM_ATT) 278 279mbranch-cost= 280Target RejectNegative Joined UInteger Var(ix86_branch_cost) IntegerRange(0, 5) 281Branches are this expensive (arbitrary units). 282 283mlarge-data-threshold= 284Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD) 285-mlarge-data-threshold=<number> Data greater than given threshold will go into .ldata section in x86-64 medium model. 286 287mcmodel= 288Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32) 289Use given x86-64 code model. 290 291Enum 292Name(cmodel) Type(enum cmodel) 293Known code models (for use with the -mcmodel= option): 294 295EnumValue 296Enum(cmodel) String(small) Value(CM_SMALL) 297 298EnumValue 299Enum(cmodel) String(medium) Value(CM_MEDIUM) 300 301EnumValue 302Enum(cmodel) String(large) Value(CM_LARGE) 303 304EnumValue 305Enum(cmodel) String(32) Value(CM_32) 306 307EnumValue 308Enum(cmodel) String(kernel) Value(CM_KERNEL) 309 310maddress-mode= 311Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI) 312Use given address mode. 313 314Enum 315Name(pmode) Type(enum pmode) 316Known address mode (for use with the -maddress-mode= option): 317 318EnumValue 319Enum(pmode) String(short) Value(PMODE_SI) 320 321EnumValue 322Enum(pmode) String(long) Value(PMODE_DI) 323 324mcpu= 325Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) 326 327mfancy-math-387 328Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save 329Generate sin, cos, sqrt for FPU. 330 331mforce-drap 332Target Report Var(ix86_force_drap) 333Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack. 334 335mfp-ret-in-387 336Target Report Mask(FLOAT_RETURNS) Save 337Return values of functions in FPU registers. 338 339mfpmath= 340Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save 341Generate floating point mathematics using given instruction set. 342 343Enum 344Name(fpmath_unit) Type(enum fpmath_unit) 345Valid arguments to -mfpmath=: 346 347EnumValue 348Enum(fpmath_unit) String(387) Value(FPMATH_387) 349 350EnumValue 351Enum(fpmath_unit) String(sse) Value(FPMATH_SSE) 352 353EnumValue 354Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 355 356EnumValue 357Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 358 359EnumValue 360Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 361 362EnumValue 363Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 364 365EnumValue 366Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 367 368mhard-float 369Target RejectNegative Mask(80387) Save 370Use hardware fp. 371 372mieee-fp 373Target Report Mask(IEEE_FP) Save 374Use IEEE math for fp comparisons. 375 376minline-all-stringops 377Target Report Mask(INLINE_ALL_STRINGOPS) Save 378Inline all known string operations. 379 380minline-stringops-dynamically 381Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save 382Inline memset/memcpy string operations, but perform inline version only for small blocks. 383 384mintel-syntax 385Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead) 386 387mms-bitfields 388Target Report Mask(MS_BITFIELD_LAYOUT) Save 389Use native (MS) bitfield layout. 390 391mno-align-stringops 392Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save 393 394mno-fancy-math-387 395Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save 396 397mno-push-args 398Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save 399 400mno-red-zone 401Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save 402 403momit-leaf-frame-pointer 404Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save 405Omit the frame pointer in leaf functions. 406 407mpc32 408Target RejectNegative Report 409Set 80387 floating-point precision to 32-bit. 410 411mpc64 412Target RejectNegative Report 413Set 80387 floating-point precision to 64-bit. 414 415mpc80 416Target RejectNegative Report 417Set 80387 floating-point precision to 80-bit. 418 419mpreferred-stack-boundary= 420Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg) 421Attempt to keep stack aligned to this power of 2. 422 423mincoming-stack-boundary= 424Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg) 425Assume incoming stack aligned to this power of 2. 426 427mpush-args 428Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save 429Use push instructions to save outgoing arguments. 430 431mred-zone 432Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save 433Use red-zone in the x86-64 code. 434 435mregparm= 436Target RejectNegative Joined UInteger Var(ix86_regparm) 437Number of registers used to pass integer arguments. 438 439mrtd 440Target Report Mask(RTD) Save 441Alternate calling convention. 442 443msoft-float 444Target InverseMask(80387) Save 445Do not use hardware fp. 446 447msseregparm 448Target RejectNegative Mask(SSEREGPARM) Save 449Use SSE register passing conventions for SF and DF mode. 450 451mstackrealign 452Target Report Var(ix86_force_align_arg_pointer) 453Realign stack in prologue. 454 455mstack-arg-probe 456Target Report Mask(STACK_PROBE) Save 457Enable stack probing. 458 459mmemcpy-strategy= 460Target RejectNegative Joined Var(ix86_tune_memcpy_strategy) 461Specify memcpy expansion strategy when expected size is known. 462 463mmemset-strategy= 464Target RejectNegative Joined Var(ix86_tune_memset_strategy) 465Specify memset expansion strategy when expected size is known. 466 467mstringop-strategy= 468Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop) 469Chose strategy to generate stringop using. 470 471Enum 472Name(stringop_alg) Type(enum stringop_alg) 473Valid arguments to -mstringop-strategy=: 474 475EnumValue 476Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte) 477 478EnumValue 479Enum(stringop_alg) String(libcall) Value(libcall) 480 481EnumValue 482Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte) 483 484EnumValue 485Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte) 486 487EnumValue 488Enum(stringop_alg) String(byte_loop) Value(loop_1_byte) 489 490EnumValue 491Enum(stringop_alg) String(loop) Value(loop) 492 493EnumValue 494Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop) 495 496EnumValue 497Enum(stringop_alg) String(vector_loop) Value(vector_loop) 498 499mtls-dialect= 500Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU) 501Use given thread-local storage dialect. 502 503Enum 504Name(tls_dialect) Type(enum tls_dialect) 505Known TLS dialects (for use with the -mtls-dialect= option): 506 507EnumValue 508Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU) 509 510EnumValue 511Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2) 512 513mtls-direct-seg-refs 514Target Report Mask(TLS_DIRECT_SEG_REFS) 515Use direct references against %gs when accessing tls data. 516 517mtune= 518Target RejectNegative Negative(mtune=) Joined Var(ix86_tune_string) 519Schedule code for given CPU. 520 521mtune-ctrl= 522Target RejectNegative Joined Var(ix86_tune_ctrl_string) 523Fine grain control of tune features. 524 525mno-default 526Target RejectNegative Var(ix86_tune_no_default) 527Clear all tune features. 528 529mdump-tune-features 530Target RejectNegative Var(ix86_dump_tunes) 531 532miamcu 533Target Report Mask(IAMCU) 534Generate code that conforms to Intel MCU psABI. 535 536mabi= 537Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI) 538Generate code that conforms to the given ABI. 539 540Enum 541Name(calling_abi) Type(enum calling_abi) 542Known ABIs (for use with the -mabi= option): 543 544EnumValue 545Enum(calling_abi) String(sysv) Value(SYSV_ABI) 546 547EnumValue 548Enum(calling_abi) String(ms) Value(MS_ABI) 549 550mcall-ms2sysv-xlogues 551Target Report Mask(CALL_MS2SYSV_XLOGUES) Save 552Use libgcc stubs to save and restore registers clobbered by 64-bit Microsoft to System V ABI calls. 553 554mveclibabi= 555Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none) 556Vector library ABI to use. 557 558Enum 559Name(ix86_veclibabi) Type(enum ix86_veclibabi) 560Known vectorization library ABIs (for use with the -mveclibabi= option): 561 562EnumValue 563Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml) 564 565EnumValue 566Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml) 567 568mvect8-ret-in-mem 569Target Report Mask(VECT8_RETURNS) Save 570Return 8-byte vectors in memory. 571 572mrecip 573Target Report Mask(RECIP) Save 574Generate reciprocals instead of divss and sqrtss. 575 576mrecip= 577Target Report RejectNegative Joined Var(ix86_recip_name) 578Control generation of reciprocal estimates. 579 580mcld 581Target Report Mask(CLD) Save 582Generate cld instruction in the function prologue. 583 584mvzeroupper 585Target Report Mask(VZEROUPPER) Save 586Generate vzeroupper instruction before a transfer of control flow out of 587the function. 588 589mstv 590Target Report Mask(STV) Save 591Disable Scalar to Vector optimization pass transforming 64-bit integer 592computations into a vector ones. 593 594mdispatch-scheduler 595Target RejectNegative Var(flag_dispatch_scheduler) 596Do dispatch scheduling if processor is bdver1, bdver2, bdver3, bdver4 597or znver1 and Haifa scheduling is selected. 598 599mprefer-avx128 600Target Alias(mprefer-vector-width=, 128, 256) 601Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer. 602 603mprefer-vector-width= 604Target Report RejectNegative Joined Var(prefer_vector_width_type) Enum(prefer_vector_width) Init(PVW_NONE) Save 605Use given register vector width instructions instead of maximum register width in the auto-vectorizer. 606 607Enum 608Name(prefer_vector_width) Type(enum prefer_vector_width) 609Known preferred register vector length (to use with the -mprefer-vector-width= option): 610 611EnumValue 612Enum(prefer_vector_width) String(none) Value(PVW_NONE) 613 614EnumValue 615Enum(prefer_vector_width) String(128) Value(PVW_AVX128) 616 617EnumValue 618Enum(prefer_vector_width) String(256) Value(PVW_AVX256) 619 620EnumValue 621Enum(prefer_vector_width) String(512) Value(PVW_AVX512) 622 623;; ISA support 624 625m32 626Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save 627Generate 32bit i386 code. 628 629m64 630Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save 631Generate 64bit x86-64 code. 632 633mx32 634Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save 635Generate 32bit x86-64 code. 636 637m16 638Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save 639Generate 16bit i386 code. 640 641mmmx 642Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save 643Support MMX built-in functions. 644 645m3dnow 646Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save 647Support 3DNow! built-in functions. 648 649m3dnowa 650Target Report Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save 651Support Athlon 3Dnow! built-in functions. 652 653msse 654Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save 655Support MMX and SSE built-in functions and code generation. 656 657msse2 658Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save 659Support MMX, SSE and SSE2 built-in functions and code generation. 660 661msse3 662Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save 663Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation. 664 665mssse3 666Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save 667Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation. 668 669msse4.1 670Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save 671Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation. 672 673msse4.2 674Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save 675Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. 676 677msse4 678Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save 679Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. 680 681mno-sse4 682Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save 683Do not support SSE4.1 and SSE4.2 built-in functions and code generation. 684 685msse5 686Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed) 687;; Deprecated 688 689mavx 690Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save 691Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation. 692 693mavx2 694Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save 695Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation. 696 697mavx512f 698Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save 699Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation. 700 701mavx512pf 702Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save 703Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation. 704 705mavx512er 706Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save 707Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation. 708 709mavx512cd 710Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save 711Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation. 712 713mavx512dq 714Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save 715Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation. 716 717mavx512bw 718Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save 719Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation. 720 721mavx512vl 722Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save 723Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation. 724 725mavx512ifma 726Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save 727Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation. 728 729mavx512vbmi 730Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save 731Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation. 732 733mavx5124fmaps 734Target Report Mask(ISA2_AVX5124FMAPS) Var(ix86_isa_flags2) Save 735Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124FMAPS built-in functions and code generation. 736 737mavx5124vnniw 738Target Report Mask(ISA2_AVX5124VNNIW) Var(ix86_isa_flags2) Save 739Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation. 740 741mavx512vpopcntdq 742Target Report Mask(ISA_AVX512VPOPCNTDQ) Var(ix86_isa_flags) Save 743Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VPOPCNTDQ built-in functions and code generation. 744 745mavx512vbmi2 746Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags) Save 747Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation. 748 749mavx512vnni 750Target Report Mask(ISA_AVX512VNNI) Var(ix86_isa_flags) Save 751Support AVX512VNNI built-in functions and code generation. 752 753mavx512bitalg 754Target Report Mask(ISA_AVX512BITALG) Var(ix86_isa_flags) Save 755Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512BITALG built-in functions and code generation. 756 757mavx512vp2intersect 758Target Report Mask(ISA2_AVX512VP2INTERSECT) Var(ix86_isa_flags2) Save 759Support AVX512VP2INTERSECT built-in functions and code generation. 760 761mfma 762Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save 763Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation. 764 765msse4a 766Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save 767Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation. 768 769mfma4 770Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save 771Support FMA4 built-in functions and code generation. 772 773mxop 774Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save 775Support XOP built-in functions and code generation. 776 777mlwp 778Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save 779Support LWP built-in functions and code generation. 780 781mabm 782Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save 783Support code generation of Advanced Bit Manipulation (ABM) instructions. 784 785mpopcnt 786Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save 787Support code generation of popcnt instruction. 788 789mpconfig 790Target Report Mask(ISA2_PCONFIG) Var(ix86_isa_flags2) Save 791Support PCONFIG built-in functions and code generation. 792 793mwbnoinvd 794Target Report Mask(ISA2_WBNOINVD) Var(ix86_isa_flags2) Save 795Support WBNOINVD built-in functions and code generation. 796 797mptwrite 798Target Report Mask(ISA2_PTWRITE) Var(ix86_isa_flags2) Save 799Support PTWRITE built-in functions and code generation. 800 801msgx 802Target Report Mask(ISA2_SGX) Var(ix86_isa_flags2) Save 803Support SGX built-in functions and code generation. 804 805mrdpid 806Target Report Mask(ISA2_RDPID) Var(ix86_isa_flags2) Save 807Support RDPID built-in functions and code generation. 808 809mgfni 810Target Report Mask(ISA_GFNI) Var(ix86_isa_flags) Save 811Support GFNI built-in functions and code generation. 812 813mvaes 814Target Report Mask(ISA2_VAES) Var(ix86_isa_flags2) Save 815Support VAES built-in functions and code generation. 816 817mvpclmulqdq 818Target Report Mask(ISA_VPCLMULQDQ) Var(ix86_isa_flags) Save 819Support VPCLMULQDQ built-in functions and code generation. 820 821mbmi 822Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save 823Support BMI built-in functions and code generation. 824 825mbmi2 826Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save 827Support BMI2 built-in functions and code generation. 828 829mlzcnt 830Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save 831Support LZCNT built-in function and code generation. 832 833mhle 834Target Report Mask(ISA2_HLE) Var(ix86_isa_flags2) Save 835Support Hardware Lock Elision prefixes. 836 837mrdseed 838Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save 839Support RDSEED instruction. 840 841mprfchw 842Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save 843Support PREFETCHW instruction. 844 845madx 846Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save 847Support flag-preserving add-carry instructions. 848 849mclflushopt 850Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save 851Support CLFLUSHOPT instructions. 852 853mclwb 854Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save 855Support CLWB instruction. 856 857mpcommit 858Target WarnRemoved 859 860mfxsr 861Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save 862Support FXSAVE and FXRSTOR instructions. 863 864mxsave 865Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save 866Support XSAVE and XRSTOR instructions. 867 868mxsaveopt 869Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save 870Support XSAVEOPT instruction. 871 872mxsavec 873Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save 874Support XSAVEC instructions. 875 876mxsaves 877Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save 878Support XSAVES and XRSTORS instructions. 879 880mtbm 881Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save 882Support TBM built-in functions and code generation. 883 884mcx16 885Target Report Mask(ISA2_CX16) Var(ix86_isa_flags2) Save 886Support code generation of cmpxchg16b instruction. 887 888msahf 889Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save 890Support code generation of sahf instruction in 64bit x86-64 code. 891 892mmovbe 893Target Report Mask(ISA2_MOVBE) Var(ix86_isa_flags2) Save 894Support code generation of movbe instruction. 895 896mcrc32 897Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save 898Support code generation of crc32 instruction. 899 900maes 901Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save 902Support AES built-in functions and code generation. 903 904msha 905Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save 906Support SHA1 and SHA256 built-in functions and code generation. 907 908mpclmul 909Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save 910Support PCLMUL built-in functions and code generation. 911 912msse2avx 913Target Report Var(ix86_sse2avx) 914Encode SSE instructions with VEX prefix. 915 916mfsgsbase 917Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save 918Support FSGSBASE built-in functions and code generation. 919 920mrdrnd 921Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save 922Support RDRND built-in functions and code generation. 923 924mf16c 925Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save 926Support F16C built-in functions and code generation. 927 928mprefetchwt1 929Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save 930Support PREFETCHWT1 built-in functions and code generation. 931 932mfentry 933Target Report Var(flag_fentry) 934Emit profiling counter call at function entry before prologue. 935 936mrecord-mcount 937Target Report Var(flag_record_mcount) 938Generate __mcount_loc section with all mcount or __fentry__ calls. 939 940mnop-mcount 941Target Report Var(flag_nop_mcount) 942Generate mcount/__fentry__ calls as nops. To activate they need to be 943patched in. 944 945mfentry-name= 946Target RejectNegative Joined Var(fentry_name) 947Set name of __fentry__ symbol called at function entry. 948 949mfentry-section= 950Target RejectNegative Joined Var(fentry_section) 951Set name of section to record mrecord-mcount calls. 952 953mskip-rax-setup 954Target Report Var(flag_skip_rax_setup) 955Skip setting up RAX register when passing variable arguments. 956 957m8bit-idiv 958Target Report Mask(USE_8BIT_IDIV) Save 959Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check. 960 961mavx256-split-unaligned-load 962Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save 963Split 32-byte AVX unaligned load. 964 965mavx256-split-unaligned-store 966Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save 967Split 32-byte AVX unaligned store. 968 969mrtm 970Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save 971Support RTM built-in functions and code generation. 972 973mmpx 974Target WarnRemoved 975Removed in GCC 9. This switch has no effect. 976 977mmwaitx 978Target Report Mask(ISA2_MWAITX) Var(ix86_isa_flags2) Save 979Support MWAITX and MONITORX built-in functions and code generation. 980 981mclzero 982Target Report Mask(ISA2_CLZERO) Var(ix86_isa_flags2) Save 983Support CLZERO built-in functions and code generation. 984 985mpku 986Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save 987Support PKU built-in functions and code generation. 988 989mstack-protector-guard= 990Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS) 991Use given stack-protector guard. 992 993Enum 994Name(stack_protector_guard) Type(enum stack_protector_guard) 995Known stack protector guard (for use with the -mstack-protector-guard= option): 996 997EnumValue 998Enum(stack_protector_guard) String(tls) Value(SSP_TLS) 999 1000EnumValue 1001Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL) 1002 1003mstack-protector-guard-reg= 1004Target RejectNegative Joined Var(ix86_stack_protector_guard_reg_str) 1005Use the given base register for addressing the stack-protector guard. 1006 1007TargetVariable 1008addr_space_t ix86_stack_protector_guard_reg = ADDR_SPACE_GENERIC 1009 1010mstack-protector-guard-offset= 1011Target RejectNegative Joined Integer Var(ix86_stack_protector_guard_offset_str) 1012Use the given offset for addressing the stack-protector guard. 1013 1014TargetVariable 1015HOST_WIDE_INT ix86_stack_protector_guard_offset = 0 1016 1017mstack-protector-guard-symbol= 1018Target RejectNegative Joined Integer Var(ix86_stack_protector_guard_symbol_str) 1019Use the given symbol for addressing the stack-protector guard. 1020 1021mmitigate-rop 1022Target WarnRemoved 1023 1024mgeneral-regs-only 1025Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Var(ix86_target_flags) Save 1026Generate code which uses only the general registers. 1027 1028mshstk 1029Target Report Mask(ISA_SHSTK) Var(ix86_isa_flags) Save 1030Enable shadow stack built-in functions from Control-flow Enforcement 1031Technology (CET). 1032 1033mcet-switch 1034Target Report Undocumented Var(flag_cet_switch) Init(0) 1035Turn on CET instrumentation for switch statements that use a jump table and 1036an indirect jump. 1037 1038mmanual-endbr 1039Target Report Var(flag_manual_endbr) Init(0) 1040Insert ENDBR instruction at function entry only via cf_check attribute 1041for CET instrumentation. 1042 1043mforce-indirect-call 1044Target Report Var(flag_force_indirect_call) Init(0) 1045Make all function calls indirect. 1046 1047mindirect-branch= 1048Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_indirect_branch) Init(indirect_branch_keep) 1049Convert indirect call and jump to call and return thunks. 1050 1051mfunction-return= 1052Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_function_return) Init(indirect_branch_keep) 1053Convert function return to call and return thunk. 1054 1055Enum 1056Name(indirect_branch) Type(enum indirect_branch) 1057Known indirect branch choices (for use with the -mindirect-branch=/-mfunction-return= options): 1058 1059EnumValue 1060Enum(indirect_branch) String(keep) Value(indirect_branch_keep) 1061 1062EnumValue 1063Enum(indirect_branch) String(thunk) Value(indirect_branch_thunk) 1064 1065EnumValue 1066Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline) 1067 1068EnumValue 1069Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) 1070 1071mindirect-branch-register 1072Target Report Var(ix86_indirect_branch_register) Init(0) 1073Force indirect call and jump via register. 1074 1075mmovdiri 1076Target Report Mask(ISA_MOVDIRI) Var(ix86_isa_flags) Save 1077Support MOVDIRI built-in functions and code generation. 1078 1079mmovdir64b 1080Target Report Mask(ISA2_MOVDIR64B) Var(ix86_isa_flags2) Save 1081Support MOVDIR64B built-in functions and code generation. 1082 1083mwaitpkg 1084Target Report Mask(ISA2_WAITPKG) Var(ix86_isa_flags2) Save 1085Support WAITPKG built-in functions and code generation. 1086 1087mcldemote 1088Target Report Mask(ISA2_CLDEMOTE) Var(ix86_isa_flags2) Save 1089Support CLDEMOTE built-in functions and code generation. 1090 1091minstrument-return= 1092Target Report RejectNegative Joined Enum(instrument_return) Var(ix86_instrument_return) Init(instrument_return_none) 1093Instrument function exit in instrumented functions with __fentry__. 1094 1095Enum 1096Name(instrument_return) Type(enum instrument_return) 1097Known choices for return instrumentation with -minstrument-return=: 1098 1099EnumValue 1100Enum(instrument_return) String(none) Value(instrument_return_none) 1101 1102EnumValue 1103Enum(instrument_return) String(call) Value(instrument_return_call) 1104 1105EnumValue 1106Enum(instrument_return) String(nop5) Value(instrument_return_nop5) 1107 1108mrecord-return 1109Target Report Var(ix86_flag_record_return) Init(0) 1110Generate a __return_loc section pointing to all return instrumentation code. 1111 1112mavx512bf16 1113Target Report Mask(ISA2_AVX512BF16) Var(ix86_isa_flags2) Save 1114Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and 1115AVX512BF16 built-in functions and code generation. 1116 1117menqcmd 1118Target Report Mask(ISA2_ENQCMD) Var(ix86_isa_flags2) Save 1119Support ENQCMD built-in functions and code generation. 1120