1; Options for the MIPS port of the compiler
2;
3; Copyright (C) 2005-2020 Free Software Foundation, Inc.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
9; Software Foundation; either version 3, or (at your option) any later
10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20
21HeaderInclude
22config/mips/mips-opts.h
23
24EB
25Driver
26
27EL
28Driver
29
30mabi=
31Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
32-mabi=ABI	Generate code that conforms to the given ABI.
33
34Enum
35Name(mips_abi) Type(int)
36Known MIPS ABIs (for use with the -mabi= option):
37
38EnumValue
39Enum(mips_abi) String(32) Value(ABI_32)
40
41EnumValue
42Enum(mips_abi) String(o64) Value(ABI_O64)
43
44EnumValue
45Enum(mips_abi) String(n32) Value(ABI_N32)
46
47EnumValue
48Enum(mips_abi) String(64) Value(ABI_64)
49
50EnumValue
51Enum(mips_abi) String(eabi) Value(ABI_EABI)
52
53mabicalls
54Target Report Mask(ABICALLS)
55Generate code that can be used in SVR4-style dynamic objects.
56
57mmad
58Target Report Var(TARGET_MAD)
59Use PMC-style 'mad' instructions.
60
61mimadd
62Target Report Mask(IMADD)
63Use integer madd/msub instructions.
64
65march=
66Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
67-march=ISA	Generate code for the given ISA.
68
69mbranch-cost=
70Target RejectNegative Joined UInteger Var(mips_branch_cost)
71-mbranch-cost=COST	Set the cost of branches to roughly COST instructions.
72
73mbranch-likely
74Target Report Mask(BRANCHLIKELY)
75Use Branch Likely instructions, overriding the architecture default.
76
77mflip-mips16
78Target Report Var(TARGET_FLIP_MIPS16)
79Switch on/off MIPS16 ASE on alternating functions for compiler testing.
80
81mcheck-zero-division
82Target Report Mask(CHECK_ZERO_DIV)
83Trap on integer divide by zero.
84
85mcode-readable=
86Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
87-mcode-readable=SETTING	Specify when instructions are allowed to access code.
88
89Enum
90Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
91Valid arguments to -mcode-readable=:
92
93EnumValue
94Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
95
96EnumValue
97Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
98
99EnumValue
100Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
101
102mdivide-breaks
103Target Report RejectNegative Mask(DIVIDE_BREAKS)
104Use branch-and-break sequences to check for integer divide by zero.
105
106mdivide-traps
107Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
108Use trap instructions to check for integer divide by zero.
109
110mdmx
111Target Report RejectNegative Var(TARGET_MDMX)
112Allow the use of MDMX instructions.
113
114mdouble-float
115Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
116Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations.
117
118mdsp
119Target Report Var(TARGET_DSP)
120Use MIPS-DSP instructions.
121
122mdspr2
123Target Report Var(TARGET_DSPR2)
124Use MIPS-DSP REV 2 instructions.
125
126mdebug
127Target Var(TARGET_DEBUG_MODE) Undocumented
128
129mdebugd
130Target Var(TARGET_DEBUG_D_MODE) Undocumented
131
132meb
133Target Report RejectNegative Mask(BIG_ENDIAN)
134Use big-endian byte order.
135
136mel
137Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
138Use little-endian byte order.
139
140membedded-data
141Target Report Var(TARGET_EMBEDDED_DATA)
142Use ROM instead of RAM.
143
144meva
145Target Report Var(TARGET_EVA)
146Use Enhanced Virtual Addressing instructions.
147
148mexplicit-relocs
149Target Report Mask(EXPLICIT_RELOCS)
150Use NewABI-style %reloc() assembly operators.
151
152mextern-sdata
153Target Report Var(TARGET_EXTERN_SDATA) Init(1)
154Use -G for data that is not defined by the current object.
155
156mfix-24k
157Target Report Var(TARGET_FIX_24K)
158Work around certain 24K errata.
159
160mfix-r4000
161Target Report Mask(FIX_R4000)
162Work around certain R4000 errata.
163
164mfix-r4400
165Target Report Mask(FIX_R4400)
166Work around certain R4400 errata.
167
168mfix-r5900
169Target Report Mask(FIX_R5900)
170Work around the R5900 short loop erratum.
171
172mfix-rm7000
173Target Report Var(TARGET_FIX_RM7000)
174Work around certain RM7000 errata.
175
176mfix-r10000
177Target Report Mask(FIX_R10000)
178Work around certain R10000 errata.
179
180mfix-sb1
181Target Report Var(TARGET_FIX_SB1)
182Work around errata for early SB-1 revision 2 cores.
183
184mfix-vr4120
185Target Report Var(TARGET_FIX_VR4120)
186Work around certain VR4120 errata.
187
188mfix-vr4130
189Target Report Var(TARGET_FIX_VR4130)
190Work around VR4130 mflo/mfhi errata.
191
192mfix4300
193Target Report Var(TARGET_4300_MUL_FIX)
194Work around an early 4300 hardware bug.
195
196mfp-exceptions
197Target Report Var(TARGET_FP_EXCEPTIONS) Init(1)
198FP exceptions are enabled.
199
200mfp32
201Target Report RejectNegative InverseMask(FLOAT64)
202Use 32-bit floating-point registers.
203
204mfpxx
205Target Report RejectNegative Mask(FLOATXX)
206Conform to the o32 FPXX ABI.
207
208mfp64
209Target Report RejectNegative Mask(FLOAT64)
210Use 64-bit floating-point registers.
211
212mflush-func=
213Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
214-mflush-func=FUNC	Use FUNC to flush the cache before calling stack trampolines.
215
216mabs=
217Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_abs) Init(MIPS_IEEE_754_DEFAULT)
218-mabs=MODE	Select the IEEE 754 ABS/NEG instruction execution mode.
219
220mnan=
221Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_nan) Init(MIPS_IEEE_754_DEFAULT)
222-mnan=ENCODING	Select the IEEE 754 NaN data encoding.
223
224Enum
225Name(mips_ieee_754_value) Type(int)
226Known MIPS IEEE 754 settings (for use with the -mabs= and -mnan= options):
227
228EnumValue
229Enum(mips_ieee_754_value) String(2008) Value(MIPS_IEEE_754_2008)
230
231EnumValue
232Enum(mips_ieee_754_value) String(legacy) Value(MIPS_IEEE_754_LEGACY)
233
234mgp32
235Target Report RejectNegative InverseMask(64BIT)
236Use 32-bit general registers.
237
238mgp64
239Target Report RejectNegative Mask(64BIT)
240Use 64-bit general registers.
241
242mgpopt
243Target Report Var(TARGET_GPOPT) Init(1)
244Use GP-relative addressing to access small data.
245
246mplt
247Target Report Var(TARGET_PLT)
248When generating -mabicalls code, allow executables to use PLTs and copy relocations.
249
250mhard-float
251Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
252Allow the use of hardware floating-point ABI and instructions.
253
254minterlink-compressed
255Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
256Generate code that is link-compatible with MIPS16 and microMIPS code.
257
258minterlink-mips16
259Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
260An alias for minterlink-compressed provided for backward-compatibility.
261
262mips
263Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
264-mipsN	Generate code for ISA level N.
265
266mips16
267Target Report RejectNegative Mask(MIPS16)
268Generate MIPS16 code.
269
270mips3d
271Target Report RejectNegative Var(TARGET_MIPS3D)
272Use MIPS-3D instructions.
273
274mllsc
275Target Report Mask(LLSC)
276Use ll, sc and sync instructions.
277
278mlocal-sdata
279Target Report Var(TARGET_LOCAL_SDATA) Init(1)
280Use -G for object-local data.
281
282mlong-calls
283Target Report Var(TARGET_LONG_CALLS)
284Use indirect calls.
285
286mlong32
287Target Report RejectNegative InverseMask(LONG64, LONG32)
288Use a 32-bit long type.
289
290mlong64
291Target Report RejectNegative Mask(LONG64)
292Use a 64-bit long type.
293
294mmcount-ra-address
295Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
296Pass the address of the ra save location to _mcount in $12.
297
298mmemcpy
299Target Report Mask(MEMCPY)
300Don't optimize block moves.
301
302mmicromips
303Target Report Mask(MICROMIPS)
304Use microMIPS instructions.
305
306mmsa
307Target Report Mask(MSA)
308Use MIPS MSA Extension instructions.
309
310mmt
311Target Report Var(TARGET_MT)
312Allow the use of MT instructions.
313
314mno-float
315Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
316Prevent the use of all floating-point operations.
317
318mmcu
319Target Report Var(TARGET_MCU)
320Use MCU instructions.
321
322mno-flush-func
323Target RejectNegative
324Do not use a cache-flushing function before calling stack trampolines.
325
326mno-mdmx
327Target Report RejectNegative Var(TARGET_MDMX, 0)
328Do not use MDMX instructions.
329
330mno-mips16
331Target Report RejectNegative InverseMask(MIPS16)
332Generate normal-mode code.
333
334mno-mips3d
335Target Report RejectNegative Var(TARGET_MIPS3D, 0)
336Do not use MIPS-3D instructions.
337
338mpaired-single
339Target Report Mask(PAIRED_SINGLE_FLOAT)
340Use paired-single floating-point instructions.
341
342mr10k-cache-barrier=
343Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
344-mr10k-cache-barrier=SETTING	Specify when r10k cache barriers should be inserted.
345
346Enum
347Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
348Valid arguments to -mr10k-cache-barrier=:
349
350EnumValue
351Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
352
353EnumValue
354Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
355
356EnumValue
357Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
358
359mrelax-pic-calls
360Target Report Mask(RELAX_PIC_CALLS)
361Try to allow the linker to turn PIC calls into direct calls.
362
363mshared
364Target Report Var(TARGET_SHARED) Init(1)
365When generating -mabicalls code, make the code suitable for use in shared libraries.
366
367msingle-float
368Target Report RejectNegative Mask(SINGLE_FLOAT)
369Restrict the use of hardware floating-point instructions to 32-bit operations.
370
371msmartmips
372Target Report Mask(SMARTMIPS)
373Use SmartMIPS instructions.
374
375msoft-float
376Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
377Prevent the use of all hardware floating-point instructions.
378
379msplit-addresses
380Target Report Mask(SPLIT_ADDRESSES)
381Optimize lui/addiu address loads.
382
383msym32
384Target Report Var(TARGET_SYM32)
385Assume all symbols have 32-bit values.
386
387msynci
388Target Report Mask(SYNCI)
389Use synci instruction to invalidate i-cache.
390
391mlra
392Target Report Var(mips_lra_flag) Init(1) Save
393Use LRA instead of reload.
394
395mlxc1-sxc1
396Target Report Var(mips_lxc1_sxc1) Init(1)
397Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable.
398
399mmadd4
400Target Report Var(mips_madd4) Init(1)
401Use 4-operand madd.s/madd.d and related instructions where applicable.
402
403mtune=
404Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
405-mtune=PROCESSOR	Optimize the output for PROCESSOR.
406
407muninit-const-in-rodata
408Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
409Put uninitialized constants in ROM (needs -membedded-data).
410
411mvirt
412Target Report Var(TARGET_VIRT)
413Use Virtualization (VZ) instructions.
414
415mxpa
416Target Report Var(TARGET_XPA)
417Use eXtended Physical Address (XPA) instructions.
418
419mcrc
420Target Report Var(TARGET_CRC)
421Use Cyclic Redundancy Check (CRC) instructions.
422
423mginv
424Target Report Var(TARGET_GINV)
425Use Global INValidate (GINV) instructions.
426
427mvr4130-align
428Target Report Mask(VR4130_ALIGN)
429Perform VR4130-specific alignment optimizations.
430
431mxgot
432Target Report Var(TARGET_XGOT)
433Lift restrictions on GOT size.
434
435modd-spreg
436Target Report Mask(ODD_SPREG)
437Enable use of odd-numbered single-precision registers.
438
439mframe-header-opt
440Target Report Var(flag_frame_header_optimization) Optimization
441Optimize frame header.
442
443noasmopt
444Driver
445
446mload-store-pairs
447Target Report Var(TARGET_LOAD_STORE_PAIRS) Init(1)
448Enable load/store bonding.
449
450mcompact-branches=
451Target RejectNegative JoinedOrMissing Var(mips_cb) Report Enum(mips_cb_setting) Init(MIPS_CB_OPTIMAL)
452Specify the compact branch usage policy.
453
454Enum
455Name(mips_cb_setting) Type(enum mips_cb_setting)
456Policies available for use with -mcompact-branches=:
457
458EnumValue
459Enum(mips_cb_setting) String(never) Value(MIPS_CB_NEVER)
460
461EnumValue
462Enum(mips_cb_setting) String(optimal) Value(MIPS_CB_OPTIMAL)
463
464EnumValue
465Enum(mips_cb_setting) String(always) Value(MIPS_CB_ALWAYS)
466
467mloongson-mmi
468Target Report Mask(LOONGSON_MMI)
469Use Loongson MultiMedia extensions Instructions (MMI) instructions.
470
471mloongson-ext
472Target Report Mask(LOONGSON_EXT)
473Use Loongson EXTension (EXT) instructions.
474
475mloongson-ext2
476Target Report Var(TARGET_LOONGSON_EXT2)
477Use Loongson EXTension R2 (EXT2) instructions.
478