1;; Constraints definitions belonging to the gcc backend for IBM S/390. 2;; Copyright (C) 2006-2021 Free Software Foundation, Inc. 3;; Written by Wolfgang Gellerich, using code and information found in 4;; files s390.md, s390.h, and s390.c. 5;; 6;; This file is part of GCC. 7;; 8;; GCC is free software; you can redistribute it and/or modify it under 9;; the terms of the GNU General Public License as published by the Free 10;; Software Foundation; either version 3, or (at your option) any later 11;; version. 12;; 13;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 14;; WARRANTY; without even the implied warranty of MERCHANTABILITY or 15;; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16;; for more details. 17;; 18;; You should have received a copy of the GNU General Public License 19;; along with GCC; see the file COPYING3. If not see 20;; <http://www.gnu.org/licenses/>. 21 22 23;; 24;; Special constraints for s/390 machine description: 25;; 26;; a -- Any address register from 1 to 15. 27;; b -- Memory operand whose address is a symbol reference or a symbol 28;; reference + constant which can be proven to be naturally aligned. 29;; c -- Condition code register 33. 30;; d -- Any register from 0 to 15. 31;; f -- Floating point registers. 32;; j -- Multiple letter constraint for constant scalar and vector values 33;; j00: constant zero scalar or vector 34;; jm1: constant scalar or vector with all bits set 35;; jxx: contiguous bitmask of 0 or 1 in all vector elements 36;; jyy: constant consisting of byte chunks being either 0 or 0xff 37;; jKK: constant vector with all elements having the same value and 38;; matching K constraint 39;; jm6: An integer operand with the lowest order 6 bits all ones. 40;; jdd: A constant operand that fits into the data section. 41;; j>f: An integer operand whose lower 32 bits are greater than or equal to 15 42;; jb4: An unsigned constant 4 bit operand. 43;; t -- Access registers 36 and 37. 44;; v -- Vector registers v0-v31. 45;; C -- A signed 8-bit constant (-128..127) 46;; D -- An unsigned 16-bit constant (0..65535) 47;; G -- Const double zero operand 48;; I -- An 8-bit constant (0..255). 49;; J -- A 12-bit constant (0..4095). 50;; K -- A 16-bit constant (-32768..32767). 51;; L -- Value appropriate as displacement. 52;; (0..4095) for short displacement 53;; (-524288..524287) for long displacement 54;; M -- Constant integer with a value of 0x7fffffff. 55;; N -- Multiple letter constraint followed by 4 parameter letters. 56;; 0..9,x: number of the part counting from most to least significant 57;; S,H,Q: mode of the part 58;; D,S,H: mode of the containing operand 59;; 0,F: value of the other parts (F - all bits set) 60;; -- 61;; xxDq satisfies s390_contiguous_bitmask_p for DImode 62;; (with possible wraparound of the one-bit range) 63;; xxSw satisfies s390_contiguous_bitmask_p for SImode 64;; (with possible wraparound of the one-bit range) 65;; xxSq satisfies s390_contiguous_bitmask_nowrap_p for SImode 66;; (without wraparound of the one-bit range) 67;; 68;; The constraint matches if the specified part of a constant 69;; has a value different from its other parts. If the letter x 70;; is specified instead of a part number, the constraint matches 71;; if there is any single part with non-default value. 72;; O -- Multiple letter constraint followed by 1 parameter. 73;; s: Signed extended immediate value (-2G .. 2G-1). 74;; p: Positive extended immediate value (0 .. 4G-1). 75;; n: Negative extended immediate value (-4G+1 .. -1). 76;; These constraints do not accept any operand if the machine does 77;; not provide the extended-immediate facility. 78;; P -- Any integer constant that can be loaded without literal pool. 79;; Q -- Memory reference without index register and with short displacement. 80;; R -- Memory reference with index register and short displacement. 81;; S -- Memory reference without index register but with long displacement. 82;; T -- Memory reference with index register and long displacement. 83;; A -- Multiple letter constraint followed by Q, R, S, or T: 84;; Offsettable memory reference of type specified by second letter. 85;; B -- Multiple letter constraint followed by Q, R, S, or T: 86;; Memory reference of the type specified by second letter that 87;; does *not* refer to a literal pool entry. 88;; U -- Pointer with short displacement. (deprecated - use ZR) 89;; W -- Pointer with long displacement. (deprecated - use ZT) 90;; Y -- Address style operand without index. 91;; ZQ -- Pointer without index register and with short displacement. 92;; ZR -- Pointer with index register and short displacement. 93;; ZS -- Pointer without index register but with long displacement. 94;; ZT -- Pointer with index register and long displacement. 95;; ZL -- LARL operand when in 64-bit mode, otherwise nothing. 96;; 97;; 98 99 100;; 101;; Register constraints. 102;; 103 104(define_register_constraint "a" 105 "ADDR_REGS" 106 "Any address register from 1 to 15.") 107 108 109(define_register_constraint "c" 110 "CC_REGS" 111 "Condition code register 33") 112 113 114(define_register_constraint "d" 115 "GENERAL_REGS" 116 "Any register from 0 to 15") 117 118 119(define_register_constraint "f" 120 "FP_REGS" 121 "Floating point registers") 122 123 124(define_register_constraint "t" 125 "ACCESS_REGS" 126 "@internal 127 Access registers 36 and 37") 128 129 130(define_register_constraint "v" 131 "VEC_REGS" 132 "Vector registers v0-v31") 133 134 135;; 136;; General constraints for constants. 137;; 138 139(define_constraint "C" 140 "@internal 141 An 8-bit signed immediate constant (-128..127)" 142 (and (match_code "const_int") 143 (match_test "ival >= -128 && ival <= 127"))) 144 145 146(define_constraint "D" 147 "An unsigned 16-bit constant (0..65535)" 148 (and (match_code "const_int") 149 (match_test "ival >= 0 && ival <= 65535"))) 150 151 152(define_constraint "G" 153 "@internal 154 Const double zero operand" 155 (and (match_code "const_double") 156 (match_test "s390_float_const_zero_p (op)"))) 157 158 159(define_constraint "I" 160 "An 8-bit constant (0..255)" 161 (and (match_code "const_int") 162 (match_test "(unsigned HOST_WIDE_INT) ival <= 255"))) 163 164 165(define_constraint "J" 166 "A 12-bit constant (0..4095)" 167 (and (match_code "const_int") 168 (match_test "(unsigned HOST_WIDE_INT) ival <= 4095"))) 169 170 171(define_constraint "K" 172 "A 16-bit constant (-32768..32767)" 173 (and (match_code "const_int") 174 (match_test "ival >= -32768 && ival <= 32767"))) 175 176 177(define_constraint "L" 178 "Value appropriate as displacement. 179 (0..4095) for short displacement 180 (-524288..524287) for long displacement" 181 (and (match_code "const_int") 182 (match_test "TARGET_LONG_DISPLACEMENT ? 183 (ival >= -524288 && ival <= 524287) 184 : (ival >= 0 && ival <= 4095)"))) 185 186 187(define_constraint "M" 188 "Constant integer with a value of 0x7fffffff" 189 (and (match_code "const_int") 190 (match_test "ival == 2147483647"))) 191 192 193(define_constraint "P" 194 "@internal 195 Any integer constant that can be loaded without literal pool" 196 (and (match_code "const_int") 197 (match_test "legitimate_reload_constant_p (GEN_INT (ival))"))) 198 199 200(define_address_constraint "Y" 201 "Address style operand without index register" 202 203;; Simply check for base + offset style operands. Reload will take 204;; care of making sure we have a proper base register. 205 206 (match_test "s390_decompose_addrstyle_without_index (op, NULL, NULL)" )) 207 208 209;; Shift count operands are not necessarily legitimate addresses 210;; but the predicate shift_count_operand will only allow 211;; proper operands. If reload/lra need to change e.g. a spilled register 212;; they can still do so via the special handling of address constraints. 213;; To avoid further reloading (caused by a non-matching constraint) we 214;; always return true here as the predicate's checks are already sufficient. 215 216(define_address_constraint "jsc" 217 "Address style operand used as shift count." 218 (match_test "true" )) 219 220 221;; N -- Multiple letter constraint followed by 4 parameter letters. 222;; 0..9,x: number of the part counting from most to least significant 223;; S,H,Q: mode of the part 224;; D,S,H: mode of the containing operand 225;; 0,F: value of the other parts (F = all bits set) 226;; 227;; The constraint matches if the specified part of a constant 228;; has a value different from its other parts. If the letter x 229;; is specified instead of a part number, the constraint matches 230;; if there is any single part with non-default value. 231;; 232;; The following patterns define only those constraints that are actually 233;; used in s390.md. If you need an additional one, simply add it in the 234;; obvious way. Function s390_N_constraint_str is ready to handle all 235;; combinations. 236;; 237 238 239(define_constraint "NxQS0" 240 "@internal" 241 (and (match_code "const_int") 242 (match_test "s390_N_constraint_str (\"xQS0\", ival)"))) 243 244 245(define_constraint "NxHD0" 246 "@internal" 247 (and (match_code "const_int") 248 (match_test "s390_N_constraint_str (\"xHD0\", ival)"))) 249 250 251(define_constraint "NxSD0" 252 "@internal" 253 (and (match_code "const_int") 254 (match_test "s390_N_constraint_str (\"xSD0\", ival)"))) 255 256 257(define_constraint "NxQD0" 258 "@internal" 259 (and (match_code "const_int") 260 (match_test "s390_N_constraint_str (\"xQD0\", ival)"))) 261 262 263(define_constraint "N3HD0" 264 "@internal" 265 (and (match_code "const_int") 266 (match_test "s390_N_constraint_str (\"3HD0\", ival)"))) 267 268 269(define_constraint "N2HD0" 270 "@internal" 271 (and (match_code "const_int") 272 (match_test "s390_N_constraint_str (\"2HD0\", ival)"))) 273 274 275(define_constraint "N1SD0" 276 "@internal" 277 (and (match_code "const_int") 278 (match_test "s390_N_constraint_str (\"1SD0\", ival)"))) 279 280 281(define_constraint "N1HS0" 282 "@internal" 283 (and (match_code "const_int") 284 (match_test "s390_N_constraint_str (\"1HS0\", ival)"))) 285 286 287(define_constraint "N1HD0" 288 "@internal" 289 (and (match_code "const_int") 290 (match_test "s390_N_constraint_str (\"1HD0\", ival)"))) 291 292 293(define_constraint "N0SD0" 294 "@internal" 295 (and (match_code "const_int") 296 (match_test "s390_N_constraint_str (\"0SD0\", ival)"))) 297 298 299(define_constraint "N0HS0" 300 "@internal" 301 (and (match_code "const_int") 302 (match_test "s390_N_constraint_str (\"0HS0\", ival)"))) 303 304 305(define_constraint "N0HD0" 306 "@internal" 307 (and (match_code "const_int") 308 (match_test "s390_N_constraint_str (\"0HD0\", ival)"))) 309 310 311(define_constraint "NxQDF" 312 "@internal" 313 (and (match_code "const_int") 314 (match_test "s390_N_constraint_str (\"xQDF\", ival)"))) 315 316 317(define_constraint "N1SDF" 318 "@internal" 319 (and (match_code "const_int") 320 (match_test "s390_N_constraint_str (\"1SDF\", ival)"))) 321 322 323(define_constraint "N0SDF" 324 "@internal" 325 (and (match_code "const_int") 326 (match_test "s390_N_constraint_str (\"0SDF\", ival)"))) 327 328 329(define_constraint "N3HDF" 330 "@internal" 331 (and (match_code "const_int") 332 (match_test "s390_N_constraint_str (\"3HDF\", ival)"))) 333 334 335(define_constraint "N2HDF" 336 "@internal" 337 (and (match_code "const_int") 338 (match_test "s390_N_constraint_str (\"2HDF\", ival)"))) 339 340 341(define_constraint "N1HDF" 342 "@internal" 343 (and (match_code "const_int") 344 (match_test "s390_N_constraint_str (\"1HDF\", ival)"))) 345 346 347(define_constraint "N0HDF" 348 "@internal" 349 (and (match_code "const_int") 350 (match_test "s390_N_constraint_str (\"0HDF\", ival)"))) 351 352 353(define_constraint "N0HSF" 354 "@internal" 355 (and (match_code "const_int") 356 (match_test "s390_N_constraint_str (\"0HSF\", ival)"))) 357 358 359(define_constraint "N1HSF" 360 "@internal" 361 (and (match_code "const_int") 362 (match_test "s390_N_constraint_str (\"1HSF\", ival)"))) 363 364 365(define_constraint "NxQSF" 366 "@internal" 367 (and (match_code "const_int") 368 (match_test "s390_N_constraint_str (\"xQSF\", ival)"))) 369 370 371(define_constraint "NxQHF" 372 "@internal" 373 (and (match_code "const_int") 374 (match_test "s390_N_constraint_str (\"xQHF\", ival)"))) 375 376 377(define_constraint "NxQH0" 378 "@internal" 379 (and (match_code "const_int") 380 (match_test "s390_N_constraint_str (\"xQH0\", ival)"))) 381 382(define_constraint "NxxDw" 383 "@internal" 384 (and (match_code "const_int") 385 (match_test "s390_contiguous_bitmask_p (ival, true, 64, NULL, NULL)"))) 386 387(define_constraint "NxxSq" 388 "@internal" 389 (and (match_code "const_int") 390 (match_test "s390_contiguous_bitmask_p (ival, false, 32, NULL, NULL)"))) 391 392(define_constraint "NxxSw" 393 "@internal" 394 (and (match_code "const_int") 395 (match_test "s390_contiguous_bitmask_p (ival, true, 32, NULL, NULL)"))) 396 397;; 398;; Double-letter constraints starting with O follow. 399;; 400 401 402(define_constraint "Os" 403 "@internal 404 Signed extended immediate value (-2G .. 2G-1). 405 This constraint will only match if the machine provides 406 the extended-immediate facility." 407 (and (match_code "const_int") 408 (match_test "s390_O_constraint_str ('s', ival)"))) 409 410 411(define_constraint "Op" 412 "@internal 413 Positive extended immediate value (0 .. 4G-1). 414 This constraint will only match if the machine provides 415 the extended-immediate facility." 416 (and (match_code "const_int") 417 (match_test "s390_O_constraint_str ('p', ival)"))) 418 419 420(define_constraint "On" 421 "@internal 422 Negative extended immediate value (-4G+1 .. -1). 423 This constraint will only match if the machine provides 424 the extended-immediate facility." 425 (and (match_code "const_int") 426 (match_test "s390_O_constraint_str ('n', ival)"))) 427 428 429;; 430;; Vector and scalar constraints for constant values follow. 431;; 432 433(define_constraint "j00" 434 "Zero scalar or vector constant" 435 (match_test "op == CONST0_RTX (GET_MODE (op))")) 436 437(define_constraint "jm1" 438 "All one bit scalar or vector constant" 439 (match_test "op == CONSTM1_RTX (GET_MODE (op))")) 440 441; vector generate mask operand - support for up to 64 bit elements 442(define_constraint "jxx" 443 "@internal" 444 (and (match_code "const_vector") 445 (match_test "s390_contiguous_bitmask_vector_p (op, NULL, NULL)"))) 446 447; vector generate byte mask operand - this is only supposed to deal 448; with real vectors 128 bit values of being either 0 or -1 are handled 449; with j00 and jm1 450(define_constraint "jyy" 451 "@internal" 452 (and (match_code "const_vector") 453 (match_test "s390_bytemask_vector_p (op, NULL)"))) 454 455; vector replicate immediate operand - support for up to 64 bit elements 456(define_constraint "jKK" 457 "@internal" 458 (and (and (and (match_code "const_vector") 459 (match_test "const_vec_duplicate_p (op)")) 460 (match_test "GET_MODE_UNIT_SIZE (GET_MODE (op)) <= 8")) 461 (match_test "satisfies_constraint_K (XVECEXP (op, 0, 0))"))) 462 463(define_constraint "jm6" 464 "@internal An integer operand with the lowest order 6 bits all ones." 465 (match_operand 0 "const_int_6bitset_operand")) 466 467(define_constraint "j>f" 468 "@internal An integer operand whose lower 32 bits are greater than or equal to 15." 469 (and (match_code "const_int") 470 (match_test "(unsigned int)(ival & 0xffffffff) >= 15"))) 471 472(define_constraint "jb4" 473 "@internal Constant unsigned integer 4 bit value" 474 (and (match_code "const_int") 475 (match_test "ival >= 0 && ival <= 15"))) 476 477;; 478;; Memory constraints follow. 479;; 480 481(define_memory_constraint "Q" 482 "Memory reference without index register and with short displacement" 483 (match_test "s390_mem_constraint (\"Q\", op)")) 484 485 486(define_memory_constraint "R" 487 "Memory reference with index register and short displacement" 488 (match_test "s390_mem_constraint (\"R\", op)")) 489 490 491(define_memory_constraint "S" 492 "Memory reference without index register but with long displacement" 493 (match_test "s390_mem_constraint (\"S\", op)")) 494 495 496(define_memory_constraint "T" 497 "Memory reference with index register and long displacement" 498 (match_test "s390_mem_constraint (\"T\", op)")) 499 500 501(define_memory_constraint "b" 502 "Memory reference whose address is a naturally aligned symbol reference." 503 (match_test "MEM_P (op) 504 && s390_check_symref_alignment (XEXP (op, 0), 505 GET_MODE_SIZE (GET_MODE (op)))")) 506 507; This defines 'm' as normal memory constraint. This is only possible 508; since the standard memory constraint is re-defined in s390.h using 509; the TARGET_MEM_CONSTRAINT macro. 510(define_memory_constraint "m" 511 "Matches the most general memory address for pre-z10 machines." 512 (match_test "s390_mem_constraint (\"T\", op)")) 513 514(define_memory_constraint "AQ" 515 "@internal 516 Offsettable memory reference without index register and with short displacement" 517 (match_test "s390_mem_constraint (\"AQ\", op)")) 518 519 520(define_memory_constraint "AR" 521 "@internal 522 Offsettable memory reference with index register and short displacement" 523 (match_test "s390_mem_constraint (\"AR\", op)")) 524 525 526(define_memory_constraint "AS" 527 "@internal 528 Offsettable memory reference without index register but with long displacement" 529 (match_test "s390_mem_constraint (\"AS\", op)")) 530 531 532(define_memory_constraint "AT" 533 "@internal 534 Offsettable memory reference with index register and long displacement" 535 (match_test "s390_mem_constraint (\"AT\", op)")) 536 537 538 539(define_constraint "BQ" 540 "@internal 541 Memory reference without index register and with short 542 displacement that does *not* refer to a literal pool entry." 543 (match_test "s390_mem_constraint (\"BQ\", op)")) 544 545 546(define_constraint "BR" 547 "@internal 548 Memory reference with index register and short displacement that 549 does *not* refer to a literal pool entry. " 550 (match_test "s390_mem_constraint (\"BR\", op)")) 551 552 553(define_constraint "BS" 554 "@internal 555 Memory reference without index register but with long displacement 556 that does *not* refer to a literal pool entry. " 557 (match_test "s390_mem_constraint (\"BS\", op)")) 558 559 560(define_constraint "BT" 561 "@internal 562 Memory reference with index register and long displacement that 563 does *not* refer to a literal pool entry. " 564 (match_test "s390_mem_constraint (\"BT\", op)")) 565 566 567(define_address_constraint "U" 568 "Pointer with short displacement. (deprecated - use ZR)" 569 (match_test "s390_mem_constraint (\"ZR\", op)")) 570 571(define_address_constraint "W" 572 "Pointer with long displacement. (deprecated - use ZT)" 573 (match_test "s390_mem_constraint (\"ZT\", op)")) 574 575 576(define_address_constraint "ZQ" 577 "Pointer without index register and with short displacement." 578 (match_test "s390_mem_constraint (\"ZQ\", op)")) 579 580(define_address_constraint "ZR" 581 "Pointer with index register and short displacement." 582 (match_test "s390_mem_constraint (\"ZR\", op)")) 583 584(define_address_constraint "ZS" 585 "Pointer without index register but with long displacement." 586 (match_test "s390_mem_constraint (\"ZS\", op)")) 587 588(define_address_constraint "ZT" 589 "Pointer with index register and long displacement." 590 (match_test "s390_mem_constraint (\"ZT\", op)")) 591 592(define_constraint "ZL" 593 "LARL operand when in 64-bit mode, otherwise nothing." 594 (match_test "TARGET_64BIT && larl_operand (op, VOIDmode)")) 595 596;; This constraint must behave like "i", in particular, the matching values 597;; must never be placed into registers or memory by 598;; cfgexpand.c:expand_asm_stmt. It could be straightforward to start its name 599;; with a letter from genpreds.c:const_int_constraints, however it would 600;; require using (match_code "const_int"), which is infeasible. To achieve the 601;; same effect, that is, setting maybe_allows_reg and maybe_allows_mem to false 602;; in genpreds.c:add_constraint, we explicitly exclude reg, subreg and mem 603;; codes. 604(define_constraint "jdd" 605 "A constant operand that fits into the data section. 606 Usage of this constraint might produce a relocation." 607 (and (not (match_code "reg")) 608 (not (match_code "subreg")) 609 (not (match_code "mem")) 610 (match_test "CONSTANT_P (op)"))) 611