1 /* { dg-do compile }
2 /* { dg-require-effective-target p9vector_hw } */
3 /* { dg-options "-O2 -mdejagnu-cpu=power9" } */
4 
5 #include <altivec.h>
6 
7 vector unsigned int
rlmi_test_1(vector unsigned int x,vector unsigned int y,vector unsigned int z)8 rlmi_test_1 (vector unsigned int x, vector unsigned int y,
9 	     vector unsigned int z)
10 {
11   return vec_rlmi (x, y, z);
12 }
13 
14 vector unsigned long long
rlmi_test_2(vector unsigned long long x,vector unsigned long long y,vector unsigned long long z)15 rlmi_test_2 (vector unsigned long long x, vector unsigned long long y,
16 	     vector unsigned long long z)
17 {
18   return vec_rlmi (x, y, z);
19 }
20 
21 vector unsigned int
vrlnm_test_1(vector unsigned int x,vector unsigned int y)22 vrlnm_test_1 (vector unsigned int x, vector unsigned int y)
23 {
24   return vec_vrlnm (x, y);
25 }
26 
27 vector unsigned long long
vrlnm_test_2(vector unsigned long long x,vector unsigned long long y)28 vrlnm_test_2 (vector unsigned long long x, vector unsigned long long y)
29 {
30   return vec_vrlnm (x, y);
31 }
32 
33 vector unsigned int
rlnm_test_1(vector unsigned int x,vector unsigned int y,vector unsigned int z)34 rlnm_test_1 (vector unsigned int x, vector unsigned int y,
35 	     vector unsigned int z)
36 {
37   return vec_rlnm (x, y, z);
38 }
39 
40 vector unsigned long long
rlnm_test_2(vector unsigned long long x,vector unsigned long long y,vector unsigned long long z)41 rlnm_test_2 (vector unsigned long long x, vector unsigned long long y,
42 	     vector unsigned long long z)
43 {
44   return vec_rlnm (x, y, z);
45 }
46 
47 /* Expected code generation for rlmi_test_1 is vrlwmi.
48    Expected code generation for rlmi_test_2 is vrldmi.
49    Expected code generation for vrlnm_test_1 is vrlwnm.
50    Expected code generation for vrlnm_test_2 is vrldnm.
51    Expected code generation for the others is more complex, because
52    the second and third arguments are combined by a shift and OR,
53    and because there is no splat-immediate doubleword.
54     - For rlnm_test_1: vspltisw, vslw, xxlor, vrlwnm.
55     - For rlnm_test_2: xxspltib, vextsb2d, vsld, xxlor, vrldnm.
56    There is a choice of splat instructions in both cases, so we
57    just check for "splt".  */
58 
59 /* { dg-final { scan-assembler-times "vrlwmi" 1 } } */
60 /* { dg-final { scan-assembler-times "vrldmi" 1 } } */
61 /* { dg-final { scan-assembler-times "splt" 2 } } */
62 /* { dg-final { scan-assembler-times "vextsb2d" 1 } } */
63 /* { dg-final { scan-assembler-times "vslw" 1 } } */
64 /* { dg-final { scan-assembler-times "vsld" 1 } } */
65 /* { dg-final { scan-assembler-times "xxlor" 5 } } */
66 /* { dg-final { scan-assembler-times "vrlwnm" 2 } } */
67 /* { dg-final { scan-assembler-times "vrldnm" 2 } } */
68