1 /* 2 * This file is part of the MicroPython project, http://micropython.org/ 3 * 4 * The MIT License (MIT) 5 * 6 * Copyright (c) 2018 Glenn Ruben Bakke 7 * Copyright (c) 2018 Ayke van Laethem 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 22 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #ifndef NRFX_CONFIG_H 29 #define NRFX_CONFIG_H 30 31 #include "mpconfigport.h" 32 #include "nrf.h" 33 34 // Port specific defines 35 #ifndef NRFX_LOG_ENABLED 36 #define NRFX_LOG_ENABLED 0 37 #endif 38 39 #define NRFX_LOG_UART_DISABLED 1 40 41 42 // NRFX configurations 43 44 #if NRF51 || NRF52832 45 #define GPIO_COUNT 1 46 #elif NRF52840 || NRF52840_XXAA 47 #define GPIO_COUNT 2 48 #elif NRF9160_XXAA 49 #define GPIO_COUNT 1 50 #endif 51 52 #if defined(NRF52840) 53 // for tinyusb 54 // #define NRFX_IRQ_IS_ENABLED 1 55 #define NRFX_POWER_ENABLED 1 56 #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 2 57 #define NRFX_SYSTICK_ENABLED 1 58 #endif 59 60 #define NRFX_GPIOTE_ENABLED 1 61 #define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 62 #if NRF51 63 #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY 3 64 #else 65 #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY 6 66 #endif 67 68 #if defined(NRF51) || defined(NRF52_SERIES) 69 #define NRFX_TEMP_ENABLED 1 70 #if NRF51 71 #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 3 72 #else 73 #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7 74 #endif 75 #endif 76 77 #if defined(NRF51) || defined(NRF52_SERIES) 78 #define NRFX_UART_ENABLED 1 79 #define NRFX_UART0_ENABLED 1 80 #define NRFX_UART1_ENABLED 1 81 #else 82 #define NRFX_UARTE_ENABLED 1 83 #define NRFX_UARTE0_ENABLED 1 84 #define NRFX_UARTE1_ENABLED 1 85 #define NRFX_UARTE2_ENABLED 1 86 #define NRFX_UARTE3_ENABLED 1 87 #endif 88 89 #if defined(NRF51) || defined(NRF52_SERIES) 90 #define NRFX_TWI_ENABLED (MICROPY_PY_MACHINE_I2C) 91 #define NRFX_TWI0_ENABLED 1 92 #define NRFX_TWI1_ENABLED 1 93 #elif defined(NRF9160_XXAA) 94 #define NRFX_TWIM_ENABLED (MICROPY_PY_MACHINE_I2C) 95 #define NRFX_TWIM0_ENABLED 1 96 #define NRFX_TWIM1_ENABLED 1 97 #endif 98 99 #if defined(NRF51) || defined(NRF52832) 100 #define NRFX_SPI_ENABLED (MICROPY_PY_MACHINE_HW_SPI) 101 #define NRFX_SPI0_ENABLED 1 102 #define NRFX_SPI1_ENABLED 1 103 104 #if defined(NRF52832) 105 #define NRFX_SPI2_ENABLED 1 106 #endif 107 #elif defined(NRF52840) 108 #define NRFX_SPIM_ENABLED (MICROPY_PY_MACHINE_HW_SPI) 109 #define NRFX_SPIM0_ENABLED 1 110 #define NRFX_SPIM1_ENABLED 1 111 #define NRFX_SPIM2_ENABLED 1 112 #define NRFX_SPIM3_ENABLED (NRF52840) 113 #elif defined(NRF9160_XXAA) 114 #define NRFX_SPIM_ENABLED (MICROPY_PY_MACHINE_HW_SPI) 115 #define NRFX_SPIM0_ENABLED 1 116 #define NRFX_SPIM1_ENABLED 1 117 118 // 0 NRF_GPIO_PIN_NOPULL 119 // 1 NRF_GPIO_PIN_PULLDOWN 120 // 3 NRF_GPIO_PIN_PULLUP 121 #define NRFX_SPIM_MISO_PULL_CFG 1 122 #endif // NRF51 123 124 // 0 NRF_GPIO_PIN_NOPULL 125 // 1 NRF_GPIO_PIN_PULLDOWN 126 // 3 NRF_GPIO_PIN_PULLUP 127 #define NRFX_SPI_MISO_PULL_CFG 1 128 #define NRFX_SPIM_MISO_PULL_CFG 1 129 130 #define NRFX_RTC_ENABLED (MICROPY_PY_MACHINE_RTCOUNTER) 131 #define NRFX_RTC0_ENABLED 1 132 #define NRFX_RTC1_ENABLED 1 133 #define NRFX_RTC2_ENABLED (!NRF51) && (!NRF9160_XXAA) 134 135 #define NRFX_TIMER_ENABLED (MICROPY_PY_MACHINE_TIMER) 136 #define NRFX_TIMER0_ENABLED 1 137 #define NRFX_TIMER1_ENABLED (!MICROPY_PY_MACHINE_SOFT_PWM) 138 #define NRFX_TIMER2_ENABLED 1 139 #define NRFX_TIMER3_ENABLED (!NRF51) && (!NRF9160_XXAA) 140 #define NRFX_TIMER4_ENABLED (!NRF51) && (!NRF9160_XXAA) 141 142 143 #define NRFX_PWM_ENABLED (!NRF51) && MICROPY_PY_MACHINE_HW_PWM 144 #define NRFX_PWM0_ENABLED 1 145 #define NRFX_PWM1_ENABLED 1 146 #define NRFX_PWM2_ENABLED 1 147 #define NRFX_PWM3_ENABLED (NRF52840) 148 149 #define NRFX_NVMC_ENABLED 1 150 151 // Peripheral Resource Sharing 152 #if defined(NRF51) || defined(NRF52832) 153 #define NRFX_PRS_BOX_0_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI0_ENABLED && NRFX_SPI_ENABLED && NRFX_SPI0_ENABLED) 154 #define NRFX_PRS_BOX_1_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI1_ENABLED && NRFX_SPI_ENABLED && NRFX_SPI1_ENABLED) 155 156 #if defined(NRF52832) 157 #define NRFX_PRS_BOX_2_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI1_ENABLED && NRFX_SPI_ENABLED && NRFX_SPI1_ENABLED) 158 #endif 159 #elif defined(NRF52840) 160 #define NRFX_PRS_BOX_0_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI0_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM0_ENABLED) 161 #define NRFX_PRS_BOX_1_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI1_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM1_ENABLED) 162 #define NRFX_PRS_BOX_2_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI2_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM2_ENABLED) 163 #elif defined(NRF9160_XXAA) 164 #define NRFX_PRS_BOX_0_ENABLED (NRFX_TWIM_ENABLED && NRFX_TWIM0_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM0_ENABLED) 165 #define NRFX_PRS_BOX_1_ENABLED (NRFX_TWIM_ENABLED && NRFX_TWIM1_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM1_ENABLED) 166 #define NRFX_PRS_BOX_2_ENABLED (NRFX_TWIM_ENABLED && NRFX_TWIM2_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM2_ENABLED) 167 #endif 168 169 #define NRFX_PRS_ENABLED (NRFX_PRS_BOX_0_ENABLED || NRFX_PRS_BOX_1_ENABLED || NRFX_PRS_BOX_2_ENABLED) 170 171 #define NRFX_SAADC_ENABLED !(NRF51) && (MICROPY_PY_MACHINE_ADC) 172 #define NRFX_ADC_ENABLED (NRF51) && (MICROPY_PY_MACHINE_ADC) 173 174 #if defined(NRF9160_XXAA) 175 176 #define NRF_CLOCK NRF_CLOCK_NS 177 #define NRF_DPPIC NRF_DPPIC_NS 178 #define NRF_EGU0 NRF_EGU0_NS 179 #define NRF_EGU1 NRF_EGU1_NS 180 #define NRF_EGU2 NRF_EGU2_NS 181 #define NRF_EGU3 NRF_EGU3_NS 182 #define NRF_EGU4 NRF_EGU4_NS 183 #define NRF_EGU5 NRF_EGU5_NS 184 #define NRF_FPU NRF_FPU_NS 185 #define NRF_P0 NRF_P0_NS 186 #define NRF_I2S NRF_I2S_NS 187 #define NRF_KMU NRF_KMU_NS 188 #define NRF_NVMC NRF_NVMC_NS 189 #define NRF_PDM NRF_PDM_NS 190 #define NRF_POWER NRF_POWER_NS 191 #define NRF_PWM0 NRF_PWM0_NS 192 #define NRF_PWM1 NRF_PWM1_NS 193 #define NRF_PWM2 NRF_PWM2_NS 194 #define NRF_PWM3 NRF_PWM3_NS 195 #define NRF_REGULATORS NRF_REGULATORS_NS 196 #define NRF_RTC0 NRF_RTC0_NS 197 #define NRF_RTC1 NRF_RTC1_NS 198 #define NRF_SAADC NRF_SAADC_NS 199 #define NRF_SPIM0 NRF_SPIM0_NS 200 #define NRF_SPIM1 NRF_SPIM1_NS 201 #define NRF_SPIM2 NRF_SPIM2_NS 202 #define NRF_SPIM3 NRF_SPIM3_NS 203 #define NRF_SPIS0 NRF_SPIS0_NS 204 #define NRF_SPIS1 NRF_SPIS1_NS 205 #define NRF_SPIS2 NRF_SPIS2_NS 206 #define NRF_SPIS3 NRF_SPIS3_NS 207 #define NRF_TIMER0 NRF_TIMER0_NS 208 #define NRF_TIMER1 NRF_TIMER1_NS 209 #define NRF_TIMER2 NRF_TIMER2_NS 210 #define NRF_TWIM0 NRF_TWIM0_NS 211 #define NRF_TWIM1 NRF_TWIM1_NS 212 #define NRF_TWIM2 NRF_TWIM2_NS 213 #define NRF_TWIM3 NRF_TWIM3_NS 214 #define NRF_TWIS0 NRF_TWIS0_NS 215 #define NRF_TWIS1 NRF_TWIS1_NS 216 #define NRF_TWIS2 NRF_TWIS2_NS 217 #define NRF_TWIS3 NRF_TWIS3_NS 218 #define NRF_UARTE0 NRF_UARTE0_NS 219 #define NRF_UARTE1 NRF_UARTE1_NS 220 #define NRF_UARTE2 NRF_UARTE2_NS 221 #define NRF_UARTE3 NRF_UARTE3_NS 222 #define NRF_VMC NRF_VMC_NS 223 #define NRF_WDT NRF_WDT_NS 224 #define NRF_IPC NRF_IPC_NS 225 226 #define NRF_CRYPTOCELL NRF_CRYPTOCELL_S 227 #define NRF_FICR NRF_FICR_S 228 #define NRF_GPIOTE0 NRF_GPIOTE0_S 229 #define NRF_GPIOTE1 NRF_GPIOTE1_NS 230 #define NRF_SPU NRF_SPU_S 231 #define NRF_UICR NRF_UICR_S 232 233 #define NRF_GPIOTE NRF_GPIOTE1_NS 234 #define GPIOTE_IRQn GPIOTE1_IRQn 235 #define GPIOTE_IRQHandler GPIOTE1_IRQHandler 236 237 #endif 238 239 #endif // NRFX_CONFIG_H 240