1 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s
2 // RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
3 // RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
4 
5 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
6 // RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
7 // RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
8 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
9 // expected-no-diagnostics
10 // REQUIRES: x86-registered-target
11 #ifndef HEADER
12 #define HEADER
13 
14 _Bool bv, bx;
15 char cv, cx;
16 unsigned char ucv, ucx;
17 short sv, sx;
18 unsigned short usv, usx;
19 int iv, ix;
20 unsigned int uiv, uix;
21 long lv, lx;
22 unsigned long ulv, ulx;
23 long long llv, llx;
24 unsigned long long ullv, ullx;
25 float fv, fx;
26 double dv, dx;
27 long double ldv, ldx;
28 _Complex int civ, cix;
29 _Complex float cfv, cfx;
30 _Complex double cdv, cdx;
31 
32 typedef int int4 __attribute__((__vector_size__(16)));
33 int4 int4x;
34 
35 struct BitFields {
36   int : 32;
37   int a : 31;
38 } bfx;
39 
40 struct BitFields_packed {
41   int : 32;
42   int a : 31;
43 } __attribute__ ((__packed__)) bfx_packed;
44 
45 struct BitFields2 {
46   int : 31;
47   int a : 1;
48 } bfx2;
49 
50 struct BitFields2_packed {
51   int : 31;
52   int a : 1;
53 } __attribute__ ((__packed__)) bfx2_packed;
54 
55 struct BitFields3 {
56   int : 11;
57   int a : 14;
58 } bfx3;
59 
60 struct BitFields3_packed {
61   int : 11;
62   int a : 14;
63 } __attribute__ ((__packed__)) bfx3_packed;
64 
65 struct BitFields4 {
66   short : 16;
67   int a: 1;
68   long b : 7;
69 } bfx4;
70 
71 struct BitFields4_packed {
72   short : 16;
73   int a: 1;
74   long b : 7;
75 } __attribute__ ((__packed__)) bfx4_packed;
76 
77 typedef float float2 __attribute__((ext_vector_type(2)));
78 float2 float2x;
79 
80 // Register "0" is currently an invalid register for global register variables.
81 // Use "esp" instead of "0".
82 // register int rix __asm__("0");
83 register int rix __asm__("esp");
84 
85 // CHECK-LABEL: @main(
main()86 int main() {
87 // CHECK: load atomic i8, i8* {{.*}} monotonic, align 1
88 // CHECK: store i8
89 #pragma omp atomic read
90   bv = bx;
91 // CHECK: load atomic i8, i8* {{.*}} monotonic, align 1
92 // CHECK: store i8
93 #pragma omp atomic read
94   cv = cx;
95 // CHECK: load atomic i8, i8* {{.*}} monotonic, align 1
96 // CHECK: store i8
97 #pragma omp atomic read
98   ucv = ucx;
99 // CHECK: load atomic i16, i16* {{.*}} monotonic, align 2
100 // CHECK: store i16
101 #pragma omp atomic read
102   sv = sx;
103 // CHECK: load atomic i16, i16* {{.*}} monotonic, align 2
104 // CHECK: store i16
105 #pragma omp atomic read
106   usv = usx;
107 // CHECK: load atomic i32, i32* {{.*}} monotonic, align 4
108 // CHECK: store i32
109 #pragma omp atomic read
110   iv = ix;
111 // CHECK: load atomic i32, i32* {{.*}} monotonic, align 4
112 // CHECK: store i32
113 #pragma omp atomic read
114   uiv = uix;
115 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
116 // CHECK: store i64
117 #pragma omp atomic read
118   lv = lx;
119 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
120 // CHECK: store i64
121 #pragma omp atomic read
122   ulv = ulx;
123 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
124 // CHECK: store i64
125 #pragma omp atomic read
126   llv = llx;
127 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
128 // CHECK: store i64
129 #pragma omp atomic read
130   ullv = ullx;
131 // CHECK: load atomic i32, i32* bitcast (float* {{.*}} monotonic, align 4
132 // CHECK: bitcast i32 {{.*}} to float
133 // CHECK: store float
134 #pragma omp atomic read
135   fv = fx;
136 // CHECK: load atomic i64, i64* bitcast (double* {{.*}} monotonic, align 8
137 // CHECK: bitcast i64 {{.*}} to double
138 // CHECK: store double
139 #pragma omp atomic read
140   dv = dx;
141 // CHECK: [[LD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* {{.*}} monotonic, align 16
142 // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[LDTEMP:%.*]] to i128*
143 // CHECK: store i128 [[LD]], i128* [[BITCAST]]
144 // CHECK: [[LD:%.+]] = load x86_fp80, x86_fp80* [[LDTEMP]]
145 // CHECK: store x86_fp80 [[LD]]
146 #pragma omp atomic read
147   ldv = ldx;
148 // CHECK: call{{.*}} void @__atomic_load(i64 8,
149 // CHECK: store i32
150 // CHECK: store i32
151 #pragma omp atomic read
152   civ = cix;
153 // CHECK: call{{.*}} void @__atomic_load(i64 8,
154 // CHECK: store float
155 // CHECK: store float
156 #pragma omp atomic read
157   cfv = cfx;
158 // CHECK: call{{.*}} void @__atomic_load(i64 16,
159 // CHECK: call{{.*}} @__kmpc_flush(
160 // CHECK: store double
161 // CHECK: store double
162 #pragma omp atomic seq_cst read
163   cdv = cdx;
164 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
165 // CHECK: store i8
166 #pragma omp atomic read
167   bv = ulx;
168 // CHECK: load atomic i8, i8* {{.*}} monotonic, align 1
169 // CHECK: store i8
170 #pragma omp atomic read
171   cv = bx;
172 // CHECK: load atomic i8, i8* {{.*}} seq_cst, align 1
173 // CHECK: call{{.*}} @__kmpc_flush(
174 // CHECK: store i8
175 #pragma omp atomic read seq_cst
176   ucv = cx;
177 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
178 // CHECK: store i16
179 #pragma omp atomic read
180   sv = ulx;
181 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
182 // CHECK: store i16
183 #pragma omp atomic read
184   usv = lx;
185 // CHECK: load atomic i32, i32* {{.*}} seq_cst, align 4
186 // CHECK: call{{.*}} @__kmpc_flush(
187 // CHECK: store i32
188 #pragma omp atomic seq_cst, read
189   iv = uix;
190 // CHECK: load atomic i32, i32* {{.*}} monotonic, align 4
191 // CHECK: store i32
192 #pragma omp atomic read
193   uiv = ix;
194 // CHECK: call{{.*}} void @__atomic_load(i64 8,
195 // CHECK: store i64
196 #pragma omp atomic read
197   lv = cix;
198 // CHECK: load atomic i32, i32* {{.*}} monotonic, align 4
199 // CHECK: store i64
200 #pragma omp atomic read
201   ulv = fx;
202 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
203 // CHECK: store i64
204 #pragma omp atomic read
205   llv = dx;
206 // CHECK: load atomic i128, i128* {{.*}} monotonic, align 16
207 // CHECK: store i64
208 #pragma omp atomic read
209   ullv = ldx;
210 // CHECK: call{{.*}} void @__atomic_load(i64 8,
211 // CHECK: store float
212 #pragma omp atomic read
213   fv = cix;
214 // CHECK: load atomic i16, i16* {{.*}} monotonic, align 2
215 // CHECK: store double
216 #pragma omp atomic read
217   dv = sx;
218 // CHECK: load atomic i8, i8* {{.*}} monotonic, align 1
219 // CHECK: store x86_fp80
220 #pragma omp atomic read
221   ldv = bx;
222 // CHECK: load atomic i8, i8* {{.*}} monotonic, align 1
223 // CHECK: store i32
224 // CHECK: store i32
225 #pragma omp atomic read
226   civ = bx;
227 // CHECK: load atomic i16, i16* {{.*}} monotonic, align 2
228 // CHECK: store float
229 // CHECK: store float
230 #pragma omp atomic read
231   cfv = usx;
232 // CHECK: load atomic i64, i64* {{.*}} monotonic, align 8
233 // CHECK: store double
234 // CHECK: store double
235 #pragma omp atomic read
236   cdv = llx;
237 // CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* @{{.+}} to i128*) monotonic, align 16
238 // CHECK: [[I128PTR:%.+]] = bitcast <4 x i32>* [[LDTEMP:%.+]] to i128*
239 // CHECK: store i128 [[I128VAL]], i128* [[I128PTR]]
240 // CHECK: [[LD:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]]
241 // CHECK: extractelement <4 x i32> [[LD]]
242 // CHECK: store i8
243 #pragma omp atomic read
244   bv = int4x[0];
245 // CHECK: [[LD:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%{{.+}}* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4
246 // CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]]
247 // CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]]
248 // CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1
249 // CHECK: ashr i32 [[SHL]], 1
250 // CHECK: store x86_fp80
251 #pragma omp atomic read
252   ldv = bfx.a;
253 // CHECK: [[LDTEMP_VOID_PTR:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8*
254 // CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @bfx_packed to i8*), i64 4), i8* [[LDTEMP_VOID_PTR]], i32 0)
255 // CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]]
256 // CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1
257 // CHECK: ashr i32 [[SHL]], 1
258 // CHECK: store x86_fp80
259 #pragma omp atomic read
260   ldv = bfx_packed.a;
261 // CHECK: [[LD:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @bfx2, i32 0, i32 0) monotonic, align 4
262 // CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]]
263 // CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]]
264 // CHECK: ashr i32 [[LD]], 31
265 // CHECK: store x86_fp80
266 #pragma omp atomic read
267   ldv = bfx2.a;
268 // CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @bfx2_packed to i8*), i64 3) monotonic, align 1
269 // CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]]
270 // CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]]
271 // CHECK: ashr i8 [[LD]], 7
272 // CHECK: store x86_fp80
273 #pragma omp atomic read
274   ldv = bfx2_packed.a;
275 // CHECK: [[LD:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @bfx3, i32 0, i32 0) monotonic, align 4
276 // CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]]
277 // CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]]
278 // CHECK: [[SHL:%.+]] = shl i32 [[LD]], 7
279 // CHECK: ashr i32 [[SHL]], 18
280 // CHECK: store x86_fp80
281 #pragma omp atomic read
282   ldv = bfx3.a;
283 // CHECK: [[LDTEMP_VOID_PTR:%.+]] = bitcast i24* [[LDTEMP:%.+]] to i8*
284 // CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @bfx3_packed to i8*), i64 1), i8* [[LDTEMP_VOID_PTR]], i32 0)
285 // CHECK: [[LD:%.+]] = load i24, i24* [[LDTEMP]]
286 // CHECK: [[SHL:%.+]] = shl i24 [[LD]], 7
287 // CHECK: [[ASHR:%.+]] = ashr i24 [[SHL]], 10
288 // CHECK: sext i24 [[ASHR]] to i32
289 // CHECK: store x86_fp80
290 #pragma omp atomic read
291   ldv = bfx3_packed.a;
292 // CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @bfx4 to i64*) monotonic, align 8
293 // CHECK: store i64 [[LD]], i64* [[LDTEMP:%.+]]
294 // CHECK: [[LD:%.+]] = load i64, i64* [[LDTEMP]]
295 // CHECK: [[SHL:%.+]] = shl i64 [[LD]], 47
296 // CHECK: [[ASHR:%.+]] = ashr i64 [[SHL]], 63
297 // CHECK: trunc i64 [[ASHR]] to i32
298 // CHECK: store x86_fp80
299 #pragma omp atomic read
300   ldv = bfx4.a;
301 // CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @bfx4_packed, i32 0, i32 0, i64 2) monotonic, align 1
302 // CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]]
303 // CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]]
304 // CHECK: [[SHL:%.+]] = shl i8 [[LD]], 7
305 // CHECK: [[ASHR:%.+]] = ashr i8 [[SHL]], 7
306 // CHECK: sext i8 [[ASHR]] to i32
307 // CHECK: store x86_fp80
308 #pragma omp atomic relaxed read
309   ldv = bfx4_packed.a;
310 // CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @bfx4 to i64*) monotonic, align 8
311 // CHECK: store i64 [[LD]], i64* [[LDTEMP:%.+]]
312 // CHECK: [[LD:%.+]] = load i64, i64* [[LDTEMP]]
313 // CHECK: [[SHL:%.+]] = shl i64 [[LD]], 40
314 // CHECK: [[ASHR:%.+]] = ashr i64 [[SHL]], 57
315 // CHECK: store x86_fp80
316 #pragma omp atomic read relaxed
317   ldv = bfx4.b;
318 // CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @bfx4_packed, i32 0, i32 0, i64 2) acquire, align 1
319 // CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]]
320 // CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]]
321 // CHECK: [[ASHR:%.+]] = ashr i8 [[LD]], 1
322 // CHECK: sext i8 [[ASHR]] to i64
323 // CHECK: call{{.*}} @__kmpc_flush(
324 // CHECK: store x86_fp80
325 #pragma omp atomic read acquire
326   ldv = bfx4_packed.b;
327 // CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (<2 x float>* @{{.+}} to i64*) monotonic, align 8
328 // CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP:%.+]] to i64*
329 // CHECK: store i64 [[LD]], i64* [[BITCAST]]
330 // CHECK: [[LD:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]]
331 // CHECK: extractelement <2 x float> [[LD]]
332 // CHECK: store i64
333 #pragma omp atomic read
334   ulv = float2x.x;
335 // CHECK: call{{.*}} i{{[0-9]+}} @llvm.read_register
336 // CHECK: call{{.*}} @__kmpc_flush(
337 // CHECK: store double
338 #pragma omp atomic read seq_cst
339   dv = rix;
340   return 0;
341 }
342 
343 #endif
344