1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
13
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X];
25 float b;
fooSS26 int foo(void) {
27
28 #pragma omp target teams distribute
29 for(int i = 0; i < X; i++) {
30 a[i] = (T)0;
31 }
32 #pragma omp target teams distribute dist_schedule(static)
33 for(int i = 0; i < X; i++) {
34 a[i] = (T)0;
35 }
36 #pragma omp target teams distribute dist_schedule(static, X/2)
37 for(int i = 0; i < X; i++) {
38 a[i] = (T)0;
39 }
40
41
42
43
44
45
46 return a[0];
47 }
48 };
49
teams_template_struct(void)50 int teams_template_struct(void) {
51 SS<int, 123, 456> V;
52 return V.foo();
53
54 }
55 #endif // CK1
56
57 // Test host codegen.
58 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
60 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
61 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
62 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
63 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
64
65 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
67 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
68 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
69 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
70 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
71 #ifdef CK2
72
73 template <typename T, int n>
tmain(T argc)74 int tmain(T argc) {
75 T a[n];
76 #pragma omp target teams distribute
77 for(int i = 0; i < n; i++) {
78 a[i] = (T)0;
79 }
80 #pragma omp target teams distribute dist_schedule(static)
81 for(int i = 0; i < n; i++) {
82 a[i] = (T)0;
83 }
84 #pragma omp target teams distribute dist_schedule(static, n)
85 for(int i = 0; i < n; i++) {
86 a[i] = (T)0;
87 }
88 return 0;
89 }
90
main(int argc,char ** argv)91 int main (int argc, char **argv) {
92 int n = 100;
93 int a[n];
94 #pragma omp target teams distribute
95 for(int i = 0; i < n; i++) {
96 a[i] = 0;
97 }
98 #pragma omp target teams distribute dist_schedule(static)
99 for(int i = 0; i < n; i++) {
100 a[i] = 0;
101 }
102 #pragma omp target teams distribute dist_schedule(static, n)
103 for(int i = 0; i < n; i++) {
104 a[i] = 0;
105 }
106 return tmain<int, 10>(argc);
107 }
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123 #endif // CK2
124 #endif // #ifndef HEADER
125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
127 // CHECK1-NEXT: entry:
128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
129 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
130 // CHECK1-NEXT: ret i32 [[CALL]]
131 //
132 //
133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
134 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
135 // CHECK1-NEXT: entry:
136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
141 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
142 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
143 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
144 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
145 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
146 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
147 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
148 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
150 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
151 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
153 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
154 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
155 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
156 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
157 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
158 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
159 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
160 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
161 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
162 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
163 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
164 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
165 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
166 // CHECK1: omp_offload.failed:
167 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
168 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
169 // CHECK1: omp_offload.cont:
170 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
171 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
172 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
173 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
174 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
175 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
176 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
177 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
178 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8
179 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
180 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
181 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
182 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
183 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
184 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
185 // CHECK1: omp_offload.failed7:
186 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]]
187 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]
188 // CHECK1: omp_offload.cont8:
189 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
190 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
191 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
192 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
193 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
194 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
195 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
196 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
197 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8
198 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
199 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
200 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
201 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
202 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
203 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
204 // CHECK1: omp_offload.failed14:
205 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]]
206 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]]
207 // CHECK1: omp_offload.cont15:
208 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
209 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0
210 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
211 // CHECK1-NEXT: ret i32 [[TMP27]]
212 //
213 //
214 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
215 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
216 // CHECK1-NEXT: entry:
217 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
218 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
219 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
220 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
221 // CHECK1-NEXT: ret void
222 //
223 //
224 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
225 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
226 // CHECK1-NEXT: entry:
227 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
228 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
230 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
231 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
232 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
233 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
234 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
235 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
236 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
237 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
238 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
239 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
240 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
241 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
242 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
243 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
244 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
245 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
246 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
247 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
248 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
249 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
250 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
251 // CHECK1: cond.true:
252 // CHECK1-NEXT: br label [[COND_END:%.*]]
253 // CHECK1: cond.false:
254 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
255 // CHECK1-NEXT: br label [[COND_END]]
256 // CHECK1: cond.end:
257 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
258 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
259 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
260 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
261 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
262 // CHECK1: omp.inner.for.cond:
263 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
264 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
265 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
266 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
267 // CHECK1: omp.inner.for.body:
268 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
269 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
270 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
271 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
272 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
273 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
274 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
275 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
276 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
277 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
278 // CHECK1: omp.body.continue:
279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
280 // CHECK1: omp.inner.for.inc:
281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
282 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
283 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
284 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
285 // CHECK1: omp.inner.for.end:
286 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
287 // CHECK1: omp.loop.exit:
288 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
289 // CHECK1-NEXT: ret void
290 //
291 //
292 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
293 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
294 // CHECK1-NEXT: entry:
295 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
296 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
297 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
298 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
299 // CHECK1-NEXT: ret void
300 //
301 //
302 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
303 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
304 // CHECK1-NEXT: entry:
305 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
306 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
307 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
308 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
309 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
310 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
311 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
312 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
313 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
314 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
315 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
316 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
317 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
318 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
319 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
320 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
321 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
322 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
323 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
324 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
325 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
326 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
327 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
328 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
329 // CHECK1: cond.true:
330 // CHECK1-NEXT: br label [[COND_END:%.*]]
331 // CHECK1: cond.false:
332 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
333 // CHECK1-NEXT: br label [[COND_END]]
334 // CHECK1: cond.end:
335 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
336 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
337 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
338 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
339 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
340 // CHECK1: omp.inner.for.cond:
341 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
342 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
343 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
344 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
345 // CHECK1: omp.inner.for.body:
346 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
347 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
348 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
349 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
350 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
351 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
352 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
353 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
354 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
355 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
356 // CHECK1: omp.body.continue:
357 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
358 // CHECK1: omp.inner.for.inc:
359 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
360 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
361 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
362 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
363 // CHECK1: omp.inner.for.end:
364 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
365 // CHECK1: omp.loop.exit:
366 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
367 // CHECK1-NEXT: ret void
368 //
369 //
370 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
371 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
372 // CHECK1-NEXT: entry:
373 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
374 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
375 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
376 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
377 // CHECK1-NEXT: ret void
378 //
379 //
380 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
381 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
382 // CHECK1-NEXT: entry:
383 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
384 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
385 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
386 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
387 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
388 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
389 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
390 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
391 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
392 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
393 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
394 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
395 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
396 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
397 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
398 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
399 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
400 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
401 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
402 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
403 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
404 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
405 // CHECK1: omp.dispatch.cond:
406 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
407 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
408 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
409 // CHECK1: cond.true:
410 // CHECK1-NEXT: br label [[COND_END:%.*]]
411 // CHECK1: cond.false:
412 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
413 // CHECK1-NEXT: br label [[COND_END]]
414 // CHECK1: cond.end:
415 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
416 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
417 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
418 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
419 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
420 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
421 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
422 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
423 // CHECK1: omp.dispatch.body:
424 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
425 // CHECK1: omp.inner.for.cond:
426 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
427 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
428 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
429 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
430 // CHECK1: omp.inner.for.body:
431 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
432 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
433 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
434 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
435 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
436 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
437 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
438 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
439 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8
440 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
441 // CHECK1: omp.body.continue:
442 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
443 // CHECK1: omp.inner.for.inc:
444 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
445 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
446 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
447 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
448 // CHECK1: omp.inner.for.end:
449 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
450 // CHECK1: omp.dispatch.inc:
451 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
452 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
453 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
454 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
455 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
456 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
457 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
458 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
459 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
460 // CHECK1: omp.dispatch.end:
461 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
462 // CHECK1-NEXT: ret void
463 //
464 //
465 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
466 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
467 // CHECK1-NEXT: entry:
468 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
469 // CHECK1-NEXT: ret void
470 //
471 //
472 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
473 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
474 // CHECK2-NEXT: entry:
475 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
476 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
477 // CHECK2-NEXT: ret i32 [[CALL]]
478 //
479 //
480 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
481 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
482 // CHECK2-NEXT: entry:
483 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
484 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
485 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
486 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
487 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
488 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
489 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
490 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
491 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
492 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
493 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
494 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
495 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
496 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
497 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
498 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
499 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
500 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
501 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
502 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
503 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
504 // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
505 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
506 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8
507 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
508 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
509 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
510 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
511 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
512 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
513 // CHECK2: omp_offload.failed:
514 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
515 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
516 // CHECK2: omp_offload.cont:
517 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
518 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
519 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
520 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
521 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
522 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
523 // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
524 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
525 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8
526 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
527 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
528 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
529 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
530 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
531 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
532 // CHECK2: omp_offload.failed7:
533 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]]
534 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]]
535 // CHECK2: omp_offload.cont8:
536 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
537 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
538 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
539 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
540 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
541 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
542 // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
543 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
544 // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8
545 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
546 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
547 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
548 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
549 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
550 // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
551 // CHECK2: omp_offload.failed14:
552 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]]
553 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]]
554 // CHECK2: omp_offload.cont15:
555 // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
556 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0
557 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
558 // CHECK2-NEXT: ret i32 [[TMP27]]
559 //
560 //
561 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
562 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
563 // CHECK2-NEXT: entry:
564 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
565 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
566 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
567 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
568 // CHECK2-NEXT: ret void
569 //
570 //
571 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
572 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
573 // CHECK2-NEXT: entry:
574 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
575 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
576 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
577 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
578 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
579 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
580 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
581 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
582 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
583 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
584 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
585 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
586 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
587 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
588 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
589 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
590 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
591 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
592 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
593 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
594 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
595 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
596 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
597 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
598 // CHECK2: cond.true:
599 // CHECK2-NEXT: br label [[COND_END:%.*]]
600 // CHECK2: cond.false:
601 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
602 // CHECK2-NEXT: br label [[COND_END]]
603 // CHECK2: cond.end:
604 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
605 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
606 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
607 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
608 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
609 // CHECK2: omp.inner.for.cond:
610 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
611 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
612 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
613 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
614 // CHECK2: omp.inner.for.body:
615 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
616 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
617 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
618 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
619 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
620 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
621 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
622 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
623 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
624 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
625 // CHECK2: omp.body.continue:
626 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
627 // CHECK2: omp.inner.for.inc:
628 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
629 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
630 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
631 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
632 // CHECK2: omp.inner.for.end:
633 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
634 // CHECK2: omp.loop.exit:
635 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
636 // CHECK2-NEXT: ret void
637 //
638 //
639 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
640 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
641 // CHECK2-NEXT: entry:
642 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
643 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
644 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
645 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
646 // CHECK2-NEXT: ret void
647 //
648 //
649 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
650 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
651 // CHECK2-NEXT: entry:
652 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
653 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
654 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
655 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
656 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
657 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
658 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
659 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
660 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
661 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
662 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
663 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
664 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
665 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
666 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
667 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
668 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
669 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
670 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
671 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
672 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
673 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
674 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
675 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
676 // CHECK2: cond.true:
677 // CHECK2-NEXT: br label [[COND_END:%.*]]
678 // CHECK2: cond.false:
679 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
680 // CHECK2-NEXT: br label [[COND_END]]
681 // CHECK2: cond.end:
682 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
683 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
684 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
685 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
686 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
687 // CHECK2: omp.inner.for.cond:
688 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
689 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
690 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
691 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
692 // CHECK2: omp.inner.for.body:
693 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
694 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
695 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
696 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
697 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
698 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
699 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
700 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
701 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
702 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
703 // CHECK2: omp.body.continue:
704 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
705 // CHECK2: omp.inner.for.inc:
706 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
707 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
708 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
709 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
710 // CHECK2: omp.inner.for.end:
711 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
712 // CHECK2: omp.loop.exit:
713 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
714 // CHECK2-NEXT: ret void
715 //
716 //
717 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
718 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
719 // CHECK2-NEXT: entry:
720 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
721 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
722 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
723 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
724 // CHECK2-NEXT: ret void
725 //
726 //
727 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
728 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
729 // CHECK2-NEXT: entry:
730 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
731 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
732 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
733 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
734 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
735 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
736 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
737 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
738 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
739 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
740 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
741 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
742 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
743 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
744 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
745 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
746 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
747 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
748 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
749 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
750 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
751 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
752 // CHECK2: omp.dispatch.cond:
753 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
754 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
755 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
756 // CHECK2: cond.true:
757 // CHECK2-NEXT: br label [[COND_END:%.*]]
758 // CHECK2: cond.false:
759 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
760 // CHECK2-NEXT: br label [[COND_END]]
761 // CHECK2: cond.end:
762 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
763 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
764 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
765 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
766 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
767 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
768 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
769 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
770 // CHECK2: omp.dispatch.body:
771 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
772 // CHECK2: omp.inner.for.cond:
773 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
774 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
775 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
776 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
777 // CHECK2: omp.inner.for.body:
778 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
779 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
780 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
781 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
782 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
783 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
784 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
785 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
786 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8
787 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
788 // CHECK2: omp.body.continue:
789 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
790 // CHECK2: omp.inner.for.inc:
791 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
792 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
793 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
794 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
795 // CHECK2: omp.inner.for.end:
796 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
797 // CHECK2: omp.dispatch.inc:
798 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
799 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
800 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
801 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
802 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
803 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
804 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
805 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
806 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
807 // CHECK2: omp.dispatch.end:
808 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
809 // CHECK2-NEXT: ret void
810 //
811 //
812 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
813 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
814 // CHECK2-NEXT: entry:
815 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
816 // CHECK2-NEXT: ret void
817 //
818 //
819 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
820 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
821 // CHECK3-NEXT: entry:
822 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
823 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
824 // CHECK3-NEXT: ret i32 [[CALL]]
825 //
826 //
827 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
828 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
829 // CHECK3-NEXT: entry:
830 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
831 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
832 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
833 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
834 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
835 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
836 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
837 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
838 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
839 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
840 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
841 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
842 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
843 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
844 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
845 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
846 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
847 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
848 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
849 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
850 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
851 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
852 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
853 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
854 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
855 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
856 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
857 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
858 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
859 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
860 // CHECK3: omp_offload.failed:
861 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
862 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
863 // CHECK3: omp_offload.cont:
864 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
865 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
866 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
867 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
868 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
869 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
870 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
871 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
872 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4
873 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
874 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
875 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
876 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
877 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
878 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
879 // CHECK3: omp_offload.failed7:
880 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]]
881 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]]
882 // CHECK3: omp_offload.cont8:
883 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
884 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
885 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
886 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
887 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
888 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
889 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
890 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
891 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4
892 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
893 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
894 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
895 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
896 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
897 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
898 // CHECK3: omp_offload.failed14:
899 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]]
900 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]]
901 // CHECK3: omp_offload.cont15:
902 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
903 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0
904 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
905 // CHECK3-NEXT: ret i32 [[TMP27]]
906 //
907 //
908 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
909 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
910 // CHECK3-NEXT: entry:
911 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
912 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
913 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
914 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
915 // CHECK3-NEXT: ret void
916 //
917 //
918 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
919 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
920 // CHECK3-NEXT: entry:
921 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
922 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
923 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
924 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
925 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
926 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
927 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
928 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
929 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
930 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
931 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
932 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
933 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
934 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
935 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
936 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
937 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
938 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
939 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
940 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
941 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
942 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
943 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
944 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
945 // CHECK3: cond.true:
946 // CHECK3-NEXT: br label [[COND_END:%.*]]
947 // CHECK3: cond.false:
948 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
949 // CHECK3-NEXT: br label [[COND_END]]
950 // CHECK3: cond.end:
951 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
952 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
953 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
954 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
955 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
956 // CHECK3: omp.inner.for.cond:
957 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
958 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
959 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
960 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
961 // CHECK3: omp.inner.for.body:
962 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
963 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
964 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
965 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
966 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
967 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
968 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
969 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
970 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
971 // CHECK3: omp.body.continue:
972 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
973 // CHECK3: omp.inner.for.inc:
974 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
975 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
976 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
977 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
978 // CHECK3: omp.inner.for.end:
979 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
980 // CHECK3: omp.loop.exit:
981 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
982 // CHECK3-NEXT: ret void
983 //
984 //
985 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
986 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
987 // CHECK3-NEXT: entry:
988 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
989 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
990 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
991 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
992 // CHECK3-NEXT: ret void
993 //
994 //
995 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
996 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
997 // CHECK3-NEXT: entry:
998 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
999 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1000 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1001 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1002 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1003 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1004 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1005 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1006 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1007 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1008 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1009 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1010 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1011 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1012 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1013 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1014 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1015 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1016 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1017 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1018 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1019 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1020 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1021 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1022 // CHECK3: cond.true:
1023 // CHECK3-NEXT: br label [[COND_END:%.*]]
1024 // CHECK3: cond.false:
1025 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1026 // CHECK3-NEXT: br label [[COND_END]]
1027 // CHECK3: cond.end:
1028 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1029 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1030 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1031 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1032 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1033 // CHECK3: omp.inner.for.cond:
1034 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1035 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1036 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1037 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1038 // CHECK3: omp.inner.for.body:
1039 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1040 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1041 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1042 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1043 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1044 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1045 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1046 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1047 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1048 // CHECK3: omp.body.continue:
1049 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1050 // CHECK3: omp.inner.for.inc:
1051 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1052 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1053 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1054 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1055 // CHECK3: omp.inner.for.end:
1056 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1057 // CHECK3: omp.loop.exit:
1058 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1059 // CHECK3-NEXT: ret void
1060 //
1061 //
1062 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1063 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1064 // CHECK3-NEXT: entry:
1065 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1066 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1067 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1068 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1069 // CHECK3-NEXT: ret void
1070 //
1071 //
1072 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1073 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1074 // CHECK3-NEXT: entry:
1075 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1076 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1077 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1078 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1079 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1080 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1081 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1082 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1083 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1084 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1085 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1086 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1087 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1088 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1089 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1090 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1091 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1092 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1093 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1094 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1095 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1096 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1097 // CHECK3: omp.dispatch.cond:
1098 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1099 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1100 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1101 // CHECK3: cond.true:
1102 // CHECK3-NEXT: br label [[COND_END:%.*]]
1103 // CHECK3: cond.false:
1104 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1105 // CHECK3-NEXT: br label [[COND_END]]
1106 // CHECK3: cond.end:
1107 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1108 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1109 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1110 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1111 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1112 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1113 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1114 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1115 // CHECK3: omp.dispatch.body:
1116 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1117 // CHECK3: omp.inner.for.cond:
1118 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1119 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
1120 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1121 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1122 // CHECK3: omp.inner.for.body:
1123 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1124 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1125 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1126 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
1127 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1128 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
1129 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1130 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
1131 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1132 // CHECK3: omp.body.continue:
1133 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1134 // CHECK3: omp.inner.for.inc:
1135 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1136 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1137 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1138 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1139 // CHECK3: omp.inner.for.end:
1140 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1141 // CHECK3: omp.dispatch.inc:
1142 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1143 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1144 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1145 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1146 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1147 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1148 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1149 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1150 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
1151 // CHECK3: omp.dispatch.end:
1152 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1153 // CHECK3-NEXT: ret void
1154 //
1155 //
1156 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1157 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
1158 // CHECK3-NEXT: entry:
1159 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1160 // CHECK3-NEXT: ret void
1161 //
1162 //
1163 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1164 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1165 // CHECK4-NEXT: entry:
1166 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1167 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1168 // CHECK4-NEXT: ret i32 [[CALL]]
1169 //
1170 //
1171 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1172 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1173 // CHECK4-NEXT: entry:
1174 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1175 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1176 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1177 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1178 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1179 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1180 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1181 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1182 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
1183 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
1184 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
1185 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
1186 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
1187 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1188 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1189 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1190 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1191 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1192 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
1193 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1194 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1195 // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
1196 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1197 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4
1198 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1199 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1200 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123)
1201 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1202 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1203 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1204 // CHECK4: omp_offload.failed:
1205 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1206 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
1207 // CHECK4: omp_offload.cont:
1208 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1209 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1210 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
1211 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
1212 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1213 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
1214 // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
1215 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1216 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4
1217 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1218 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1219 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
1220 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1221 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1222 // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1223 // CHECK4: omp_offload.failed7:
1224 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]]
1225 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]]
1226 // CHECK4: omp_offload.cont8:
1227 // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1228 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1229 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1230 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
1231 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1232 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1233 // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
1234 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
1235 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4
1236 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1237 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1238 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123)
1239 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1240 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1241 // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
1242 // CHECK4: omp_offload.failed14:
1243 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]]
1244 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]]
1245 // CHECK4: omp_offload.cont15:
1246 // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1247 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0
1248 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1249 // CHECK4-NEXT: ret i32 [[TMP27]]
1250 //
1251 //
1252 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
1253 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1254 // CHECK4-NEXT: entry:
1255 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1256 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1257 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1258 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1259 // CHECK4-NEXT: ret void
1260 //
1261 //
1262 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1263 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1264 // CHECK4-NEXT: entry:
1265 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1266 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1267 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1268 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1269 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1270 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1271 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1272 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1273 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1274 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1275 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1276 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1277 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1278 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1279 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1280 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1281 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1282 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1283 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1284 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1285 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1286 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1287 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1288 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1289 // CHECK4: cond.true:
1290 // CHECK4-NEXT: br label [[COND_END:%.*]]
1291 // CHECK4: cond.false:
1292 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1293 // CHECK4-NEXT: br label [[COND_END]]
1294 // CHECK4: cond.end:
1295 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1296 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1297 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1298 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1299 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1300 // CHECK4: omp.inner.for.cond:
1301 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1302 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1303 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1304 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1305 // CHECK4: omp.inner.for.body:
1306 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1307 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1308 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1309 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1310 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1311 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1312 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1313 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1314 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1315 // CHECK4: omp.body.continue:
1316 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1317 // CHECK4: omp.inner.for.inc:
1318 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1319 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1320 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1321 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1322 // CHECK4: omp.inner.for.end:
1323 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1324 // CHECK4: omp.loop.exit:
1325 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1326 // CHECK4-NEXT: ret void
1327 //
1328 //
1329 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
1330 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1331 // CHECK4-NEXT: entry:
1332 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1333 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1334 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1335 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1336 // CHECK4-NEXT: ret void
1337 //
1338 //
1339 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1340 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1341 // CHECK4-NEXT: entry:
1342 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1343 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1344 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1345 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1346 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1347 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1348 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1349 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1350 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1351 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1352 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1353 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1354 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1355 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1356 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1357 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1358 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1359 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1360 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1361 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1362 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1363 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1364 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1365 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1366 // CHECK4: cond.true:
1367 // CHECK4-NEXT: br label [[COND_END:%.*]]
1368 // CHECK4: cond.false:
1369 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1370 // CHECK4-NEXT: br label [[COND_END]]
1371 // CHECK4: cond.end:
1372 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1373 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1374 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1375 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1376 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1377 // CHECK4: omp.inner.for.cond:
1378 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1379 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1380 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1381 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1382 // CHECK4: omp.inner.for.body:
1383 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1384 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1385 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1386 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1387 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1388 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1389 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
1390 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1391 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1392 // CHECK4: omp.body.continue:
1393 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1394 // CHECK4: omp.inner.for.inc:
1395 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1396 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1397 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1398 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1399 // CHECK4: omp.inner.for.end:
1400 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1401 // CHECK4: omp.loop.exit:
1402 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1403 // CHECK4-NEXT: ret void
1404 //
1405 //
1406 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1407 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1408 // CHECK4-NEXT: entry:
1409 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1410 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1411 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1412 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1413 // CHECK4-NEXT: ret void
1414 //
1415 //
1416 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
1417 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1418 // CHECK4-NEXT: entry:
1419 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1420 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1421 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1422 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1423 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1424 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1425 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1426 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1427 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1428 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1429 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1430 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1431 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1432 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1433 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1434 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1435 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1436 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1437 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1438 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1439 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1440 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1441 // CHECK4: omp.dispatch.cond:
1442 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1443 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1444 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1445 // CHECK4: cond.true:
1446 // CHECK4-NEXT: br label [[COND_END:%.*]]
1447 // CHECK4: cond.false:
1448 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1449 // CHECK4-NEXT: br label [[COND_END]]
1450 // CHECK4: cond.end:
1451 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1452 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1453 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1454 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1455 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1456 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1457 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1458 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1459 // CHECK4: omp.dispatch.body:
1460 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1461 // CHECK4: omp.inner.for.cond:
1462 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1463 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
1464 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1465 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1466 // CHECK4: omp.inner.for.body:
1467 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1468 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1469 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1470 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
1471 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1472 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
1473 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1474 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
1475 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1476 // CHECK4: omp.body.continue:
1477 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1478 // CHECK4: omp.inner.for.inc:
1479 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1480 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1481 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1482 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1483 // CHECK4: omp.inner.for.end:
1484 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1485 // CHECK4: omp.dispatch.inc:
1486 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1487 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1488 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1489 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1490 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1491 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1492 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1493 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1494 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
1495 // CHECK4: omp.dispatch.end:
1496 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1497 // CHECK4-NEXT: ret void
1498 //
1499 //
1500 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1501 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
1502 // CHECK4-NEXT: entry:
1503 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
1504 // CHECK4-NEXT: ret void
1505 //
1506 //
1507 // CHECK9-LABEL: define {{[^@]+}}@main
1508 // CHECK9-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1509 // CHECK9-NEXT: entry:
1510 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1511 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1512 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
1513 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
1514 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
1515 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1516 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1517 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
1518 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
1519 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
1520 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
1521 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1522 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1523 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1524 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
1525 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
1526 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
1527 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
1528 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
1529 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
1530 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
1531 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
1532 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
1533 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
1534 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1535 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
1536 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
1537 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
1538 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
1539 // CHECK9-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
1540 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
1541 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
1542 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1543 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1544 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
1545 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
1546 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1547 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
1548 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
1549 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
1550 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
1551 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
1552 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
1553 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1554 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
1555 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
1556 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
1557 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1558 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
1559 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
1560 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1561 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
1562 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
1563 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1564 // CHECK9-NEXT: store i64 4, i64* [[TMP10]], align 8
1565 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1566 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
1567 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1568 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
1569 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
1570 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1571 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1572 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
1573 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
1574 // CHECK9-NEXT: store i64 8, i64* [[TMP16]], align 8
1575 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1576 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
1577 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1578 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
1579 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
1580 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1581 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
1582 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
1583 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1584 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
1585 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1586 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
1587 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1588 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1589 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1590 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
1591 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
1592 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1593 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
1594 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1595 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1596 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1597 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1598 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
1599 // CHECK9-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
1600 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
1601 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1602 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1603 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1604 // CHECK9: omp_offload.failed:
1605 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1606 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1607 // CHECK9: omp_offload.cont:
1608 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
1609 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
1610 // CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4
1611 // CHECK9-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
1612 // CHECK9-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
1613 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1614 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
1615 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8
1616 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1617 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
1618 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8
1619 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
1620 // CHECK9-NEXT: store i64 4, i64* [[TMP40]], align 8
1621 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
1622 // CHECK9-NEXT: store i8* null, i8** [[TMP41]], align 8
1623 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
1624 // CHECK9-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
1625 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8
1626 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
1627 // CHECK9-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
1628 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8
1629 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
1630 // CHECK9-NEXT: store i64 8, i64* [[TMP46]], align 8
1631 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
1632 // CHECK9-NEXT: store i8* null, i8** [[TMP47]], align 8
1633 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
1634 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
1635 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8
1636 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
1637 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
1638 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8
1639 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
1640 // CHECK9-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8
1641 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
1642 // CHECK9-NEXT: store i8* null, i8** [[TMP53]], align 8
1643 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1644 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1645 // CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
1646 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4
1647 // CHECK9-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
1648 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
1649 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
1650 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
1651 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
1652 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
1653 // CHECK9-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
1654 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
1655 // CHECK9-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
1656 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
1657 // CHECK9-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1658 // CHECK9-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
1659 // CHECK9-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1660 // CHECK9: omp_offload.failed16:
1661 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
1662 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]]
1663 // CHECK9: omp_offload.cont17:
1664 // CHECK9-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4
1665 // CHECK9-NEXT: store i32 [[TMP63]], i32* [[DOTCAPTURE_EXPR_18]], align 4
1666 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
1667 // CHECK9-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
1668 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[CONV20]], align 4
1669 // CHECK9-NEXT: [[TMP65:%.*]] = load i64, i64* [[N_CASTED19]], align 8
1670 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
1671 // CHECK9-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
1672 // CHECK9-NEXT: store i32 [[TMP66]], i32* [[CONV21]], align 4
1673 // CHECK9-NEXT: [[TMP67:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1674 // CHECK9-NEXT: [[TMP68:%.*]] = mul nuw i64 [[TMP1]], 4
1675 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
1676 // CHECK9-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64*
1677 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP70]], align 8
1678 // CHECK9-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
1679 // CHECK9-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i64*
1680 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP72]], align 8
1681 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
1682 // CHECK9-NEXT: store i64 4, i64* [[TMP73]], align 8
1683 // CHECK9-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
1684 // CHECK9-NEXT: store i8* null, i8** [[TMP74]], align 8
1685 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
1686 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
1687 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8
1688 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
1689 // CHECK9-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
1690 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8
1691 // CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 1
1692 // CHECK9-NEXT: store i64 8, i64* [[TMP79]], align 8
1693 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
1694 // CHECK9-NEXT: store i8* null, i8** [[TMP80]], align 8
1695 // CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
1696 // CHECK9-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32**
1697 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP82]], align 8
1698 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
1699 // CHECK9-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
1700 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP84]], align 8
1701 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2
1702 // CHECK9-NEXT: store i64 [[TMP68]], i64* [[TMP85]], align 8
1703 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
1704 // CHECK9-NEXT: store i8* null, i8** [[TMP86]], align 8
1705 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
1706 // CHECK9-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
1707 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 8
1708 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
1709 // CHECK9-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i64*
1710 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8
1711 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
1712 // CHECK9-NEXT: store i64 4, i64* [[TMP91]], align 8
1713 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
1714 // CHECK9-NEXT: store i8* null, i8** [[TMP92]], align 8
1715 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
1716 // CHECK9-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
1717 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
1718 // CHECK9-NEXT: [[TMP96:%.*]] = load i32, i32* [[N]], align 4
1719 // CHECK9-NEXT: store i32 [[TMP96]], i32* [[DOTCAPTURE_EXPR_27]], align 4
1720 // CHECK9-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
1721 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP97]], 0
1722 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
1723 // CHECK9-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
1724 // CHECK9-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
1725 // CHECK9-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
1726 // CHECK9-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP98]], 1
1727 // CHECK9-NEXT: [[TMP99:%.*]] = zext i32 [[ADD32]] to i64
1728 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP99]])
1729 // CHECK9-NEXT: [[TMP100:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP93]], i8** [[TMP94]], i64* [[TMP95]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1730 // CHECK9-NEXT: [[TMP101:%.*]] = icmp ne i32 [[TMP100]], 0
1731 // CHECK9-NEXT: br i1 [[TMP101]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
1732 // CHECK9: omp_offload.failed33:
1733 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP65]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP67]]) #[[ATTR3]]
1734 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT34]]
1735 // CHECK9: omp_offload.cont34:
1736 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1737 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP102]])
1738 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1739 // CHECK9-NEXT: [[TMP103:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
1740 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP103]])
1741 // CHECK9-NEXT: [[TMP104:%.*]] = load i32, i32* [[RETVAL]], align 4
1742 // CHECK9-NEXT: ret i32 [[TMP104]]
1743 //
1744 //
1745 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
1746 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1747 // CHECK9-NEXT: entry:
1748 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1749 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1750 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1751 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1752 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1753 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1754 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1755 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1756 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1757 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1758 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
1759 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1760 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
1761 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1762 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
1763 // CHECK9-NEXT: ret void
1764 //
1765 //
1766 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1767 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1768 // CHECK9-NEXT: entry:
1769 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1770 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1771 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1772 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1773 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1774 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1775 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1776 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1777 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1778 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1779 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1780 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1781 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1782 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1783 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
1784 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1785 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1786 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1787 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1788 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1789 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1790 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1791 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1792 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
1793 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1794 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1795 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1796 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1797 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1798 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1799 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1800 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1801 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1802 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1803 // CHECK9: omp.precond.then:
1804 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1805 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1806 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1807 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1808 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1809 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1810 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1811 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1812 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1813 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1814 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1815 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1816 // CHECK9: cond.true:
1817 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1818 // CHECK9-NEXT: br label [[COND_END:%.*]]
1819 // CHECK9: cond.false:
1820 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1821 // CHECK9-NEXT: br label [[COND_END]]
1822 // CHECK9: cond.end:
1823 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1824 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1825 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1826 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1827 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1828 // CHECK9: omp.inner.for.cond:
1829 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1830 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1831 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1832 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1833 // CHECK9: omp.inner.for.body:
1834 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1835 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1836 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1837 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1838 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
1839 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1840 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
1841 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1842 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1843 // CHECK9: omp.body.continue:
1844 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1845 // CHECK9: omp.inner.for.inc:
1846 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1847 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1848 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1849 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1850 // CHECK9: omp.inner.for.end:
1851 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1852 // CHECK9: omp.loop.exit:
1853 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1854 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1855 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1856 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1857 // CHECK9: omp.precond.end:
1858 // CHECK9-NEXT: ret void
1859 //
1860 //
1861 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
1862 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1863 // CHECK9-NEXT: entry:
1864 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1865 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1866 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1867 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1868 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1869 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1870 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1871 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1872 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1873 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1874 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
1875 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1876 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
1877 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1878 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
1879 // CHECK9-NEXT: ret void
1880 //
1881 //
1882 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1883 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1884 // CHECK9-NEXT: entry:
1885 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1886 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1887 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1888 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1889 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1890 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1891 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1892 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1893 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1894 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1895 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1896 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1897 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1898 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1899 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
1900 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1901 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1902 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1903 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1904 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1905 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1906 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1907 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1908 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
1909 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1910 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1911 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1912 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1913 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1914 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1915 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1916 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1917 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1918 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1919 // CHECK9: omp.precond.then:
1920 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1921 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1922 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1923 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1924 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1925 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1926 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1927 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1928 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1929 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1930 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1931 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1932 // CHECK9: cond.true:
1933 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1934 // CHECK9-NEXT: br label [[COND_END:%.*]]
1935 // CHECK9: cond.false:
1936 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1937 // CHECK9-NEXT: br label [[COND_END]]
1938 // CHECK9: cond.end:
1939 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1940 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1941 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1942 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1943 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1944 // CHECK9: omp.inner.for.cond:
1945 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1946 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1947 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1948 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1949 // CHECK9: omp.inner.for.body:
1950 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1951 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1952 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1953 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1954 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
1955 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1956 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
1957 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1958 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1959 // CHECK9: omp.body.continue:
1960 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1961 // CHECK9: omp.inner.for.inc:
1962 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1963 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1964 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1965 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1966 // CHECK9: omp.inner.for.end:
1967 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1968 // CHECK9: omp.loop.exit:
1969 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1970 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1971 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1972 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1973 // CHECK9: omp.precond.end:
1974 // CHECK9-NEXT: ret void
1975 //
1976 //
1977 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
1978 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1979 // CHECK9-NEXT: entry:
1980 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1981 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1982 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1983 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1984 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1985 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1986 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1987 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1988 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1989 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1990 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1991 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1992 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1993 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1994 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
1995 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1996 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
1997 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1998 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
1999 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2000 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
2001 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2002 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
2003 // CHECK9-NEXT: ret void
2004 //
2005 //
2006 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2007 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2008 // CHECK9-NEXT: entry:
2009 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2010 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2011 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2012 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2013 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2014 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2015 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2016 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2017 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2018 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2019 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2020 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2021 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2022 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2023 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2024 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
2025 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2026 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2027 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2028 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2029 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2030 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2031 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2032 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2033 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2034 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2035 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2036 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2037 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2038 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2039 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2040 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
2041 // CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
2042 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
2043 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2044 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2045 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2046 // CHECK9: omp.precond.then:
2047 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2048 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2049 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2050 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2051 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2052 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
2053 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2054 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2055 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
2056 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2057 // CHECK9: omp.dispatch.cond:
2058 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2059 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2060 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2061 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2062 // CHECK9: cond.true:
2063 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2064 // CHECK9-NEXT: br label [[COND_END:%.*]]
2065 // CHECK9: cond.false:
2066 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2067 // CHECK9-NEXT: br label [[COND_END]]
2068 // CHECK9: cond.end:
2069 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2070 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2071 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2072 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2073 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2074 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2075 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2076 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2077 // CHECK9: omp.dispatch.body:
2078 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2079 // CHECK9: omp.inner.for.cond:
2080 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2081 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
2082 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2083 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2084 // CHECK9: omp.inner.for.body:
2085 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2086 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2087 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2088 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !11
2089 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !11
2090 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
2091 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
2092 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
2093 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2094 // CHECK9: omp.body.continue:
2095 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2096 // CHECK9: omp.inner.for.inc:
2097 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2098 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
2099 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2100 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2101 // CHECK9: omp.inner.for.end:
2102 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2103 // CHECK9: omp.dispatch.inc:
2104 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2105 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2106 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2107 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4
2108 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2109 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2110 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
2111 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4
2112 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
2113 // CHECK9: omp.dispatch.end:
2114 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2115 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
2116 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
2117 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
2118 // CHECK9: omp.precond.end:
2119 // CHECK9-NEXT: ret void
2120 //
2121 //
2122 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
2123 // CHECK9-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
2124 // CHECK9-NEXT: entry:
2125 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2126 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
2127 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2128 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2129 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2130 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2131 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
2132 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
2133 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
2134 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
2135 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8
2136 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8
2137 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8
2138 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
2139 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2140 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2141 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
2142 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
2143 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2144 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
2145 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
2146 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2147 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
2148 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2149 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2150 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2151 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2152 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2153 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2154 // CHECK9: omp_offload.failed:
2155 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]]
2156 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
2157 // CHECK9: omp_offload.cont:
2158 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2159 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
2160 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
2161 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2162 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
2163 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
2164 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
2165 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8
2166 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2167 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2168 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2169 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2170 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2171 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
2172 // CHECK9: omp_offload.failed5:
2173 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]]
2174 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]]
2175 // CHECK9: omp_offload.cont6:
2176 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
2177 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
2178 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
2179 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
2180 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
2181 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
2182 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
2183 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
2184 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
2185 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
2186 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
2187 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2188 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2189 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
2190 // CHECK9: omp_offload.failed11:
2191 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
2192 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]]
2193 // CHECK9: omp_offload.cont12:
2194 // CHECK9-NEXT: ret i32 0
2195 //
2196 //
2197 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
2198 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2199 // CHECK9-NEXT: entry:
2200 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2201 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2202 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2203 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2204 // CHECK9-NEXT: ret void
2205 //
2206 //
2207 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
2208 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2209 // CHECK9-NEXT: entry:
2210 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2211 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2212 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2213 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2214 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2215 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2216 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2217 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2218 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2219 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2220 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2221 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2222 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2223 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2224 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2225 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2226 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2227 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2228 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2229 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2230 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2231 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2232 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2233 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2234 // CHECK9: cond.true:
2235 // CHECK9-NEXT: br label [[COND_END:%.*]]
2236 // CHECK9: cond.false:
2237 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2238 // CHECK9-NEXT: br label [[COND_END]]
2239 // CHECK9: cond.end:
2240 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2241 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2242 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2243 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2244 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2245 // CHECK9: omp.inner.for.cond:
2246 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2247 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2248 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2249 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2250 // CHECK9: omp.inner.for.body:
2251 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2252 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2253 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2254 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2255 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
2256 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2257 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2258 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2259 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2260 // CHECK9: omp.body.continue:
2261 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2262 // CHECK9: omp.inner.for.inc:
2263 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2264 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2265 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2266 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2267 // CHECK9: omp.inner.for.end:
2268 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2269 // CHECK9: omp.loop.exit:
2270 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2271 // CHECK9-NEXT: ret void
2272 //
2273 //
2274 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
2275 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2276 // CHECK9-NEXT: entry:
2277 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2278 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2279 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2280 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2281 // CHECK9-NEXT: ret void
2282 //
2283 //
2284 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
2285 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2286 // CHECK9-NEXT: entry:
2287 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2288 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2289 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2290 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2291 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2292 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2293 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2294 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2295 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2296 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2297 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2298 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2299 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2300 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2301 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2302 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2303 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2304 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2305 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2306 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2307 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2308 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2309 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2310 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2311 // CHECK9: cond.true:
2312 // CHECK9-NEXT: br label [[COND_END:%.*]]
2313 // CHECK9: cond.false:
2314 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2315 // CHECK9-NEXT: br label [[COND_END]]
2316 // CHECK9: cond.end:
2317 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2318 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2319 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2320 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2321 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2322 // CHECK9: omp.inner.for.cond:
2323 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2324 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2325 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2326 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2327 // CHECK9: omp.inner.for.body:
2328 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2329 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2330 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2331 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2332 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
2333 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2334 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2335 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2336 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2337 // CHECK9: omp.body.continue:
2338 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2339 // CHECK9: omp.inner.for.inc:
2340 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2341 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2342 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2343 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2344 // CHECK9: omp.inner.for.end:
2345 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2346 // CHECK9: omp.loop.exit:
2347 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2348 // CHECK9-NEXT: ret void
2349 //
2350 //
2351 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
2352 // CHECK9-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2353 // CHECK9-NEXT: entry:
2354 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2355 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2356 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2357 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2358 // CHECK9-NEXT: ret void
2359 //
2360 //
2361 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
2362 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2363 // CHECK9-NEXT: entry:
2364 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2365 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2366 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2367 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2368 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2369 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2370 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2371 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2372 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2373 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2374 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2375 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2376 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2377 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2378 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2379 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2380 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2381 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2382 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2383 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2384 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
2385 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2386 // CHECK9: omp.dispatch.cond:
2387 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2388 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2389 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2390 // CHECK9: cond.true:
2391 // CHECK9-NEXT: br label [[COND_END:%.*]]
2392 // CHECK9: cond.false:
2393 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2394 // CHECK9-NEXT: br label [[COND_END]]
2395 // CHECK9: cond.end:
2396 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2397 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2398 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2399 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2400 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2401 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2402 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2403 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2404 // CHECK9: omp.dispatch.body:
2405 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2406 // CHECK9: omp.inner.for.cond:
2407 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2408 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
2409 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2410 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2411 // CHECK9: omp.inner.for.body:
2412 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2413 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2414 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2415 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
2416 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
2417 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2418 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2419 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
2420 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2421 // CHECK9: omp.body.continue:
2422 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2423 // CHECK9: omp.inner.for.inc:
2424 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2425 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2426 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2427 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2428 // CHECK9: omp.inner.for.end:
2429 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2430 // CHECK9: omp.dispatch.inc:
2431 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2432 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2433 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2434 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
2435 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2436 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2437 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2438 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
2439 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
2440 // CHECK9: omp.dispatch.end:
2441 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2442 // CHECK9-NEXT: ret void
2443 //
2444 //
2445 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2446 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
2447 // CHECK9-NEXT: entry:
2448 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
2449 // CHECK9-NEXT: ret void
2450 //
2451 //
2452 // CHECK10-LABEL: define {{[^@]+}}@main
2453 // CHECK10-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2454 // CHECK10-NEXT: entry:
2455 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2456 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2457 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
2458 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4
2459 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2460 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2461 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2462 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
2463 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
2464 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
2465 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
2466 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2467 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2468 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2469 // CHECK10-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
2470 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
2471 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
2472 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
2473 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
2474 // CHECK10-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
2475 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
2476 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
2477 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
2478 // CHECK10-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
2479 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2480 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
2481 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
2482 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
2483 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
2484 // CHECK10-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
2485 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
2486 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
2487 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
2488 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2489 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
2490 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4
2491 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2492 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2493 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2494 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
2495 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
2496 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
2497 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
2498 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2499 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
2500 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
2501 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
2502 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2503 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
2504 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
2505 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2506 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
2507 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
2508 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2509 // CHECK10-NEXT: store i64 4, i64* [[TMP10]], align 8
2510 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2511 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8
2512 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2513 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
2514 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
2515 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2516 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
2517 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
2518 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2519 // CHECK10-NEXT: store i64 8, i64* [[TMP16]], align 8
2520 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2521 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8
2522 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2523 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
2524 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
2525 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2526 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
2527 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
2528 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2529 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
2530 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2531 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8
2532 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2533 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2534 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2535 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
2536 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
2537 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2538 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
2539 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2540 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2541 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2542 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2543 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
2544 // CHECK10-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
2545 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
2546 // CHECK10-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2547 // CHECK10-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
2548 // CHECK10-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2549 // CHECK10: omp_offload.failed:
2550 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2551 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
2552 // CHECK10: omp_offload.cont:
2553 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
2554 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
2555 // CHECK10-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4
2556 // CHECK10-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
2557 // CHECK10-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
2558 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
2559 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
2560 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8
2561 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
2562 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
2563 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8
2564 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
2565 // CHECK10-NEXT: store i64 4, i64* [[TMP40]], align 8
2566 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
2567 // CHECK10-NEXT: store i8* null, i8** [[TMP41]], align 8
2568 // CHECK10-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
2569 // CHECK10-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
2570 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8
2571 // CHECK10-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
2572 // CHECK10-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
2573 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8
2574 // CHECK10-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
2575 // CHECK10-NEXT: store i64 8, i64* [[TMP46]], align 8
2576 // CHECK10-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
2577 // CHECK10-NEXT: store i8* null, i8** [[TMP47]], align 8
2578 // CHECK10-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
2579 // CHECK10-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
2580 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8
2581 // CHECK10-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
2582 // CHECK10-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
2583 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8
2584 // CHECK10-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
2585 // CHECK10-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8
2586 // CHECK10-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
2587 // CHECK10-NEXT: store i8* null, i8** [[TMP53]], align 8
2588 // CHECK10-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
2589 // CHECK10-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
2590 // CHECK10-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
2591 // CHECK10-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4
2592 // CHECK10-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
2593 // CHECK10-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
2594 // CHECK10-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
2595 // CHECK10-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2596 // CHECK10-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
2597 // CHECK10-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
2598 // CHECK10-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
2599 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
2600 // CHECK10-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
2601 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP60]])
2602 // CHECK10-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2603 // CHECK10-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
2604 // CHECK10-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2605 // CHECK10: omp_offload.failed16:
2606 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
2607 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT17]]
2608 // CHECK10: omp_offload.cont17:
2609 // CHECK10-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4
2610 // CHECK10-NEXT: store i32 [[TMP63]], i32* [[DOTCAPTURE_EXPR_18]], align 4
2611 // CHECK10-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
2612 // CHECK10-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
2613 // CHECK10-NEXT: store i32 [[TMP64]], i32* [[CONV20]], align 4
2614 // CHECK10-NEXT: [[TMP65:%.*]] = load i64, i64* [[N_CASTED19]], align 8
2615 // CHECK10-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
2616 // CHECK10-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2617 // CHECK10-NEXT: store i32 [[TMP66]], i32* [[CONV21]], align 4
2618 // CHECK10-NEXT: [[TMP67:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2619 // CHECK10-NEXT: [[TMP68:%.*]] = mul nuw i64 [[TMP1]], 4
2620 // CHECK10-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
2621 // CHECK10-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64*
2622 // CHECK10-NEXT: store i64 [[TMP65]], i64* [[TMP70]], align 8
2623 // CHECK10-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
2624 // CHECK10-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i64*
2625 // CHECK10-NEXT: store i64 [[TMP65]], i64* [[TMP72]], align 8
2626 // CHECK10-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
2627 // CHECK10-NEXT: store i64 4, i64* [[TMP73]], align 8
2628 // CHECK10-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
2629 // CHECK10-NEXT: store i8* null, i8** [[TMP74]], align 8
2630 // CHECK10-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
2631 // CHECK10-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64*
2632 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8
2633 // CHECK10-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
2634 // CHECK10-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
2635 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8
2636 // CHECK10-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 1
2637 // CHECK10-NEXT: store i64 8, i64* [[TMP79]], align 8
2638 // CHECK10-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
2639 // CHECK10-NEXT: store i8* null, i8** [[TMP80]], align 8
2640 // CHECK10-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
2641 // CHECK10-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32**
2642 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP82]], align 8
2643 // CHECK10-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
2644 // CHECK10-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
2645 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP84]], align 8
2646 // CHECK10-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2
2647 // CHECK10-NEXT: store i64 [[TMP68]], i64* [[TMP85]], align 8
2648 // CHECK10-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
2649 // CHECK10-NEXT: store i8* null, i8** [[TMP86]], align 8
2650 // CHECK10-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
2651 // CHECK10-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
2652 // CHECK10-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 8
2653 // CHECK10-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
2654 // CHECK10-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i64*
2655 // CHECK10-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8
2656 // CHECK10-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
2657 // CHECK10-NEXT: store i64 4, i64* [[TMP91]], align 8
2658 // CHECK10-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
2659 // CHECK10-NEXT: store i8* null, i8** [[TMP92]], align 8
2660 // CHECK10-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
2661 // CHECK10-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
2662 // CHECK10-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
2663 // CHECK10-NEXT: [[TMP96:%.*]] = load i32, i32* [[N]], align 4
2664 // CHECK10-NEXT: store i32 [[TMP96]], i32* [[DOTCAPTURE_EXPR_27]], align 4
2665 // CHECK10-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
2666 // CHECK10-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP97]], 0
2667 // CHECK10-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
2668 // CHECK10-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
2669 // CHECK10-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
2670 // CHECK10-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
2671 // CHECK10-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP98]], 1
2672 // CHECK10-NEXT: [[TMP99:%.*]] = zext i32 [[ADD32]] to i64
2673 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP99]])
2674 // CHECK10-NEXT: [[TMP100:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP93]], i8** [[TMP94]], i64* [[TMP95]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2675 // CHECK10-NEXT: [[TMP101:%.*]] = icmp ne i32 [[TMP100]], 0
2676 // CHECK10-NEXT: br i1 [[TMP101]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]]
2677 // CHECK10: omp_offload.failed33:
2678 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP65]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP67]]) #[[ATTR3]]
2679 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT34]]
2680 // CHECK10: omp_offload.cont34:
2681 // CHECK10-NEXT: [[TMP102:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2682 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP102]])
2683 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2684 // CHECK10-NEXT: [[TMP103:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2685 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP103]])
2686 // CHECK10-NEXT: [[TMP104:%.*]] = load i32, i32* [[RETVAL]], align 4
2687 // CHECK10-NEXT: ret i32 [[TMP104]]
2688 //
2689 //
2690 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
2691 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2692 // CHECK10-NEXT: entry:
2693 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2694 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2695 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2696 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2697 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2698 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2699 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2700 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2701 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2702 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2703 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2704 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2705 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
2706 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
2707 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
2708 // CHECK10-NEXT: ret void
2709 //
2710 //
2711 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
2712 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2713 // CHECK10-NEXT: entry:
2714 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2715 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2716 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2717 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2718 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2719 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2720 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2721 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2722 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2723 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2724 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2725 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2726 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2727 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2728 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
2729 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2730 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2731 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2732 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2733 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2734 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2735 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2736 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2737 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2738 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2739 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2740 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2741 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2742 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2743 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2744 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
2745 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2746 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2747 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2748 // CHECK10: omp.precond.then:
2749 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2750 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2751 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2752 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2753 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2754 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2755 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2756 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2757 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2758 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2759 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2760 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2761 // CHECK10: cond.true:
2762 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2763 // CHECK10-NEXT: br label [[COND_END:%.*]]
2764 // CHECK10: cond.false:
2765 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2766 // CHECK10-NEXT: br label [[COND_END]]
2767 // CHECK10: cond.end:
2768 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2769 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2770 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2771 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2772 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2773 // CHECK10: omp.inner.for.cond:
2774 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2775 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2776 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2777 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2778 // CHECK10: omp.inner.for.body:
2779 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2780 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2781 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2782 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2783 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
2784 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
2785 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
2786 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2787 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2788 // CHECK10: omp.body.continue:
2789 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2790 // CHECK10: omp.inner.for.inc:
2791 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2792 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2793 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2794 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2795 // CHECK10: omp.inner.for.end:
2796 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2797 // CHECK10: omp.loop.exit:
2798 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2799 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2800 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2801 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
2802 // CHECK10: omp.precond.end:
2803 // CHECK10-NEXT: ret void
2804 //
2805 //
2806 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
2807 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2808 // CHECK10-NEXT: entry:
2809 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2810 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2811 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2812 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2813 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2814 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2815 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2816 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2817 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2818 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2819 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2820 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2821 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
2822 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
2823 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
2824 // CHECK10-NEXT: ret void
2825 //
2826 //
2827 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2828 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2829 // CHECK10-NEXT: entry:
2830 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2831 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2832 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2833 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2834 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2835 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2836 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2837 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2838 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2839 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2840 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2841 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2842 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2843 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2844 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
2845 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2846 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2847 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2848 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2849 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2850 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2851 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2852 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2853 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2854 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2855 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2856 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2857 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2858 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2859 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2860 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
2861 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2862 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2863 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2864 // CHECK10: omp.precond.then:
2865 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2866 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2867 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2868 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2869 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2870 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2871 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2872 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2873 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2874 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2875 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2876 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2877 // CHECK10: cond.true:
2878 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2879 // CHECK10-NEXT: br label [[COND_END:%.*]]
2880 // CHECK10: cond.false:
2881 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2882 // CHECK10-NEXT: br label [[COND_END]]
2883 // CHECK10: cond.end:
2884 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2885 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2886 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2887 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2888 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2889 // CHECK10: omp.inner.for.cond:
2890 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2891 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2892 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2893 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2894 // CHECK10: omp.inner.for.body:
2895 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2896 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2897 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2898 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2899 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
2900 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
2901 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
2902 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2903 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2904 // CHECK10: omp.body.continue:
2905 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2906 // CHECK10: omp.inner.for.inc:
2907 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2908 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2909 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2910 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2911 // CHECK10: omp.inner.for.end:
2912 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2913 // CHECK10: omp.loop.exit:
2914 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2915 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2916 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2917 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
2918 // CHECK10: omp.precond.end:
2919 // CHECK10-NEXT: ret void
2920 //
2921 //
2922 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
2923 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2924 // CHECK10-NEXT: entry:
2925 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2926 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2927 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2928 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2929 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2930 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2931 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2932 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2933 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2934 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2935 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2936 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2937 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2938 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2939 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2940 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2941 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
2942 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
2943 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
2944 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
2945 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
2946 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2947 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
2948 // CHECK10-NEXT: ret void
2949 //
2950 //
2951 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
2952 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2953 // CHECK10-NEXT: entry:
2954 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2955 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2956 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2957 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2958 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2959 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2960 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2961 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2962 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2963 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2964 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2965 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2966 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2967 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2968 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2969 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4
2970 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2971 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2972 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2973 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2974 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2975 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2976 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2977 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2978 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2979 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
2980 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
2981 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2982 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2983 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2984 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2985 // CHECK10-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
2986 // CHECK10-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
2987 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
2988 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2989 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2990 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2991 // CHECK10: omp.precond.then:
2992 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2993 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2994 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2995 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2996 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2997 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
2998 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2999 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3000 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
3001 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3002 // CHECK10: omp.dispatch.cond:
3003 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3004 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3005 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3006 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3007 // CHECK10: cond.true:
3008 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
3009 // CHECK10-NEXT: br label [[COND_END:%.*]]
3010 // CHECK10: cond.false:
3011 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3012 // CHECK10-NEXT: br label [[COND_END]]
3013 // CHECK10: cond.end:
3014 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3015 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3016 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3017 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3018 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3019 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3020 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3021 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3022 // CHECK10: omp.dispatch.body:
3023 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3024 // CHECK10: omp.inner.for.cond:
3025 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3026 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
3027 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
3028 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3029 // CHECK10: omp.inner.for.body:
3030 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3031 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
3032 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3033 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !11
3034 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !11
3035 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
3036 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
3037 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
3038 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3039 // CHECK10: omp.body.continue:
3040 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3041 // CHECK10: omp.inner.for.inc:
3042 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3043 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
3044 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3045 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
3046 // CHECK10: omp.inner.for.end:
3047 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3048 // CHECK10: omp.dispatch.inc:
3049 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3050 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3051 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3052 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4
3053 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3054 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3055 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
3056 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4
3057 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]]
3058 // CHECK10: omp.dispatch.end:
3059 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3060 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
3061 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
3062 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
3063 // CHECK10: omp.precond.end:
3064 // CHECK10-NEXT: ret void
3065 //
3066 //
3067 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
3068 // CHECK10-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
3069 // CHECK10-NEXT: entry:
3070 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3071 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
3072 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3073 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3074 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3075 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3076 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
3077 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
3078 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
3079 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
3080 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8
3081 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8
3082 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8
3083 // CHECK10-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
3084 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3085 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3086 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
3087 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
3088 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3089 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
3090 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
3091 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3092 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8
3093 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3094 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3095 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3096 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3097 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3098 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3099 // CHECK10: omp_offload.failed:
3100 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]]
3101 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
3102 // CHECK10: omp_offload.cont:
3103 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3104 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
3105 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
3106 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3107 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
3108 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
3109 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
3110 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8
3111 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3112 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3113 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3114 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3115 // CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3116 // CHECK10-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
3117 // CHECK10: omp_offload.failed5:
3118 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]]
3119 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT6]]
3120 // CHECK10: omp_offload.cont6:
3121 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
3122 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
3123 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
3124 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
3125 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
3126 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
3127 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
3128 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8
3129 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
3130 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
3131 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
3132 // CHECK10-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3133 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3134 // CHECK10-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
3135 // CHECK10: omp_offload.failed11:
3136 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
3137 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT12]]
3138 // CHECK10: omp_offload.cont12:
3139 // CHECK10-NEXT: ret i32 0
3140 //
3141 //
3142 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
3143 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3144 // CHECK10-NEXT: entry:
3145 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3146 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3147 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3148 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3149 // CHECK10-NEXT: ret void
3150 //
3151 //
3152 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
3153 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3154 // CHECK10-NEXT: entry:
3155 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3156 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3157 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3158 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3159 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3160 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3161 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3162 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3163 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3164 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3165 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3166 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3167 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3168 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3169 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3170 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3171 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3172 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3173 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3174 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3175 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3176 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3177 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3178 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3179 // CHECK10: cond.true:
3180 // CHECK10-NEXT: br label [[COND_END:%.*]]
3181 // CHECK10: cond.false:
3182 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3183 // CHECK10-NEXT: br label [[COND_END]]
3184 // CHECK10: cond.end:
3185 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3186 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3187 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3188 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3189 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3190 // CHECK10: omp.inner.for.cond:
3191 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3192 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3193 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3194 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3195 // CHECK10: omp.inner.for.body:
3196 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3197 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3198 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3199 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3200 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
3201 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
3202 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3203 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3204 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3205 // CHECK10: omp.body.continue:
3206 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3207 // CHECK10: omp.inner.for.inc:
3208 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3209 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3210 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3211 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
3212 // CHECK10: omp.inner.for.end:
3213 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3214 // CHECK10: omp.loop.exit:
3215 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3216 // CHECK10-NEXT: ret void
3217 //
3218 //
3219 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
3220 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3221 // CHECK10-NEXT: entry:
3222 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3223 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3224 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3225 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3226 // CHECK10-NEXT: ret void
3227 //
3228 //
3229 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7
3230 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3231 // CHECK10-NEXT: entry:
3232 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3233 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3234 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3235 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3236 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3237 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3238 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3239 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3240 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3241 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3242 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3243 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3244 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3245 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3246 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3247 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3248 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3249 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3250 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3251 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3252 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3253 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3254 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3255 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3256 // CHECK10: cond.true:
3257 // CHECK10-NEXT: br label [[COND_END:%.*]]
3258 // CHECK10: cond.false:
3259 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3260 // CHECK10-NEXT: br label [[COND_END]]
3261 // CHECK10: cond.end:
3262 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3263 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3264 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3265 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3266 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3267 // CHECK10: omp.inner.for.cond:
3268 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3269 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3270 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3271 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3272 // CHECK10: omp.inner.for.body:
3273 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3274 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3275 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3276 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3277 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
3278 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
3279 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3280 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3281 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3282 // CHECK10: omp.body.continue:
3283 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3284 // CHECK10: omp.inner.for.inc:
3285 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3286 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3287 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3288 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
3289 // CHECK10: omp.inner.for.end:
3290 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3291 // CHECK10: omp.loop.exit:
3292 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3293 // CHECK10-NEXT: ret void
3294 //
3295 //
3296 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
3297 // CHECK10-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3298 // CHECK10-NEXT: entry:
3299 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3300 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3301 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3302 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3303 // CHECK10-NEXT: ret void
3304 //
3305 //
3306 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10
3307 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3308 // CHECK10-NEXT: entry:
3309 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3310 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3311 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
3312 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3313 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3314 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3315 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3316 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3317 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3318 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3319 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3320 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3321 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
3322 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
3323 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3324 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3325 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3326 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3327 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3328 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3329 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
3330 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3331 // CHECK10: omp.dispatch.cond:
3332 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3333 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3334 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3335 // CHECK10: cond.true:
3336 // CHECK10-NEXT: br label [[COND_END:%.*]]
3337 // CHECK10: cond.false:
3338 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3339 // CHECK10-NEXT: br label [[COND_END]]
3340 // CHECK10: cond.end:
3341 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3342 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3343 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3344 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3345 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3346 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3347 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3348 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3349 // CHECK10: omp.dispatch.body:
3350 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3351 // CHECK10: omp.inner.for.cond:
3352 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3353 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
3354 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3355 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3356 // CHECK10: omp.inner.for.body:
3357 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3358 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3359 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3360 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
3361 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
3362 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3363 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
3364 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
3365 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3366 // CHECK10: omp.body.continue:
3367 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3368 // CHECK10: omp.inner.for.inc:
3369 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3370 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3371 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3372 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
3373 // CHECK10: omp.inner.for.end:
3374 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3375 // CHECK10: omp.dispatch.inc:
3376 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3377 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3378 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3379 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3380 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3381 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3382 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3383 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3384 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]]
3385 // CHECK10: omp.dispatch.end:
3386 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3387 // CHECK10-NEXT: ret void
3388 //
3389 //
3390 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3391 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] {
3392 // CHECK10-NEXT: entry:
3393 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
3394 // CHECK10-NEXT: ret void
3395 //
3396 //
3397 // CHECK11-LABEL: define {{[^@]+}}@main
3398 // CHECK11-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
3399 // CHECK11-NEXT: entry:
3400 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3401 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3402 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
3403 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
3404 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
3405 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3406 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3407 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
3408 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
3409 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
3410 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
3411 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3412 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3413 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3414 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
3415 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
3416 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
3417 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
3418 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
3419 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
3420 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
3421 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
3422 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
3423 // CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4
3424 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
3425 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
3426 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
3427 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
3428 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
3429 // CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
3430 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
3431 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
3432 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
3433 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3434 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
3435 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
3436 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3437 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
3438 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
3439 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
3440 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
3441 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
3442 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
3443 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
3444 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
3445 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
3446 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3447 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
3448 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
3449 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3450 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
3451 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
3452 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3453 // CHECK11-NEXT: store i64 4, i64* [[TMP10]], align 4
3454 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3455 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
3456 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3457 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
3458 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
3459 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3460 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
3461 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
3462 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3463 // CHECK11-NEXT: store i64 4, i64* [[TMP16]], align 4
3464 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3465 // CHECK11-NEXT: store i8* null, i8** [[TMP17]], align 4
3466 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3467 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
3468 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
3469 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3470 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
3471 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
3472 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3473 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
3474 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3475 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4
3476 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3477 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3478 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3479 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
3480 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
3481 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3482 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
3483 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3484 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3485 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3486 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3487 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
3488 // CHECK11-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
3489 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
3490 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3491 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
3492 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3493 // CHECK11: omp_offload.failed:
3494 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
3495 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
3496 // CHECK11: omp_offload.cont:
3497 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
3498 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
3499 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
3500 // CHECK11-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
3501 // CHECK11-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
3502 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3503 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
3504 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4
3505 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3506 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
3507 // CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4
3508 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
3509 // CHECK11-NEXT: store i64 4, i64* [[TMP41]], align 4
3510 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
3511 // CHECK11-NEXT: store i8* null, i8** [[TMP42]], align 4
3512 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
3513 // CHECK11-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
3514 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4
3515 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
3516 // CHECK11-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
3517 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4
3518 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
3519 // CHECK11-NEXT: store i64 4, i64* [[TMP47]], align 4
3520 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
3521 // CHECK11-NEXT: store i8* null, i8** [[TMP48]], align 4
3522 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
3523 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
3524 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4
3525 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
3526 // CHECK11-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
3527 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4
3528 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
3529 // CHECK11-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4
3530 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
3531 // CHECK11-NEXT: store i8* null, i8** [[TMP54]], align 4
3532 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
3533 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
3534 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
3535 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4
3536 // CHECK11-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
3537 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
3538 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
3539 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
3540 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
3541 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
3542 // CHECK11-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
3543 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
3544 // CHECK11-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
3545 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP61]])
3546 // CHECK11-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3547 // CHECK11-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
3548 // CHECK11-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
3549 // CHECK11: omp_offload.failed15:
3550 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
3551 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]]
3552 // CHECK11: omp_offload.cont16:
3553 // CHECK11-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
3554 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_17]], align 4
3555 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
3556 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[N_CASTED18]], align 4
3557 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[N_CASTED18]], align 4
3558 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
3559 // CHECK11-NEXT: store i32 [[TMP67]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3560 // CHECK11-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3561 // CHECK11-NEXT: [[TMP69:%.*]] = mul nuw i32 [[TMP0]], 4
3562 // CHECK11-NEXT: [[TMP70:%.*]] = sext i32 [[TMP69]] to i64
3563 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3564 // CHECK11-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32*
3565 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP72]], align 4
3566 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3567 // CHECK11-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
3568 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP74]], align 4
3569 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
3570 // CHECK11-NEXT: store i64 4, i64* [[TMP75]], align 4
3571 // CHECK11-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
3572 // CHECK11-NEXT: store i8* null, i8** [[TMP76]], align 4
3573 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
3574 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
3575 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4
3576 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
3577 // CHECK11-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
3578 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4
3579 // CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 1
3580 // CHECK11-NEXT: store i64 4, i64* [[TMP81]], align 4
3581 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
3582 // CHECK11-NEXT: store i8* null, i8** [[TMP82]], align 4
3583 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
3584 // CHECK11-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
3585 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP84]], align 4
3586 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
3587 // CHECK11-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32**
3588 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP86]], align 4
3589 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
3590 // CHECK11-NEXT: store i64 [[TMP70]], i64* [[TMP87]], align 4
3591 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
3592 // CHECK11-NEXT: store i8* null, i8** [[TMP88]], align 4
3593 // CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
3594 // CHECK11-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
3595 // CHECK11-NEXT: store i32 [[TMP68]], i32* [[TMP90]], align 4
3596 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
3597 // CHECK11-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i32*
3598 // CHECK11-NEXT: store i32 [[TMP68]], i32* [[TMP92]], align 4
3599 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
3600 // CHECK11-NEXT: store i64 4, i64* [[TMP93]], align 4
3601 // CHECK11-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
3602 // CHECK11-NEXT: store i8* null, i8** [[TMP94]], align 4
3603 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3604 // CHECK11-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3605 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
3606 // CHECK11-NEXT: [[TMP98:%.*]] = load i32, i32* [[N]], align 4
3607 // CHECK11-NEXT: store i32 [[TMP98]], i32* [[DOTCAPTURE_EXPR_24]], align 4
3608 // CHECK11-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
3609 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP99]], 0
3610 // CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
3611 // CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
3612 // CHECK11-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
3613 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
3614 // CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP100]], 1
3615 // CHECK11-NEXT: [[TMP101:%.*]] = zext i32 [[ADD29]] to i64
3616 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP101]])
3617 // CHECK11-NEXT: [[TMP102:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP95]], i8** [[TMP96]], i64* [[TMP97]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3618 // CHECK11-NEXT: [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
3619 // CHECK11-NEXT: br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
3620 // CHECK11: omp_offload.failed30:
3621 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP66]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP68]]) #[[ATTR3]]
3622 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT31]]
3623 // CHECK11: omp_offload.cont31:
3624 // CHECK11-NEXT: [[TMP104:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
3625 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP104]])
3626 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3627 // CHECK11-NEXT: [[TMP105:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
3628 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP105]])
3629 // CHECK11-NEXT: [[TMP106:%.*]] = load i32, i32* [[RETVAL]], align 4
3630 // CHECK11-NEXT: ret i32 [[TMP106]]
3631 //
3632 //
3633 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
3634 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
3635 // CHECK11-NEXT: entry:
3636 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3637 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3638 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3639 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3640 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3641 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3642 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3643 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3644 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3645 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3646 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
3647 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
3648 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
3649 // CHECK11-NEXT: ret void
3650 //
3651 //
3652 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
3653 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3654 // CHECK11-NEXT: entry:
3655 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3656 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3657 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3658 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3659 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3660 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3661 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3662 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3663 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3664 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3665 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3666 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3667 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3668 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3669 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
3670 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3671 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3672 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3673 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3674 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3675 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3676 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3677 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3678 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
3679 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3680 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3681 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3682 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3683 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3684 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
3685 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3686 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
3687 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3688 // CHECK11: omp.precond.then:
3689 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3690 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3691 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3692 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3693 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3694 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3695 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3696 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3697 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3698 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3699 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
3700 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3701 // CHECK11: cond.true:
3702 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3703 // CHECK11-NEXT: br label [[COND_END:%.*]]
3704 // CHECK11: cond.false:
3705 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3706 // CHECK11-NEXT: br label [[COND_END]]
3707 // CHECK11: cond.end:
3708 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
3709 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3710 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3711 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
3712 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3713 // CHECK11: omp.inner.for.cond:
3714 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3715 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3716 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3717 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3718 // CHECK11: omp.inner.for.body:
3719 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3720 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
3721 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3722 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
3723 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
3724 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
3725 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3726 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3727 // CHECK11: omp.body.continue:
3728 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3729 // CHECK11: omp.inner.for.inc:
3730 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3731 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
3732 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
3733 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
3734 // CHECK11: omp.inner.for.end:
3735 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3736 // CHECK11: omp.loop.exit:
3737 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3738 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
3739 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
3740 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
3741 // CHECK11: omp.precond.end:
3742 // CHECK11-NEXT: ret void
3743 //
3744 //
3745 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
3746 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3747 // CHECK11-NEXT: entry:
3748 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3749 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3750 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3751 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3752 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3753 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3754 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3755 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3756 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3757 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3758 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
3759 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
3760 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
3761 // CHECK11-NEXT: ret void
3762 //
3763 //
3764 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
3765 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3766 // CHECK11-NEXT: entry:
3767 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3768 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3769 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3770 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3771 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3772 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3773 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3774 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3775 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3776 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3777 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3778 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3779 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3780 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3781 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
3782 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3783 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3784 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3785 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3786 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3787 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3788 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3789 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3790 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
3791 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3792 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3793 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3794 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3795 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3796 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
3797 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3798 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
3799 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3800 // CHECK11: omp.precond.then:
3801 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3802 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3803 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3804 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3805 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3806 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3807 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3808 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3809 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3810 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3811 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
3812 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3813 // CHECK11: cond.true:
3814 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3815 // CHECK11-NEXT: br label [[COND_END:%.*]]
3816 // CHECK11: cond.false:
3817 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3818 // CHECK11-NEXT: br label [[COND_END]]
3819 // CHECK11: cond.end:
3820 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
3821 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3822 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3823 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
3824 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3825 // CHECK11: omp.inner.for.cond:
3826 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3827 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3828 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3829 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3830 // CHECK11: omp.inner.for.body:
3831 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3832 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
3833 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3834 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
3835 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
3836 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
3837 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3838 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3839 // CHECK11: omp.body.continue:
3840 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3841 // CHECK11: omp.inner.for.inc:
3842 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3843 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
3844 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
3845 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
3846 // CHECK11: omp.inner.for.end:
3847 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3848 // CHECK11: omp.loop.exit:
3849 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3850 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
3851 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
3852 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
3853 // CHECK11: omp.precond.end:
3854 // CHECK11-NEXT: ret void
3855 //
3856 //
3857 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
3858 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
3859 // CHECK11-NEXT: entry:
3860 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3861 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3862 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3863 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3864 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3865 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
3866 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3867 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3868 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3869 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3870 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3871 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3872 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3873 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
3874 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
3875 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3876 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3877 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
3878 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
3879 // CHECK11-NEXT: ret void
3880 //
3881 //
3882 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
3883 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
3884 // CHECK11-NEXT: entry:
3885 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3886 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3887 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3888 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3889 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3890 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3891 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3892 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3893 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3894 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3895 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3896 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3897 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3898 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3899 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3900 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
3901 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3902 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3903 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3904 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3905 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3906 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3907 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3908 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3909 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
3910 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3911 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3912 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3913 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3914 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
3915 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3916 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
3917 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3918 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
3919 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3920 // CHECK11: omp.precond.then:
3921 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3922 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3923 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3924 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3925 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3926 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
3927 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3928 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3929 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
3930 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3931 // CHECK11: omp.dispatch.cond:
3932 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3933 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3934 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3935 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3936 // CHECK11: cond.true:
3937 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3938 // CHECK11-NEXT: br label [[COND_END:%.*]]
3939 // CHECK11: cond.false:
3940 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3941 // CHECK11-NEXT: br label [[COND_END]]
3942 // CHECK11: cond.end:
3943 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3944 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3945 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3946 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3947 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3948 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3949 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3950 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3951 // CHECK11: omp.dispatch.body:
3952 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3953 // CHECK11: omp.inner.for.cond:
3954 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3955 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
3956 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
3957 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3958 // CHECK11: omp.inner.for.body:
3959 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3960 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
3961 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3962 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12
3963 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12
3964 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
3965 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
3966 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3967 // CHECK11: omp.body.continue:
3968 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3969 // CHECK11: omp.inner.for.inc:
3970 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3971 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
3972 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3973 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
3974 // CHECK11: omp.inner.for.end:
3975 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3976 // CHECK11: omp.dispatch.inc:
3977 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3978 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3979 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3980 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
3981 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3982 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3983 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
3984 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
3985 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
3986 // CHECK11: omp.dispatch.end:
3987 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3988 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
3989 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
3990 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
3991 // CHECK11: omp.precond.end:
3992 // CHECK11-NEXT: ret void
3993 //
3994 //
3995 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
3996 // CHECK11-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
3997 // CHECK11-NEXT: entry:
3998 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3999 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
4000 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
4001 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
4002 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
4003 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4004 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
4005 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
4006 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
4007 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
4008 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4
4009 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4
4010 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4
4011 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
4012 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4013 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4014 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
4015 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
4016 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4017 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
4018 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
4019 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4020 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
4021 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4022 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4023 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4024 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4025 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
4026 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4027 // CHECK11: omp_offload.failed:
4028 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]]
4029 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
4030 // CHECK11: omp_offload.cont:
4031 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
4032 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
4033 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
4034 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
4035 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
4036 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
4037 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
4038 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4
4039 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
4040 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
4041 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4042 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4043 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4044 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
4045 // CHECK11: omp_offload.failed5:
4046 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]]
4047 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]]
4048 // CHECK11: omp_offload.cont6:
4049 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
4050 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
4051 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
4052 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
4053 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
4054 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
4055 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
4056 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4
4057 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
4058 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
4059 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4060 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4061 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4062 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
4063 // CHECK11: omp_offload.failed11:
4064 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
4065 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]]
4066 // CHECK11: omp_offload.cont12:
4067 // CHECK11-NEXT: ret i32 0
4068 //
4069 //
4070 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
4071 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4072 // CHECK11-NEXT: entry:
4073 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4074 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4075 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4076 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4077 // CHECK11-NEXT: ret void
4078 //
4079 //
4080 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
4081 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4082 // CHECK11-NEXT: entry:
4083 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4084 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4085 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4086 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4087 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4088 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4089 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4090 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4091 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4092 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4093 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4094 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4095 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4096 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4097 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4098 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4099 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4100 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4101 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4102 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4103 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4104 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4105 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4106 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4107 // CHECK11: cond.true:
4108 // CHECK11-NEXT: br label [[COND_END:%.*]]
4109 // CHECK11: cond.false:
4110 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4111 // CHECK11-NEXT: br label [[COND_END]]
4112 // CHECK11: cond.end:
4113 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4114 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4115 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4116 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4117 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4118 // CHECK11: omp.inner.for.cond:
4119 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4120 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4121 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4122 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4123 // CHECK11: omp.inner.for.body:
4124 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4125 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4126 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4127 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4128 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
4129 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
4130 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4131 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4132 // CHECK11: omp.body.continue:
4133 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4134 // CHECK11: omp.inner.for.inc:
4135 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4136 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
4137 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
4138 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
4139 // CHECK11: omp.inner.for.end:
4140 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4141 // CHECK11: omp.loop.exit:
4142 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4143 // CHECK11-NEXT: ret void
4144 //
4145 //
4146 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
4147 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4148 // CHECK11-NEXT: entry:
4149 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4150 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4151 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4152 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4153 // CHECK11-NEXT: ret void
4154 //
4155 //
4156 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
4157 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4158 // CHECK11-NEXT: entry:
4159 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4160 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4161 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4162 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4163 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4164 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4165 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4166 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4167 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4168 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4169 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4170 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4171 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4172 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4173 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4174 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4175 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4176 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4177 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4178 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4179 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4180 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4181 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4182 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4183 // CHECK11: cond.true:
4184 // CHECK11-NEXT: br label [[COND_END:%.*]]
4185 // CHECK11: cond.false:
4186 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4187 // CHECK11-NEXT: br label [[COND_END]]
4188 // CHECK11: cond.end:
4189 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4190 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4191 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4192 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4193 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4194 // CHECK11: omp.inner.for.cond:
4195 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4196 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4197 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4198 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4199 // CHECK11: omp.inner.for.body:
4200 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4201 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
4202 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4203 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4204 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
4205 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
4206 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4207 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4208 // CHECK11: omp.body.continue:
4209 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4210 // CHECK11: omp.inner.for.inc:
4211 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4212 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
4213 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
4214 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
4215 // CHECK11: omp.inner.for.end:
4216 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4217 // CHECK11: omp.loop.exit:
4218 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4219 // CHECK11-NEXT: ret void
4220 //
4221 //
4222 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
4223 // CHECK11-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4224 // CHECK11-NEXT: entry:
4225 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4226 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4227 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4228 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
4229 // CHECK11-NEXT: ret void
4230 //
4231 //
4232 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
4233 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4234 // CHECK11-NEXT: entry:
4235 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4236 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4237 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4238 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4239 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4240 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4241 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4242 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4243 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4244 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4245 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4246 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4247 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
4248 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
4249 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4250 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
4251 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4252 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4253 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4254 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4255 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
4256 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4257 // CHECK11: omp.dispatch.cond:
4258 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4259 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
4260 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4261 // CHECK11: cond.true:
4262 // CHECK11-NEXT: br label [[COND_END:%.*]]
4263 // CHECK11: cond.false:
4264 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4265 // CHECK11-NEXT: br label [[COND_END]]
4266 // CHECK11: cond.end:
4267 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4268 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4269 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4270 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4271 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4272 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4273 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4274 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4275 // CHECK11: omp.dispatch.body:
4276 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4277 // CHECK11: omp.inner.for.cond:
4278 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
4279 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
4280 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4281 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4282 // CHECK11: omp.inner.for.body:
4283 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
4284 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4285 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4286 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
4287 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15
4288 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
4289 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
4290 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4291 // CHECK11: omp.body.continue:
4292 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4293 // CHECK11: omp.inner.for.inc:
4294 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
4295 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4296 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
4297 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
4298 // CHECK11: omp.inner.for.end:
4299 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4300 // CHECK11: omp.dispatch.inc:
4301 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4302 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4303 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4304 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
4305 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4306 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4307 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
4308 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
4309 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
4310 // CHECK11: omp.dispatch.end:
4311 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4312 // CHECK11-NEXT: ret void
4313 //
4314 //
4315 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4316 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] {
4317 // CHECK11-NEXT: entry:
4318 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
4319 // CHECK11-NEXT: ret void
4320 //
4321 //
4322 // CHECK12-LABEL: define {{[^@]+}}@main
4323 // CHECK12-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4324 // CHECK12-NEXT: entry:
4325 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4326 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4327 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
4328 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4
4329 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4330 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4331 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4332 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
4333 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
4334 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
4335 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
4336 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
4337 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4338 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4339 // CHECK12-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
4340 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
4341 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
4342 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
4343 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
4344 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
4345 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
4346 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
4347 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
4348 // CHECK12-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4
4349 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4350 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
4351 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
4352 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
4353 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
4354 // CHECK12-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
4355 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
4356 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
4357 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
4358 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4359 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
4360 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4
4361 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4362 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
4363 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
4364 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
4365 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4366 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
4367 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4368 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4369 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
4370 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
4371 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4372 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
4373 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
4374 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4375 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
4376 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
4377 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4378 // CHECK12-NEXT: store i64 4, i64* [[TMP10]], align 4
4379 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4380 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4
4381 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4382 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
4383 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
4384 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4385 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
4386 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
4387 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4388 // CHECK12-NEXT: store i64 4, i64* [[TMP16]], align 4
4389 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4390 // CHECK12-NEXT: store i8* null, i8** [[TMP17]], align 4
4391 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4392 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
4393 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
4394 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4395 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
4396 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
4397 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4398 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
4399 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4400 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4
4401 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4402 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4403 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4404 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
4405 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
4406 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4407 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
4408 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4409 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4410 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4411 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4412 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
4413 // CHECK12-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
4414 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP30]])
4415 // CHECK12-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4416 // CHECK12-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
4417 // CHECK12-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4418 // CHECK12: omp_offload.failed:
4419 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
4420 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
4421 // CHECK12: omp_offload.cont:
4422 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
4423 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
4424 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
4425 // CHECK12-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
4426 // CHECK12-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
4427 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4428 // CHECK12-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
4429 // CHECK12-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4
4430 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4431 // CHECK12-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
4432 // CHECK12-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4
4433 // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
4434 // CHECK12-NEXT: store i64 4, i64* [[TMP41]], align 4
4435 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
4436 // CHECK12-NEXT: store i8* null, i8** [[TMP42]], align 4
4437 // CHECK12-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
4438 // CHECK12-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
4439 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4
4440 // CHECK12-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
4441 // CHECK12-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
4442 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4
4443 // CHECK12-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
4444 // CHECK12-NEXT: store i64 4, i64* [[TMP47]], align 4
4445 // CHECK12-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
4446 // CHECK12-NEXT: store i8* null, i8** [[TMP48]], align 4
4447 // CHECK12-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
4448 // CHECK12-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
4449 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4
4450 // CHECK12-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
4451 // CHECK12-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
4452 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4
4453 // CHECK12-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
4454 // CHECK12-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4
4455 // CHECK12-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
4456 // CHECK12-NEXT: store i8* null, i8** [[TMP54]], align 4
4457 // CHECK12-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4458 // CHECK12-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4459 // CHECK12-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
4460 // CHECK12-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4
4461 // CHECK12-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
4462 // CHECK12-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
4463 // CHECK12-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
4464 // CHECK12-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
4465 // CHECK12-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
4466 // CHECK12-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
4467 // CHECK12-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
4468 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
4469 // CHECK12-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
4470 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP61]])
4471 // CHECK12-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.2, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4472 // CHECK12-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
4473 // CHECK12-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
4474 // CHECK12: omp_offload.failed15:
4475 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
4476 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT16]]
4477 // CHECK12: omp_offload.cont16:
4478 // CHECK12-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
4479 // CHECK12-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_17]], align 4
4480 // CHECK12-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
4481 // CHECK12-NEXT: store i32 [[TMP65]], i32* [[N_CASTED18]], align 4
4482 // CHECK12-NEXT: [[TMP66:%.*]] = load i32, i32* [[N_CASTED18]], align 4
4483 // CHECK12-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
4484 // CHECK12-NEXT: store i32 [[TMP67]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4485 // CHECK12-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4486 // CHECK12-NEXT: [[TMP69:%.*]] = mul nuw i32 [[TMP0]], 4
4487 // CHECK12-NEXT: [[TMP70:%.*]] = sext i32 [[TMP69]] to i64
4488 // CHECK12-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
4489 // CHECK12-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32*
4490 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[TMP72]], align 4
4491 // CHECK12-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
4492 // CHECK12-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i32*
4493 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[TMP74]], align 4
4494 // CHECK12-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
4495 // CHECK12-NEXT: store i64 4, i64* [[TMP75]], align 4
4496 // CHECK12-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
4497 // CHECK12-NEXT: store i8* null, i8** [[TMP76]], align 4
4498 // CHECK12-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
4499 // CHECK12-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
4500 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4
4501 // CHECK12-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
4502 // CHECK12-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
4503 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4
4504 // CHECK12-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 1
4505 // CHECK12-NEXT: store i64 4, i64* [[TMP81]], align 4
4506 // CHECK12-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
4507 // CHECK12-NEXT: store i8* null, i8** [[TMP82]], align 4
4508 // CHECK12-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
4509 // CHECK12-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32**
4510 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP84]], align 4
4511 // CHECK12-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
4512 // CHECK12-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i32**
4513 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP86]], align 4
4514 // CHECK12-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
4515 // CHECK12-NEXT: store i64 [[TMP70]], i64* [[TMP87]], align 4
4516 // CHECK12-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
4517 // CHECK12-NEXT: store i8* null, i8** [[TMP88]], align 4
4518 // CHECK12-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
4519 // CHECK12-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
4520 // CHECK12-NEXT: store i32 [[TMP68]], i32* [[TMP90]], align 4
4521 // CHECK12-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
4522 // CHECK12-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i32*
4523 // CHECK12-NEXT: store i32 [[TMP68]], i32* [[TMP92]], align 4
4524 // CHECK12-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
4525 // CHECK12-NEXT: store i64 4, i64* [[TMP93]], align 4
4526 // CHECK12-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
4527 // CHECK12-NEXT: store i8* null, i8** [[TMP94]], align 4
4528 // CHECK12-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
4529 // CHECK12-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
4530 // CHECK12-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
4531 // CHECK12-NEXT: [[TMP98:%.*]] = load i32, i32* [[N]], align 4
4532 // CHECK12-NEXT: store i32 [[TMP98]], i32* [[DOTCAPTURE_EXPR_24]], align 4
4533 // CHECK12-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
4534 // CHECK12-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP99]], 0
4535 // CHECK12-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
4536 // CHECK12-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
4537 // CHECK12-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
4538 // CHECK12-NEXT: [[TMP100:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
4539 // CHECK12-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP100]], 1
4540 // CHECK12-NEXT: [[TMP101:%.*]] = zext i32 [[ADD29]] to i64
4541 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP101]])
4542 // CHECK12-NEXT: [[TMP102:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP95]], i8** [[TMP96]], i64* [[TMP97]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4543 // CHECK12-NEXT: [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
4544 // CHECK12-NEXT: br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
4545 // CHECK12: omp_offload.failed30:
4546 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP66]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP68]]) #[[ATTR3]]
4547 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT31]]
4548 // CHECK12: omp_offload.cont31:
4549 // CHECK12-NEXT: [[TMP104:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4550 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP104]])
4551 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4552 // CHECK12-NEXT: [[TMP105:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4553 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP105]])
4554 // CHECK12-NEXT: [[TMP106:%.*]] = load i32, i32* [[RETVAL]], align 4
4555 // CHECK12-NEXT: ret i32 [[TMP106]]
4556 //
4557 //
4558 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
4559 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
4560 // CHECK12-NEXT: entry:
4561 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4562 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4563 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4564 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4565 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4566 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4567 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4568 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4569 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4570 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4571 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4572 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4573 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
4574 // CHECK12-NEXT: ret void
4575 //
4576 //
4577 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
4578 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4579 // CHECK12-NEXT: entry:
4580 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4581 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4582 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4583 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4584 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4585 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4586 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
4587 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4588 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4589 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
4590 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4591 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4592 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4593 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4594 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
4595 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4596 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4597 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4598 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4599 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4600 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4601 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4602 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4603 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4604 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4605 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4606 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4607 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4608 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4609 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
4610 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4611 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4612 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4613 // CHECK12: omp.precond.then:
4614 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4615 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4616 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4617 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4618 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4619 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4620 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
4621 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4622 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4623 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4624 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
4625 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4626 // CHECK12: cond.true:
4627 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4628 // CHECK12-NEXT: br label [[COND_END:%.*]]
4629 // CHECK12: cond.false:
4630 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4631 // CHECK12-NEXT: br label [[COND_END]]
4632 // CHECK12: cond.end:
4633 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
4634 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4635 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4636 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
4637 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4638 // CHECK12: omp.inner.for.cond:
4639 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4640 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4641 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4642 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4643 // CHECK12: omp.inner.for.body:
4644 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4645 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
4646 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4647 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
4648 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
4649 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
4650 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4651 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4652 // CHECK12: omp.body.continue:
4653 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4654 // CHECK12: omp.inner.for.inc:
4655 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4656 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
4657 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4658 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
4659 // CHECK12: omp.inner.for.end:
4660 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4661 // CHECK12: omp.loop.exit:
4662 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4663 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
4664 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
4665 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
4666 // CHECK12: omp.precond.end:
4667 // CHECK12-NEXT: ret void
4668 //
4669 //
4670 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
4671 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4672 // CHECK12-NEXT: entry:
4673 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4674 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4675 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4676 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4677 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4678 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4679 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4680 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4681 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4682 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4683 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4684 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4685 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
4686 // CHECK12-NEXT: ret void
4687 //
4688 //
4689 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
4690 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4691 // CHECK12-NEXT: entry:
4692 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4693 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4694 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4695 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4696 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4697 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4698 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
4699 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4700 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4701 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
4702 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4703 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4704 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4705 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4706 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
4707 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4708 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4709 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4710 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4711 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4712 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4713 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4714 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4715 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4716 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4717 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4718 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4719 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4720 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4721 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
4722 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4723 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4724 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4725 // CHECK12: omp.precond.then:
4726 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4727 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4728 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4729 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4730 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4731 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4732 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
4733 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4734 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4735 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4736 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
4737 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4738 // CHECK12: cond.true:
4739 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4740 // CHECK12-NEXT: br label [[COND_END:%.*]]
4741 // CHECK12: cond.false:
4742 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4743 // CHECK12-NEXT: br label [[COND_END]]
4744 // CHECK12: cond.end:
4745 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
4746 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4747 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4748 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
4749 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4750 // CHECK12: omp.inner.for.cond:
4751 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4752 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4753 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4754 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4755 // CHECK12: omp.inner.for.body:
4756 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4757 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
4758 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4759 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
4760 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
4761 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
4762 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4763 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4764 // CHECK12: omp.body.continue:
4765 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4766 // CHECK12: omp.inner.for.inc:
4767 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4768 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
4769 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4770 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
4771 // CHECK12: omp.inner.for.end:
4772 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4773 // CHECK12: omp.loop.exit:
4774 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4775 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
4776 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
4777 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
4778 // CHECK12: omp.precond.end:
4779 // CHECK12-NEXT: ret void
4780 //
4781 //
4782 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
4783 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
4784 // CHECK12-NEXT: entry:
4785 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4786 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4787 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4788 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4789 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4790 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
4791 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4792 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4793 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4794 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4795 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4796 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4797 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4798 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
4799 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
4800 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4801 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4802 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
4803 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
4804 // CHECK12-NEXT: ret void
4805 //
4806 //
4807 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
4808 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
4809 // CHECK12-NEXT: entry:
4810 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4811 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4812 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4813 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4814 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4815 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
4816 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4817 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
4818 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4819 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4820 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
4821 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4822 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4823 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4824 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4825 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4
4826 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4827 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4828 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4829 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4830 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4831 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4832 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4833 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4834 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4835 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4836 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4837 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4838 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4839 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
4840 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4841 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
4842 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4843 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4844 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4845 // CHECK12: omp.precond.then:
4846 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4847 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4848 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4849 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4850 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4851 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
4852 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4853 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4854 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
4855 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4856 // CHECK12: omp.dispatch.cond:
4857 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4858 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4859 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4860 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4861 // CHECK12: cond.true:
4862 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4863 // CHECK12-NEXT: br label [[COND_END:%.*]]
4864 // CHECK12: cond.false:
4865 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4866 // CHECK12-NEXT: br label [[COND_END]]
4867 // CHECK12: cond.end:
4868 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4869 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4870 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4871 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4872 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4873 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4874 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4875 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4876 // CHECK12: omp.dispatch.body:
4877 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4878 // CHECK12: omp.inner.for.cond:
4879 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
4880 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
4881 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
4882 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4883 // CHECK12: omp.inner.for.body:
4884 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
4885 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
4886 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4887 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12
4888 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12
4889 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
4890 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
4891 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4892 // CHECK12: omp.body.continue:
4893 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4894 // CHECK12: omp.inner.for.inc:
4895 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
4896 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
4897 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
4898 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
4899 // CHECK12: omp.inner.for.end:
4900 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4901 // CHECK12: omp.dispatch.inc:
4902 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4903 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4904 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
4905 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
4906 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4907 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4908 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
4909 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
4910 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]]
4911 // CHECK12: omp.dispatch.end:
4912 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4913 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
4914 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
4915 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
4916 // CHECK12: omp.precond.end:
4917 // CHECK12-NEXT: ret void
4918 //
4919 //
4920 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
4921 // CHECK12-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
4922 // CHECK12-NEXT: entry:
4923 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4924 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
4925 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
4926 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
4927 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
4928 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
4929 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
4930 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
4931 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
4932 // CHECK12-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
4933 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4
4934 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4
4935 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4
4936 // CHECK12-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
4937 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4938 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4939 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
4940 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
4941 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4942 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
4943 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
4944 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4945 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4
4946 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4947 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4948 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4949 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4950 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
4951 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4952 // CHECK12: omp_offload.failed:
4953 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]]
4954 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
4955 // CHECK12: omp_offload.cont:
4956 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
4957 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
4958 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
4959 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
4960 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
4961 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
4962 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
4963 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4
4964 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
4965 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
4966 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4967 // CHECK12-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4968 // CHECK12-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4969 // CHECK12-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
4970 // CHECK12: omp_offload.failed5:
4971 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]]
4972 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT6]]
4973 // CHECK12: omp_offload.cont6:
4974 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
4975 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
4976 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
4977 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
4978 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
4979 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
4980 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
4981 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4
4982 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
4983 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
4984 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10)
4985 // CHECK12-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4986 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4987 // CHECK12-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
4988 // CHECK12: omp_offload.failed11:
4989 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
4990 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT12]]
4991 // CHECK12: omp_offload.cont12:
4992 // CHECK12-NEXT: ret i32 0
4993 //
4994 //
4995 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
4996 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
4997 // CHECK12-NEXT: entry:
4998 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
4999 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5000 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5001 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5002 // CHECK12-NEXT: ret void
5003 //
5004 //
5005 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..5
5006 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5007 // CHECK12-NEXT: entry:
5008 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5009 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5010 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5011 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5012 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5013 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5014 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5015 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5016 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5017 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5018 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5019 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5020 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5021 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5022 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5023 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5024 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5025 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5026 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5027 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5028 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5029 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5030 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5031 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5032 // CHECK12: cond.true:
5033 // CHECK12-NEXT: br label [[COND_END:%.*]]
5034 // CHECK12: cond.false:
5035 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5036 // CHECK12-NEXT: br label [[COND_END]]
5037 // CHECK12: cond.end:
5038 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5039 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5040 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5041 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5042 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5043 // CHECK12: omp.inner.for.cond:
5044 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5045 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5046 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5047 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5048 // CHECK12: omp.inner.for.body:
5049 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5050 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5051 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5052 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5053 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
5054 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
5055 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5056 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5057 // CHECK12: omp.body.continue:
5058 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5059 // CHECK12: omp.inner.for.inc:
5060 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5061 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
5062 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5063 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
5064 // CHECK12: omp.inner.for.end:
5065 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5066 // CHECK12: omp.loop.exit:
5067 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5068 // CHECK12-NEXT: ret void
5069 //
5070 //
5071 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
5072 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5073 // CHECK12-NEXT: entry:
5074 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5075 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5076 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5077 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5078 // CHECK12-NEXT: ret void
5079 //
5080 //
5081 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..7
5082 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5083 // CHECK12-NEXT: entry:
5084 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5085 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5086 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5087 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5088 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5089 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5090 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5091 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5092 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5093 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5094 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5095 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5096 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5097 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5098 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5099 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5100 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5101 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5102 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5103 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5104 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5105 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5106 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5107 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5108 // CHECK12: cond.true:
5109 // CHECK12-NEXT: br label [[COND_END:%.*]]
5110 // CHECK12: cond.false:
5111 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5112 // CHECK12-NEXT: br label [[COND_END]]
5113 // CHECK12: cond.end:
5114 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5115 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5116 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5117 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5118 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5119 // CHECK12: omp.inner.for.cond:
5120 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5121 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5122 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5123 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5124 // CHECK12: omp.inner.for.body:
5125 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5126 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
5127 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5128 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5129 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
5130 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
5131 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5132 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5133 // CHECK12: omp.body.continue:
5134 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5135 // CHECK12: omp.inner.for.inc:
5136 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5137 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
5138 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5139 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
5140 // CHECK12: omp.inner.for.end:
5141 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5142 // CHECK12: omp.loop.exit:
5143 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5144 // CHECK12-NEXT: ret void
5145 //
5146 //
5147 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
5148 // CHECK12-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5149 // CHECK12-NEXT: entry:
5150 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5151 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5152 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5153 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5154 // CHECK12-NEXT: ret void
5155 //
5156 //
5157 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..10
5158 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5159 // CHECK12-NEXT: entry:
5160 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5161 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5162 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
5163 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5164 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
5165 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5166 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5167 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5168 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5169 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5170 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5171 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5172 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
5173 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
5174 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5175 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
5176 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5177 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5178 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5179 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5180 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
5181 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5182 // CHECK12: omp.dispatch.cond:
5183 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5184 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
5185 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5186 // CHECK12: cond.true:
5187 // CHECK12-NEXT: br label [[COND_END:%.*]]
5188 // CHECK12: cond.false:
5189 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5190 // CHECK12-NEXT: br label [[COND_END]]
5191 // CHECK12: cond.end:
5192 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5193 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5194 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5195 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5196 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5197 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5198 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5199 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5200 // CHECK12: omp.dispatch.body:
5201 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5202 // CHECK12: omp.inner.for.cond:
5203 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5204 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
5205 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5206 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5207 // CHECK12: omp.inner.for.body:
5208 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5209 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5210 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5211 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
5212 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15
5213 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
5214 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
5215 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5216 // CHECK12: omp.body.continue:
5217 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5218 // CHECK12: omp.inner.for.inc:
5219 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5220 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5221 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5222 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5223 // CHECK12: omp.inner.for.end:
5224 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5225 // CHECK12: omp.dispatch.inc:
5226 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5227 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5228 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5229 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
5230 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5231 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5232 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
5233 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
5234 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]]
5235 // CHECK12: omp.dispatch.end:
5236 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5237 // CHECK12-NEXT: ret void
5238 //
5239 //
5240 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5241 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] {
5242 // CHECK12-NEXT: entry:
5243 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
5244 // CHECK12-NEXT: ret void
5245 //
5246