1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5
6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9
10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
13
14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17
18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
21
22 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25
26 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
29
30 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
32 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
33
34 // expected-no-diagnostics
35 #ifndef HEADER
36 #define HEADER
37
38 void fn1();
39 void fn2();
40 void fn3();
41 void fn4();
42 void fn5();
43 void fn6();
44
45 int Arg;
46
gtid_test()47 void gtid_test() {
48 #pragma omp target
49 #pragma omp teams distribute parallel for
50 for(int i = 0 ; i < 100; i++) {}
51
52 #pragma omp target
53 #pragma omp teams distribute parallel for if (parallel: false)
54 for(int i = 0 ; i < 100; i++) {
55 gtid_test();
56 }
57 }
58
59
60 template <typename T>
tmain(T Arg)61 int tmain(T Arg) {
62 #pragma omp target
63 #pragma omp teams distribute parallel for if (true)
64 for(int i = 0 ; i < 100; i++) {
65 fn1();
66 }
67 #pragma omp target
68 #pragma omp teams distribute parallel for if (false)
69 for(int i = 0 ; i < 100; i++) {
70 fn2();
71 }
72 #pragma omp target
73 #pragma omp teams distribute parallel for if (parallel: Arg)
74 for(int i = 0 ; i < 100; i++) {
75 fn3();
76 }
77 return 0;
78 }
79
main()80 int main() {
81 #pragma omp target
82 #pragma omp teams distribute parallel for if (true)
83 for(int i = 0 ; i < 100; i++) {
84
85
86 fn4();
87 }
88
89 #pragma omp target
90 #pragma omp teams distribute parallel for if (false)
91 for(int i = 0 ; i < 100; i++) {
92
93
94 fn5();
95 }
96
97 #pragma omp target
98 #pragma omp teams distribute parallel for if (Arg)
99 for(int i = 0 ; i < 100; i++) {
100
101
102 fn6();
103 }
104
105 return tmain(Arg);
106 }
107
108
109
110
111
112
113 // call void [[T_OUTLINE_FUN_3:@.+]](
114
115 #endif
116 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
117 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
118 // CHECK1-NEXT: entry:
119 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
120 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
121 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
122 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
123 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
124 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
125 // CHECK1: omp_offload.failed:
126 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
127 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
128 // CHECK1: omp_offload.cont:
129 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
130 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
131 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
132 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
133 // CHECK1: omp_offload.failed2:
134 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
135 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]]
136 // CHECK1: omp_offload.cont3:
137 // CHECK1-NEXT: ret void
138 //
139 //
140 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
141 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
142 // CHECK1-NEXT: entry:
143 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
144 // CHECK1-NEXT: ret void
145 //
146 //
147 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
148 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
149 // CHECK1-NEXT: entry:
150 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
151 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
152 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
153 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
154 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
155 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
156 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
157 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
158 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
159 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
160 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
161 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
162 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
163 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
164 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
165 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
166 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
167 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
168 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
169 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
170 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
171 // CHECK1: cond.true:
172 // CHECK1-NEXT: br label [[COND_END:%.*]]
173 // CHECK1: cond.false:
174 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
175 // CHECK1-NEXT: br label [[COND_END]]
176 // CHECK1: cond.end:
177 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
178 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
179 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
180 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
181 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
182 // CHECK1: omp.inner.for.cond:
183 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
184 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
185 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
186 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
187 // CHECK1: omp.inner.for.body:
188 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
189 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
190 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
191 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
192 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
193 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
194 // CHECK1: omp.inner.for.inc:
195 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
196 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
197 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
198 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
199 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
200 // CHECK1: omp.inner.for.end:
201 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
202 // CHECK1: omp.loop.exit:
203 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
204 // CHECK1-NEXT: ret void
205 //
206 //
207 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
208 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
209 // CHECK1-NEXT: entry:
210 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
211 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
212 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
213 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
214 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
215 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
216 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
217 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
218 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
219 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
220 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
221 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
222 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
223 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
224 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
225 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
226 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
227 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
228 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
229 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
230 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
231 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
232 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
233 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
234 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
235 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
236 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
237 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
238 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
239 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
240 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
241 // CHECK1: cond.true:
242 // CHECK1-NEXT: br label [[COND_END:%.*]]
243 // CHECK1: cond.false:
244 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
245 // CHECK1-NEXT: br label [[COND_END]]
246 // CHECK1: cond.end:
247 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
248 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
249 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
250 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
251 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
252 // CHECK1: omp.inner.for.cond:
253 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
254 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
255 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
256 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
257 // CHECK1: omp.inner.for.body:
258 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
259 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
260 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
261 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
262 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
263 // CHECK1: omp.body.continue:
264 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
265 // CHECK1: omp.inner.for.inc:
266 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
267 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
268 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
270 // CHECK1: omp.inner.for.end:
271 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
272 // CHECK1: omp.loop.exit:
273 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
274 // CHECK1-NEXT: ret void
275 //
276 //
277 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
278 // CHECK1-SAME: () #[[ATTR1]] {
279 // CHECK1-NEXT: entry:
280 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
281 // CHECK1-NEXT: ret void
282 //
283 //
284 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
285 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
286 // CHECK1-NEXT: entry:
287 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
288 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
289 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
290 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
291 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
292 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
293 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
294 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
295 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
296 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
297 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
298 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
299 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
300 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
301 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
302 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
303 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
304 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
305 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
306 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
307 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
308 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
309 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
310 // CHECK1: cond.true:
311 // CHECK1-NEXT: br label [[COND_END:%.*]]
312 // CHECK1: cond.false:
313 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
314 // CHECK1-NEXT: br label [[COND_END]]
315 // CHECK1: cond.end:
316 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
317 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
318 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
319 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
320 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
321 // CHECK1: omp.inner.for.cond:
322 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
323 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
324 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
325 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
326 // CHECK1: omp.inner.for.body:
327 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
328 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
329 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
330 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
331 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
332 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
333 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
334 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
335 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
336 // CHECK1: omp.inner.for.inc:
337 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
338 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
339 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
340 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
341 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
342 // CHECK1: omp.inner.for.end:
343 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
344 // CHECK1: omp.loop.exit:
345 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
346 // CHECK1-NEXT: ret void
347 //
348 //
349 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
350 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
351 // CHECK1-NEXT: entry:
352 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
353 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
354 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
355 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
356 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
357 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
358 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
359 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
360 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
361 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
362 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
363 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
364 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
365 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
366 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
367 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
368 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
369 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
370 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
371 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
372 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
373 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
374 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
375 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
376 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
377 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
378 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
379 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
380 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
381 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
382 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
383 // CHECK1: cond.true:
384 // CHECK1-NEXT: br label [[COND_END:%.*]]
385 // CHECK1: cond.false:
386 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
387 // CHECK1-NEXT: br label [[COND_END]]
388 // CHECK1: cond.end:
389 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
390 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
391 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
392 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
394 // CHECK1: omp.inner.for.cond:
395 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
396 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
397 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
398 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
399 // CHECK1: omp.inner.for.body:
400 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
401 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
402 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
403 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
404 // CHECK1-NEXT: call void @_Z9gtid_testv()
405 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
406 // CHECK1: omp.body.continue:
407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
408 // CHECK1: omp.inner.for.inc:
409 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
410 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
411 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
412 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
413 // CHECK1: omp.inner.for.end:
414 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
415 // CHECK1: omp.loop.exit:
416 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
417 // CHECK1-NEXT: ret void
418 //
419 //
420 // CHECK1-LABEL: define {{[^@]+}}@main
421 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
422 // CHECK1-NEXT: entry:
423 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
424 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
425 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
426 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
427 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
428 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
429 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
430 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
431 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
432 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
433 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
434 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
435 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
436 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
437 // CHECK1: omp_offload.failed:
438 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
439 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
440 // CHECK1: omp_offload.cont:
441 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
442 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
443 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
444 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
445 // CHECK1: omp_offload.failed2:
446 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
447 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]]
448 // CHECK1: omp_offload.cont3:
449 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4
450 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
451 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
452 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
453 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
454 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
455 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
456 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
457 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
458 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
459 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
460 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8
461 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
462 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
463 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4
464 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
465 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
466 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
467 // CHECK1-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
468 // CHECK1-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
469 // CHECK1-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
470 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
471 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
472 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
473 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
474 // CHECK1: omp_offload.failed6:
475 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
476 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]]
477 // CHECK1: omp_offload.cont7:
478 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4
479 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
480 // CHECK1-NEXT: ret i32 [[CALL]]
481 //
482 //
483 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
484 // CHECK1-SAME: () #[[ATTR1]] {
485 // CHECK1-NEXT: entry:
486 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
487 // CHECK1-NEXT: ret void
488 //
489 //
490 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
491 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
492 // CHECK1-NEXT: entry:
493 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
494 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
495 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
496 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
497 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
498 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
499 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
500 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
501 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
502 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
503 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
504 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
505 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
506 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
507 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
508 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
509 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
510 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
511 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
512 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
513 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
514 // CHECK1: cond.true:
515 // CHECK1-NEXT: br label [[COND_END:%.*]]
516 // CHECK1: cond.false:
517 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
518 // CHECK1-NEXT: br label [[COND_END]]
519 // CHECK1: cond.end:
520 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
521 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
522 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
523 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
524 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
525 // CHECK1: omp.inner.for.cond:
526 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
527 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
528 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
529 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
530 // CHECK1: omp.inner.for.body:
531 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
532 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
533 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
534 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
535 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
536 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
537 // CHECK1: omp.inner.for.inc:
538 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
539 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
540 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
541 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
542 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
543 // CHECK1: omp.inner.for.end:
544 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
545 // CHECK1: omp.loop.exit:
546 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
547 // CHECK1-NEXT: ret void
548 //
549 //
550 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
551 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
552 // CHECK1-NEXT: entry:
553 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
554 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
555 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
556 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
557 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
558 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
559 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
560 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
561 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
562 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
563 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
564 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
565 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
566 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
567 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
568 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
569 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
570 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
571 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
572 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
573 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
574 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
575 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
576 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
577 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
578 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
579 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
580 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
581 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
582 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
583 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
584 // CHECK1: cond.true:
585 // CHECK1-NEXT: br label [[COND_END:%.*]]
586 // CHECK1: cond.false:
587 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
588 // CHECK1-NEXT: br label [[COND_END]]
589 // CHECK1: cond.end:
590 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
591 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
592 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
593 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
594 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
595 // CHECK1: omp.inner.for.cond:
596 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
597 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
598 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
599 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
600 // CHECK1: omp.inner.for.body:
601 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
602 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
603 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
604 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
605 // CHECK1-NEXT: call void @_Z3fn4v()
606 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
607 // CHECK1: omp.body.continue:
608 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
609 // CHECK1: omp.inner.for.inc:
610 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
611 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
612 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
613 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
614 // CHECK1: omp.inner.for.end:
615 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
616 // CHECK1: omp.loop.exit:
617 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
618 // CHECK1-NEXT: ret void
619 //
620 //
621 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
622 // CHECK1-SAME: () #[[ATTR1]] {
623 // CHECK1-NEXT: entry:
624 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
625 // CHECK1-NEXT: ret void
626 //
627 //
628 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
629 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
630 // CHECK1-NEXT: entry:
631 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
632 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
633 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
634 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
635 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
636 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
637 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
638 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
639 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
640 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
641 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
642 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
643 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
644 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
645 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
646 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
647 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
648 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
649 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
650 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
651 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
652 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
653 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
654 // CHECK1: cond.true:
655 // CHECK1-NEXT: br label [[COND_END:%.*]]
656 // CHECK1: cond.false:
657 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
658 // CHECK1-NEXT: br label [[COND_END]]
659 // CHECK1: cond.end:
660 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
661 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
662 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
663 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
664 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
665 // CHECK1: omp.inner.for.cond:
666 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
667 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
668 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
669 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
670 // CHECK1: omp.inner.for.body:
671 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
672 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
673 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
674 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
675 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
676 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
677 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
678 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
679 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
680 // CHECK1: omp.inner.for.inc:
681 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
682 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
683 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
684 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
685 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
686 // CHECK1: omp.inner.for.end:
687 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
688 // CHECK1: omp.loop.exit:
689 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
690 // CHECK1-NEXT: ret void
691 //
692 //
693 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
694 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
695 // CHECK1-NEXT: entry:
696 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
697 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
698 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
699 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
700 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
701 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
702 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
703 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
704 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
705 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
706 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
707 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
708 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
709 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
710 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
711 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
712 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
713 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
714 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
715 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
716 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
717 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
718 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
719 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
720 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
721 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
722 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
723 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
724 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
725 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
726 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
727 // CHECK1: cond.true:
728 // CHECK1-NEXT: br label [[COND_END:%.*]]
729 // CHECK1: cond.false:
730 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
731 // CHECK1-NEXT: br label [[COND_END]]
732 // CHECK1: cond.end:
733 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
734 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
735 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
736 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
737 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
738 // CHECK1: omp.inner.for.cond:
739 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
740 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
741 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
742 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
743 // CHECK1: omp.inner.for.body:
744 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
745 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
746 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
747 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
748 // CHECK1-NEXT: call void @_Z3fn5v()
749 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
750 // CHECK1: omp.body.continue:
751 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
752 // CHECK1: omp.inner.for.inc:
753 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
754 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
755 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
756 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
757 // CHECK1: omp.inner.for.end:
758 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
759 // CHECK1: omp.loop.exit:
760 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
761 // CHECK1-NEXT: ret void
762 //
763 //
764 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
765 // CHECK1-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
766 // CHECK1-NEXT: entry:
767 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
768 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
769 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
770 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
771 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
772 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
773 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
774 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
775 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
776 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
777 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
778 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
779 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
780 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
781 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
782 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
783 // CHECK1-NEXT: ret void
784 //
785 //
786 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
787 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
788 // CHECK1-NEXT: entry:
789 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
790 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
791 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
792 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
793 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
794 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
795 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
796 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
797 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
798 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
799 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
800 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
801 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
802 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
803 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
804 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
805 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
806 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
807 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
808 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
809 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
810 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
811 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
812 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
813 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
814 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
815 // CHECK1: cond.true:
816 // CHECK1-NEXT: br label [[COND_END:%.*]]
817 // CHECK1: cond.false:
818 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
819 // CHECK1-NEXT: br label [[COND_END]]
820 // CHECK1: cond.end:
821 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
822 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
823 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
824 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
825 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
826 // CHECK1: omp.inner.for.cond:
827 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
828 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
829 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
830 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
831 // CHECK1: omp.inner.for.body:
832 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
833 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
834 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
835 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
836 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
837 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
838 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
839 // CHECK1: omp_if.then:
840 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
841 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
842 // CHECK1: omp_if.else:
843 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
844 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
845 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
846 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
847 // CHECK1-NEXT: br label [[OMP_IF_END]]
848 // CHECK1: omp_if.end:
849 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
850 // CHECK1: omp.inner.for.inc:
851 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
852 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
853 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
854 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
855 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
856 // CHECK1: omp.inner.for.end:
857 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
858 // CHECK1: omp.loop.exit:
859 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
860 // CHECK1-NEXT: ret void
861 //
862 //
863 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
864 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
865 // CHECK1-NEXT: entry:
866 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
867 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
868 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
869 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
870 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
871 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
872 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
873 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
874 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
875 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
876 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
877 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
878 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
879 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
880 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
881 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
882 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
883 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
884 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
885 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
886 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
887 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
888 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
889 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
890 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
891 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
892 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
893 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
894 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
895 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
896 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
897 // CHECK1: cond.true:
898 // CHECK1-NEXT: br label [[COND_END:%.*]]
899 // CHECK1: cond.false:
900 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
901 // CHECK1-NEXT: br label [[COND_END]]
902 // CHECK1: cond.end:
903 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
904 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
905 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
906 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
907 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
908 // CHECK1: omp.inner.for.cond:
909 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
910 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
911 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
912 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
913 // CHECK1: omp.inner.for.body:
914 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
915 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
916 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
917 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
918 // CHECK1-NEXT: call void @_Z3fn6v()
919 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
920 // CHECK1: omp.body.continue:
921 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
922 // CHECK1: omp.inner.for.inc:
923 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
924 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
925 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
926 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
927 // CHECK1: omp.inner.for.end:
928 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
929 // CHECK1: omp.loop.exit:
930 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
931 // CHECK1-NEXT: ret void
932 //
933 //
934 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
935 // CHECK1-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
936 // CHECK1-NEXT: entry:
937 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
938 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
939 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
940 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
941 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
942 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
943 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
944 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
945 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
946 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
947 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
948 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
949 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
950 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
951 // CHECK1: omp_offload.failed:
952 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
953 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
954 // CHECK1: omp_offload.cont:
955 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
956 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
957 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
958 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
959 // CHECK1: omp_offload.failed2:
960 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
961 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]]
962 // CHECK1: omp_offload.cont3:
963 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
964 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
965 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
966 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
967 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
968 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
969 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
970 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
971 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
972 // CHECK1-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
973 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
974 // CHECK1-NEXT: store i8* null, i8** [[TMP10]], align 8
975 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
976 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
977 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
978 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
979 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
980 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
981 // CHECK1-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
982 // CHECK1-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
983 // CHECK1-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
984 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
985 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
986 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
987 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
988 // CHECK1: omp_offload.failed6:
989 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
990 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]]
991 // CHECK1: omp_offload.cont7:
992 // CHECK1-NEXT: ret i32 0
993 //
994 //
995 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
996 // CHECK1-SAME: () #[[ATTR1]] {
997 // CHECK1-NEXT: entry:
998 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
999 // CHECK1-NEXT: ret void
1000 //
1001 //
1002 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1003 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1004 // CHECK1-NEXT: entry:
1005 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1006 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1007 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1008 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1009 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1010 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1011 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1012 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1013 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1014 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1015 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1016 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1017 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1018 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1019 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1020 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1021 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1022 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1023 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1024 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1025 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1026 // CHECK1: cond.true:
1027 // CHECK1-NEXT: br label [[COND_END:%.*]]
1028 // CHECK1: cond.false:
1029 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1030 // CHECK1-NEXT: br label [[COND_END]]
1031 // CHECK1: cond.end:
1032 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1033 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1034 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1035 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1036 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1037 // CHECK1: omp.inner.for.cond:
1038 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1039 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1040 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1041 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1042 // CHECK1: omp.inner.for.body:
1043 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1044 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1045 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1046 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1047 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1048 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1049 // CHECK1: omp.inner.for.inc:
1050 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1051 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1052 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1053 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1054 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1055 // CHECK1: omp.inner.for.end:
1056 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1057 // CHECK1: omp.loop.exit:
1058 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1059 // CHECK1-NEXT: ret void
1060 //
1061 //
1062 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1063 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1064 // CHECK1-NEXT: entry:
1065 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1066 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1067 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1068 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1069 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1070 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1071 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1072 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1073 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1074 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1075 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1076 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1077 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1078 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1079 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1080 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1081 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1082 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1083 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1084 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1085 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1086 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1087 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1088 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1089 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1090 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1091 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1092 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1093 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1094 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1095 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1096 // CHECK1: cond.true:
1097 // CHECK1-NEXT: br label [[COND_END:%.*]]
1098 // CHECK1: cond.false:
1099 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1100 // CHECK1-NEXT: br label [[COND_END]]
1101 // CHECK1: cond.end:
1102 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1103 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1104 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1105 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1106 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1107 // CHECK1: omp.inner.for.cond:
1108 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1109 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1110 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1111 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1112 // CHECK1: omp.inner.for.body:
1113 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1114 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1115 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1116 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1117 // CHECK1-NEXT: call void @_Z3fn1v()
1118 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1119 // CHECK1: omp.body.continue:
1120 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1121 // CHECK1: omp.inner.for.inc:
1122 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1123 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1124 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1125 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1126 // CHECK1: omp.inner.for.end:
1127 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1128 // CHECK1: omp.loop.exit:
1129 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1130 // CHECK1-NEXT: ret void
1131 //
1132 //
1133 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
1134 // CHECK1-SAME: () #[[ATTR1]] {
1135 // CHECK1-NEXT: entry:
1136 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
1137 // CHECK1-NEXT: ret void
1138 //
1139 //
1140 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
1141 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1142 // CHECK1-NEXT: entry:
1143 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1144 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1145 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1146 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1147 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1148 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1149 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1150 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1151 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1152 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1153 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1154 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1155 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1156 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1157 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1158 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1159 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1160 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1161 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1162 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1163 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1164 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1165 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1166 // CHECK1: cond.true:
1167 // CHECK1-NEXT: br label [[COND_END:%.*]]
1168 // CHECK1: cond.false:
1169 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1170 // CHECK1-NEXT: br label [[COND_END]]
1171 // CHECK1: cond.end:
1172 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1173 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1174 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1175 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1176 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1177 // CHECK1: omp.inner.for.cond:
1178 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1179 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1180 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1181 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1182 // CHECK1: omp.inner.for.body:
1183 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1184 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1185 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1186 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1187 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1188 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1189 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
1190 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1191 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1192 // CHECK1: omp.inner.for.inc:
1193 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1194 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1195 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1196 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1197 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1198 // CHECK1: omp.inner.for.end:
1199 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1200 // CHECK1: omp.loop.exit:
1201 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1202 // CHECK1-NEXT: ret void
1203 //
1204 //
1205 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
1206 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1207 // CHECK1-NEXT: entry:
1208 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1209 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1210 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1211 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1212 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1213 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1214 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1215 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1216 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1217 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1218 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1219 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1220 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1221 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1222 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1223 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1224 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1225 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1226 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1227 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1228 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1229 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1230 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1231 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1232 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1233 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1234 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1235 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1236 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1237 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1238 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1239 // CHECK1: cond.true:
1240 // CHECK1-NEXT: br label [[COND_END:%.*]]
1241 // CHECK1: cond.false:
1242 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1243 // CHECK1-NEXT: br label [[COND_END]]
1244 // CHECK1: cond.end:
1245 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1246 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1247 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1248 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1249 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1250 // CHECK1: omp.inner.for.cond:
1251 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1252 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1253 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1254 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1255 // CHECK1: omp.inner.for.body:
1256 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1257 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1258 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1259 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1260 // CHECK1-NEXT: call void @_Z3fn2v()
1261 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1262 // CHECK1: omp.body.continue:
1263 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1264 // CHECK1: omp.inner.for.inc:
1265 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1266 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1267 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1268 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1269 // CHECK1: omp.inner.for.end:
1270 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1271 // CHECK1: omp.loop.exit:
1272 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1273 // CHECK1-NEXT: ret void
1274 //
1275 //
1276 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
1277 // CHECK1-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
1278 // CHECK1-NEXT: entry:
1279 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1280 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1281 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1282 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1283 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1284 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
1285 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
1286 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1287 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1288 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1289 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
1290 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1291 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
1292 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
1293 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1294 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
1295 // CHECK1-NEXT: ret void
1296 //
1297 //
1298 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1299 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1300 // CHECK1-NEXT: entry:
1301 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1302 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1303 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1304 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1305 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1306 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1307 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1308 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1309 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1310 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1311 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1312 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1313 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1314 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1315 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1316 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1317 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1318 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1319 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1320 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1321 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1322 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1323 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1324 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1325 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1326 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1327 // CHECK1: cond.true:
1328 // CHECK1-NEXT: br label [[COND_END:%.*]]
1329 // CHECK1: cond.false:
1330 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1331 // CHECK1-NEXT: br label [[COND_END]]
1332 // CHECK1: cond.end:
1333 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1334 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1335 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1336 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1337 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1338 // CHECK1: omp.inner.for.cond:
1339 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1340 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1341 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1342 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1343 // CHECK1: omp.inner.for.body:
1344 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1345 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1346 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1347 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1348 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
1349 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
1350 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1351 // CHECK1: omp_if.then:
1352 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1353 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1354 // CHECK1: omp_if.else:
1355 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1356 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1357 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
1358 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1359 // CHECK1-NEXT: br label [[OMP_IF_END]]
1360 // CHECK1: omp_if.end:
1361 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1362 // CHECK1: omp.inner.for.inc:
1363 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1364 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1365 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1366 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1367 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1368 // CHECK1: omp.inner.for.end:
1369 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1370 // CHECK1: omp.loop.exit:
1371 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1372 // CHECK1-NEXT: ret void
1373 //
1374 //
1375 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1376 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1377 // CHECK1-NEXT: entry:
1378 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1379 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1380 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1381 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1382 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1383 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1384 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1385 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1386 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1387 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1388 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1389 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1390 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1391 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1392 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1393 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1394 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1395 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1396 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1397 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1398 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1399 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1400 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1401 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1402 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1403 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1404 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1405 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1406 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1407 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1408 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1409 // CHECK1: cond.true:
1410 // CHECK1-NEXT: br label [[COND_END:%.*]]
1411 // CHECK1: cond.false:
1412 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1413 // CHECK1-NEXT: br label [[COND_END]]
1414 // CHECK1: cond.end:
1415 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1416 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1417 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1418 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1419 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1420 // CHECK1: omp.inner.for.cond:
1421 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1422 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1423 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1424 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1425 // CHECK1: omp.inner.for.body:
1426 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1427 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1428 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1429 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1430 // CHECK1-NEXT: call void @_Z3fn3v()
1431 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1432 // CHECK1: omp.body.continue:
1433 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1434 // CHECK1: omp.inner.for.inc:
1435 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1436 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1437 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1438 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1439 // CHECK1: omp.inner.for.end:
1440 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1441 // CHECK1: omp.loop.exit:
1442 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1443 // CHECK1-NEXT: ret void
1444 //
1445 //
1446 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1447 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
1448 // CHECK1-NEXT: entry:
1449 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1450 // CHECK1-NEXT: ret void
1451 //
1452 //
1453 // CHECK2-LABEL: define {{[^@]+}}@_Z9gtid_testv
1454 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
1455 // CHECK2-NEXT: entry:
1456 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1457 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1458 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
1459 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1460 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1461 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1462 // CHECK2: omp_offload.failed:
1463 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
1464 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
1465 // CHECK2: omp_offload.cont:
1466 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1467 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1468 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
1469 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1470 // CHECK2: omp_offload.failed2:
1471 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
1472 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]]
1473 // CHECK2: omp_offload.cont3:
1474 // CHECK2-NEXT: ret void
1475 //
1476 //
1477 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
1478 // CHECK2-SAME: () #[[ATTR1:[0-9]+]] {
1479 // CHECK2-NEXT: entry:
1480 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1481 // CHECK2-NEXT: ret void
1482 //
1483 //
1484 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1485 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1486 // CHECK2-NEXT: entry:
1487 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1488 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1489 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1490 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1491 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1492 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1493 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1494 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1495 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1496 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1497 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1498 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1499 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1500 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1501 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1502 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1503 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1504 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1505 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1506 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1507 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1508 // CHECK2: cond.true:
1509 // CHECK2-NEXT: br label [[COND_END:%.*]]
1510 // CHECK2: cond.false:
1511 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1512 // CHECK2-NEXT: br label [[COND_END]]
1513 // CHECK2: cond.end:
1514 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1515 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1516 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1517 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1518 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1519 // CHECK2: omp.inner.for.cond:
1520 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1521 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1522 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1523 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1524 // CHECK2: omp.inner.for.body:
1525 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1526 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1527 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1528 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1529 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1530 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1531 // CHECK2: omp.inner.for.inc:
1532 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1533 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1534 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1535 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1536 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1537 // CHECK2: omp.inner.for.end:
1538 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1539 // CHECK2: omp.loop.exit:
1540 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1541 // CHECK2-NEXT: ret void
1542 //
1543 //
1544 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1545 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1546 // CHECK2-NEXT: entry:
1547 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1548 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1549 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1550 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1551 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1552 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1553 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1554 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1555 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1556 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1557 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1558 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1559 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1560 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1561 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1562 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1563 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1564 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1565 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1566 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1567 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1568 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1569 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1570 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1571 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1572 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1573 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1574 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1575 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1576 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1577 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1578 // CHECK2: cond.true:
1579 // CHECK2-NEXT: br label [[COND_END:%.*]]
1580 // CHECK2: cond.false:
1581 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1582 // CHECK2-NEXT: br label [[COND_END]]
1583 // CHECK2: cond.end:
1584 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1585 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1586 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1587 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1588 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1589 // CHECK2: omp.inner.for.cond:
1590 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1591 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1592 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1593 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1594 // CHECK2: omp.inner.for.body:
1595 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1596 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1597 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1598 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1599 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1600 // CHECK2: omp.body.continue:
1601 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1602 // CHECK2: omp.inner.for.inc:
1603 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1604 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1605 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1606 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1607 // CHECK2: omp.inner.for.end:
1608 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1609 // CHECK2: omp.loop.exit:
1610 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1611 // CHECK2-NEXT: ret void
1612 //
1613 //
1614 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
1615 // CHECK2-SAME: () #[[ATTR1]] {
1616 // CHECK2-NEXT: entry:
1617 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1618 // CHECK2-NEXT: ret void
1619 //
1620 //
1621 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1622 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1623 // CHECK2-NEXT: entry:
1624 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1625 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1626 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1627 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1628 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1629 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1630 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1631 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1632 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1633 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1634 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1635 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1636 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1637 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1638 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1639 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1640 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1641 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1642 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1643 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1644 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1645 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1646 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1647 // CHECK2: cond.true:
1648 // CHECK2-NEXT: br label [[COND_END:%.*]]
1649 // CHECK2: cond.false:
1650 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1651 // CHECK2-NEXT: br label [[COND_END]]
1652 // CHECK2: cond.end:
1653 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1654 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1655 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1656 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1657 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1658 // CHECK2: omp.inner.for.cond:
1659 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1660 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1661 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1662 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1663 // CHECK2: omp.inner.for.body:
1664 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1665 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1666 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1667 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1668 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1669 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1670 // CHECK2-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
1671 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1672 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1673 // CHECK2: omp.inner.for.inc:
1674 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1675 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1676 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1677 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1678 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1679 // CHECK2: omp.inner.for.end:
1680 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1681 // CHECK2: omp.loop.exit:
1682 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1683 // CHECK2-NEXT: ret void
1684 //
1685 //
1686 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1687 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1688 // CHECK2-NEXT: entry:
1689 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1690 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1691 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1692 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1693 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1694 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1695 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1696 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1697 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1698 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1699 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1700 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1701 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1702 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1703 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1704 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1705 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1706 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1707 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1708 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1709 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1710 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1711 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1712 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1713 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1714 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1715 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1716 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1717 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1718 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1719 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1720 // CHECK2: cond.true:
1721 // CHECK2-NEXT: br label [[COND_END:%.*]]
1722 // CHECK2: cond.false:
1723 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1724 // CHECK2-NEXT: br label [[COND_END]]
1725 // CHECK2: cond.end:
1726 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1727 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1728 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1729 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1730 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1731 // CHECK2: omp.inner.for.cond:
1732 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1733 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1734 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1735 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1736 // CHECK2: omp.inner.for.body:
1737 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1738 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1739 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1740 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1741 // CHECK2-NEXT: call void @_Z9gtid_testv()
1742 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1743 // CHECK2: omp.body.continue:
1744 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1745 // CHECK2: omp.inner.for.inc:
1746 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1747 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1748 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1749 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1750 // CHECK2: omp.inner.for.end:
1751 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1752 // CHECK2: omp.loop.exit:
1753 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1754 // CHECK2-NEXT: ret void
1755 //
1756 //
1757 // CHECK2-LABEL: define {{[^@]+}}@main
1758 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
1759 // CHECK2-NEXT: entry:
1760 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1761 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1762 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1763 // CHECK2-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1764 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1765 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1766 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1767 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1768 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
1769 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
1770 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1771 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1772 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
1773 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1774 // CHECK2: omp_offload.failed:
1775 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
1776 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
1777 // CHECK2: omp_offload.cont:
1778 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1779 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
1780 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
1781 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
1782 // CHECK2: omp_offload.failed2:
1783 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
1784 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]]
1785 // CHECK2: omp_offload.cont3:
1786 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4
1787 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1788 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
1789 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
1790 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1791 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
1792 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
1793 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1794 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
1795 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
1796 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1797 // CHECK2-NEXT: store i8* null, i8** [[TMP10]], align 8
1798 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1799 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1800 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4
1801 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
1802 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1803 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1804 // CHECK2-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1805 // CHECK2-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
1806 // CHECK2-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
1807 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
1808 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
1809 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1810 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1811 // CHECK2: omp_offload.failed6:
1812 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
1813 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT7]]
1814 // CHECK2: omp_offload.cont7:
1815 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4
1816 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
1817 // CHECK2-NEXT: ret i32 [[CALL]]
1818 //
1819 //
1820 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
1821 // CHECK2-SAME: () #[[ATTR1]] {
1822 // CHECK2-NEXT: entry:
1823 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1824 // CHECK2-NEXT: ret void
1825 //
1826 //
1827 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
1828 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1829 // CHECK2-NEXT: entry:
1830 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1831 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1832 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1833 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1834 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1835 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1836 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1837 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1838 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1839 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1840 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1841 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1842 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1843 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1844 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1845 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1846 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1847 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1848 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1849 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1850 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1851 // CHECK2: cond.true:
1852 // CHECK2-NEXT: br label [[COND_END:%.*]]
1853 // CHECK2: cond.false:
1854 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1855 // CHECK2-NEXT: br label [[COND_END]]
1856 // CHECK2: cond.end:
1857 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1858 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1859 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1860 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1861 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1862 // CHECK2: omp.inner.for.cond:
1863 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1864 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1865 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1866 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1867 // CHECK2: omp.inner.for.body:
1868 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1869 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1870 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1871 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1872 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1873 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1874 // CHECK2: omp.inner.for.inc:
1875 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1876 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1877 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1878 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1879 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1880 // CHECK2: omp.inner.for.end:
1881 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1882 // CHECK2: omp.loop.exit:
1883 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1884 // CHECK2-NEXT: ret void
1885 //
1886 //
1887 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5
1888 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1889 // CHECK2-NEXT: entry:
1890 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1891 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1892 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1893 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1894 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1895 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1896 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1897 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1898 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1899 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1900 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1901 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1902 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1903 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1904 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1905 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1906 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1907 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1908 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1909 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1910 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1911 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1912 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1913 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1914 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1915 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1916 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1917 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1918 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1919 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1920 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1921 // CHECK2: cond.true:
1922 // CHECK2-NEXT: br label [[COND_END:%.*]]
1923 // CHECK2: cond.false:
1924 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1925 // CHECK2-NEXT: br label [[COND_END]]
1926 // CHECK2: cond.end:
1927 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1928 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1929 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1930 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1931 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1932 // CHECK2: omp.inner.for.cond:
1933 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1934 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1935 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1936 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1937 // CHECK2: omp.inner.for.body:
1938 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1939 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1940 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1941 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1942 // CHECK2-NEXT: call void @_Z3fn4v()
1943 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1944 // CHECK2: omp.body.continue:
1945 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1946 // CHECK2: omp.inner.for.inc:
1947 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1948 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1949 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1950 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1951 // CHECK2: omp.inner.for.end:
1952 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1953 // CHECK2: omp.loop.exit:
1954 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1955 // CHECK2-NEXT: ret void
1956 //
1957 //
1958 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
1959 // CHECK2-SAME: () #[[ATTR1]] {
1960 // CHECK2-NEXT: entry:
1961 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
1962 // CHECK2-NEXT: ret void
1963 //
1964 //
1965 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
1966 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1967 // CHECK2-NEXT: entry:
1968 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1969 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1970 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1971 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1972 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1973 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1974 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1975 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1976 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1977 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1978 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1979 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1980 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1981 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1982 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1983 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1984 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1985 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1986 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1987 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1988 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1989 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1990 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1991 // CHECK2: cond.true:
1992 // CHECK2-NEXT: br label [[COND_END:%.*]]
1993 // CHECK2: cond.false:
1994 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1995 // CHECK2-NEXT: br label [[COND_END]]
1996 // CHECK2: cond.end:
1997 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1998 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1999 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2000 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2001 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2002 // CHECK2: omp.inner.for.cond:
2003 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2004 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2005 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2006 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2007 // CHECK2: omp.inner.for.body:
2008 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2009 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2010 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2011 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2012 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2013 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2014 // CHECK2-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2015 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2016 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2017 // CHECK2: omp.inner.for.inc:
2018 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2019 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2020 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2021 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2022 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2023 // CHECK2: omp.inner.for.end:
2024 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2025 // CHECK2: omp.loop.exit:
2026 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2027 // CHECK2-NEXT: ret void
2028 //
2029 //
2030 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
2031 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2032 // CHECK2-NEXT: entry:
2033 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2034 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2035 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2036 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2037 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2038 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2039 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2040 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2041 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2042 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2043 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2044 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2045 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2046 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2047 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2048 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2049 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2050 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2051 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2052 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2053 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2054 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2055 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2056 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2057 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2058 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2059 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2060 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2061 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2062 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2063 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2064 // CHECK2: cond.true:
2065 // CHECK2-NEXT: br label [[COND_END:%.*]]
2066 // CHECK2: cond.false:
2067 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2068 // CHECK2-NEXT: br label [[COND_END]]
2069 // CHECK2: cond.end:
2070 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2071 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2072 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2073 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2074 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2075 // CHECK2: omp.inner.for.cond:
2076 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2077 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2078 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2079 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2080 // CHECK2: omp.inner.for.body:
2081 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2082 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2083 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2084 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2085 // CHECK2-NEXT: call void @_Z3fn5v()
2086 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2087 // CHECK2: omp.body.continue:
2088 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2089 // CHECK2: omp.inner.for.inc:
2090 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2091 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2092 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2093 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2094 // CHECK2: omp.inner.for.end:
2095 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2096 // CHECK2: omp.loop.exit:
2097 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2098 // CHECK2-NEXT: ret void
2099 //
2100 //
2101 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
2102 // CHECK2-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
2103 // CHECK2-NEXT: entry:
2104 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
2105 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2106 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2107 // CHECK2-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
2108 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
2109 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2110 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
2111 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2112 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2113 // CHECK2-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2114 // CHECK2-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
2115 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2116 // CHECK2-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
2117 // CHECK2-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
2118 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2119 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
2120 // CHECK2-NEXT: ret void
2121 //
2122 //
2123 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8
2124 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2125 // CHECK2-NEXT: entry:
2126 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2127 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2128 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2129 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2130 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2131 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2132 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2133 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2134 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2135 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2136 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2137 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2138 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2139 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2140 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2141 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2142 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2143 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2144 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2145 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2146 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2147 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2148 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2149 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2150 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2151 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2152 // CHECK2: cond.true:
2153 // CHECK2-NEXT: br label [[COND_END:%.*]]
2154 // CHECK2: cond.false:
2155 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2156 // CHECK2-NEXT: br label [[COND_END]]
2157 // CHECK2: cond.end:
2158 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2159 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2160 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2161 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2162 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2163 // CHECK2: omp.inner.for.cond:
2164 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2165 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2166 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2167 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2168 // CHECK2: omp.inner.for.body:
2169 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2170 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2171 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2172 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2173 // CHECK2-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
2174 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
2175 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2176 // CHECK2: omp_if.then:
2177 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2178 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
2179 // CHECK2: omp_if.else:
2180 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2181 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2182 // CHECK2-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2183 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2184 // CHECK2-NEXT: br label [[OMP_IF_END]]
2185 // CHECK2: omp_if.end:
2186 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2187 // CHECK2: omp.inner.for.inc:
2188 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2189 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2190 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2191 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2192 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2193 // CHECK2: omp.inner.for.end:
2194 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2195 // CHECK2: omp.loop.exit:
2196 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2197 // CHECK2-NEXT: ret void
2198 //
2199 //
2200 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..9
2201 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2202 // CHECK2-NEXT: entry:
2203 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2204 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2205 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2206 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2207 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2208 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2209 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2210 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2211 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2212 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2213 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2214 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2215 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2216 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2217 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2218 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2219 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2220 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2221 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2222 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2223 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2224 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2225 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2226 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2227 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2228 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2229 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2230 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2231 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2232 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2233 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2234 // CHECK2: cond.true:
2235 // CHECK2-NEXT: br label [[COND_END:%.*]]
2236 // CHECK2: cond.false:
2237 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2238 // CHECK2-NEXT: br label [[COND_END]]
2239 // CHECK2: cond.end:
2240 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2241 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2242 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2243 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2244 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2245 // CHECK2: omp.inner.for.cond:
2246 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2247 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2248 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2249 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2250 // CHECK2: omp.inner.for.body:
2251 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2252 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2253 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2254 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2255 // CHECK2-NEXT: call void @_Z3fn6v()
2256 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2257 // CHECK2: omp.body.continue:
2258 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2259 // CHECK2: omp.inner.for.inc:
2260 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2261 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2262 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2263 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2264 // CHECK2: omp.inner.for.end:
2265 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2266 // CHECK2: omp.loop.exit:
2267 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2268 // CHECK2-NEXT: ret void
2269 //
2270 //
2271 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2272 // CHECK2-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
2273 // CHECK2-NEXT: entry:
2274 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
2275 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2276 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2277 // CHECK2-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
2278 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2279 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2280 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2281 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2282 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
2283 // CHECK2-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
2284 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2285 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2286 // CHECK2-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2287 // CHECK2-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2288 // CHECK2: omp_offload.failed:
2289 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
2290 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
2291 // CHECK2: omp_offload.cont:
2292 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2293 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
2294 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
2295 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
2296 // CHECK2: omp_offload.failed2:
2297 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
2298 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT3]]
2299 // CHECK2: omp_offload.cont3:
2300 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2301 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
2302 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
2303 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
2304 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2305 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
2306 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
2307 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2308 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
2309 // CHECK2-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
2310 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2311 // CHECK2-NEXT: store i8* null, i8** [[TMP10]], align 8
2312 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2313 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2314 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2315 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
2316 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2317 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2318 // CHECK2-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2319 // CHECK2-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
2320 // CHECK2-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
2321 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2322 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
2323 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2324 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
2325 // CHECK2: omp_offload.failed6:
2326 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
2327 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT7]]
2328 // CHECK2: omp_offload.cont7:
2329 // CHECK2-NEXT: ret i32 0
2330 //
2331 //
2332 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
2333 // CHECK2-SAME: () #[[ATTR1]] {
2334 // CHECK2-NEXT: entry:
2335 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
2336 // CHECK2-NEXT: ret void
2337 //
2338 //
2339 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
2340 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2341 // CHECK2-NEXT: entry:
2342 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2343 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2344 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2345 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2346 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2347 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2348 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2349 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2350 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2351 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2352 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2353 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2354 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2355 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2356 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2357 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2358 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2359 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2360 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2361 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2362 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2363 // CHECK2: cond.true:
2364 // CHECK2-NEXT: br label [[COND_END:%.*]]
2365 // CHECK2: cond.false:
2366 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2367 // CHECK2-NEXT: br label [[COND_END]]
2368 // CHECK2: cond.end:
2369 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2370 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2371 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2372 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2373 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2374 // CHECK2: omp.inner.for.cond:
2375 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2376 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2377 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2378 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2379 // CHECK2: omp.inner.for.body:
2380 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2381 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2382 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2383 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2384 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2385 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2386 // CHECK2: omp.inner.for.inc:
2387 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2388 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2389 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2390 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2391 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2392 // CHECK2: omp.inner.for.end:
2393 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2394 // CHECK2: omp.loop.exit:
2395 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2396 // CHECK2-NEXT: ret void
2397 //
2398 //
2399 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
2400 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2401 // CHECK2-NEXT: entry:
2402 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2403 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2404 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2405 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2406 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2407 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2408 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2409 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2410 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2411 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2412 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2413 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2414 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2415 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2416 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2417 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2418 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2419 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2420 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2421 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2422 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2423 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2424 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2425 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2426 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2427 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2428 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2429 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2430 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2431 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2432 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2433 // CHECK2: cond.true:
2434 // CHECK2-NEXT: br label [[COND_END:%.*]]
2435 // CHECK2: cond.false:
2436 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2437 // CHECK2-NEXT: br label [[COND_END]]
2438 // CHECK2: cond.end:
2439 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2440 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2441 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2442 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2443 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2444 // CHECK2: omp.inner.for.cond:
2445 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2446 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2447 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2448 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2449 // CHECK2: omp.inner.for.body:
2450 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2451 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2452 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2453 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2454 // CHECK2-NEXT: call void @_Z3fn1v()
2455 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2456 // CHECK2: omp.body.continue:
2457 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2458 // CHECK2: omp.inner.for.inc:
2459 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2460 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2461 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2462 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2463 // CHECK2: omp.inner.for.end:
2464 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2465 // CHECK2: omp.loop.exit:
2466 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2467 // CHECK2-NEXT: ret void
2468 //
2469 //
2470 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
2471 // CHECK2-SAME: () #[[ATTR1]] {
2472 // CHECK2-NEXT: entry:
2473 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
2474 // CHECK2-NEXT: ret void
2475 //
2476 //
2477 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..12
2478 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2479 // CHECK2-NEXT: entry:
2480 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2481 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2482 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2483 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2484 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2485 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2486 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2487 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2488 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2489 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2490 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2491 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2492 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2493 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2494 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2495 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2496 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2497 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2498 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2499 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2500 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2501 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2502 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2503 // CHECK2: cond.true:
2504 // CHECK2-NEXT: br label [[COND_END:%.*]]
2505 // CHECK2: cond.false:
2506 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2507 // CHECK2-NEXT: br label [[COND_END]]
2508 // CHECK2: cond.end:
2509 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2510 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2511 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2512 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2513 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2514 // CHECK2: omp.inner.for.cond:
2515 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2516 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2517 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2518 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2519 // CHECK2: omp.inner.for.body:
2520 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2521 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2522 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2523 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2524 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2525 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2526 // CHECK2-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2527 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2528 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2529 // CHECK2: omp.inner.for.inc:
2530 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2531 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2532 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2533 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2534 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2535 // CHECK2: omp.inner.for.end:
2536 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2537 // CHECK2: omp.loop.exit:
2538 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2539 // CHECK2-NEXT: ret void
2540 //
2541 //
2542 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..13
2543 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2544 // CHECK2-NEXT: entry:
2545 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2546 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2547 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2548 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2549 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2550 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2551 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2552 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2553 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2554 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2555 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2556 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2557 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2558 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2559 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2560 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2561 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2562 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2563 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2564 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2565 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2566 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2567 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2568 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2569 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2570 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2571 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2572 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2573 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2574 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2575 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2576 // CHECK2: cond.true:
2577 // CHECK2-NEXT: br label [[COND_END:%.*]]
2578 // CHECK2: cond.false:
2579 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2580 // CHECK2-NEXT: br label [[COND_END]]
2581 // CHECK2: cond.end:
2582 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2583 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2584 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2585 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2586 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2587 // CHECK2: omp.inner.for.cond:
2588 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2589 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2590 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2591 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2592 // CHECK2: omp.inner.for.body:
2593 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2594 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2595 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2596 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2597 // CHECK2-NEXT: call void @_Z3fn2v()
2598 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2599 // CHECK2: omp.body.continue:
2600 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2601 // CHECK2: omp.inner.for.inc:
2602 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2603 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2604 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2605 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2606 // CHECK2: omp.inner.for.end:
2607 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2608 // CHECK2: omp.loop.exit:
2609 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2610 // CHECK2-NEXT: ret void
2611 //
2612 //
2613 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
2614 // CHECK2-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
2615 // CHECK2-NEXT: entry:
2616 // CHECK2-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
2617 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2618 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2619 // CHECK2-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
2620 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
2621 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
2622 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
2623 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2624 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2625 // CHECK2-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2626 // CHECK2-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
2627 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2628 // CHECK2-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
2629 // CHECK2-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
2630 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2631 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
2632 // CHECK2-NEXT: ret void
2633 //
2634 //
2635 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
2636 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2637 // CHECK2-NEXT: entry:
2638 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2639 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2640 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2641 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2642 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2643 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2644 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2645 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2646 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2647 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2648 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2649 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2650 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2651 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2652 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2653 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2654 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2655 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2656 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2657 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2658 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2659 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2660 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2661 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2662 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2663 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2664 // CHECK2: cond.true:
2665 // CHECK2-NEXT: br label [[COND_END:%.*]]
2666 // CHECK2: cond.false:
2667 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2668 // CHECK2-NEXT: br label [[COND_END]]
2669 // CHECK2: cond.end:
2670 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2671 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2672 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2673 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2674 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2675 // CHECK2: omp.inner.for.cond:
2676 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2677 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2678 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2679 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2680 // CHECK2: omp.inner.for.body:
2681 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2682 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2683 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2684 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2685 // CHECK2-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
2686 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
2687 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2688 // CHECK2: omp_if.then:
2689 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2690 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]]
2691 // CHECK2: omp_if.else:
2692 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2693 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2694 // CHECK2-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2695 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2696 // CHECK2-NEXT: br label [[OMP_IF_END]]
2697 // CHECK2: omp_if.end:
2698 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2699 // CHECK2: omp.inner.for.inc:
2700 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2701 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2702 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2703 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2704 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2705 // CHECK2: omp.inner.for.end:
2706 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2707 // CHECK2: omp.loop.exit:
2708 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2709 // CHECK2-NEXT: ret void
2710 //
2711 //
2712 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15
2713 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2714 // CHECK2-NEXT: entry:
2715 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2716 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2717 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2718 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2719 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2720 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2721 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2722 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2723 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2724 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2725 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2726 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2727 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2728 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2729 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2730 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2731 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2732 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2733 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2734 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2735 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2736 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2737 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2738 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2739 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2740 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2741 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2742 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2743 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2744 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2745 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2746 // CHECK2: cond.true:
2747 // CHECK2-NEXT: br label [[COND_END:%.*]]
2748 // CHECK2: cond.false:
2749 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2750 // CHECK2-NEXT: br label [[COND_END]]
2751 // CHECK2: cond.end:
2752 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2753 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2754 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2755 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2756 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2757 // CHECK2: omp.inner.for.cond:
2758 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2759 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2760 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2761 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2762 // CHECK2: omp.inner.for.body:
2763 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2764 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2765 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2766 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2767 // CHECK2-NEXT: call void @_Z3fn3v()
2768 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2769 // CHECK2: omp.body.continue:
2770 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2771 // CHECK2: omp.inner.for.inc:
2772 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2773 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2774 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2775 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2776 // CHECK2: omp.inner.for.end:
2777 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2778 // CHECK2: omp.loop.exit:
2779 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2780 // CHECK2-NEXT: ret void
2781 //
2782 //
2783 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2784 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] {
2785 // CHECK2-NEXT: entry:
2786 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
2787 // CHECK2-NEXT: ret void
2788 //
2789 //
2790 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv
2791 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
2792 // CHECK5-NEXT: entry:
2793 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2794 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2795 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
2796 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2797 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
2798 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2799 // CHECK5: omp_offload.failed:
2800 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
2801 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
2802 // CHECK5: omp_offload.cont:
2803 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
2804 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
2805 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
2806 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
2807 // CHECK5: omp_offload.failed2:
2808 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
2809 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]]
2810 // CHECK5: omp_offload.cont3:
2811 // CHECK5-NEXT: ret void
2812 //
2813 //
2814 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
2815 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
2816 // CHECK5-NEXT: entry:
2817 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2818 // CHECK5-NEXT: ret void
2819 //
2820 //
2821 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
2822 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2823 // CHECK5-NEXT: entry:
2824 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2825 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2826 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2827 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2828 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2829 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2830 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2831 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2832 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2833 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2834 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2835 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2836 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2837 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2838 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2839 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2840 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2841 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2842 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2843 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2844 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2845 // CHECK5: cond.true:
2846 // CHECK5-NEXT: br label [[COND_END:%.*]]
2847 // CHECK5: cond.false:
2848 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2849 // CHECK5-NEXT: br label [[COND_END]]
2850 // CHECK5: cond.end:
2851 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2852 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2853 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2854 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2855 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2856 // CHECK5: omp.inner.for.cond:
2857 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2858 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2859 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2860 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2861 // CHECK5: omp.inner.for.body:
2862 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2863 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2864 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2865 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2866 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2867 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2868 // CHECK5: omp.inner.for.inc:
2869 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2870 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2871 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2872 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2873 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2874 // CHECK5: omp.inner.for.end:
2875 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2876 // CHECK5: omp.loop.exit:
2877 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2878 // CHECK5-NEXT: ret void
2879 //
2880 //
2881 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
2882 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2883 // CHECK5-NEXT: entry:
2884 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2885 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2886 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2887 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2888 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2889 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2890 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2891 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2892 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2893 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2894 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2895 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2896 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2897 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2898 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2899 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2900 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2901 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2902 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2903 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2904 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2905 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2906 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2907 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2908 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2909 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2910 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2911 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2912 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2913 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2914 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2915 // CHECK5: cond.true:
2916 // CHECK5-NEXT: br label [[COND_END:%.*]]
2917 // CHECK5: cond.false:
2918 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2919 // CHECK5-NEXT: br label [[COND_END]]
2920 // CHECK5: cond.end:
2921 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2922 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2923 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2924 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2925 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2926 // CHECK5: omp.inner.for.cond:
2927 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2928 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2929 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2930 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2931 // CHECK5: omp.inner.for.body:
2932 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2933 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2934 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2935 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2936 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2937 // CHECK5: omp.body.continue:
2938 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2939 // CHECK5: omp.inner.for.inc:
2940 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2941 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2942 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2943 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2944 // CHECK5: omp.inner.for.end:
2945 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2946 // CHECK5: omp.loop.exit:
2947 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2948 // CHECK5-NEXT: ret void
2949 //
2950 //
2951 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
2952 // CHECK5-SAME: () #[[ATTR1]] {
2953 // CHECK5-NEXT: entry:
2954 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
2955 // CHECK5-NEXT: ret void
2956 //
2957 //
2958 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
2959 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2960 // CHECK5-NEXT: entry:
2961 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2962 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2963 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2964 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2965 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2966 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2967 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2968 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2969 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2970 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2971 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2972 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2973 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2974 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2975 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2976 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2977 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2978 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2979 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2980 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2981 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2982 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2983 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2984 // CHECK5: cond.true:
2985 // CHECK5-NEXT: br label [[COND_END:%.*]]
2986 // CHECK5: cond.false:
2987 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2988 // CHECK5-NEXT: br label [[COND_END]]
2989 // CHECK5: cond.end:
2990 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2991 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2992 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2993 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2994 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2995 // CHECK5: omp.inner.for.cond:
2996 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2997 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2998 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2999 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3000 // CHECK5: omp.inner.for.body:
3001 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3002 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3003 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3004 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3005 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3006 // CHECK5-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3007 // CHECK5-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3008 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3009 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3010 // CHECK5: omp.inner.for.inc:
3011 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3012 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3013 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3014 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3015 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3016 // CHECK5: omp.inner.for.end:
3017 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3018 // CHECK5: omp.loop.exit:
3019 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3020 // CHECK5-NEXT: ret void
3021 //
3022 //
3023 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
3024 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3025 // CHECK5-NEXT: entry:
3026 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3027 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3028 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3029 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3030 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3031 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3032 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3033 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3034 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3035 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3036 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3037 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3038 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3039 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3040 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3041 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3042 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3043 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3044 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3045 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3046 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3047 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3048 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3049 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3050 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3051 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3052 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3053 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3054 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3055 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3056 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3057 // CHECK5: cond.true:
3058 // CHECK5-NEXT: br label [[COND_END:%.*]]
3059 // CHECK5: cond.false:
3060 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3061 // CHECK5-NEXT: br label [[COND_END]]
3062 // CHECK5: cond.end:
3063 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3064 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3065 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3066 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3067 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3068 // CHECK5: omp.inner.for.cond:
3069 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3070 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3071 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3072 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3073 // CHECK5: omp.inner.for.body:
3074 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3075 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3076 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3077 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3078 // CHECK5-NEXT: call void @_Z9gtid_testv()
3079 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3080 // CHECK5: omp.body.continue:
3081 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3082 // CHECK5: omp.inner.for.inc:
3083 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3084 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3085 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3086 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3087 // CHECK5: omp.inner.for.end:
3088 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3089 // CHECK5: omp.loop.exit:
3090 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3091 // CHECK5-NEXT: ret void
3092 //
3093 //
3094 // CHECK5-LABEL: define {{[^@]+}}@main
3095 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
3096 // CHECK5-NEXT: entry:
3097 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3098 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3099 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3100 // CHECK5-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
3101 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3102 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3103 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3104 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3105 // CHECK5-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
3106 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
3107 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3108 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
3109 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3110 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3111 // CHECK5: omp_offload.failed:
3112 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
3113 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
3114 // CHECK5: omp_offload.cont:
3115 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3116 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3117 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
3118 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3119 // CHECK5: omp_offload.failed2:
3120 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
3121 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]]
3122 // CHECK5: omp_offload.cont3:
3123 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4
3124 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
3125 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
3126 // CHECK5-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
3127 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3128 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
3129 // CHECK5-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
3130 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3131 // CHECK5-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
3132 // CHECK5-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
3133 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3134 // CHECK5-NEXT: store i8* null, i8** [[TMP10]], align 8
3135 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3136 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3137 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4
3138 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
3139 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3140 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3141 // CHECK5-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3142 // CHECK5-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
3143 // CHECK5-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
3144 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3145 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
3146 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3147 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3148 // CHECK5: omp_offload.failed6:
3149 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
3150 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT7]]
3151 // CHECK5: omp_offload.cont7:
3152 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4
3153 // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
3154 // CHECK5-NEXT: ret i32 [[CALL]]
3155 //
3156 //
3157 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
3158 // CHECK5-SAME: () #[[ATTR1]] {
3159 // CHECK5-NEXT: entry:
3160 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3161 // CHECK5-NEXT: ret void
3162 //
3163 //
3164 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4
3165 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3166 // CHECK5-NEXT: entry:
3167 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3168 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3169 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3170 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3171 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3172 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3173 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3174 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3175 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3176 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3177 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3178 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3179 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3180 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3181 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3182 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3183 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3184 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3185 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3186 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3187 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3188 // CHECK5: cond.true:
3189 // CHECK5-NEXT: br label [[COND_END:%.*]]
3190 // CHECK5: cond.false:
3191 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3192 // CHECK5-NEXT: br label [[COND_END]]
3193 // CHECK5: cond.end:
3194 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3195 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3196 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3197 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3198 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3199 // CHECK5: omp.inner.for.cond:
3200 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3201 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3202 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3203 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3204 // CHECK5: omp.inner.for.body:
3205 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3206 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3207 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3208 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3209 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3210 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3211 // CHECK5: omp.inner.for.inc:
3212 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3213 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3214 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3215 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3216 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3217 // CHECK5: omp.inner.for.end:
3218 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3219 // CHECK5: omp.loop.exit:
3220 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3221 // CHECK5-NEXT: ret void
3222 //
3223 //
3224 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5
3225 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3226 // CHECK5-NEXT: entry:
3227 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3228 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3229 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3230 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3231 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3232 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3233 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3234 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3235 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3236 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3237 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3238 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3239 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3240 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3241 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3242 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3243 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3244 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3245 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3246 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3247 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3248 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3249 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3250 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3251 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3252 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3253 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3254 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3255 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3256 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3257 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3258 // CHECK5: cond.true:
3259 // CHECK5-NEXT: br label [[COND_END:%.*]]
3260 // CHECK5: cond.false:
3261 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3262 // CHECK5-NEXT: br label [[COND_END]]
3263 // CHECK5: cond.end:
3264 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3265 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3266 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3267 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3268 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3269 // CHECK5: omp.inner.for.cond:
3270 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3271 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3272 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3273 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3274 // CHECK5: omp.inner.for.body:
3275 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3276 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3277 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3278 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3279 // CHECK5-NEXT: call void @_Z3fn4v()
3280 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3281 // CHECK5: omp.body.continue:
3282 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3283 // CHECK5: omp.inner.for.inc:
3284 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3285 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3286 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3287 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3288 // CHECK5: omp.inner.for.end:
3289 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3290 // CHECK5: omp.loop.exit:
3291 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3292 // CHECK5-NEXT: ret void
3293 //
3294 //
3295 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
3296 // CHECK5-SAME: () #[[ATTR1]] {
3297 // CHECK5-NEXT: entry:
3298 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
3299 // CHECK5-NEXT: ret void
3300 //
3301 //
3302 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
3303 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3304 // CHECK5-NEXT: entry:
3305 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3306 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3307 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3308 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3309 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3310 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3311 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3312 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3313 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3314 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3315 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3316 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3317 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3318 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3319 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3320 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3321 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3322 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3323 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3324 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3325 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3326 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3327 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3328 // CHECK5: cond.true:
3329 // CHECK5-NEXT: br label [[COND_END:%.*]]
3330 // CHECK5: cond.false:
3331 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3332 // CHECK5-NEXT: br label [[COND_END]]
3333 // CHECK5: cond.end:
3334 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3335 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3336 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3337 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3338 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3339 // CHECK5: omp.inner.for.cond:
3340 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3341 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3342 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3343 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3344 // CHECK5: omp.inner.for.body:
3345 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3346 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3347 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3348 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3349 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3350 // CHECK5-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3351 // CHECK5-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3352 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3353 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3354 // CHECK5: omp.inner.for.inc:
3355 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3356 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3357 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3358 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3359 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3360 // CHECK5: omp.inner.for.end:
3361 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3362 // CHECK5: omp.loop.exit:
3363 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3364 // CHECK5-NEXT: ret void
3365 //
3366 //
3367 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
3368 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3369 // CHECK5-NEXT: entry:
3370 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3371 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3372 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3373 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3374 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3375 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3376 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3377 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3378 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3379 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3380 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3381 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3382 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3383 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3384 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3385 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3386 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3387 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3388 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3389 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3390 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3391 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3392 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3393 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3394 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3395 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3396 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3397 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3398 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3399 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3400 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3401 // CHECK5: cond.true:
3402 // CHECK5-NEXT: br label [[COND_END:%.*]]
3403 // CHECK5: cond.false:
3404 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3405 // CHECK5-NEXT: br label [[COND_END]]
3406 // CHECK5: cond.end:
3407 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3408 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3409 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3410 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3411 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3412 // CHECK5: omp.inner.for.cond:
3413 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3414 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3415 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3416 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3417 // CHECK5: omp.inner.for.body:
3418 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3419 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3420 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3421 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3422 // CHECK5-NEXT: call void @_Z3fn5v()
3423 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3424 // CHECK5: omp.body.continue:
3425 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3426 // CHECK5: omp.inner.for.inc:
3427 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3428 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3429 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3430 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3431 // CHECK5: omp.inner.for.end:
3432 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3433 // CHECK5: omp.loop.exit:
3434 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3435 // CHECK5-NEXT: ret void
3436 //
3437 //
3438 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
3439 // CHECK5-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
3440 // CHECK5-NEXT: entry:
3441 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
3442 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3443 // CHECK5-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3444 // CHECK5-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
3445 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
3446 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
3447 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
3448 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3449 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3450 // CHECK5-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3451 // CHECK5-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
3452 // CHECK5-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3453 // CHECK5-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
3454 // CHECK5-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
3455 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3456 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
3457 // CHECK5-NEXT: ret void
3458 //
3459 //
3460 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8
3461 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3462 // CHECK5-NEXT: entry:
3463 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3464 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3465 // CHECK5-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3466 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3467 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3468 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3469 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3470 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3471 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3472 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3473 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3474 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3475 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3476 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3477 // CHECK5-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3478 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3479 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3480 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3481 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3482 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3483 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3484 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3485 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3486 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3487 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3488 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3489 // CHECK5: cond.true:
3490 // CHECK5-NEXT: br label [[COND_END:%.*]]
3491 // CHECK5: cond.false:
3492 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3493 // CHECK5-NEXT: br label [[COND_END]]
3494 // CHECK5: cond.end:
3495 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3496 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3497 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3498 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3499 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3500 // CHECK5: omp.inner.for.cond:
3501 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3502 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3503 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3504 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3505 // CHECK5: omp.inner.for.body:
3506 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3507 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3508 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3509 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3510 // CHECK5-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
3511 // CHECK5-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
3512 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3513 // CHECK5: omp_if.then:
3514 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3515 // CHECK5-NEXT: br label [[OMP_IF_END:%.*]]
3516 // CHECK5: omp_if.else:
3517 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3518 // CHECK5-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3519 // CHECK5-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3520 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3521 // CHECK5-NEXT: br label [[OMP_IF_END]]
3522 // CHECK5: omp_if.end:
3523 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3524 // CHECK5: omp.inner.for.inc:
3525 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3526 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3527 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3528 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3529 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3530 // CHECK5: omp.inner.for.end:
3531 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3532 // CHECK5: omp.loop.exit:
3533 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3534 // CHECK5-NEXT: ret void
3535 //
3536 //
3537 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9
3538 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3539 // CHECK5-NEXT: entry:
3540 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3541 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3542 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3543 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3544 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3545 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3546 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3547 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3548 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3549 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3550 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3551 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3552 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3553 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3554 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3555 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3556 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3557 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3558 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3559 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3560 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3561 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3562 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3563 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3564 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3565 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3566 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3567 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3568 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3569 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3570 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3571 // CHECK5: cond.true:
3572 // CHECK5-NEXT: br label [[COND_END:%.*]]
3573 // CHECK5: cond.false:
3574 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3575 // CHECK5-NEXT: br label [[COND_END]]
3576 // CHECK5: cond.end:
3577 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3578 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3579 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3580 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3581 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3582 // CHECK5: omp.inner.for.cond:
3583 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3584 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3585 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3586 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3587 // CHECK5: omp.inner.for.body:
3588 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3589 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3590 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3591 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3592 // CHECK5-NEXT: call void @_Z3fn6v()
3593 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3594 // CHECK5: omp.body.continue:
3595 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3596 // CHECK5: omp.inner.for.inc:
3597 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3598 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3599 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3600 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3601 // CHECK5: omp.inner.for.end:
3602 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3603 // CHECK5: omp.loop.exit:
3604 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3605 // CHECK5-NEXT: ret void
3606 //
3607 //
3608 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3609 // CHECK5-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
3610 // CHECK5-NEXT: entry:
3611 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
3612 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3613 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3614 // CHECK5-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
3615 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3616 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3617 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3618 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3619 // CHECK5-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
3620 // CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
3621 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3622 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
3623 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
3624 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3625 // CHECK5: omp_offload.failed:
3626 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
3627 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
3628 // CHECK5: omp_offload.cont:
3629 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3630 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
3631 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
3632 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
3633 // CHECK5: omp_offload.failed2:
3634 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
3635 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]]
3636 // CHECK5: omp_offload.cont3:
3637 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
3638 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
3639 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
3640 // CHECK5-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
3641 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3642 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
3643 // CHECK5-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
3644 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3645 // CHECK5-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
3646 // CHECK5-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
3647 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3648 // CHECK5-NEXT: store i8* null, i8** [[TMP10]], align 8
3649 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3650 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3651 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
3652 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
3653 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3654 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3655 // CHECK5-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3656 // CHECK5-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
3657 // CHECK5-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
3658 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
3659 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
3660 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3661 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3662 // CHECK5: omp_offload.failed6:
3663 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
3664 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT7]]
3665 // CHECK5: omp_offload.cont7:
3666 // CHECK5-NEXT: ret i32 0
3667 //
3668 //
3669 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
3670 // CHECK5-SAME: () #[[ATTR1]] {
3671 // CHECK5-NEXT: entry:
3672 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
3673 // CHECK5-NEXT: ret void
3674 //
3675 //
3676 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
3677 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3678 // CHECK5-NEXT: entry:
3679 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3680 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3681 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3682 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3683 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3684 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3685 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3686 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3687 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3688 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3689 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3690 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3691 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3692 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3693 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3694 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3695 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3696 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3697 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3698 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3699 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3700 // CHECK5: cond.true:
3701 // CHECK5-NEXT: br label [[COND_END:%.*]]
3702 // CHECK5: cond.false:
3703 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3704 // CHECK5-NEXT: br label [[COND_END]]
3705 // CHECK5: cond.end:
3706 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3707 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3708 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3709 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3710 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3711 // CHECK5: omp.inner.for.cond:
3712 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3713 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3714 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3715 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3716 // CHECK5: omp.inner.for.body:
3717 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3718 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3719 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3720 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3721 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3722 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3723 // CHECK5: omp.inner.for.inc:
3724 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3725 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3726 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3727 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3728 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3729 // CHECK5: omp.inner.for.end:
3730 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3731 // CHECK5: omp.loop.exit:
3732 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3733 // CHECK5-NEXT: ret void
3734 //
3735 //
3736 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
3737 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3738 // CHECK5-NEXT: entry:
3739 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3740 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3741 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3742 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3743 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3744 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3745 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3746 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3747 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3748 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3749 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3750 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3751 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3752 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3753 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3754 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3755 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3756 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3757 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3758 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3759 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3760 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3761 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3762 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3763 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3764 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3765 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3766 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3767 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3768 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3769 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3770 // CHECK5: cond.true:
3771 // CHECK5-NEXT: br label [[COND_END:%.*]]
3772 // CHECK5: cond.false:
3773 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3774 // CHECK5-NEXT: br label [[COND_END]]
3775 // CHECK5: cond.end:
3776 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3777 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3778 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3779 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3780 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3781 // CHECK5: omp.inner.for.cond:
3782 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3783 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3784 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3785 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3786 // CHECK5: omp.inner.for.body:
3787 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3788 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3789 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3790 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3791 // CHECK5-NEXT: call void @_Z3fn1v()
3792 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3793 // CHECK5: omp.body.continue:
3794 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3795 // CHECK5: omp.inner.for.inc:
3796 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3797 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3798 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3799 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3800 // CHECK5: omp.inner.for.end:
3801 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3802 // CHECK5: omp.loop.exit:
3803 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3804 // CHECK5-NEXT: ret void
3805 //
3806 //
3807 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
3808 // CHECK5-SAME: () #[[ATTR1]] {
3809 // CHECK5-NEXT: entry:
3810 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
3811 // CHECK5-NEXT: ret void
3812 //
3813 //
3814 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..12
3815 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3816 // CHECK5-NEXT: entry:
3817 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3818 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3819 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3820 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3821 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3822 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3823 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3824 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3825 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3826 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3827 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3828 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3829 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3830 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3831 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3832 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3833 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3834 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3835 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3836 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3837 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3838 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3839 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3840 // CHECK5: cond.true:
3841 // CHECK5-NEXT: br label [[COND_END:%.*]]
3842 // CHECK5: cond.false:
3843 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3844 // CHECK5-NEXT: br label [[COND_END]]
3845 // CHECK5: cond.end:
3846 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3847 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3848 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3849 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3850 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3851 // CHECK5: omp.inner.for.cond:
3852 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3853 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3854 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3855 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3856 // CHECK5: omp.inner.for.body:
3857 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3858 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3859 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3860 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3861 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3862 // CHECK5-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3863 // CHECK5-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3864 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3865 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3866 // CHECK5: omp.inner.for.inc:
3867 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3868 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3869 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3870 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3871 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3872 // CHECK5: omp.inner.for.end:
3873 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3874 // CHECK5: omp.loop.exit:
3875 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3876 // CHECK5-NEXT: ret void
3877 //
3878 //
3879 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..13
3880 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3881 // CHECK5-NEXT: entry:
3882 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3883 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3884 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3885 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3886 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3887 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3888 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3889 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3890 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3891 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3892 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3893 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3894 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3895 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3896 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3897 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3898 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3899 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3900 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3901 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3902 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3903 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3904 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3905 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3906 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3907 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3908 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3909 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3910 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3911 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3912 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3913 // CHECK5: cond.true:
3914 // CHECK5-NEXT: br label [[COND_END:%.*]]
3915 // CHECK5: cond.false:
3916 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3917 // CHECK5-NEXT: br label [[COND_END]]
3918 // CHECK5: cond.end:
3919 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3920 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3921 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3922 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3923 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3924 // CHECK5: omp.inner.for.cond:
3925 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3926 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3927 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3928 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3929 // CHECK5: omp.inner.for.body:
3930 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3931 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3932 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3933 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3934 // CHECK5-NEXT: call void @_Z3fn2v()
3935 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3936 // CHECK5: omp.body.continue:
3937 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3938 // CHECK5: omp.inner.for.inc:
3939 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3940 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3941 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3942 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3943 // CHECK5: omp.inner.for.end:
3944 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3945 // CHECK5: omp.loop.exit:
3946 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3947 // CHECK5-NEXT: ret void
3948 //
3949 //
3950 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
3951 // CHECK5-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
3952 // CHECK5-NEXT: entry:
3953 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
3954 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3955 // CHECK5-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3956 // CHECK5-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
3957 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
3958 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
3959 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
3960 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3961 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3962 // CHECK5-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3963 // CHECK5-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
3964 // CHECK5-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3965 // CHECK5-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
3966 // CHECK5-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
3967 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3968 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
3969 // CHECK5-NEXT: ret void
3970 //
3971 //
3972 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
3973 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3974 // CHECK5-NEXT: entry:
3975 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3976 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3977 // CHECK5-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3978 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3979 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3980 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3981 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3982 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3983 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3984 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3985 // CHECK5-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3986 // CHECK5-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3987 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3988 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3989 // CHECK5-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3990 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3991 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3992 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3993 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3994 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3995 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3996 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3997 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3998 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3999 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4000 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4001 // CHECK5: cond.true:
4002 // CHECK5-NEXT: br label [[COND_END:%.*]]
4003 // CHECK5: cond.false:
4004 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4005 // CHECK5-NEXT: br label [[COND_END]]
4006 // CHECK5: cond.end:
4007 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4008 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4009 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4010 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4011 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4012 // CHECK5: omp.inner.for.cond:
4013 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4014 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4015 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4016 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4017 // CHECK5: omp.inner.for.body:
4018 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4019 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4020 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4021 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4022 // CHECK5-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
4023 // CHECK5-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
4024 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4025 // CHECK5: omp_if.then:
4026 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4027 // CHECK5-NEXT: br label [[OMP_IF_END:%.*]]
4028 // CHECK5: omp_if.else:
4029 // CHECK5-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4030 // CHECK5-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4031 // CHECK5-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
4032 // CHECK5-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4033 // CHECK5-NEXT: br label [[OMP_IF_END]]
4034 // CHECK5: omp_if.end:
4035 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4036 // CHECK5: omp.inner.for.inc:
4037 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4038 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4039 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4040 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4041 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
4042 // CHECK5: omp.inner.for.end:
4043 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4044 // CHECK5: omp.loop.exit:
4045 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4046 // CHECK5-NEXT: ret void
4047 //
4048 //
4049 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
4050 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4051 // CHECK5-NEXT: entry:
4052 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4053 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4054 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4055 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4056 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4057 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4058 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4059 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4060 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4061 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4062 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4063 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4064 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4065 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4066 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4067 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4068 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4069 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4070 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4071 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4072 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4073 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4074 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4075 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4076 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4077 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4078 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4079 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4080 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4081 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4082 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4083 // CHECK5: cond.true:
4084 // CHECK5-NEXT: br label [[COND_END:%.*]]
4085 // CHECK5: cond.false:
4086 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4087 // CHECK5-NEXT: br label [[COND_END]]
4088 // CHECK5: cond.end:
4089 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4090 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4091 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4092 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4093 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4094 // CHECK5: omp.inner.for.cond:
4095 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4096 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4097 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4098 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4099 // CHECK5: omp.inner.for.body:
4100 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4101 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4102 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4103 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4104 // CHECK5-NEXT: call void @_Z3fn3v()
4105 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4106 // CHECK5: omp.body.continue:
4107 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4108 // CHECK5: omp.inner.for.inc:
4109 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4110 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4111 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4112 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
4113 // CHECK5: omp.inner.for.end:
4114 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4115 // CHECK5: omp.loop.exit:
4116 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4117 // CHECK5-NEXT: ret void
4118 //
4119 //
4120 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4121 // CHECK5-SAME: () #[[ATTR5:[0-9]+]] {
4122 // CHECK5-NEXT: entry:
4123 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1)
4124 // CHECK5-NEXT: ret void
4125 //
4126 //
4127 // CHECK6-LABEL: define {{[^@]+}}@_Z9gtid_testv
4128 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
4129 // CHECK6-NEXT: entry:
4130 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4131 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4132 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
4133 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
4134 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4135 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4136 // CHECK6: omp_offload.failed:
4137 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
4138 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]]
4139 // CHECK6: omp_offload.cont:
4140 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4141 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4142 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
4143 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4144 // CHECK6: omp_offload.failed2:
4145 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
4146 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]]
4147 // CHECK6: omp_offload.cont3:
4148 // CHECK6-NEXT: ret void
4149 //
4150 //
4151 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
4152 // CHECK6-SAME: () #[[ATTR1:[0-9]+]] {
4153 // CHECK6-NEXT: entry:
4154 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4155 // CHECK6-NEXT: ret void
4156 //
4157 //
4158 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
4159 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4160 // CHECK6-NEXT: entry:
4161 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4162 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4163 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4164 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4165 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4166 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4167 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4168 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4169 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4170 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4171 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4172 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4173 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4174 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4175 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4176 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4177 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4178 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4179 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4180 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4181 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4182 // CHECK6: cond.true:
4183 // CHECK6-NEXT: br label [[COND_END:%.*]]
4184 // CHECK6: cond.false:
4185 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4186 // CHECK6-NEXT: br label [[COND_END]]
4187 // CHECK6: cond.end:
4188 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4189 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4190 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4191 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4192 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4193 // CHECK6: omp.inner.for.cond:
4194 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4195 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4196 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4197 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4198 // CHECK6: omp.inner.for.body:
4199 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4200 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4201 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4202 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4203 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4204 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4205 // CHECK6: omp.inner.for.inc:
4206 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4207 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4208 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4209 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4210 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4211 // CHECK6: omp.inner.for.end:
4212 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4213 // CHECK6: omp.loop.exit:
4214 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4215 // CHECK6-NEXT: ret void
4216 //
4217 //
4218 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
4219 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4220 // CHECK6-NEXT: entry:
4221 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4222 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4223 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4224 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4225 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4226 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4227 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4228 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4229 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4230 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4231 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4232 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4233 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4234 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4235 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4236 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4237 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4238 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4239 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4240 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4241 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4242 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4243 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4244 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4245 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4246 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4247 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4248 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4249 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4250 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4251 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4252 // CHECK6: cond.true:
4253 // CHECK6-NEXT: br label [[COND_END:%.*]]
4254 // CHECK6: cond.false:
4255 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4256 // CHECK6-NEXT: br label [[COND_END]]
4257 // CHECK6: cond.end:
4258 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4259 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4260 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4261 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4262 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4263 // CHECK6: omp.inner.for.cond:
4264 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4265 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4266 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4267 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4268 // CHECK6: omp.inner.for.body:
4269 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4270 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4271 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4272 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4273 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4274 // CHECK6: omp.body.continue:
4275 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4276 // CHECK6: omp.inner.for.inc:
4277 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4278 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4279 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4280 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4281 // CHECK6: omp.inner.for.end:
4282 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4283 // CHECK6: omp.loop.exit:
4284 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4285 // CHECK6-NEXT: ret void
4286 //
4287 //
4288 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
4289 // CHECK6-SAME: () #[[ATTR1]] {
4290 // CHECK6-NEXT: entry:
4291 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
4292 // CHECK6-NEXT: ret void
4293 //
4294 //
4295 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
4296 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4297 // CHECK6-NEXT: entry:
4298 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4299 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4300 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4301 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4302 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4303 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4304 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4305 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4306 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4307 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4308 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4309 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4310 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4311 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4312 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4313 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4314 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4315 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4316 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4317 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4318 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4319 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4320 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4321 // CHECK6: cond.true:
4322 // CHECK6-NEXT: br label [[COND_END:%.*]]
4323 // CHECK6: cond.false:
4324 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4325 // CHECK6-NEXT: br label [[COND_END]]
4326 // CHECK6: cond.end:
4327 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4328 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4329 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4330 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4331 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4332 // CHECK6: omp.inner.for.cond:
4333 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4334 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4335 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4336 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4337 // CHECK6: omp.inner.for.body:
4338 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4339 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4340 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4341 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4342 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4343 // CHECK6-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4344 // CHECK6-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
4345 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4346 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4347 // CHECK6: omp.inner.for.inc:
4348 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4349 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4350 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4351 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4352 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4353 // CHECK6: omp.inner.for.end:
4354 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4355 // CHECK6: omp.loop.exit:
4356 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4357 // CHECK6-NEXT: ret void
4358 //
4359 //
4360 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
4361 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4362 // CHECK6-NEXT: entry:
4363 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4364 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4365 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4366 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4367 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4368 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4369 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4370 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4371 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4372 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4373 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4374 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4375 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4376 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4377 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4378 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4379 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4380 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4381 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4382 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4383 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4384 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4385 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4386 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4387 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4388 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4389 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4390 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4391 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4392 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4393 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4394 // CHECK6: cond.true:
4395 // CHECK6-NEXT: br label [[COND_END:%.*]]
4396 // CHECK6: cond.false:
4397 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4398 // CHECK6-NEXT: br label [[COND_END]]
4399 // CHECK6: cond.end:
4400 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4401 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4402 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4403 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4404 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4405 // CHECK6: omp.inner.for.cond:
4406 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4407 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4408 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4409 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4410 // CHECK6: omp.inner.for.body:
4411 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4412 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4413 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4414 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4415 // CHECK6-NEXT: call void @_Z9gtid_testv()
4416 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4417 // CHECK6: omp.body.continue:
4418 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4419 // CHECK6: omp.inner.for.inc:
4420 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4421 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4422 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4423 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4424 // CHECK6: omp.inner.for.end:
4425 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4426 // CHECK6: omp.loop.exit:
4427 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4428 // CHECK6-NEXT: ret void
4429 //
4430 //
4431 // CHECK6-LABEL: define {{[^@]+}}@main
4432 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
4433 // CHECK6-NEXT: entry:
4434 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4435 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4436 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4437 // CHECK6-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4438 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4439 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4440 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4441 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4442 // CHECK6-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
4443 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4
4444 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4445 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
4446 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4447 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4448 // CHECK6: omp_offload.failed:
4449 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
4450 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]]
4451 // CHECK6: omp_offload.cont:
4452 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4453 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4454 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
4455 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4456 // CHECK6: omp_offload.failed2:
4457 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
4458 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]]
4459 // CHECK6: omp_offload.cont3:
4460 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4
4461 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4462 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
4463 // CHECK6-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4464 // CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4465 // CHECK6-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
4466 // CHECK6-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
4467 // CHECK6-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4468 // CHECK6-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
4469 // CHECK6-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
4470 // CHECK6-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4471 // CHECK6-NEXT: store i8* null, i8** [[TMP10]], align 8
4472 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4473 // CHECK6-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4474 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4
4475 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
4476 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4477 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4478 // CHECK6-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4479 // CHECK6-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
4480 // CHECK6-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
4481 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4482 // CHECK6-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
4483 // CHECK6-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4484 // CHECK6-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
4485 // CHECK6: omp_offload.failed6:
4486 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
4487 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT7]]
4488 // CHECK6: omp_offload.cont7:
4489 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4
4490 // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
4491 // CHECK6-NEXT: ret i32 [[CALL]]
4492 //
4493 //
4494 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
4495 // CHECK6-SAME: () #[[ATTR1]] {
4496 // CHECK6-NEXT: entry:
4497 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4498 // CHECK6-NEXT: ret void
4499 //
4500 //
4501 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..4
4502 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4503 // CHECK6-NEXT: entry:
4504 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4505 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4506 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4507 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4508 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4509 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4510 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4511 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4512 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4513 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4514 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4515 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4516 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4517 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4518 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4519 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4520 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4521 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4522 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4523 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4524 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4525 // CHECK6: cond.true:
4526 // CHECK6-NEXT: br label [[COND_END:%.*]]
4527 // CHECK6: cond.false:
4528 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4529 // CHECK6-NEXT: br label [[COND_END]]
4530 // CHECK6: cond.end:
4531 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4532 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4533 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4534 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4535 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4536 // CHECK6: omp.inner.for.cond:
4537 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4538 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4539 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4540 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4541 // CHECK6: omp.inner.for.body:
4542 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4543 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4544 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4545 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4546 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4547 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4548 // CHECK6: omp.inner.for.inc:
4549 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4550 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4551 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4552 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4553 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4554 // CHECK6: omp.inner.for.end:
4555 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4556 // CHECK6: omp.loop.exit:
4557 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4558 // CHECK6-NEXT: ret void
4559 //
4560 //
4561 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..5
4562 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4563 // CHECK6-NEXT: entry:
4564 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4565 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4566 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4567 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4568 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4569 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4570 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4571 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4572 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4573 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4574 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4575 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4576 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4577 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4578 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4579 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4580 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4581 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4582 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4583 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4584 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4585 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4586 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4587 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4588 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4589 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4590 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4591 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4592 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4593 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4594 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4595 // CHECK6: cond.true:
4596 // CHECK6-NEXT: br label [[COND_END:%.*]]
4597 // CHECK6: cond.false:
4598 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4599 // CHECK6-NEXT: br label [[COND_END]]
4600 // CHECK6: cond.end:
4601 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4602 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4603 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4604 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4605 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4606 // CHECK6: omp.inner.for.cond:
4607 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4608 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4609 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4610 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4611 // CHECK6: omp.inner.for.body:
4612 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4613 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4614 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4615 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4616 // CHECK6-NEXT: call void @_Z3fn4v()
4617 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4618 // CHECK6: omp.body.continue:
4619 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4620 // CHECK6: omp.inner.for.inc:
4621 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4622 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4623 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4624 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4625 // CHECK6: omp.inner.for.end:
4626 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4627 // CHECK6: omp.loop.exit:
4628 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4629 // CHECK6-NEXT: ret void
4630 //
4631 //
4632 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
4633 // CHECK6-SAME: () #[[ATTR1]] {
4634 // CHECK6-NEXT: entry:
4635 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
4636 // CHECK6-NEXT: ret void
4637 //
4638 //
4639 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
4640 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4641 // CHECK6-NEXT: entry:
4642 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4643 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4644 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4645 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4646 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4647 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4648 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4649 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4650 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4651 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4652 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4653 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4654 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4655 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4656 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4657 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4658 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4659 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4660 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4661 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4662 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4663 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4664 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4665 // CHECK6: cond.true:
4666 // CHECK6-NEXT: br label [[COND_END:%.*]]
4667 // CHECK6: cond.false:
4668 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4669 // CHECK6-NEXT: br label [[COND_END]]
4670 // CHECK6: cond.end:
4671 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4672 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4673 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4674 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4675 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4676 // CHECK6: omp.inner.for.cond:
4677 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4678 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4679 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4680 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4681 // CHECK6: omp.inner.for.body:
4682 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4683 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4684 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4685 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4686 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4687 // CHECK6-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4688 // CHECK6-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
4689 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4690 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4691 // CHECK6: omp.inner.for.inc:
4692 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4693 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4694 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4695 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4696 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4697 // CHECK6: omp.inner.for.end:
4698 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4699 // CHECK6: omp.loop.exit:
4700 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4701 // CHECK6-NEXT: ret void
4702 //
4703 //
4704 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7
4705 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4706 // CHECK6-NEXT: entry:
4707 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4708 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4709 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4710 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4711 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4712 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4713 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4714 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4715 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4716 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4717 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4718 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4719 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4720 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4721 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4722 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4723 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4724 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4725 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4726 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4727 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4728 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4729 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4730 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4731 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4732 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4733 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4734 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4735 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4736 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4737 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4738 // CHECK6: cond.true:
4739 // CHECK6-NEXT: br label [[COND_END:%.*]]
4740 // CHECK6: cond.false:
4741 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4742 // CHECK6-NEXT: br label [[COND_END]]
4743 // CHECK6: cond.end:
4744 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4745 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4746 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4747 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4748 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4749 // CHECK6: omp.inner.for.cond:
4750 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4751 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4752 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4753 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4754 // CHECK6: omp.inner.for.body:
4755 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4756 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4757 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4758 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4759 // CHECK6-NEXT: call void @_Z3fn5v()
4760 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4761 // CHECK6: omp.body.continue:
4762 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4763 // CHECK6: omp.inner.for.inc:
4764 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4765 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4766 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4767 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4768 // CHECK6: omp.inner.for.end:
4769 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4770 // CHECK6: omp.loop.exit:
4771 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4772 // CHECK6-NEXT: ret void
4773 //
4774 //
4775 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
4776 // CHECK6-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
4777 // CHECK6-NEXT: entry:
4778 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4779 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4780 // CHECK6-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4781 // CHECK6-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4782 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4783 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
4784 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
4785 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4786 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4787 // CHECK6-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4788 // CHECK6-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
4789 // CHECK6-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4790 // CHECK6-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
4791 // CHECK6-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
4792 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4793 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
4794 // CHECK6-NEXT: ret void
4795 //
4796 //
4797 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..8
4798 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4799 // CHECK6-NEXT: entry:
4800 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4801 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4802 // CHECK6-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4803 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4804 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4805 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4806 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4807 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4808 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4809 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4810 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4811 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
4812 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4813 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4814 // CHECK6-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4815 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4816 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4817 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4818 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4819 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4820 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4821 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4822 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4823 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4824 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4825 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4826 // CHECK6: cond.true:
4827 // CHECK6-NEXT: br label [[COND_END:%.*]]
4828 // CHECK6: cond.false:
4829 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4830 // CHECK6-NEXT: br label [[COND_END]]
4831 // CHECK6: cond.end:
4832 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4833 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4834 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4835 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4836 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4837 // CHECK6: omp.inner.for.cond:
4838 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4839 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4840 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4841 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4842 // CHECK6: omp.inner.for.body:
4843 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4844 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4845 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4846 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4847 // CHECK6-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
4848 // CHECK6-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
4849 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4850 // CHECK6: omp_if.then:
4851 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4852 // CHECK6-NEXT: br label [[OMP_IF_END:%.*]]
4853 // CHECK6: omp_if.else:
4854 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4855 // CHECK6-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4856 // CHECK6-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
4857 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
4858 // CHECK6-NEXT: br label [[OMP_IF_END]]
4859 // CHECK6: omp_if.end:
4860 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4861 // CHECK6: omp.inner.for.inc:
4862 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4863 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4864 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4865 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4866 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4867 // CHECK6: omp.inner.for.end:
4868 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4869 // CHECK6: omp.loop.exit:
4870 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4871 // CHECK6-NEXT: ret void
4872 //
4873 //
4874 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..9
4875 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4876 // CHECK6-NEXT: entry:
4877 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4878 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4879 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4880 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4881 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4882 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4883 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4884 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4885 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4886 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4887 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
4888 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4889 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4890 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4891 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4892 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4893 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4894 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4895 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4896 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4897 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4898 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4899 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4900 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4901 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4902 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4903 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4904 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4905 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4906 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4907 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4908 // CHECK6: cond.true:
4909 // CHECK6-NEXT: br label [[COND_END:%.*]]
4910 // CHECK6: cond.false:
4911 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4912 // CHECK6-NEXT: br label [[COND_END]]
4913 // CHECK6: cond.end:
4914 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4915 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4916 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4917 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4918 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4919 // CHECK6: omp.inner.for.cond:
4920 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4921 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4922 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4923 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4924 // CHECK6: omp.inner.for.body:
4925 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4926 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4927 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4928 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4929 // CHECK6-NEXT: call void @_Z3fn6v()
4930 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4931 // CHECK6: omp.body.continue:
4932 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4933 // CHECK6: omp.inner.for.inc:
4934 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4935 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4936 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4937 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
4938 // CHECK6: omp.inner.for.end:
4939 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4940 // CHECK6: omp.loop.exit:
4941 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4942 // CHECK6-NEXT: ret void
4943 //
4944 //
4945 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
4946 // CHECK6-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
4947 // CHECK6-NEXT: entry:
4948 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
4949 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
4950 // CHECK6-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4951 // CHECK6-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4952 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4953 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4954 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4955 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4956 // CHECK6-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
4957 // CHECK6-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
4958 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4959 // CHECK6-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
4960 // CHECK6-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
4961 // CHECK6-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4962 // CHECK6: omp_offload.failed:
4963 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
4964 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]]
4965 // CHECK6: omp_offload.cont:
4966 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4967 // CHECK6-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
4968 // CHECK6-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
4969 // CHECK6-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
4970 // CHECK6: omp_offload.failed2:
4971 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
4972 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT3]]
4973 // CHECK6: omp_offload.cont3:
4974 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
4975 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4976 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
4977 // CHECK6-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4978 // CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4979 // CHECK6-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
4980 // CHECK6-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
4981 // CHECK6-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4982 // CHECK6-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
4983 // CHECK6-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
4984 // CHECK6-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4985 // CHECK6-NEXT: store i8* null, i8** [[TMP10]], align 8
4986 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4987 // CHECK6-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4988 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
4989 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
4990 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4991 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4992 // CHECK6-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4993 // CHECK6-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
4994 // CHECK6-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
4995 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
4996 // CHECK6-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
4997 // CHECK6-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4998 // CHECK6-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
4999 // CHECK6: omp_offload.failed6:
5000 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
5001 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT7]]
5002 // CHECK6: omp_offload.cont7:
5003 // CHECK6-NEXT: ret i32 0
5004 //
5005 //
5006 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
5007 // CHECK6-SAME: () #[[ATTR1]] {
5008 // CHECK6-NEXT: entry:
5009 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
5010 // CHECK6-NEXT: ret void
5011 //
5012 //
5013 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10
5014 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5015 // CHECK6-NEXT: entry:
5016 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5017 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5018 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5019 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5020 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5021 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5022 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5023 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5024 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5025 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5026 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5027 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5028 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5029 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5030 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5031 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5032 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5033 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5034 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5035 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5036 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5037 // CHECK6: cond.true:
5038 // CHECK6-NEXT: br label [[COND_END:%.*]]
5039 // CHECK6: cond.false:
5040 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5041 // CHECK6-NEXT: br label [[COND_END]]
5042 // CHECK6: cond.end:
5043 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5044 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5045 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5046 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5047 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5048 // CHECK6: omp.inner.for.cond:
5049 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5050 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5051 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5052 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5053 // CHECK6: omp.inner.for.body:
5054 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5055 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5056 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5057 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5058 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5059 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5060 // CHECK6: omp.inner.for.inc:
5061 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5062 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5063 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5064 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5065 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
5066 // CHECK6: omp.inner.for.end:
5067 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5068 // CHECK6: omp.loop.exit:
5069 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5070 // CHECK6-NEXT: ret void
5071 //
5072 //
5073 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11
5074 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5075 // CHECK6-NEXT: entry:
5076 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5077 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5078 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5079 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5080 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5081 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5082 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5083 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5084 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5085 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5086 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5087 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5088 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5089 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5090 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5091 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5092 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5093 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5094 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5095 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5096 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5097 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5098 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5099 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5100 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5101 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5102 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5103 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5104 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5105 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5106 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5107 // CHECK6: cond.true:
5108 // CHECK6-NEXT: br label [[COND_END:%.*]]
5109 // CHECK6: cond.false:
5110 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5111 // CHECK6-NEXT: br label [[COND_END]]
5112 // CHECK6: cond.end:
5113 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5114 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5115 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5116 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5117 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5118 // CHECK6: omp.inner.for.cond:
5119 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5120 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5121 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5122 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5123 // CHECK6: omp.inner.for.body:
5124 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5125 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5126 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5127 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5128 // CHECK6-NEXT: call void @_Z3fn1v()
5129 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5130 // CHECK6: omp.body.continue:
5131 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5132 // CHECK6: omp.inner.for.inc:
5133 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5134 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5135 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5136 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
5137 // CHECK6: omp.inner.for.end:
5138 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5139 // CHECK6: omp.loop.exit:
5140 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5141 // CHECK6-NEXT: ret void
5142 //
5143 //
5144 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
5145 // CHECK6-SAME: () #[[ATTR1]] {
5146 // CHECK6-NEXT: entry:
5147 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
5148 // CHECK6-NEXT: ret void
5149 //
5150 //
5151 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..12
5152 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5153 // CHECK6-NEXT: entry:
5154 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5155 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5156 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5157 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5158 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5159 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5160 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5161 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5162 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5163 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5164 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5165 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5166 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5167 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5168 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5169 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5170 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5171 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5172 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5173 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5174 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5175 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5176 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5177 // CHECK6: cond.true:
5178 // CHECK6-NEXT: br label [[COND_END:%.*]]
5179 // CHECK6: cond.false:
5180 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5181 // CHECK6-NEXT: br label [[COND_END]]
5182 // CHECK6: cond.end:
5183 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5184 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5185 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5186 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5187 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5188 // CHECK6: omp.inner.for.cond:
5189 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5190 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5191 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5192 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5193 // CHECK6: omp.inner.for.body:
5194 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5195 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5196 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5197 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5198 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5199 // CHECK6-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5200 // CHECK6-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
5201 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5202 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5203 // CHECK6: omp.inner.for.inc:
5204 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5205 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5206 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5207 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5208 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
5209 // CHECK6: omp.inner.for.end:
5210 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5211 // CHECK6: omp.loop.exit:
5212 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5213 // CHECK6-NEXT: ret void
5214 //
5215 //
5216 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..13
5217 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5218 // CHECK6-NEXT: entry:
5219 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5220 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5221 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5222 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5223 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5224 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5225 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5226 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5227 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5228 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5229 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5230 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5231 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5232 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5233 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5234 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5235 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5236 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5237 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5238 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5239 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5240 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5241 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5242 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5243 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5244 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5245 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5246 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5247 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5248 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5249 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5250 // CHECK6: cond.true:
5251 // CHECK6-NEXT: br label [[COND_END:%.*]]
5252 // CHECK6: cond.false:
5253 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5254 // CHECK6-NEXT: br label [[COND_END]]
5255 // CHECK6: cond.end:
5256 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5257 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5258 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5259 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5260 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5261 // CHECK6: omp.inner.for.cond:
5262 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5263 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5264 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5265 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5266 // CHECK6: omp.inner.for.body:
5267 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5268 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5269 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5270 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5271 // CHECK6-NEXT: call void @_Z3fn2v()
5272 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5273 // CHECK6: omp.body.continue:
5274 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5275 // CHECK6: omp.inner.for.inc:
5276 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5277 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5278 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5279 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
5280 // CHECK6: omp.inner.for.end:
5281 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5282 // CHECK6: omp.loop.exit:
5283 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5284 // CHECK6-NEXT: ret void
5285 //
5286 //
5287 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
5288 // CHECK6-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
5289 // CHECK6-NEXT: entry:
5290 // CHECK6-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
5291 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5292 // CHECK6-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5293 // CHECK6-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
5294 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
5295 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
5296 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
5297 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5298 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5299 // CHECK6-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5300 // CHECK6-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
5301 // CHECK6-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5302 // CHECK6-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
5303 // CHECK6-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
5304 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5305 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
5306 // CHECK6-NEXT: ret void
5307 //
5308 //
5309 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14
5310 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5311 // CHECK6-NEXT: entry:
5312 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5313 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5314 // CHECK6-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5315 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5316 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5317 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5318 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5319 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5320 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5321 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5322 // CHECK6-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5323 // CHECK6-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5324 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5325 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5326 // CHECK6-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5327 // CHECK6-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5328 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5329 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5330 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5331 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5332 // CHECK6-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5333 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5334 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5335 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5336 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5337 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5338 // CHECK6: cond.true:
5339 // CHECK6-NEXT: br label [[COND_END:%.*]]
5340 // CHECK6: cond.false:
5341 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5342 // CHECK6-NEXT: br label [[COND_END]]
5343 // CHECK6: cond.end:
5344 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5345 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5346 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5347 // CHECK6-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5348 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5349 // CHECK6: omp.inner.for.cond:
5350 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5351 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5352 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5353 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5354 // CHECK6: omp.inner.for.body:
5355 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5356 // CHECK6-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5357 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5358 // CHECK6-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5359 // CHECK6-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
5360 // CHECK6-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
5361 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5362 // CHECK6: omp_if.then:
5363 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5364 // CHECK6-NEXT: br label [[OMP_IF_END:%.*]]
5365 // CHECK6: omp_if.else:
5366 // CHECK6-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5367 // CHECK6-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5368 // CHECK6-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
5369 // CHECK6-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5370 // CHECK6-NEXT: br label [[OMP_IF_END]]
5371 // CHECK6: omp_if.end:
5372 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5373 // CHECK6: omp.inner.for.inc:
5374 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5375 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5376 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5377 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5378 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
5379 // CHECK6: omp.inner.for.end:
5380 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5381 // CHECK6: omp.loop.exit:
5382 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5383 // CHECK6-NEXT: ret void
5384 //
5385 //
5386 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15
5387 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5388 // CHECK6-NEXT: entry:
5389 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5390 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5391 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5392 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5393 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5394 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5395 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5396 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5397 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5398 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5399 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5400 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5401 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5402 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5403 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5404 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5405 // CHECK6-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5406 // CHECK6-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5407 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5408 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5409 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5410 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5411 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5412 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5413 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5414 // CHECK6-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5415 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5416 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5417 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5418 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5419 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5420 // CHECK6: cond.true:
5421 // CHECK6-NEXT: br label [[COND_END:%.*]]
5422 // CHECK6: cond.false:
5423 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5424 // CHECK6-NEXT: br label [[COND_END]]
5425 // CHECK6: cond.end:
5426 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5427 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5428 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5429 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5430 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5431 // CHECK6: omp.inner.for.cond:
5432 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5433 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5434 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5435 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5436 // CHECK6: omp.inner.for.body:
5437 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5438 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5439 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5440 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5441 // CHECK6-NEXT: call void @_Z3fn3v()
5442 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5443 // CHECK6: omp.body.continue:
5444 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5445 // CHECK6: omp.inner.for.inc:
5446 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5447 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5448 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5449 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]]
5450 // CHECK6: omp.inner.for.end:
5451 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5452 // CHECK6: omp.loop.exit:
5453 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5454 // CHECK6-NEXT: ret void
5455 //
5456 //
5457 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5458 // CHECK6-SAME: () #[[ATTR5:[0-9]+]] {
5459 // CHECK6-NEXT: entry:
5460 // CHECK6-NEXT: call void @__tgt_register_requires(i64 1)
5461 // CHECK6-NEXT: ret void
5462 //
5463 //
5464 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
5465 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
5466 // CHECK9-NEXT: entry:
5467 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5468 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5469 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
5470 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
5471 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
5472 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5473 // CHECK9: omp_offload.failed:
5474 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
5475 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
5476 // CHECK9: omp_offload.cont:
5477 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5478 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
5479 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
5480 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
5481 // CHECK9: omp_offload.failed2:
5482 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
5483 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]]
5484 // CHECK9: omp_offload.cont3:
5485 // CHECK9-NEXT: ret void
5486 //
5487 //
5488 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
5489 // CHECK9-SAME: () #[[ATTR1:[0-9]+]] {
5490 // CHECK9-NEXT: entry:
5491 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
5492 // CHECK9-NEXT: ret void
5493 //
5494 //
5495 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
5496 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5497 // CHECK9-NEXT: entry:
5498 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5499 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5500 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5501 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5502 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5503 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5504 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5505 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5506 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5507 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5508 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5509 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5510 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5511 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5512 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5513 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5514 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5515 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5516 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5517 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5518 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5519 // CHECK9: cond.true:
5520 // CHECK9-NEXT: br label [[COND_END:%.*]]
5521 // CHECK9: cond.false:
5522 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5523 // CHECK9-NEXT: br label [[COND_END]]
5524 // CHECK9: cond.end:
5525 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5526 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5527 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5528 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5529 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5530 // CHECK9: omp.inner.for.cond:
5531 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5532 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5533 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5534 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5535 // CHECK9: omp.inner.for.body:
5536 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5537 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5538 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5539 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5540 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5541 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5542 // CHECK9: omp.inner.for.inc:
5543 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5544 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5545 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5546 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5547 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
5548 // CHECK9: omp.inner.for.end:
5549 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5550 // CHECK9: omp.loop.exit:
5551 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5552 // CHECK9-NEXT: ret void
5553 //
5554 //
5555 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
5556 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5557 // CHECK9-NEXT: entry:
5558 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5559 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5560 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5561 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5562 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5563 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5564 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5565 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5566 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5567 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5568 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5569 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5570 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5571 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5572 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5573 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5574 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5575 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5576 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5577 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5578 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5579 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5580 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5581 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5582 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5583 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5584 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5585 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5586 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5587 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5588 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5589 // CHECK9: cond.true:
5590 // CHECK9-NEXT: br label [[COND_END:%.*]]
5591 // CHECK9: cond.false:
5592 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5593 // CHECK9-NEXT: br label [[COND_END]]
5594 // CHECK9: cond.end:
5595 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5596 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5597 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5598 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5599 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5600 // CHECK9: omp.inner.for.cond:
5601 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5602 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5603 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5604 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5605 // CHECK9: omp.inner.for.body:
5606 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5607 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5608 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5609 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5610 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5611 // CHECK9: omp.body.continue:
5612 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5613 // CHECK9: omp.inner.for.inc:
5614 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5615 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5616 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5617 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
5618 // CHECK9: omp.inner.for.end:
5619 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5620 // CHECK9: omp.loop.exit:
5621 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5622 // CHECK9-NEXT: ret void
5623 //
5624 //
5625 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
5626 // CHECK9-SAME: () #[[ATTR1]] {
5627 // CHECK9-NEXT: entry:
5628 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
5629 // CHECK9-NEXT: ret void
5630 //
5631 //
5632 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
5633 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5634 // CHECK9-NEXT: entry:
5635 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5636 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5637 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5638 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5639 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5640 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5641 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5642 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5643 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5644 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5645 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5646 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5647 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5648 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5649 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5650 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5651 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5652 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5653 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5654 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5655 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5656 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5657 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5658 // CHECK9: cond.true:
5659 // CHECK9-NEXT: br label [[COND_END:%.*]]
5660 // CHECK9: cond.false:
5661 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5662 // CHECK9-NEXT: br label [[COND_END]]
5663 // CHECK9: cond.end:
5664 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5665 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5666 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5667 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5668 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5669 // CHECK9: omp.inner.for.cond:
5670 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5671 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5672 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5673 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5674 // CHECK9: omp.inner.for.body:
5675 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5676 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5677 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5678 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5679 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5680 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5681 // CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
5682 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
5683 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5684 // CHECK9: omp.inner.for.inc:
5685 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5686 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5687 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5688 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5689 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
5690 // CHECK9: omp.inner.for.end:
5691 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5692 // CHECK9: omp.loop.exit:
5693 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5694 // CHECK9-NEXT: ret void
5695 //
5696 //
5697 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
5698 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5699 // CHECK9-NEXT: entry:
5700 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5701 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5702 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5703 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5704 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5705 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5706 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5707 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5708 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5709 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5710 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5711 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5712 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5713 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5714 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5715 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5716 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5717 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5718 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5719 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5720 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5721 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5722 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5723 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5724 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5725 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5726 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5727 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5728 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5729 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5730 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5731 // CHECK9: cond.true:
5732 // CHECK9-NEXT: br label [[COND_END:%.*]]
5733 // CHECK9: cond.false:
5734 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5735 // CHECK9-NEXT: br label [[COND_END]]
5736 // CHECK9: cond.end:
5737 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5738 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5739 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5740 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5741 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5742 // CHECK9: omp.inner.for.cond:
5743 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5744 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5745 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5746 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5747 // CHECK9: omp.inner.for.body:
5748 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5749 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5750 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5751 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5752 // CHECK9-NEXT: call void @_Z9gtid_testv()
5753 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5754 // CHECK9: omp.body.continue:
5755 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5756 // CHECK9: omp.inner.for.inc:
5757 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5758 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5759 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5760 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
5761 // CHECK9: omp.inner.for.end:
5762 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5763 // CHECK9: omp.loop.exit:
5764 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5765 // CHECK9-NEXT: ret void
5766 //
5767 //
5768 // CHECK9-LABEL: define {{[^@]+}}@main
5769 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
5770 // CHECK9-NEXT: entry:
5771 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
5772 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5773 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5774 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
5775 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5776 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5777 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5778 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5779 // CHECK9-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
5780 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
5781 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5782 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
5783 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
5784 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5785 // CHECK9: omp_offload.failed:
5786 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
5787 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
5788 // CHECK9: omp_offload.cont:
5789 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5790 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
5791 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
5792 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
5793 // CHECK9: omp_offload.failed2:
5794 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
5795 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]]
5796 // CHECK9: omp_offload.cont3:
5797 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4
5798 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
5799 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
5800 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
5801 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5802 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
5803 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
5804 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5805 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
5806 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
5807 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5808 // CHECK9-NEXT: store i8* null, i8** [[TMP10]], align 8
5809 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5810 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5811 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4
5812 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
5813 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5814 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5815 // CHECK9-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5816 // CHECK9-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
5817 // CHECK9-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
5818 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
5819 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
5820 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5821 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5822 // CHECK9: omp_offload.failed6:
5823 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
5824 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]]
5825 // CHECK9: omp_offload.cont7:
5826 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4
5827 // CHECK9-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
5828 // CHECK9-NEXT: ret i32 [[CALL]]
5829 //
5830 //
5831 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
5832 // CHECK9-SAME: () #[[ATTR1]] {
5833 // CHECK9-NEXT: entry:
5834 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
5835 // CHECK9-NEXT: ret void
5836 //
5837 //
5838 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
5839 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5840 // CHECK9-NEXT: entry:
5841 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5842 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5843 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5844 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5845 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5846 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5847 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5848 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5849 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5850 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5851 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5852 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5853 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5854 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5855 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5856 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5857 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5858 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5859 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5860 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5861 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5862 // CHECK9: cond.true:
5863 // CHECK9-NEXT: br label [[COND_END:%.*]]
5864 // CHECK9: cond.false:
5865 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5866 // CHECK9-NEXT: br label [[COND_END]]
5867 // CHECK9: cond.end:
5868 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5869 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5870 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5871 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5872 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5873 // CHECK9: omp.inner.for.cond:
5874 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5875 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5876 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5877 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5878 // CHECK9: omp.inner.for.body:
5879 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5880 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5881 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5882 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5883 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
5884 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5885 // CHECK9: omp.inner.for.inc:
5886 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5887 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5888 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5889 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5890 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
5891 // CHECK9: omp.inner.for.end:
5892 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5893 // CHECK9: omp.loop.exit:
5894 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5895 // CHECK9-NEXT: ret void
5896 //
5897 //
5898 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
5899 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5900 // CHECK9-NEXT: entry:
5901 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5902 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5903 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5904 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5905 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5906 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5907 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5908 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5909 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5910 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5911 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5912 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5913 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5914 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5915 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5916 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5917 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5918 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5919 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5920 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5921 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5922 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5923 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5924 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5925 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5926 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5927 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5928 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5929 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5930 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5931 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5932 // CHECK9: cond.true:
5933 // CHECK9-NEXT: br label [[COND_END:%.*]]
5934 // CHECK9: cond.false:
5935 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5936 // CHECK9-NEXT: br label [[COND_END]]
5937 // CHECK9: cond.end:
5938 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5939 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5940 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5941 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5942 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5943 // CHECK9: omp.inner.for.cond:
5944 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5945 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5946 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5947 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5948 // CHECK9: omp.inner.for.body:
5949 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5950 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5951 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5952 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5953 // CHECK9-NEXT: call void @_Z3fn4v()
5954 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5955 // CHECK9: omp.body.continue:
5956 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5957 // CHECK9: omp.inner.for.inc:
5958 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5959 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5960 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5961 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
5962 // CHECK9: omp.inner.for.end:
5963 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5964 // CHECK9: omp.loop.exit:
5965 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5966 // CHECK9-NEXT: ret void
5967 //
5968 //
5969 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
5970 // CHECK9-SAME: () #[[ATTR1]] {
5971 // CHECK9-NEXT: entry:
5972 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
5973 // CHECK9-NEXT: ret void
5974 //
5975 //
5976 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
5977 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5978 // CHECK9-NEXT: entry:
5979 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5980 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5981 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5982 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5983 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5984 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5985 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5986 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5987 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5988 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5989 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
5990 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5991 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5992 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5993 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5994 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5995 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5996 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5997 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5998 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5999 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6000 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6001 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6002 // CHECK9: cond.true:
6003 // CHECK9-NEXT: br label [[COND_END:%.*]]
6004 // CHECK9: cond.false:
6005 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6006 // CHECK9-NEXT: br label [[COND_END]]
6007 // CHECK9: cond.end:
6008 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6009 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6010 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6011 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6012 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6013 // CHECK9: omp.inner.for.cond:
6014 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6015 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6016 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6017 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6018 // CHECK9: omp.inner.for.body:
6019 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6020 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6021 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6022 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6023 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6024 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6025 // CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6026 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6027 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6028 // CHECK9: omp.inner.for.inc:
6029 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6030 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6031 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6032 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6033 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6034 // CHECK9: omp.inner.for.end:
6035 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6036 // CHECK9: omp.loop.exit:
6037 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6038 // CHECK9-NEXT: ret void
6039 //
6040 //
6041 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
6042 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6043 // CHECK9-NEXT: entry:
6044 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6045 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6046 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6047 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6048 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6049 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6050 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6051 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6052 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6053 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6054 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6055 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6056 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6057 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6058 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6059 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6060 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6061 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6062 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6063 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6064 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6065 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6066 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6067 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6068 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6069 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6070 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6071 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6072 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6073 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6074 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6075 // CHECK9: cond.true:
6076 // CHECK9-NEXT: br label [[COND_END:%.*]]
6077 // CHECK9: cond.false:
6078 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6079 // CHECK9-NEXT: br label [[COND_END]]
6080 // CHECK9: cond.end:
6081 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6082 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6083 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6084 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6085 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6086 // CHECK9: omp.inner.for.cond:
6087 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6088 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6089 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6090 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6091 // CHECK9: omp.inner.for.body:
6092 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6093 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6094 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6095 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6096 // CHECK9-NEXT: call void @_Z3fn5v()
6097 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6098 // CHECK9: omp.body.continue:
6099 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6100 // CHECK9: omp.inner.for.inc:
6101 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6102 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6103 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6104 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6105 // CHECK9: omp.inner.for.end:
6106 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6107 // CHECK9: omp.loop.exit:
6108 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6109 // CHECK9-NEXT: ret void
6110 //
6111 //
6112 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
6113 // CHECK9-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
6114 // CHECK9-NEXT: entry:
6115 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
6116 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6117 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6118 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
6119 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
6120 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
6121 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
6122 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6123 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6124 // CHECK9-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6125 // CHECK9-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
6126 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6127 // CHECK9-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
6128 // CHECK9-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
6129 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6130 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
6131 // CHECK9-NEXT: ret void
6132 //
6133 //
6134 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
6135 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6136 // CHECK9-NEXT: entry:
6137 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6138 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6139 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6140 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6141 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6142 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6143 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6144 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6145 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6146 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6147 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6148 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6149 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6150 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6151 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6152 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6153 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6154 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6155 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6156 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6157 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6158 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6159 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6160 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6161 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6162 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6163 // CHECK9: cond.true:
6164 // CHECK9-NEXT: br label [[COND_END:%.*]]
6165 // CHECK9: cond.false:
6166 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6167 // CHECK9-NEXT: br label [[COND_END]]
6168 // CHECK9: cond.end:
6169 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6170 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6171 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6172 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6173 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6174 // CHECK9: omp.inner.for.cond:
6175 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6176 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6177 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6178 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6179 // CHECK9: omp.inner.for.body:
6180 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6181 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6182 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6183 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6184 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
6185 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
6186 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6187 // CHECK9: omp_if.then:
6188 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6189 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
6190 // CHECK9: omp_if.else:
6191 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6192 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6193 // CHECK9-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6194 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6195 // CHECK9-NEXT: br label [[OMP_IF_END]]
6196 // CHECK9: omp_if.end:
6197 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6198 // CHECK9: omp.inner.for.inc:
6199 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6200 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6201 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
6202 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6203 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6204 // CHECK9: omp.inner.for.end:
6205 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6206 // CHECK9: omp.loop.exit:
6207 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6208 // CHECK9-NEXT: ret void
6209 //
6210 //
6211 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
6212 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6213 // CHECK9-NEXT: entry:
6214 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6215 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6216 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6217 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6218 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6219 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6220 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6221 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6222 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6223 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6224 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6225 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6226 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6227 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6228 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6229 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6230 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6231 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6232 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6233 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6234 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6235 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6236 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6237 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6238 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6239 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6240 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6241 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6242 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6243 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6244 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6245 // CHECK9: cond.true:
6246 // CHECK9-NEXT: br label [[COND_END:%.*]]
6247 // CHECK9: cond.false:
6248 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6249 // CHECK9-NEXT: br label [[COND_END]]
6250 // CHECK9: cond.end:
6251 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6252 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6253 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6254 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6255 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6256 // CHECK9: omp.inner.for.cond:
6257 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6258 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6259 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6260 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6261 // CHECK9: omp.inner.for.body:
6262 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6263 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6264 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6265 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6266 // CHECK9-NEXT: call void @_Z3fn6v()
6267 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6268 // CHECK9: omp.body.continue:
6269 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6270 // CHECK9: omp.inner.for.inc:
6271 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6272 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6273 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6274 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6275 // CHECK9: omp.inner.for.end:
6276 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6277 // CHECK9: omp.loop.exit:
6278 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6279 // CHECK9-NEXT: ret void
6280 //
6281 //
6282 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6283 // CHECK9-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
6284 // CHECK9-NEXT: entry:
6285 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
6286 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6287 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
6288 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
6289 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6290 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6291 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6292 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6293 // CHECK9-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
6294 // CHECK9-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
6295 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6296 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
6297 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
6298 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6299 // CHECK9: omp_offload.failed:
6300 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
6301 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
6302 // CHECK9: omp_offload.cont:
6303 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6304 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6305 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
6306 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
6307 // CHECK9: omp_offload.failed2:
6308 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
6309 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]]
6310 // CHECK9: omp_offload.cont3:
6311 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6312 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
6313 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
6314 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
6315 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6316 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
6317 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
6318 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6319 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
6320 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
6321 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6322 // CHECK9-NEXT: store i8* null, i8** [[TMP10]], align 8
6323 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6324 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6325 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6326 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
6327 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6328 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6329 // CHECK9-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6330 // CHECK9-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
6331 // CHECK9-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
6332 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6333 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
6334 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6335 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
6336 // CHECK9: omp_offload.failed6:
6337 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
6338 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]]
6339 // CHECK9: omp_offload.cont7:
6340 // CHECK9-NEXT: ret i32 0
6341 //
6342 //
6343 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
6344 // CHECK9-SAME: () #[[ATTR1]] {
6345 // CHECK9-NEXT: entry:
6346 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
6347 // CHECK9-NEXT: ret void
6348 //
6349 //
6350 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
6351 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6352 // CHECK9-NEXT: entry:
6353 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6354 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6355 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6356 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6357 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6358 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6359 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6360 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6361 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6362 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6363 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6364 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6365 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6366 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6367 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6368 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6369 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6370 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6371 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6372 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6373 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6374 // CHECK9: cond.true:
6375 // CHECK9-NEXT: br label [[COND_END:%.*]]
6376 // CHECK9: cond.false:
6377 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6378 // CHECK9-NEXT: br label [[COND_END]]
6379 // CHECK9: cond.end:
6380 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6381 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6382 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6383 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6384 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6385 // CHECK9: omp.inner.for.cond:
6386 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6387 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6388 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6389 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6390 // CHECK9: omp.inner.for.body:
6391 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6392 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6393 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6394 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6395 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6396 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6397 // CHECK9: omp.inner.for.inc:
6398 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6399 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6400 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6401 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6402 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6403 // CHECK9: omp.inner.for.end:
6404 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6405 // CHECK9: omp.loop.exit:
6406 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6407 // CHECK9-NEXT: ret void
6408 //
6409 //
6410 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11
6411 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6412 // CHECK9-NEXT: entry:
6413 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6414 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6415 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6416 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6417 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6418 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6419 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6420 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6421 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6422 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6423 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6424 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6425 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6426 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6427 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6428 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6429 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6430 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6431 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6432 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6433 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6434 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6435 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6436 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6437 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6438 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6439 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6440 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6441 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6442 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6443 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6444 // CHECK9: cond.true:
6445 // CHECK9-NEXT: br label [[COND_END:%.*]]
6446 // CHECK9: cond.false:
6447 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6448 // CHECK9-NEXT: br label [[COND_END]]
6449 // CHECK9: cond.end:
6450 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6451 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6452 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6453 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6454 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6455 // CHECK9: omp.inner.for.cond:
6456 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6457 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6458 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6459 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6460 // CHECK9: omp.inner.for.body:
6461 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6462 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6463 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6464 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6465 // CHECK9-NEXT: call void @_Z3fn1v()
6466 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6467 // CHECK9: omp.body.continue:
6468 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6469 // CHECK9: omp.inner.for.inc:
6470 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6471 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6472 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6473 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6474 // CHECK9: omp.inner.for.end:
6475 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6476 // CHECK9: omp.loop.exit:
6477 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6478 // CHECK9-NEXT: ret void
6479 //
6480 //
6481 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
6482 // CHECK9-SAME: () #[[ATTR1]] {
6483 // CHECK9-NEXT: entry:
6484 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
6485 // CHECK9-NEXT: ret void
6486 //
6487 //
6488 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..12
6489 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6490 // CHECK9-NEXT: entry:
6491 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6492 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6493 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6494 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6495 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6496 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6497 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6498 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6499 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6500 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6501 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6502 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6503 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6504 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6505 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6506 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6507 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6508 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6509 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6510 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6511 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6512 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6513 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6514 // CHECK9: cond.true:
6515 // CHECK9-NEXT: br label [[COND_END:%.*]]
6516 // CHECK9: cond.false:
6517 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6518 // CHECK9-NEXT: br label [[COND_END]]
6519 // CHECK9: cond.end:
6520 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6521 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6522 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6523 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6524 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6525 // CHECK9: omp.inner.for.cond:
6526 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6527 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6528 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6529 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6530 // CHECK9: omp.inner.for.body:
6531 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6532 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6533 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6534 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6535 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6536 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6537 // CHECK9-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6538 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6539 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6540 // CHECK9: omp.inner.for.inc:
6541 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6542 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6543 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6544 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6545 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6546 // CHECK9: omp.inner.for.end:
6547 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6548 // CHECK9: omp.loop.exit:
6549 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6550 // CHECK9-NEXT: ret void
6551 //
6552 //
6553 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13
6554 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6555 // CHECK9-NEXT: entry:
6556 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6557 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6558 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6559 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6560 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6561 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6562 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6563 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6564 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6565 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6566 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6567 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6568 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6569 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6570 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6571 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6572 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6573 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6574 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6575 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6576 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6577 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6578 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6579 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6580 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6581 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6582 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6583 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6584 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6585 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6586 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6587 // CHECK9: cond.true:
6588 // CHECK9-NEXT: br label [[COND_END:%.*]]
6589 // CHECK9: cond.false:
6590 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6591 // CHECK9-NEXT: br label [[COND_END]]
6592 // CHECK9: cond.end:
6593 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6594 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6595 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6596 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6597 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6598 // CHECK9: omp.inner.for.cond:
6599 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6600 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6601 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6602 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6603 // CHECK9: omp.inner.for.body:
6604 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6605 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6606 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6607 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6608 // CHECK9-NEXT: call void @_Z3fn2v()
6609 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6610 // CHECK9: omp.body.continue:
6611 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6612 // CHECK9: omp.inner.for.inc:
6613 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6614 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6615 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6616 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6617 // CHECK9: omp.inner.for.end:
6618 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6619 // CHECK9: omp.loop.exit:
6620 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6621 // CHECK9-NEXT: ret void
6622 //
6623 //
6624 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
6625 // CHECK9-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
6626 // CHECK9-NEXT: entry:
6627 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
6628 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6629 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6630 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
6631 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
6632 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
6633 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
6634 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6635 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6636 // CHECK9-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6637 // CHECK9-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
6638 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6639 // CHECK9-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
6640 // CHECK9-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
6641 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6642 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
6643 // CHECK9-NEXT: ret void
6644 //
6645 //
6646 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14
6647 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6648 // CHECK9-NEXT: entry:
6649 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6650 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6651 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6652 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6653 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6654 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6655 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6656 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6657 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6658 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6659 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6660 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6661 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6662 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6663 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6664 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6665 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6666 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6667 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6668 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6669 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6670 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6671 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6672 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6673 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6674 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6675 // CHECK9: cond.true:
6676 // CHECK9-NEXT: br label [[COND_END:%.*]]
6677 // CHECK9: cond.false:
6678 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6679 // CHECK9-NEXT: br label [[COND_END]]
6680 // CHECK9: cond.end:
6681 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6682 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6683 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6684 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6685 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6686 // CHECK9: omp.inner.for.cond:
6687 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6688 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6689 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6690 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6691 // CHECK9: omp.inner.for.body:
6692 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6693 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6694 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6695 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6696 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
6697 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
6698 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6699 // CHECK9: omp_if.then:
6700 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6701 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
6702 // CHECK9: omp_if.else:
6703 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6704 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6705 // CHECK9-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6706 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6707 // CHECK9-NEXT: br label [[OMP_IF_END]]
6708 // CHECK9: omp_if.end:
6709 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6710 // CHECK9: omp.inner.for.inc:
6711 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6712 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6713 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
6714 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6715 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6716 // CHECK9: omp.inner.for.end:
6717 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6718 // CHECK9: omp.loop.exit:
6719 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6720 // CHECK9-NEXT: ret void
6721 //
6722 //
6723 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15
6724 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6725 // CHECK9-NEXT: entry:
6726 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6727 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6728 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6729 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6730 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6731 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
6732 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6733 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6734 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6735 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6736 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
6737 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6738 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6739 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6740 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6741 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6742 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6743 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6744 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6745 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6746 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6747 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6748 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6749 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6750 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6751 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6752 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6753 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6754 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6755 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6756 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6757 // CHECK9: cond.true:
6758 // CHECK9-NEXT: br label [[COND_END:%.*]]
6759 // CHECK9: cond.false:
6760 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6761 // CHECK9-NEXT: br label [[COND_END]]
6762 // CHECK9: cond.end:
6763 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6764 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6765 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6766 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6767 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6768 // CHECK9: omp.inner.for.cond:
6769 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6770 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6771 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6772 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6773 // CHECK9: omp.inner.for.body:
6774 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6775 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6776 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6777 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6778 // CHECK9-NEXT: call void @_Z3fn3v()
6779 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6780 // CHECK9: omp.body.continue:
6781 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6782 // CHECK9: omp.inner.for.inc:
6783 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6784 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6785 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6786 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
6787 // CHECK9: omp.inner.for.end:
6788 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6789 // CHECK9: omp.loop.exit:
6790 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6791 // CHECK9-NEXT: ret void
6792 //
6793 //
6794 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6795 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
6796 // CHECK9-NEXT: entry:
6797 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
6798 // CHECK9-NEXT: ret void
6799 //
6800 //
6801 // CHECK10-LABEL: define {{[^@]+}}@_Z9gtid_testv
6802 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
6803 // CHECK10-NEXT: entry:
6804 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6805 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
6806 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
6807 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
6808 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
6809 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6810 // CHECK10: omp_offload.failed:
6811 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
6812 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
6813 // CHECK10: omp_offload.cont:
6814 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
6815 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
6816 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
6817 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
6818 // CHECK10: omp_offload.failed2:
6819 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
6820 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]]
6821 // CHECK10: omp_offload.cont3:
6822 // CHECK10-NEXT: ret void
6823 //
6824 //
6825 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
6826 // CHECK10-SAME: () #[[ATTR1:[0-9]+]] {
6827 // CHECK10-NEXT: entry:
6828 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
6829 // CHECK10-NEXT: ret void
6830 //
6831 //
6832 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
6833 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6834 // CHECK10-NEXT: entry:
6835 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6836 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6837 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6838 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6839 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6840 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6841 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6842 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6843 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
6844 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6845 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6846 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6847 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6848 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6849 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6850 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6851 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6852 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6853 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6854 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6855 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6856 // CHECK10: cond.true:
6857 // CHECK10-NEXT: br label [[COND_END:%.*]]
6858 // CHECK10: cond.false:
6859 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6860 // CHECK10-NEXT: br label [[COND_END]]
6861 // CHECK10: cond.end:
6862 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6863 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6864 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6865 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6866 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6867 // CHECK10: omp.inner.for.cond:
6868 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6869 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6870 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6871 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6872 // CHECK10: omp.inner.for.body:
6873 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6874 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6875 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6876 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6877 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
6878 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6879 // CHECK10: omp.inner.for.inc:
6880 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6881 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6882 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6883 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6884 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
6885 // CHECK10: omp.inner.for.end:
6886 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6887 // CHECK10: omp.loop.exit:
6888 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6889 // CHECK10-NEXT: ret void
6890 //
6891 //
6892 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
6893 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6894 // CHECK10-NEXT: entry:
6895 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6896 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6897 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6898 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6899 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6900 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6901 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6902 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6903 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6904 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6905 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
6906 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6907 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6908 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6909 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6910 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6911 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6912 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6913 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6914 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6915 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6916 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6917 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6918 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6919 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6920 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6921 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6922 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6923 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6924 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6925 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6926 // CHECK10: cond.true:
6927 // CHECK10-NEXT: br label [[COND_END:%.*]]
6928 // CHECK10: cond.false:
6929 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6930 // CHECK10-NEXT: br label [[COND_END]]
6931 // CHECK10: cond.end:
6932 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6933 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6934 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6935 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6936 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6937 // CHECK10: omp.inner.for.cond:
6938 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6939 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6940 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6941 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6942 // CHECK10: omp.inner.for.body:
6943 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6944 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6945 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6946 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6947 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6948 // CHECK10: omp.body.continue:
6949 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6950 // CHECK10: omp.inner.for.inc:
6951 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6952 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6953 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6954 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
6955 // CHECK10: omp.inner.for.end:
6956 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6957 // CHECK10: omp.loop.exit:
6958 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6959 // CHECK10-NEXT: ret void
6960 //
6961 //
6962 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
6963 // CHECK10-SAME: () #[[ATTR1]] {
6964 // CHECK10-NEXT: entry:
6965 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
6966 // CHECK10-NEXT: ret void
6967 //
6968 //
6969 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
6970 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6971 // CHECK10-NEXT: entry:
6972 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6973 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6974 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6975 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
6976 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6977 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6978 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6979 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6980 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
6981 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6982 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6983 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6984 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6985 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6986 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6987 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6988 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6989 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6990 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6991 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6992 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6993 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6994 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6995 // CHECK10: cond.true:
6996 // CHECK10-NEXT: br label [[COND_END:%.*]]
6997 // CHECK10: cond.false:
6998 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6999 // CHECK10-NEXT: br label [[COND_END]]
7000 // CHECK10: cond.end:
7001 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7002 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7003 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7004 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7005 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7006 // CHECK10: omp.inner.for.cond:
7007 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7008 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7009 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7010 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7011 // CHECK10: omp.inner.for.body:
7012 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7013 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7014 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7015 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7016 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7017 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7018 // CHECK10-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7019 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7020 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7021 // CHECK10: omp.inner.for.inc:
7022 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7023 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7024 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7025 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7026 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7027 // CHECK10: omp.inner.for.end:
7028 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7029 // CHECK10: omp.loop.exit:
7030 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7031 // CHECK10-NEXT: ret void
7032 //
7033 //
7034 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
7035 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7036 // CHECK10-NEXT: entry:
7037 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7038 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7039 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7040 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7041 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7042 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7043 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7044 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7045 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7046 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7047 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7048 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7049 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7050 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7051 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7052 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7053 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7054 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7055 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7056 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7057 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7058 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7059 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7060 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7061 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7062 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7063 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7064 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7065 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7066 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7067 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7068 // CHECK10: cond.true:
7069 // CHECK10-NEXT: br label [[COND_END:%.*]]
7070 // CHECK10: cond.false:
7071 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7072 // CHECK10-NEXT: br label [[COND_END]]
7073 // CHECK10: cond.end:
7074 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7075 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7076 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7077 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7078 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7079 // CHECK10: omp.inner.for.cond:
7080 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7081 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7082 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7083 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7084 // CHECK10: omp.inner.for.body:
7085 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7086 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7087 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7088 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7089 // CHECK10-NEXT: call void @_Z9gtid_testv()
7090 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7091 // CHECK10: omp.body.continue:
7092 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7093 // CHECK10: omp.inner.for.inc:
7094 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7095 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7096 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7097 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7098 // CHECK10: omp.inner.for.end:
7099 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7100 // CHECK10: omp.loop.exit:
7101 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7102 // CHECK10-NEXT: ret void
7103 //
7104 //
7105 // CHECK10-LABEL: define {{[^@]+}}@main
7106 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] {
7107 // CHECK10-NEXT: entry:
7108 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7109 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7110 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
7111 // CHECK10-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
7112 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
7113 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
7114 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
7115 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7116 // CHECK10-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
7117 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
7118 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7119 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
7120 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
7121 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7122 // CHECK10: omp_offload.failed:
7123 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
7124 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
7125 // CHECK10: omp_offload.cont:
7126 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7127 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7128 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
7129 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
7130 // CHECK10: omp_offload.failed2:
7131 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
7132 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]]
7133 // CHECK10: omp_offload.cont3:
7134 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4
7135 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
7136 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
7137 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
7138 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7139 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7140 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
7141 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7142 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
7143 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
7144 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7145 // CHECK10-NEXT: store i8* null, i8** [[TMP10]], align 8
7146 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7147 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7148 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4
7149 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
7150 // CHECK10-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7151 // CHECK10-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7152 // CHECK10-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7153 // CHECK10-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
7154 // CHECK10-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
7155 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7156 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
7157 // CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7158 // CHECK10-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
7159 // CHECK10: omp_offload.failed6:
7160 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
7161 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT7]]
7162 // CHECK10: omp_offload.cont7:
7163 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4
7164 // CHECK10-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
7165 // CHECK10-NEXT: ret i32 [[CALL]]
7166 //
7167 //
7168 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
7169 // CHECK10-SAME: () #[[ATTR1]] {
7170 // CHECK10-NEXT: entry:
7171 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
7172 // CHECK10-NEXT: ret void
7173 //
7174 //
7175 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4
7176 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7177 // CHECK10-NEXT: entry:
7178 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7179 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7180 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7181 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7182 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7183 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7184 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7185 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7186 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7187 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7188 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7189 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7190 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7191 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7192 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7193 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7194 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7195 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7196 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7197 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7198 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7199 // CHECK10: cond.true:
7200 // CHECK10-NEXT: br label [[COND_END:%.*]]
7201 // CHECK10: cond.false:
7202 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7203 // CHECK10-NEXT: br label [[COND_END]]
7204 // CHECK10: cond.end:
7205 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7206 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7207 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7208 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7209 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7210 // CHECK10: omp.inner.for.cond:
7211 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7212 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7213 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7214 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7215 // CHECK10: omp.inner.for.body:
7216 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7217 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7218 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7219 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7220 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
7221 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7222 // CHECK10: omp.inner.for.inc:
7223 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7224 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7225 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7226 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7227 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7228 // CHECK10: omp.inner.for.end:
7229 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7230 // CHECK10: omp.loop.exit:
7231 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7232 // CHECK10-NEXT: ret void
7233 //
7234 //
7235 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..5
7236 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7237 // CHECK10-NEXT: entry:
7238 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7239 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7240 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7241 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7242 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7243 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7244 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7245 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7246 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7247 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7248 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7249 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7250 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7251 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7252 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7253 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7254 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7255 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7256 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7257 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7258 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7259 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7260 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7261 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7262 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7263 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7264 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7265 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7266 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7267 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7268 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7269 // CHECK10: cond.true:
7270 // CHECK10-NEXT: br label [[COND_END:%.*]]
7271 // CHECK10: cond.false:
7272 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7273 // CHECK10-NEXT: br label [[COND_END]]
7274 // CHECK10: cond.end:
7275 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7276 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7277 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7278 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7279 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7280 // CHECK10: omp.inner.for.cond:
7281 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7282 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7283 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7284 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7285 // CHECK10: omp.inner.for.body:
7286 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7287 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7288 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7289 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7290 // CHECK10-NEXT: call void @_Z3fn4v()
7291 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7292 // CHECK10: omp.body.continue:
7293 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7294 // CHECK10: omp.inner.for.inc:
7295 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7296 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7297 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7298 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7299 // CHECK10: omp.inner.for.end:
7300 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7301 // CHECK10: omp.loop.exit:
7302 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7303 // CHECK10-NEXT: ret void
7304 //
7305 //
7306 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
7307 // CHECK10-SAME: () #[[ATTR1]] {
7308 // CHECK10-NEXT: entry:
7309 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
7310 // CHECK10-NEXT: ret void
7311 //
7312 //
7313 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..6
7314 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7315 // CHECK10-NEXT: entry:
7316 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7317 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7318 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7319 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7320 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7321 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7322 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7323 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7324 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7325 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7326 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7327 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7328 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7329 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7330 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7331 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7332 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7333 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7334 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7335 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7336 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7337 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7338 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7339 // CHECK10: cond.true:
7340 // CHECK10-NEXT: br label [[COND_END:%.*]]
7341 // CHECK10: cond.false:
7342 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7343 // CHECK10-NEXT: br label [[COND_END]]
7344 // CHECK10: cond.end:
7345 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7346 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7347 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7348 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7349 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7350 // CHECK10: omp.inner.for.cond:
7351 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7352 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7353 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7354 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7355 // CHECK10: omp.inner.for.body:
7356 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7357 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7358 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7359 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7360 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7361 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7362 // CHECK10-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7363 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7364 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7365 // CHECK10: omp.inner.for.inc:
7366 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7367 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7368 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7369 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7370 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7371 // CHECK10: omp.inner.for.end:
7372 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7373 // CHECK10: omp.loop.exit:
7374 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7375 // CHECK10-NEXT: ret void
7376 //
7377 //
7378 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7
7379 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7380 // CHECK10-NEXT: entry:
7381 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7382 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7383 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7384 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7385 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7386 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7387 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7388 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7389 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7390 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7391 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7392 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7393 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7394 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7395 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7396 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7397 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7398 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7399 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7400 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7401 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7402 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7403 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7404 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7405 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7406 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7407 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7408 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7409 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7410 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7411 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7412 // CHECK10: cond.true:
7413 // CHECK10-NEXT: br label [[COND_END:%.*]]
7414 // CHECK10: cond.false:
7415 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7416 // CHECK10-NEXT: br label [[COND_END]]
7417 // CHECK10: cond.end:
7418 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7419 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7420 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7421 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7422 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7423 // CHECK10: omp.inner.for.cond:
7424 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7425 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7426 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7427 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7428 // CHECK10: omp.inner.for.body:
7429 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7430 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7431 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7432 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7433 // CHECK10-NEXT: call void @_Z3fn5v()
7434 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7435 // CHECK10: omp.body.continue:
7436 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7437 // CHECK10: omp.inner.for.inc:
7438 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7439 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7440 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7441 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7442 // CHECK10: omp.inner.for.end:
7443 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7444 // CHECK10: omp.loop.exit:
7445 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7446 // CHECK10-NEXT: ret void
7447 //
7448 //
7449 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
7450 // CHECK10-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
7451 // CHECK10-NEXT: entry:
7452 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
7453 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7454 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7455 // CHECK10-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
7456 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
7457 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
7458 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
7459 // CHECK10-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7460 // CHECK10-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7461 // CHECK10-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7462 // CHECK10-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
7463 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
7464 // CHECK10-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
7465 // CHECK10-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
7466 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7467 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
7468 // CHECK10-NEXT: ret void
7469 //
7470 //
7471 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..8
7472 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
7473 // CHECK10-NEXT: entry:
7474 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7475 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7476 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7477 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7478 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7479 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7480 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7481 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7482 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7483 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7484 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7485 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7486 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7487 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7488 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7489 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
7490 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7491 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7492 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7493 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7494 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7495 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7496 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7497 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7498 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7499 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7500 // CHECK10: cond.true:
7501 // CHECK10-NEXT: br label [[COND_END:%.*]]
7502 // CHECK10: cond.false:
7503 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7504 // CHECK10-NEXT: br label [[COND_END]]
7505 // CHECK10: cond.end:
7506 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7507 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7508 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7509 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7510 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7511 // CHECK10: omp.inner.for.cond:
7512 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7513 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7514 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7515 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7516 // CHECK10: omp.inner.for.body:
7517 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7518 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7519 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7520 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7521 // CHECK10-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
7522 // CHECK10-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
7523 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7524 // CHECK10: omp_if.then:
7525 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
7526 // CHECK10-NEXT: br label [[OMP_IF_END:%.*]]
7527 // CHECK10: omp_if.else:
7528 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7529 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7530 // CHECK10-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7531 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7532 // CHECK10-NEXT: br label [[OMP_IF_END]]
7533 // CHECK10: omp_if.end:
7534 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7535 // CHECK10: omp.inner.for.inc:
7536 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7537 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7538 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7539 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7540 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7541 // CHECK10: omp.inner.for.end:
7542 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7543 // CHECK10: omp.loop.exit:
7544 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7545 // CHECK10-NEXT: ret void
7546 //
7547 //
7548 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..9
7549 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7550 // CHECK10-NEXT: entry:
7551 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7552 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7553 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7554 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7555 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7556 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7557 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7558 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7559 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7560 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7561 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7562 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7563 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7564 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7565 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7566 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7567 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7568 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7569 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7570 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7571 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7572 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7573 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7574 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7575 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7576 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7577 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7578 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7579 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7580 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7581 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7582 // CHECK10: cond.true:
7583 // CHECK10-NEXT: br label [[COND_END:%.*]]
7584 // CHECK10: cond.false:
7585 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7586 // CHECK10-NEXT: br label [[COND_END]]
7587 // CHECK10: cond.end:
7588 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7589 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7590 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7591 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7592 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7593 // CHECK10: omp.inner.for.cond:
7594 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7595 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7596 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7597 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7598 // CHECK10: omp.inner.for.body:
7599 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7600 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7601 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7602 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7603 // CHECK10-NEXT: call void @_Z3fn6v()
7604 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7605 // CHECK10: omp.body.continue:
7606 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7607 // CHECK10: omp.inner.for.inc:
7608 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7609 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7610 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7611 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7612 // CHECK10: omp.inner.for.end:
7613 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7614 // CHECK10: omp.loop.exit:
7615 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7616 // CHECK10-NEXT: ret void
7617 //
7618 //
7619 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7620 // CHECK10-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
7621 // CHECK10-NEXT: entry:
7622 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
7623 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7624 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
7625 // CHECK10-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
7626 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
7627 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
7628 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
7629 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7630 // CHECK10-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
7631 // CHECK10-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
7632 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7633 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
7634 // CHECK10-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
7635 // CHECK10-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7636 // CHECK10: omp_offload.failed:
7637 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
7638 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
7639 // CHECK10: omp_offload.cont:
7640 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7641 // CHECK10-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
7642 // CHECK10-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
7643 // CHECK10-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
7644 // CHECK10: omp_offload.failed2:
7645 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
7646 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT3]]
7647 // CHECK10: omp_offload.cont3:
7648 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
7649 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
7650 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
7651 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
7652 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7653 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7654 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
7655 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7656 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
7657 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
7658 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7659 // CHECK10-NEXT: store i8* null, i8** [[TMP10]], align 8
7660 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7661 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7662 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
7663 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
7664 // CHECK10-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7665 // CHECK10-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7666 // CHECK10-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7667 // CHECK10-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
7668 // CHECK10-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
7669 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
7670 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
7671 // CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7672 // CHECK10-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
7673 // CHECK10: omp_offload.failed6:
7674 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
7675 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT7]]
7676 // CHECK10: omp_offload.cont7:
7677 // CHECK10-NEXT: ret i32 0
7678 //
7679 //
7680 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
7681 // CHECK10-SAME: () #[[ATTR1]] {
7682 // CHECK10-NEXT: entry:
7683 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
7684 // CHECK10-NEXT: ret void
7685 //
7686 //
7687 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10
7688 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7689 // CHECK10-NEXT: entry:
7690 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7691 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7692 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7693 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7694 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7695 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7696 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7697 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7698 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7699 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7700 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7701 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7702 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7703 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7704 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7705 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7706 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7707 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7708 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7709 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7710 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7711 // CHECK10: cond.true:
7712 // CHECK10-NEXT: br label [[COND_END:%.*]]
7713 // CHECK10: cond.false:
7714 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7715 // CHECK10-NEXT: br label [[COND_END]]
7716 // CHECK10: cond.end:
7717 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7718 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7719 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7720 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7721 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7722 // CHECK10: omp.inner.for.cond:
7723 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7724 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7725 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7726 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7727 // CHECK10: omp.inner.for.body:
7728 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7729 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7730 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7731 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7732 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
7733 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7734 // CHECK10: omp.inner.for.inc:
7735 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7736 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7737 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7738 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7739 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7740 // CHECK10: omp.inner.for.end:
7741 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7742 // CHECK10: omp.loop.exit:
7743 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7744 // CHECK10-NEXT: ret void
7745 //
7746 //
7747 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..11
7748 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7749 // CHECK10-NEXT: entry:
7750 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7751 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7752 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7753 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7754 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7755 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7756 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7757 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7758 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7759 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7760 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7761 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7762 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7763 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7764 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7765 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7766 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7767 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7768 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7769 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7770 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7771 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7772 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7773 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7774 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7775 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7776 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7777 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7778 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7779 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7780 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7781 // CHECK10: cond.true:
7782 // CHECK10-NEXT: br label [[COND_END:%.*]]
7783 // CHECK10: cond.false:
7784 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7785 // CHECK10-NEXT: br label [[COND_END]]
7786 // CHECK10: cond.end:
7787 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7788 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7789 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7790 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7791 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7792 // CHECK10: omp.inner.for.cond:
7793 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7794 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7795 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7796 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7797 // CHECK10: omp.inner.for.body:
7798 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7799 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7800 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7801 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7802 // CHECK10-NEXT: call void @_Z3fn1v()
7803 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7804 // CHECK10: omp.body.continue:
7805 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7806 // CHECK10: omp.inner.for.inc:
7807 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7808 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7809 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7810 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7811 // CHECK10: omp.inner.for.end:
7812 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7813 // CHECK10: omp.loop.exit:
7814 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7815 // CHECK10-NEXT: ret void
7816 //
7817 //
7818 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
7819 // CHECK10-SAME: () #[[ATTR1]] {
7820 // CHECK10-NEXT: entry:
7821 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
7822 // CHECK10-NEXT: ret void
7823 //
7824 //
7825 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..12
7826 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7827 // CHECK10-NEXT: entry:
7828 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7829 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7830 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7831 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7832 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7833 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7834 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7835 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7836 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7837 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7838 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7839 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7840 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7841 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7842 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7843 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7844 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7845 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7846 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7847 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7848 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7849 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7850 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7851 // CHECK10: cond.true:
7852 // CHECK10-NEXT: br label [[COND_END:%.*]]
7853 // CHECK10: cond.false:
7854 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7855 // CHECK10-NEXT: br label [[COND_END]]
7856 // CHECK10: cond.end:
7857 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7858 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7859 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7860 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7861 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7862 // CHECK10: omp.inner.for.cond:
7863 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7864 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7865 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7866 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7867 // CHECK10: omp.inner.for.body:
7868 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7869 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7870 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7871 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7872 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7873 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7874 // CHECK10-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7875 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7876 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7877 // CHECK10: omp.inner.for.inc:
7878 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7879 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7880 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7881 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7882 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7883 // CHECK10: omp.inner.for.end:
7884 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7885 // CHECK10: omp.loop.exit:
7886 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7887 // CHECK10-NEXT: ret void
7888 //
7889 //
7890 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..13
7891 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7892 // CHECK10-NEXT: entry:
7893 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7894 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7895 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7896 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7897 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7898 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7899 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7900 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7901 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7902 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7903 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7904 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7905 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7906 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7907 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7908 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7909 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7910 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7911 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7912 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7913 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7914 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7915 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7916 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7917 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7918 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7919 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7920 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7921 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7922 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7923 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7924 // CHECK10: cond.true:
7925 // CHECK10-NEXT: br label [[COND_END:%.*]]
7926 // CHECK10: cond.false:
7927 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7928 // CHECK10-NEXT: br label [[COND_END]]
7929 // CHECK10: cond.end:
7930 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7931 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7932 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7933 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7934 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7935 // CHECK10: omp.inner.for.cond:
7936 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7937 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7938 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7939 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7940 // CHECK10: omp.inner.for.body:
7941 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7942 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7943 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7944 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7945 // CHECK10-NEXT: call void @_Z3fn2v()
7946 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7947 // CHECK10: omp.body.continue:
7948 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7949 // CHECK10: omp.inner.for.inc:
7950 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7951 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7952 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7953 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
7954 // CHECK10: omp.inner.for.end:
7955 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7956 // CHECK10: omp.loop.exit:
7957 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7958 // CHECK10-NEXT: ret void
7959 //
7960 //
7961 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
7962 // CHECK10-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
7963 // CHECK10-NEXT: entry:
7964 // CHECK10-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
7965 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7966 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7967 // CHECK10-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
7968 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
7969 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
7970 // CHECK10-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
7971 // CHECK10-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7972 // CHECK10-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7973 // CHECK10-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7974 // CHECK10-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
7975 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
7976 // CHECK10-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
7977 // CHECK10-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
7978 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7979 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
7980 // CHECK10-NEXT: ret void
7981 //
7982 //
7983 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..14
7984 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
7985 // CHECK10-NEXT: entry:
7986 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7987 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7988 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7989 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7990 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
7991 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7992 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7993 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7994 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7995 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
7996 // CHECK10-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7997 // CHECK10-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7998 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7999 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8000 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8001 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8002 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8003 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8004 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8005 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8006 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8007 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8008 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8009 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8010 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8011 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8012 // CHECK10: cond.true:
8013 // CHECK10-NEXT: br label [[COND_END:%.*]]
8014 // CHECK10: cond.false:
8015 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8016 // CHECK10-NEXT: br label [[COND_END]]
8017 // CHECK10: cond.end:
8018 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8019 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8020 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8021 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8022 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8023 // CHECK10: omp.inner.for.cond:
8024 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8025 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8026 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8027 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8028 // CHECK10: omp.inner.for.body:
8029 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8030 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8031 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8032 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8033 // CHECK10-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
8034 // CHECK10-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
8035 // CHECK10-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8036 // CHECK10: omp_if.then:
8037 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
8038 // CHECK10-NEXT: br label [[OMP_IF_END:%.*]]
8039 // CHECK10: omp_if.else:
8040 // CHECK10-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8041 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8042 // CHECK10-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
8043 // CHECK10-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8044 // CHECK10-NEXT: br label [[OMP_IF_END]]
8045 // CHECK10: omp_if.end:
8046 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8047 // CHECK10: omp.inner.for.inc:
8048 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8049 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8050 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
8051 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8052 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
8053 // CHECK10: omp.inner.for.end:
8054 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8055 // CHECK10: omp.loop.exit:
8056 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8057 // CHECK10-NEXT: ret void
8058 //
8059 //
8060 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..15
8061 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8062 // CHECK10-NEXT: entry:
8063 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8064 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8065 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8066 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8067 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8068 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
8069 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8070 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8071 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8072 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8073 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
8074 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8075 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8076 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8077 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8078 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8079 // CHECK10-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8080 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8081 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8082 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8083 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8084 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8085 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8086 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8087 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8088 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8089 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8090 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8091 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8092 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8093 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8094 // CHECK10: cond.true:
8095 // CHECK10-NEXT: br label [[COND_END:%.*]]
8096 // CHECK10: cond.false:
8097 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8098 // CHECK10-NEXT: br label [[COND_END]]
8099 // CHECK10: cond.end:
8100 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8101 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8102 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8103 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8104 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8105 // CHECK10: omp.inner.for.cond:
8106 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8107 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8108 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8109 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8110 // CHECK10: omp.inner.for.body:
8111 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8112 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8113 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8114 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8115 // CHECK10-NEXT: call void @_Z3fn3v()
8116 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8117 // CHECK10: omp.body.continue:
8118 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8119 // CHECK10: omp.inner.for.inc:
8120 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8121 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8122 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8123 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
8124 // CHECK10: omp.inner.for.end:
8125 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8126 // CHECK10: omp.loop.exit:
8127 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8128 // CHECK10-NEXT: ret void
8129 //
8130 //
8131 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
8132 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] {
8133 // CHECK10-NEXT: entry:
8134 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
8135 // CHECK10-NEXT: ret void
8136 //
8137 //
8138 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv
8139 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
8140 // CHECK13-NEXT: entry:
8141 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8142 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
8143 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
8144 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
8145 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
8146 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8147 // CHECK13: omp_offload.failed:
8148 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
8149 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
8150 // CHECK13: omp_offload.cont:
8151 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8152 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
8153 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
8154 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
8155 // CHECK13: omp_offload.failed2:
8156 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
8157 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]]
8158 // CHECK13: omp_offload.cont3:
8159 // CHECK13-NEXT: ret void
8160 //
8161 //
8162 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
8163 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
8164 // CHECK13-NEXT: entry:
8165 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
8166 // CHECK13-NEXT: ret void
8167 //
8168 //
8169 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
8170 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8171 // CHECK13-NEXT: entry:
8172 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8173 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8174 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8175 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8176 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8177 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8178 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8179 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8180 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8181 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8182 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8183 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8184 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8185 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8186 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8187 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8188 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8189 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8190 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8191 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8192 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8193 // CHECK13: cond.true:
8194 // CHECK13-NEXT: br label [[COND_END:%.*]]
8195 // CHECK13: cond.false:
8196 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8197 // CHECK13-NEXT: br label [[COND_END]]
8198 // CHECK13: cond.end:
8199 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8200 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8201 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8202 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8203 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8204 // CHECK13: omp.inner.for.cond:
8205 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8206 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8207 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8208 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8209 // CHECK13: omp.inner.for.body:
8210 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8211 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8212 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8213 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8214 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
8215 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8216 // CHECK13: omp.inner.for.inc:
8217 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8218 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8219 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8220 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8221 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8222 // CHECK13: omp.inner.for.end:
8223 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8224 // CHECK13: omp.loop.exit:
8225 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8226 // CHECK13-NEXT: ret void
8227 //
8228 //
8229 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
8230 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8231 // CHECK13-NEXT: entry:
8232 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8233 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8234 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8235 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8236 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8237 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8238 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8239 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8240 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8241 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8242 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8243 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8244 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8245 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8246 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8247 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8248 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8249 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8250 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8251 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8252 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8253 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8254 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8255 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8256 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8257 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8258 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8259 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8260 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8261 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8262 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8263 // CHECK13: cond.true:
8264 // CHECK13-NEXT: br label [[COND_END:%.*]]
8265 // CHECK13: cond.false:
8266 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8267 // CHECK13-NEXT: br label [[COND_END]]
8268 // CHECK13: cond.end:
8269 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8270 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8271 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8272 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8273 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8274 // CHECK13: omp.inner.for.cond:
8275 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8276 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8277 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8278 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8279 // CHECK13: omp.inner.for.body:
8280 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8281 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8282 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8283 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8284 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8285 // CHECK13: omp.body.continue:
8286 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8287 // CHECK13: omp.inner.for.inc:
8288 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8289 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8290 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8291 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8292 // CHECK13: omp.inner.for.end:
8293 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8294 // CHECK13: omp.loop.exit:
8295 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8296 // CHECK13-NEXT: ret void
8297 //
8298 //
8299 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
8300 // CHECK13-SAME: () #[[ATTR1]] {
8301 // CHECK13-NEXT: entry:
8302 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
8303 // CHECK13-NEXT: ret void
8304 //
8305 //
8306 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
8307 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8308 // CHECK13-NEXT: entry:
8309 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8310 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8311 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8312 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8313 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8314 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8315 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8316 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8317 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8318 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8319 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8320 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8321 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8322 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8323 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8324 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8325 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8326 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8327 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8328 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8329 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8330 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8331 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8332 // CHECK13: cond.true:
8333 // CHECK13-NEXT: br label [[COND_END:%.*]]
8334 // CHECK13: cond.false:
8335 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8336 // CHECK13-NEXT: br label [[COND_END]]
8337 // CHECK13: cond.end:
8338 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8339 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8340 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8341 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8342 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8343 // CHECK13: omp.inner.for.cond:
8344 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8345 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8346 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8347 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8348 // CHECK13: omp.inner.for.body:
8349 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8350 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8351 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8352 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8353 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8354 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8355 // CHECK13-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
8356 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8357 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8358 // CHECK13: omp.inner.for.inc:
8359 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8360 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8361 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
8362 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8363 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8364 // CHECK13: omp.inner.for.end:
8365 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8366 // CHECK13: omp.loop.exit:
8367 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8368 // CHECK13-NEXT: ret void
8369 //
8370 //
8371 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
8372 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8373 // CHECK13-NEXT: entry:
8374 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8375 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8376 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8377 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8378 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8379 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8380 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8381 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8382 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8383 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8384 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8385 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8386 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8387 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8388 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8389 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8390 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8391 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8392 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8393 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8394 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8395 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8396 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8397 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8398 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8399 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8400 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8401 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8402 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8403 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8404 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8405 // CHECK13: cond.true:
8406 // CHECK13-NEXT: br label [[COND_END:%.*]]
8407 // CHECK13: cond.false:
8408 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8409 // CHECK13-NEXT: br label [[COND_END]]
8410 // CHECK13: cond.end:
8411 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8412 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8413 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8414 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8415 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8416 // CHECK13: omp.inner.for.cond:
8417 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8418 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8419 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8420 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8421 // CHECK13: omp.inner.for.body:
8422 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8423 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8424 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8425 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8426 // CHECK13-NEXT: call void @_Z9gtid_testv()
8427 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8428 // CHECK13: omp.body.continue:
8429 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8430 // CHECK13: omp.inner.for.inc:
8431 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8432 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8433 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8434 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8435 // CHECK13: omp.inner.for.end:
8436 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8437 // CHECK13: omp.loop.exit:
8438 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8439 // CHECK13-NEXT: ret void
8440 //
8441 //
8442 // CHECK13-LABEL: define {{[^@]+}}@main
8443 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] {
8444 // CHECK13-NEXT: entry:
8445 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8446 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8447 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
8448 // CHECK13-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
8449 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
8450 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
8451 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
8452 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8453 // CHECK13-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
8454 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
8455 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8456 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
8457 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
8458 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8459 // CHECK13: omp_offload.failed:
8460 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
8461 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
8462 // CHECK13: omp_offload.cont:
8463 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8464 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
8465 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
8466 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
8467 // CHECK13: omp_offload.failed2:
8468 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
8469 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]]
8470 // CHECK13: omp_offload.cont3:
8471 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4
8472 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
8473 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
8474 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
8475 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8476 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
8477 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
8478 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8479 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
8480 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
8481 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
8482 // CHECK13-NEXT: store i8* null, i8** [[TMP10]], align 8
8483 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8484 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8485 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4
8486 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
8487 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8488 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8489 // CHECK13-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8490 // CHECK13-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
8491 // CHECK13-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
8492 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8493 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
8494 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
8495 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
8496 // CHECK13: omp_offload.failed6:
8497 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
8498 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT7]]
8499 // CHECK13: omp_offload.cont7:
8500 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4
8501 // CHECK13-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
8502 // CHECK13-NEXT: ret i32 [[CALL]]
8503 //
8504 //
8505 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
8506 // CHECK13-SAME: () #[[ATTR1]] {
8507 // CHECK13-NEXT: entry:
8508 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
8509 // CHECK13-NEXT: ret void
8510 //
8511 //
8512 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4
8513 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8514 // CHECK13-NEXT: entry:
8515 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8516 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8517 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8518 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8519 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8520 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8521 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8522 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8523 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8524 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8525 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8526 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8527 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8528 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8529 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8530 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8531 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8532 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8533 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8534 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8535 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8536 // CHECK13: cond.true:
8537 // CHECK13-NEXT: br label [[COND_END:%.*]]
8538 // CHECK13: cond.false:
8539 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8540 // CHECK13-NEXT: br label [[COND_END]]
8541 // CHECK13: cond.end:
8542 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8543 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8544 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8545 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8546 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8547 // CHECK13: omp.inner.for.cond:
8548 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8549 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8550 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8551 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8552 // CHECK13: omp.inner.for.body:
8553 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8554 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8555 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8556 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8557 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
8558 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8559 // CHECK13: omp.inner.for.inc:
8560 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8561 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8562 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
8563 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8564 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8565 // CHECK13: omp.inner.for.end:
8566 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8567 // CHECK13: omp.loop.exit:
8568 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8569 // CHECK13-NEXT: ret void
8570 //
8571 //
8572 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
8573 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8574 // CHECK13-NEXT: entry:
8575 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8576 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8577 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8578 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8579 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8580 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8581 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8582 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8583 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8584 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8585 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8586 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8587 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8588 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8589 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8590 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8591 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8592 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8593 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8594 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8595 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8596 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8597 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8598 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8599 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8600 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8601 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8602 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8603 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8604 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8605 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8606 // CHECK13: cond.true:
8607 // CHECK13-NEXT: br label [[COND_END:%.*]]
8608 // CHECK13: cond.false:
8609 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8610 // CHECK13-NEXT: br label [[COND_END]]
8611 // CHECK13: cond.end:
8612 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8613 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8614 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8615 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8616 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8617 // CHECK13: omp.inner.for.cond:
8618 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8619 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8620 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8621 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8622 // CHECK13: omp.inner.for.body:
8623 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8624 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8625 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8626 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8627 // CHECK13-NEXT: call void @_Z3fn4v()
8628 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8629 // CHECK13: omp.body.continue:
8630 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8631 // CHECK13: omp.inner.for.inc:
8632 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8633 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8634 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8635 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8636 // CHECK13: omp.inner.for.end:
8637 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8638 // CHECK13: omp.loop.exit:
8639 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8640 // CHECK13-NEXT: ret void
8641 //
8642 //
8643 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
8644 // CHECK13-SAME: () #[[ATTR1]] {
8645 // CHECK13-NEXT: entry:
8646 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
8647 // CHECK13-NEXT: ret void
8648 //
8649 //
8650 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
8651 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
8652 // CHECK13-NEXT: entry:
8653 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8654 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8655 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8656 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8657 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8658 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8659 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8660 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8661 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8662 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8663 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8664 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8665 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8666 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8667 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8668 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8669 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8670 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8671 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8672 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8673 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8674 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8675 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8676 // CHECK13: cond.true:
8677 // CHECK13-NEXT: br label [[COND_END:%.*]]
8678 // CHECK13: cond.false:
8679 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8680 // CHECK13-NEXT: br label [[COND_END]]
8681 // CHECK13: cond.end:
8682 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8683 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8684 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8685 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8686 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8687 // CHECK13: omp.inner.for.cond:
8688 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8689 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8690 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8691 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8692 // CHECK13: omp.inner.for.body:
8693 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8694 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8695 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8696 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8697 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8698 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8699 // CHECK13-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
8700 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8701 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8702 // CHECK13: omp.inner.for.inc:
8703 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8704 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8705 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
8706 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8707 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8708 // CHECK13: omp.inner.for.end:
8709 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8710 // CHECK13: omp.loop.exit:
8711 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8712 // CHECK13-NEXT: ret void
8713 //
8714 //
8715 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7
8716 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8717 // CHECK13-NEXT: entry:
8718 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8719 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8720 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8721 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8722 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8723 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8724 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8725 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8726 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8727 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8728 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8729 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8730 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8731 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8732 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8733 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8734 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8735 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8736 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8737 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8738 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8739 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8740 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8741 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8742 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8743 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8744 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8745 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8746 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8747 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8748 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8749 // CHECK13: cond.true:
8750 // CHECK13-NEXT: br label [[COND_END:%.*]]
8751 // CHECK13: cond.false:
8752 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8753 // CHECK13-NEXT: br label [[COND_END]]
8754 // CHECK13: cond.end:
8755 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8756 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8757 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8758 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8759 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8760 // CHECK13: omp.inner.for.cond:
8761 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8762 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8763 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8764 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8765 // CHECK13: omp.inner.for.body:
8766 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8767 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8768 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8769 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8770 // CHECK13-NEXT: call void @_Z3fn5v()
8771 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8772 // CHECK13: omp.body.continue:
8773 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8774 // CHECK13: omp.inner.for.inc:
8775 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8776 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8777 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8778 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8779 // CHECK13: omp.inner.for.end:
8780 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8781 // CHECK13: omp.loop.exit:
8782 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8783 // CHECK13-NEXT: ret void
8784 //
8785 //
8786 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
8787 // CHECK13-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
8788 // CHECK13-NEXT: entry:
8789 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
8790 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8791 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8792 // CHECK13-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
8793 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
8794 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
8795 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
8796 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8797 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8798 // CHECK13-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
8799 // CHECK13-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
8800 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
8801 // CHECK13-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
8802 // CHECK13-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
8803 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8804 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
8805 // CHECK13-NEXT: ret void
8806 //
8807 //
8808 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
8809 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
8810 // CHECK13-NEXT: entry:
8811 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8812 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8813 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8814 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8815 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8816 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8817 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8818 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8819 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8820 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8821 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
8822 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
8823 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8824 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8825 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8826 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
8827 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8828 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
8829 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8830 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8831 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8832 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
8833 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8834 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8835 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
8836 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8837 // CHECK13: cond.true:
8838 // CHECK13-NEXT: br label [[COND_END:%.*]]
8839 // CHECK13: cond.false:
8840 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8841 // CHECK13-NEXT: br label [[COND_END]]
8842 // CHECK13: cond.end:
8843 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8844 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8845 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8846 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
8847 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8848 // CHECK13: omp.inner.for.cond:
8849 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8850 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8851 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8852 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8853 // CHECK13: omp.inner.for.body:
8854 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8855 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
8856 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8857 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
8858 // CHECK13-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
8859 // CHECK13-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
8860 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
8861 // CHECK13: omp_if.then:
8862 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
8863 // CHECK13-NEXT: br label [[OMP_IF_END:%.*]]
8864 // CHECK13: omp_if.else:
8865 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8866 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8867 // CHECK13-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
8868 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
8869 // CHECK13-NEXT: br label [[OMP_IF_END]]
8870 // CHECK13: omp_if.end:
8871 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8872 // CHECK13: omp.inner.for.inc:
8873 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8874 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8875 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
8876 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8877 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8878 // CHECK13: omp.inner.for.end:
8879 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8880 // CHECK13: omp.loop.exit:
8881 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
8882 // CHECK13-NEXT: ret void
8883 //
8884 //
8885 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
8886 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
8887 // CHECK13-NEXT: entry:
8888 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8889 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8890 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8891 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8892 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8893 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8894 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8895 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8896 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8897 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8898 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
8899 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8900 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8901 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8902 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8903 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8904 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8905 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8906 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
8907 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8908 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
8909 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8910 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
8911 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8912 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8913 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8914 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
8915 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8916 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8917 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
8918 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8919 // CHECK13: cond.true:
8920 // CHECK13-NEXT: br label [[COND_END:%.*]]
8921 // CHECK13: cond.false:
8922 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8923 // CHECK13-NEXT: br label [[COND_END]]
8924 // CHECK13: cond.end:
8925 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
8926 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8927 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8928 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
8929 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8930 // CHECK13: omp.inner.for.cond:
8931 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8932 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8933 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8934 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8935 // CHECK13: omp.inner.for.body:
8936 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8937 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
8938 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8939 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8940 // CHECK13-NEXT: call void @_Z3fn6v()
8941 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8942 // CHECK13: omp.body.continue:
8943 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8944 // CHECK13: omp.inner.for.inc:
8945 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8946 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
8947 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
8948 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
8949 // CHECK13: omp.inner.for.end:
8950 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8951 // CHECK13: omp.loop.exit:
8952 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
8953 // CHECK13-NEXT: ret void
8954 //
8955 //
8956 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
8957 // CHECK13-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
8958 // CHECK13-NEXT: entry:
8959 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
8960 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8961 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
8962 // CHECK13-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
8963 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
8964 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
8965 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
8966 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8967 // CHECK13-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
8968 // CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
8969 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8970 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
8971 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
8972 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8973 // CHECK13: omp_offload.failed:
8974 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
8975 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
8976 // CHECK13: omp_offload.cont:
8977 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
8978 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
8979 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
8980 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
8981 // CHECK13: omp_offload.failed2:
8982 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
8983 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]]
8984 // CHECK13: omp_offload.cont3:
8985 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
8986 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
8987 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
8988 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
8989 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8990 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
8991 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
8992 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8993 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
8994 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
8995 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
8996 // CHECK13-NEXT: store i8* null, i8** [[TMP10]], align 8
8997 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8998 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8999 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
9000 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
9001 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9002 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9003 // CHECK13-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9004 // CHECK13-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
9005 // CHECK13-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
9006 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9007 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
9008 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
9009 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
9010 // CHECK13: omp_offload.failed6:
9011 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
9012 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT7]]
9013 // CHECK13: omp_offload.cont7:
9014 // CHECK13-NEXT: ret i32 0
9015 //
9016 //
9017 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
9018 // CHECK13-SAME: () #[[ATTR1]] {
9019 // CHECK13-NEXT: entry:
9020 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
9021 // CHECK13-NEXT: ret void
9022 //
9023 //
9024 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10
9025 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9026 // CHECK13-NEXT: entry:
9027 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9028 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9029 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9030 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9031 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9032 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9033 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9034 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9035 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9036 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9037 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9038 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9039 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9040 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9041 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9042 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9043 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9044 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9045 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9046 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9047 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9048 // CHECK13: cond.true:
9049 // CHECK13-NEXT: br label [[COND_END:%.*]]
9050 // CHECK13: cond.false:
9051 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9052 // CHECK13-NEXT: br label [[COND_END]]
9053 // CHECK13: cond.end:
9054 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9055 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9056 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9057 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9058 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9059 // CHECK13: omp.inner.for.cond:
9060 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9061 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9062 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9063 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9064 // CHECK13: omp.inner.for.body:
9065 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9066 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9067 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9068 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9069 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
9070 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9071 // CHECK13: omp.inner.for.inc:
9072 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9073 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9074 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9075 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9076 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
9077 // CHECK13: omp.inner.for.end:
9078 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9079 // CHECK13: omp.loop.exit:
9080 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9081 // CHECK13-NEXT: ret void
9082 //
9083 //
9084 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
9085 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9086 // CHECK13-NEXT: entry:
9087 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9088 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9089 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9090 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9091 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9092 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9093 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9094 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9095 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9096 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9097 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9098 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9099 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9100 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9101 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9102 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9103 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9104 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9105 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9106 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9107 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9108 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9109 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9110 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9111 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9112 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9113 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9114 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9115 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9116 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9117 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9118 // CHECK13: cond.true:
9119 // CHECK13-NEXT: br label [[COND_END:%.*]]
9120 // CHECK13: cond.false:
9121 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9122 // CHECK13-NEXT: br label [[COND_END]]
9123 // CHECK13: cond.end:
9124 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9125 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9126 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9127 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9128 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9129 // CHECK13: omp.inner.for.cond:
9130 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9131 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9132 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9133 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9134 // CHECK13: omp.inner.for.body:
9135 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9136 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9137 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9138 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9139 // CHECK13-NEXT: call void @_Z3fn1v()
9140 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9141 // CHECK13: omp.body.continue:
9142 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9143 // CHECK13: omp.inner.for.inc:
9144 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9145 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9146 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9147 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
9148 // CHECK13: omp.inner.for.end:
9149 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9150 // CHECK13: omp.loop.exit:
9151 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9152 // CHECK13-NEXT: ret void
9153 //
9154 //
9155 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
9156 // CHECK13-SAME: () #[[ATTR1]] {
9157 // CHECK13-NEXT: entry:
9158 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
9159 // CHECK13-NEXT: ret void
9160 //
9161 //
9162 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12
9163 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9164 // CHECK13-NEXT: entry:
9165 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9166 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9167 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9168 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9169 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9170 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9171 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9172 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9173 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9174 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9175 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9176 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9177 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9178 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9179 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9180 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9181 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9182 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9183 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9184 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9185 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9186 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9187 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9188 // CHECK13: cond.true:
9189 // CHECK13-NEXT: br label [[COND_END:%.*]]
9190 // CHECK13: cond.false:
9191 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9192 // CHECK13-NEXT: br label [[COND_END]]
9193 // CHECK13: cond.end:
9194 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9195 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9196 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9197 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9198 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9199 // CHECK13: omp.inner.for.cond:
9200 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9201 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9202 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9203 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9204 // CHECK13: omp.inner.for.body:
9205 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9206 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9207 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9208 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9209 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9210 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9211 // CHECK13-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
9212 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9213 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9214 // CHECK13: omp.inner.for.inc:
9215 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9216 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9217 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9218 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9219 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
9220 // CHECK13: omp.inner.for.end:
9221 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9222 // CHECK13: omp.loop.exit:
9223 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9224 // CHECK13-NEXT: ret void
9225 //
9226 //
9227 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..13
9228 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9229 // CHECK13-NEXT: entry:
9230 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9231 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9232 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9233 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9234 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9235 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9236 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9237 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9238 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9239 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9240 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9241 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9242 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9243 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9244 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9245 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9246 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9247 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9248 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9249 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9250 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9251 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9252 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9253 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9254 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9255 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9256 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9257 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9258 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9259 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9260 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9261 // CHECK13: cond.true:
9262 // CHECK13-NEXT: br label [[COND_END:%.*]]
9263 // CHECK13: cond.false:
9264 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9265 // CHECK13-NEXT: br label [[COND_END]]
9266 // CHECK13: cond.end:
9267 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9268 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9269 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9270 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9271 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9272 // CHECK13: omp.inner.for.cond:
9273 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9274 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9275 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9276 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9277 // CHECK13: omp.inner.for.body:
9278 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9279 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9280 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9281 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9282 // CHECK13-NEXT: call void @_Z3fn2v()
9283 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9284 // CHECK13: omp.body.continue:
9285 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9286 // CHECK13: omp.inner.for.inc:
9287 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9288 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9289 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9290 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
9291 // CHECK13: omp.inner.for.end:
9292 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9293 // CHECK13: omp.loop.exit:
9294 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9295 // CHECK13-NEXT: ret void
9296 //
9297 //
9298 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
9299 // CHECK13-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
9300 // CHECK13-NEXT: entry:
9301 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
9302 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9303 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9304 // CHECK13-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
9305 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
9306 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
9307 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
9308 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9309 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9310 // CHECK13-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9311 // CHECK13-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
9312 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
9313 // CHECK13-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
9314 // CHECK13-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
9315 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9316 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
9317 // CHECK13-NEXT: ret void
9318 //
9319 //
9320 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
9321 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
9322 // CHECK13-NEXT: entry:
9323 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9324 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9325 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9326 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9327 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9328 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9329 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9330 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9331 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9332 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9333 // CHECK13-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9334 // CHECK13-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9335 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9336 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9337 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9338 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
9339 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9340 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9341 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9342 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9343 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9344 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9345 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9346 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9347 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9348 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9349 // CHECK13: cond.true:
9350 // CHECK13-NEXT: br label [[COND_END:%.*]]
9351 // CHECK13: cond.false:
9352 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9353 // CHECK13-NEXT: br label [[COND_END]]
9354 // CHECK13: cond.end:
9355 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9356 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9357 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9358 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9359 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9360 // CHECK13: omp.inner.for.cond:
9361 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9362 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9363 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9364 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9365 // CHECK13: omp.inner.for.body:
9366 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9367 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9368 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9369 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9370 // CHECK13-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
9371 // CHECK13-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
9372 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
9373 // CHECK13: omp_if.then:
9374 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
9375 // CHECK13-NEXT: br label [[OMP_IF_END:%.*]]
9376 // CHECK13: omp_if.else:
9377 // CHECK13-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9378 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9379 // CHECK13-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
9380 // CHECK13-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9381 // CHECK13-NEXT: br label [[OMP_IF_END]]
9382 // CHECK13: omp_if.end:
9383 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9384 // CHECK13: omp.inner.for.inc:
9385 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9386 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9387 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
9388 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9389 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
9390 // CHECK13: omp.inner.for.end:
9391 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9392 // CHECK13: omp.loop.exit:
9393 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9394 // CHECK13-NEXT: ret void
9395 //
9396 //
9397 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
9398 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9399 // CHECK13-NEXT: entry:
9400 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9401 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9402 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9403 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9404 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9405 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9406 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9407 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9408 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9409 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9410 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9411 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9412 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9413 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9414 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9415 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9416 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9417 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9418 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9419 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9420 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9421 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9422 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9423 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9424 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9425 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9426 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9427 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9428 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9429 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9430 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9431 // CHECK13: cond.true:
9432 // CHECK13-NEXT: br label [[COND_END:%.*]]
9433 // CHECK13: cond.false:
9434 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9435 // CHECK13-NEXT: br label [[COND_END]]
9436 // CHECK13: cond.end:
9437 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9438 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9439 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9440 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9441 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9442 // CHECK13: omp.inner.for.cond:
9443 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9444 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9445 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9446 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9447 // CHECK13: omp.inner.for.body:
9448 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9449 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9450 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9451 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9452 // CHECK13-NEXT: call void @_Z3fn3v()
9453 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9454 // CHECK13: omp.body.continue:
9455 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9456 // CHECK13: omp.inner.for.inc:
9457 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9458 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9459 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9460 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
9461 // CHECK13: omp.inner.for.end:
9462 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9463 // CHECK13: omp.loop.exit:
9464 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9465 // CHECK13-NEXT: ret void
9466 //
9467 //
9468 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
9469 // CHECK13-SAME: () #[[ATTR5:[0-9]+]] {
9470 // CHECK13-NEXT: entry:
9471 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1)
9472 // CHECK13-NEXT: ret void
9473 //
9474 //
9475 // CHECK14-LABEL: define {{[^@]+}}@_Z9gtid_testv
9476 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
9477 // CHECK14-NEXT: entry:
9478 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9479 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
9480 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100)
9481 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
9482 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9483 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9484 // CHECK14: omp_offload.failed:
9485 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
9486 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]]
9487 // CHECK14: omp_offload.cont:
9488 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9489 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9490 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
9491 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9492 // CHECK14: omp_offload.failed2:
9493 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]]
9494 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]]
9495 // CHECK14: omp_offload.cont3:
9496 // CHECK14-NEXT: ret void
9497 //
9498 //
9499 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
9500 // CHECK14-SAME: () #[[ATTR1:[0-9]+]] {
9501 // CHECK14-NEXT: entry:
9502 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
9503 // CHECK14-NEXT: ret void
9504 //
9505 //
9506 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined.
9507 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9508 // CHECK14-NEXT: entry:
9509 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9510 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9511 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9512 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9513 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9514 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9515 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9516 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9517 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
9518 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9519 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9520 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9521 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9522 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9523 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9524 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9525 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9526 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9527 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9528 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9529 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9530 // CHECK14: cond.true:
9531 // CHECK14-NEXT: br label [[COND_END:%.*]]
9532 // CHECK14: cond.false:
9533 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9534 // CHECK14-NEXT: br label [[COND_END]]
9535 // CHECK14: cond.end:
9536 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9537 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9538 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9539 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9540 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9541 // CHECK14: omp.inner.for.cond:
9542 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9543 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9544 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9545 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9546 // CHECK14: omp.inner.for.body:
9547 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9548 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9549 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9550 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9551 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
9552 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9553 // CHECK14: omp.inner.for.inc:
9554 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9555 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9556 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9557 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9558 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
9559 // CHECK14: omp.inner.for.end:
9560 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9561 // CHECK14: omp.loop.exit:
9562 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9563 // CHECK14-NEXT: ret void
9564 //
9565 //
9566 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1
9567 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9568 // CHECK14-NEXT: entry:
9569 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9570 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9571 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9572 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9573 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9574 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9575 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9576 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9577 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9578 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9579 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
9580 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9581 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9582 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9583 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9584 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9585 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9586 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9587 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9588 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9589 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9590 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9591 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9592 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9593 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9594 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9595 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9596 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9597 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9598 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9599 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9600 // CHECK14: cond.true:
9601 // CHECK14-NEXT: br label [[COND_END:%.*]]
9602 // CHECK14: cond.false:
9603 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9604 // CHECK14-NEXT: br label [[COND_END]]
9605 // CHECK14: cond.end:
9606 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9607 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9608 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9609 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9610 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9611 // CHECK14: omp.inner.for.cond:
9612 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9613 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9614 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9615 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9616 // CHECK14: omp.inner.for.body:
9617 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9618 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9619 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9620 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9621 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9622 // CHECK14: omp.body.continue:
9623 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9624 // CHECK14: omp.inner.for.inc:
9625 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9626 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9627 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9628 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
9629 // CHECK14: omp.inner.for.end:
9630 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9631 // CHECK14: omp.loop.exit:
9632 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9633 // CHECK14-NEXT: ret void
9634 //
9635 //
9636 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52
9637 // CHECK14-SAME: () #[[ATTR1]] {
9638 // CHECK14-NEXT: entry:
9639 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
9640 // CHECK14-NEXT: ret void
9641 //
9642 //
9643 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2
9644 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9645 // CHECK14-NEXT: entry:
9646 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9647 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9648 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9649 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9650 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9651 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9652 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9653 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9654 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
9655 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
9656 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
9657 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9658 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9659 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9660 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9661 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9662 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9663 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9664 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9665 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9666 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9667 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9668 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9669 // CHECK14: cond.true:
9670 // CHECK14-NEXT: br label [[COND_END:%.*]]
9671 // CHECK14: cond.false:
9672 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9673 // CHECK14-NEXT: br label [[COND_END]]
9674 // CHECK14: cond.end:
9675 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9676 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9677 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9678 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9679 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9680 // CHECK14: omp.inner.for.cond:
9681 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9682 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9683 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9684 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9685 // CHECK14: omp.inner.for.body:
9686 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9687 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9688 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9689 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9690 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9691 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9692 // CHECK14-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
9693 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
9694 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9695 // CHECK14: omp.inner.for.inc:
9696 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9697 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9698 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9699 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9700 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
9701 // CHECK14: omp.inner.for.end:
9702 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9703 // CHECK14: omp.loop.exit:
9704 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9705 // CHECK14-NEXT: ret void
9706 //
9707 //
9708 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3
9709 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9710 // CHECK14-NEXT: entry:
9711 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9712 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9713 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9714 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9715 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9716 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9717 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9718 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9719 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9720 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9721 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
9722 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9723 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9724 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9725 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9726 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9727 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9728 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9729 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9730 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9731 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9732 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9733 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9734 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9735 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9736 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9737 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9738 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9739 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9740 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9741 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9742 // CHECK14: cond.true:
9743 // CHECK14-NEXT: br label [[COND_END:%.*]]
9744 // CHECK14: cond.false:
9745 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9746 // CHECK14-NEXT: br label [[COND_END]]
9747 // CHECK14: cond.end:
9748 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9749 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9750 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9751 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9752 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9753 // CHECK14: omp.inner.for.cond:
9754 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9755 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9756 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9757 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9758 // CHECK14: omp.inner.for.body:
9759 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9760 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9761 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9762 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9763 // CHECK14-NEXT: call void @_Z9gtid_testv()
9764 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9765 // CHECK14: omp.body.continue:
9766 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9767 // CHECK14: omp.inner.for.inc:
9768 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9769 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9770 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9771 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
9772 // CHECK14: omp.inner.for.end:
9773 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9774 // CHECK14: omp.loop.exit:
9775 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9776 // CHECK14-NEXT: ret void
9777 //
9778 //
9779 // CHECK14-LABEL: define {{[^@]+}}@main
9780 // CHECK14-SAME: () #[[ATTR3:[0-9]+]] {
9781 // CHECK14-NEXT: entry:
9782 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9783 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9784 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
9785 // CHECK14-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
9786 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
9787 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
9788 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
9789 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
9790 // CHECK14-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
9791 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4
9792 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9793 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
9794 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
9795 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9796 // CHECK14: omp_offload.failed:
9797 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
9798 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]]
9799 // CHECK14: omp_offload.cont:
9800 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9801 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
9802 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
9803 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
9804 // CHECK14: omp_offload.failed2:
9805 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89() #[[ATTR2]]
9806 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]]
9807 // CHECK14: omp_offload.cont3:
9808 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* @Arg, align 4
9809 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
9810 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
9811 // CHECK14-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
9812 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9813 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
9814 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
9815 // CHECK14-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9816 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
9817 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
9818 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9819 // CHECK14-NEXT: store i8* null, i8** [[TMP10]], align 8
9820 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9821 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9822 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* @Arg, align 4
9823 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
9824 // CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
9825 // CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
9826 // CHECK14-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
9827 // CHECK14-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
9828 // CHECK14-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
9829 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
9830 // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
9831 // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
9832 // CHECK14-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
9833 // CHECK14: omp_offload.failed6:
9834 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97(i64 [[TMP5]]) #[[ATTR2]]
9835 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT7]]
9836 // CHECK14: omp_offload.cont7:
9837 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* @Arg, align 4
9838 // CHECK14-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiEiT_(i32 [[TMP18]])
9839 // CHECK14-NEXT: ret i32 [[CALL]]
9840 //
9841 //
9842 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
9843 // CHECK14-SAME: () #[[ATTR1]] {
9844 // CHECK14-NEXT: entry:
9845 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
9846 // CHECK14-NEXT: ret void
9847 //
9848 //
9849 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..4
9850 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9851 // CHECK14-NEXT: entry:
9852 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9853 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9854 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9855 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9856 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9857 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9858 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9859 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9860 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
9861 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9862 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9863 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9864 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
9865 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9866 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9867 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9868 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
9869 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9870 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9871 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
9872 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9873 // CHECK14: cond.true:
9874 // CHECK14-NEXT: br label [[COND_END:%.*]]
9875 // CHECK14: cond.false:
9876 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9877 // CHECK14-NEXT: br label [[COND_END]]
9878 // CHECK14: cond.end:
9879 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
9880 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9881 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9882 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
9883 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9884 // CHECK14: omp.inner.for.cond:
9885 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9886 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9887 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
9888 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9889 // CHECK14: omp.inner.for.body:
9890 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9891 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
9892 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9893 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
9894 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
9895 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9896 // CHECK14: omp.inner.for.inc:
9897 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9898 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9899 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
9900 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9901 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
9902 // CHECK14: omp.inner.for.end:
9903 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9904 // CHECK14: omp.loop.exit:
9905 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
9906 // CHECK14-NEXT: ret void
9907 //
9908 //
9909 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5
9910 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
9911 // CHECK14-NEXT: entry:
9912 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9913 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9914 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9915 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9916 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9917 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9918 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9919 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9920 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9921 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9922 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
9923 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9924 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9925 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9926 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9927 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9928 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
9929 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9930 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
9931 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9932 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9933 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9934 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9935 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9936 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9937 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9938 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
9939 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9940 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9941 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
9942 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9943 // CHECK14: cond.true:
9944 // CHECK14-NEXT: br label [[COND_END:%.*]]
9945 // CHECK14: cond.false:
9946 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9947 // CHECK14-NEXT: br label [[COND_END]]
9948 // CHECK14: cond.end:
9949 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
9950 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9951 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9952 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9953 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9954 // CHECK14: omp.inner.for.cond:
9955 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9956 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9957 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
9958 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9959 // CHECK14: omp.inner.for.body:
9960 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9961 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
9962 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9963 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9964 // CHECK14-NEXT: call void @_Z3fn4v()
9965 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9966 // CHECK14: omp.body.continue:
9967 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9968 // CHECK14: omp.inner.for.inc:
9969 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9970 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
9971 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9972 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
9973 // CHECK14: omp.inner.for.end:
9974 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9975 // CHECK14: omp.loop.exit:
9976 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
9977 // CHECK14-NEXT: ret void
9978 //
9979 //
9980 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l89
9981 // CHECK14-SAME: () #[[ATTR1]] {
9982 // CHECK14-NEXT: entry:
9983 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
9984 // CHECK14-NEXT: ret void
9985 //
9986 //
9987 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6
9988 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
9989 // CHECK14-NEXT: entry:
9990 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9991 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9992 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9993 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
9994 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9995 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9996 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9997 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9998 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
9999 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10000 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10001 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10002 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10003 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10004 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10005 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10006 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10007 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10008 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10009 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10010 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10011 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10012 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10013 // CHECK14: cond.true:
10014 // CHECK14-NEXT: br label [[COND_END:%.*]]
10015 // CHECK14: cond.false:
10016 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10017 // CHECK14-NEXT: br label [[COND_END]]
10018 // CHECK14: cond.end:
10019 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10020 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10021 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10022 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10023 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10024 // CHECK14: omp.inner.for.cond:
10025 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10026 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10027 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10028 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10029 // CHECK14: omp.inner.for.body:
10030 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10031 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10032 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10033 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10034 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10035 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10036 // CHECK14-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
10037 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10038 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10039 // CHECK14: omp.inner.for.inc:
10040 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10041 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10042 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10043 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10044 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10045 // CHECK14: omp.inner.for.end:
10046 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10047 // CHECK14: omp.loop.exit:
10048 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10049 // CHECK14-NEXT: ret void
10050 //
10051 //
10052 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..7
10053 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10054 // CHECK14-NEXT: entry:
10055 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10056 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10057 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10058 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10059 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10060 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10061 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10062 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10063 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10064 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10065 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10066 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10067 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10068 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10069 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10070 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10071 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10072 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10073 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10074 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10075 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10076 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10077 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10078 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10079 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10080 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10081 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10082 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10083 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10084 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10085 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10086 // CHECK14: cond.true:
10087 // CHECK14-NEXT: br label [[COND_END:%.*]]
10088 // CHECK14: cond.false:
10089 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10090 // CHECK14-NEXT: br label [[COND_END]]
10091 // CHECK14: cond.end:
10092 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10093 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10094 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10095 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10096 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10097 // CHECK14: omp.inner.for.cond:
10098 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10099 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10100 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10101 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10102 // CHECK14: omp.inner.for.body:
10103 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10104 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10105 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10106 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
10107 // CHECK14-NEXT: call void @_Z3fn5v()
10108 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10109 // CHECK14: omp.body.continue:
10110 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10111 // CHECK14: omp.inner.for.inc:
10112 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10113 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10114 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10115 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10116 // CHECK14: omp.inner.for.end:
10117 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10118 // CHECK14: omp.loop.exit:
10119 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10120 // CHECK14-NEXT: ret void
10121 //
10122 //
10123 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l97
10124 // CHECK14-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
10125 // CHECK14-NEXT: entry:
10126 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
10127 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
10128 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10129 // CHECK14-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
10130 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
10131 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
10132 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
10133 // CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
10134 // CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
10135 // CHECK14-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
10136 // CHECK14-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
10137 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
10138 // CHECK14-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
10139 // CHECK14-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
10140 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10141 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
10142 // CHECK14-NEXT: ret void
10143 //
10144 //
10145 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8
10146 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
10147 // CHECK14-NEXT: entry:
10148 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10149 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10150 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10151 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10152 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10153 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10154 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10155 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10156 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10157 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10158 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10159 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10160 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10161 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10162 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10163 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
10164 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10165 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10166 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10167 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10168 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10169 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10170 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10171 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10172 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10173 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10174 // CHECK14: cond.true:
10175 // CHECK14-NEXT: br label [[COND_END:%.*]]
10176 // CHECK14: cond.false:
10177 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10178 // CHECK14-NEXT: br label [[COND_END]]
10179 // CHECK14: cond.end:
10180 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10181 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10182 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10183 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10184 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10185 // CHECK14: omp.inner.for.cond:
10186 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10187 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10188 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10189 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10190 // CHECK14: omp.inner.for.body:
10191 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10192 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10193 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10194 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10195 // CHECK14-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
10196 // CHECK14-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
10197 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
10198 // CHECK14: omp_if.then:
10199 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
10200 // CHECK14-NEXT: br label [[OMP_IF_END:%.*]]
10201 // CHECK14: omp_if.else:
10202 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10203 // CHECK14-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10204 // CHECK14-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
10205 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10206 // CHECK14-NEXT: br label [[OMP_IF_END]]
10207 // CHECK14: omp_if.end:
10208 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10209 // CHECK14: omp.inner.for.inc:
10210 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10211 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10212 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
10213 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10214 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10215 // CHECK14: omp.inner.for.end:
10216 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10217 // CHECK14: omp.loop.exit:
10218 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10219 // CHECK14-NEXT: ret void
10220 //
10221 //
10222 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9
10223 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10224 // CHECK14-NEXT: entry:
10225 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10226 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10227 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10228 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10229 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10230 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10231 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10232 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10233 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10234 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10235 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10236 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10237 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10238 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10239 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10240 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10241 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10242 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10243 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10244 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10245 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10246 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10247 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10248 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10249 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10250 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10251 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10252 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10253 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10254 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10255 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10256 // CHECK14: cond.true:
10257 // CHECK14-NEXT: br label [[COND_END:%.*]]
10258 // CHECK14: cond.false:
10259 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10260 // CHECK14-NEXT: br label [[COND_END]]
10261 // CHECK14: cond.end:
10262 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10263 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10264 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10265 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10266 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10267 // CHECK14: omp.inner.for.cond:
10268 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10269 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10270 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10271 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10272 // CHECK14: omp.inner.for.body:
10273 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10274 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10275 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10276 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
10277 // CHECK14-NEXT: call void @_Z3fn6v()
10278 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10279 // CHECK14: omp.body.continue:
10280 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10281 // CHECK14: omp.inner.for.inc:
10282 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10283 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10284 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10285 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10286 // CHECK14: omp.inner.for.end:
10287 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10288 // CHECK14: omp.loop.exit:
10289 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10290 // CHECK14-NEXT: ret void
10291 //
10292 //
10293 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
10294 // CHECK14-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] comdat {
10295 // CHECK14-NEXT: entry:
10296 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
10297 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10298 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
10299 // CHECK14-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
10300 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
10301 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
10302 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
10303 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
10304 // CHECK14-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
10305 // CHECK14-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
10306 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10307 // CHECK14-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
10308 // CHECK14-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0
10309 // CHECK14-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10310 // CHECK14: omp_offload.failed:
10311 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
10312 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]]
10313 // CHECK14: omp_offload.cont:
10314 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10315 // CHECK14-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 1)
10316 // CHECK14-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
10317 // CHECK14-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]]
10318 // CHECK14: omp_offload.failed2:
10319 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67() #[[ATTR2]]
10320 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT3]]
10321 // CHECK14: omp_offload.cont3:
10322 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
10323 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
10324 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[CONV]], align 4
10325 // CHECK14-NEXT: [[TMP5:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
10326 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10327 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
10328 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP7]], align 8
10329 // CHECK14-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10330 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
10331 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP9]], align 8
10332 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10333 // CHECK14-NEXT: store i8* null, i8** [[TMP10]], align 8
10334 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10335 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10336 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
10337 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP13]], 0
10338 // CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
10339 // CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
10340 // CHECK14-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
10341 // CHECK14-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
10342 // CHECK14-NEXT: [[TMP15:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
10343 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100)
10344 // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72.region_id, i32 1, i8** [[TMP11]], i8** [[TMP12]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 [[TMP15]])
10345 // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
10346 // CHECK14-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
10347 // CHECK14: omp_offload.failed6:
10348 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72(i64 [[TMP5]]) #[[ATTR2]]
10349 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT7]]
10350 // CHECK14: omp_offload.cont7:
10351 // CHECK14-NEXT: ret i32 0
10352 //
10353 //
10354 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
10355 // CHECK14-SAME: () #[[ATTR1]] {
10356 // CHECK14-NEXT: entry:
10357 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
10358 // CHECK14-NEXT: ret void
10359 //
10360 //
10361 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..10
10362 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10363 // CHECK14-NEXT: entry:
10364 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10365 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10366 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10367 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10368 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10369 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10370 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10371 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10372 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10373 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10374 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10375 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10376 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10377 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10378 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10379 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10380 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10381 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10382 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10383 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10384 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10385 // CHECK14: cond.true:
10386 // CHECK14-NEXT: br label [[COND_END:%.*]]
10387 // CHECK14: cond.false:
10388 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10389 // CHECK14-NEXT: br label [[COND_END]]
10390 // CHECK14: cond.end:
10391 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10392 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10393 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10394 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10395 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10396 // CHECK14: omp.inner.for.cond:
10397 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10398 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10399 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10400 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10401 // CHECK14: omp.inner.for.body:
10402 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10403 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10404 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10405 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10406 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
10407 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10408 // CHECK14: omp.inner.for.inc:
10409 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10410 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10411 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
10412 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10413 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10414 // CHECK14: omp.inner.for.end:
10415 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10416 // CHECK14: omp.loop.exit:
10417 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10418 // CHECK14-NEXT: ret void
10419 //
10420 //
10421 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11
10422 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10423 // CHECK14-NEXT: entry:
10424 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10425 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10426 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10427 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10428 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10429 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10430 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10431 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10432 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10433 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10434 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10435 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10436 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10437 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10438 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10439 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10440 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10441 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10442 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10443 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10444 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10445 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10446 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10447 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10448 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10449 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10450 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10451 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10452 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10453 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10454 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10455 // CHECK14: cond.true:
10456 // CHECK14-NEXT: br label [[COND_END:%.*]]
10457 // CHECK14: cond.false:
10458 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10459 // CHECK14-NEXT: br label [[COND_END]]
10460 // CHECK14: cond.end:
10461 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10462 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10463 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10464 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10465 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10466 // CHECK14: omp.inner.for.cond:
10467 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10468 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10469 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10470 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10471 // CHECK14: omp.inner.for.body:
10472 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10473 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10474 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10475 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
10476 // CHECK14-NEXT: call void @_Z3fn1v()
10477 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10478 // CHECK14: omp.body.continue:
10479 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10480 // CHECK14: omp.inner.for.inc:
10481 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10482 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10483 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10484 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10485 // CHECK14: omp.inner.for.end:
10486 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10487 // CHECK14: omp.loop.exit:
10488 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10489 // CHECK14-NEXT: ret void
10490 //
10491 //
10492 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
10493 // CHECK14-SAME: () #[[ATTR1]] {
10494 // CHECK14-NEXT: entry:
10495 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
10496 // CHECK14-NEXT: ret void
10497 //
10498 //
10499 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12
10500 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
10501 // CHECK14-NEXT: entry:
10502 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10503 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10504 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10505 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10506 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10507 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10508 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10509 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10510 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10511 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10512 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10513 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10514 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10515 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10516 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10517 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10518 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10519 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10520 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10521 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10522 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10523 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10524 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10525 // CHECK14: cond.true:
10526 // CHECK14-NEXT: br label [[COND_END:%.*]]
10527 // CHECK14: cond.false:
10528 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10529 // CHECK14-NEXT: br label [[COND_END]]
10530 // CHECK14: cond.end:
10531 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10532 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10533 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10534 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10535 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10536 // CHECK14: omp.inner.for.cond:
10537 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10538 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10539 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10540 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10541 // CHECK14: omp.inner.for.body:
10542 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10543 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10544 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10545 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10546 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10547 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10548 // CHECK14-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
10549 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10550 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10551 // CHECK14: omp.inner.for.inc:
10552 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10553 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10554 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10555 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10556 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10557 // CHECK14: omp.inner.for.end:
10558 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10559 // CHECK14: omp.loop.exit:
10560 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10561 // CHECK14-NEXT: ret void
10562 //
10563 //
10564 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..13
10565 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10566 // CHECK14-NEXT: entry:
10567 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10568 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10569 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10570 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10571 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10572 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10573 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10574 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10575 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10576 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10577 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10578 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10579 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10580 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10581 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10582 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10583 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10584 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10585 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10586 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10587 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10588 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10589 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10590 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10591 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10592 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10593 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10594 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10595 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10596 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10597 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10598 // CHECK14: cond.true:
10599 // CHECK14-NEXT: br label [[COND_END:%.*]]
10600 // CHECK14: cond.false:
10601 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10602 // CHECK14-NEXT: br label [[COND_END]]
10603 // CHECK14: cond.end:
10604 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10605 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10606 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10607 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10608 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10609 // CHECK14: omp.inner.for.cond:
10610 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10611 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10612 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10613 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10614 // CHECK14: omp.inner.for.body:
10615 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10616 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10617 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10618 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
10619 // CHECK14-NEXT: call void @_Z3fn2v()
10620 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10621 // CHECK14: omp.body.continue:
10622 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10623 // CHECK14: omp.inner.for.inc:
10624 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10625 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10626 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10627 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10628 // CHECK14: omp.inner.for.end:
10629 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10630 // CHECK14: omp.loop.exit:
10631 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10632 // CHECK14-NEXT: ret void
10633 //
10634 //
10635 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l72
10636 // CHECK14-SAME: (i64 [[ARG:%.*]]) #[[ATTR1]] {
10637 // CHECK14-NEXT: entry:
10638 // CHECK14-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
10639 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
10640 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10641 // CHECK14-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
10642 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
10643 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
10644 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
10645 // CHECK14-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
10646 // CHECK14-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
10647 // CHECK14-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
10648 // CHECK14-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
10649 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
10650 // CHECK14-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
10651 // CHECK14-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
10652 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10653 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
10654 // CHECK14-NEXT: ret void
10655 //
10656 //
10657 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14
10658 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
10659 // CHECK14-NEXT: entry:
10660 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10661 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10662 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10663 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10664 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10665 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10666 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10667 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10668 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10669 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10670 // CHECK14-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
10671 // CHECK14-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
10672 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10673 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10674 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10675 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
10676 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10677 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
10678 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10679 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10680 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10681 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
10682 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10683 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10684 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
10685 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10686 // CHECK14: cond.true:
10687 // CHECK14-NEXT: br label [[COND_END:%.*]]
10688 // CHECK14: cond.false:
10689 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10690 // CHECK14-NEXT: br label [[COND_END]]
10691 // CHECK14: cond.end:
10692 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
10693 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10694 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10695 // CHECK14-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
10696 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10697 // CHECK14: omp.inner.for.cond:
10698 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10699 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10700 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
10701 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10702 // CHECK14: omp.inner.for.body:
10703 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10704 // CHECK14-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
10705 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10706 // CHECK14-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
10707 // CHECK14-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
10708 // CHECK14-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
10709 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
10710 // CHECK14: omp_if.then:
10711 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
10712 // CHECK14-NEXT: br label [[OMP_IF_END:%.*]]
10713 // CHECK14: omp_if.else:
10714 // CHECK14-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10715 // CHECK14-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10716 // CHECK14-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
10717 // CHECK14-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
10718 // CHECK14-NEXT: br label [[OMP_IF_END]]
10719 // CHECK14: omp_if.end:
10720 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10721 // CHECK14: omp.inner.for.inc:
10722 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10723 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10724 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
10725 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10726 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10727 // CHECK14: omp.inner.for.end:
10728 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10729 // CHECK14: omp.loop.exit:
10730 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
10731 // CHECK14-NEXT: ret void
10732 //
10733 //
10734 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15
10735 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
10736 // CHECK14-NEXT: entry:
10737 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10738 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10739 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10740 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10741 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10742 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
10743 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10744 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10745 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10746 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10747 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
10748 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10749 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10750 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10751 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10752 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10753 // CHECK14-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
10754 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10755 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
10756 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10757 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10758 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10759 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10760 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10761 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10762 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10763 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
10764 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10765 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10766 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
10767 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10768 // CHECK14: cond.true:
10769 // CHECK14-NEXT: br label [[COND_END:%.*]]
10770 // CHECK14: cond.false:
10771 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10772 // CHECK14-NEXT: br label [[COND_END]]
10773 // CHECK14: cond.end:
10774 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
10775 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10776 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10777 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
10778 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10779 // CHECK14: omp.inner.for.cond:
10780 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10781 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10782 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
10783 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10784 // CHECK14: omp.inner.for.body:
10785 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10786 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
10787 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10788 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4
10789 // CHECK14-NEXT: call void @_Z3fn3v()
10790 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10791 // CHECK14: omp.body.continue:
10792 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10793 // CHECK14: omp.inner.for.inc:
10794 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10795 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
10796 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
10797 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]]
10798 // CHECK14: omp.inner.for.end:
10799 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10800 // CHECK14: omp.loop.exit:
10801 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
10802 // CHECK14-NEXT: ret void
10803 //
10804 //
10805 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
10806 // CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
10807 // CHECK14-NEXT: entry:
10808 // CHECK14-NEXT: call void @__tgt_register_requires(i64 1)
10809 // CHECK14-NEXT: ret void
10810 //
10811 //