1 // Copyright 2006-2013 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 // This module contains the architecture-specific code. This make the rest of 6 // the code less dependent on differences between different processor 7 // architecture. 8 // The classes have the same definition for all architectures. The 9 // implementation for a particular architecture is put in cpu_<arch>.cc. 10 // The build system then uses the implementation for the target architecture. 11 // 12 13 #ifndef V8_BASE_CPU_H_ 14 #define V8_BASE_CPU_H_ 15 16 #include "src/base/base-export.h" 17 #include "src/base/macros.h" 18 19 namespace v8 { 20 namespace base { 21 22 // ---------------------------------------------------------------------------- 23 // CPU 24 // 25 // Query information about the processor. 26 // 27 // This class also has static methods for the architecture specific functions. 28 // Add methods here to cope with differences between the supported 29 // architectures. For each architecture the file cpu_<arch>.cc contains the 30 // implementation of these static functions. 31 32 class V8_BASE_EXPORT CPU final { 33 public: 34 CPU(); 35 36 // x86 CPUID information vendor()37 const char* vendor() const { return vendor_; } stepping()38 int stepping() const { return stepping_; } model()39 int model() const { return model_; } ext_model()40 int ext_model() const { return ext_model_; } family()41 int family() const { return family_; } ext_family()42 int ext_family() const { return ext_family_; } type()43 int type() const { return type_; } 44 45 // arm implementer/part information implementer()46 int implementer() const { return implementer_; } 47 static const int kArm = 0x41; 48 static const int kNvidia = 0x4e; 49 static const int kQualcomm = 0x51; architecture()50 int architecture() const { return architecture_; } variant()51 int variant() const { return variant_; } 52 static const int kNvidiaDenver = 0x0; part()53 int part() const { return part_; } 54 55 // ARM-specific part codes 56 static const int kArmCortexA5 = 0xc05; 57 static const int kArmCortexA7 = 0xc07; 58 static const int kArmCortexA8 = 0xc08; 59 static const int kArmCortexA9 = 0xc09; 60 static const int kArmCortexA12 = 0xc0c; 61 static const int kArmCortexA15 = 0xc0f; 62 63 // Denver-specific part code 64 static const int kNvidiaDenverV10 = 0x002; 65 66 // PPC-specific part codes 67 enum { 68 kPPCPower5, 69 kPPCPower6, 70 kPPCPower7, 71 kPPCPower8, 72 kPPCPower9, 73 kPPCPower10, 74 kPPCG4, 75 kPPCG5, 76 kPPCPA6T 77 }; 78 79 // General features has_fpu()80 bool has_fpu() const { return has_fpu_; } icache_line_size()81 int icache_line_size() const { return icache_line_size_; } dcache_line_size()82 int dcache_line_size() const { return dcache_line_size_; } 83 static const int kUnknownCacheLineSize = 0; 84 85 // x86 features has_cmov()86 bool has_cmov() const { return has_cmov_; } has_sahf()87 bool has_sahf() const { return has_sahf_; } has_mmx()88 bool has_mmx() const { return has_mmx_; } has_sse()89 bool has_sse() const { return has_sse_; } has_sse2()90 bool has_sse2() const { return has_sse2_; } has_sse3()91 bool has_sse3() const { return has_sse3_; } has_ssse3()92 bool has_ssse3() const { return has_ssse3_; } has_sse41()93 bool has_sse41() const { return has_sse41_; } has_sse42()94 bool has_sse42() const { return has_sse42_; } has_osxsave()95 bool has_osxsave() const { return has_osxsave_; } has_avx()96 bool has_avx() const { return has_avx_; } has_avx2()97 bool has_avx2() const { return has_avx2_; } has_fma3()98 bool has_fma3() const { return has_fma3_; } has_bmi1()99 bool has_bmi1() const { return has_bmi1_; } has_bmi2()100 bool has_bmi2() const { return has_bmi2_; } has_lzcnt()101 bool has_lzcnt() const { return has_lzcnt_; } has_popcnt()102 bool has_popcnt() const { return has_popcnt_; } is_atom()103 bool is_atom() const { return is_atom_; } has_non_stop_time_stamp_counter()104 bool has_non_stop_time_stamp_counter() const { 105 return has_non_stop_time_stamp_counter_; 106 } is_running_in_vm()107 bool is_running_in_vm() const { return is_running_in_vm_; } 108 109 // arm features has_idiva()110 bool has_idiva() const { return has_idiva_; } has_neon()111 bool has_neon() const { return has_neon_; } has_thumb2()112 bool has_thumb2() const { return has_thumb2_; } has_vfp()113 bool has_vfp() const { return has_vfp_; } has_vfp3()114 bool has_vfp3() const { return has_vfp3_; } has_vfp3_d32()115 bool has_vfp3_d32() const { return has_vfp3_d32_; } has_jscvt()116 bool has_jscvt() const { return has_jscvt_; } 117 118 // mips features is_fp64_mode()119 bool is_fp64_mode() const { return is_fp64_mode_; } has_msa()120 bool has_msa() const { return has_msa_; } 121 122 private: 123 #if defined(V8_OS_STARBOARD) 124 bool StarboardDetectCPU(); 125 #endif 126 char vendor_[13]; 127 int stepping_; 128 int model_; 129 int ext_model_; 130 int family_; 131 int ext_family_; 132 int type_; 133 int implementer_; 134 int architecture_; 135 int variant_; 136 int part_; 137 int icache_line_size_; 138 int dcache_line_size_; 139 bool has_fpu_; 140 bool has_cmov_; 141 bool has_sahf_; 142 bool has_mmx_; 143 bool has_sse_; 144 bool has_sse2_; 145 bool has_sse3_; 146 bool has_ssse3_; 147 bool has_sse41_; 148 bool has_sse42_; 149 bool is_atom_; 150 bool has_osxsave_; 151 bool has_avx_; 152 bool has_avx2_; 153 bool has_fma3_; 154 bool has_bmi1_; 155 bool has_bmi2_; 156 bool has_lzcnt_; 157 bool has_popcnt_; 158 bool has_idiva_; 159 bool has_neon_; 160 bool has_thumb2_; 161 bool has_vfp_; 162 bool has_vfp3_; 163 bool has_vfp3_d32_; 164 bool has_jscvt_; 165 bool is_fp64_mode_; 166 bool has_non_stop_time_stamp_counter_; 167 bool is_running_in_vm_; 168 bool has_msa_; 169 }; 170 171 } // namespace base 172 } // namespace v8 173 174 #endif // V8_BASE_CPU_H_ 175