1 ;; EUSART test 2 ;; 3 ;; The purpose of this program is to verify that gpsim's 4 ;; USART functions properly when configured as an EUSART. 5 ;; The USART module is used to loop 6 ;; characters back to the receiver testing RCIF interupts. 7 ;; 8 ;; 9 ;; 10 11 list p=18f2455 12 include <p18f2455.inc> 13 include <coff.inc> 14 15 CONFIG WDT=OFF 16;; 17 CONFIG MCLRE=ON, LPT1OSC=OFF, PBADEN=OFF, CCP2MX=ON, FOSC = INTOSCIO_EC 18 19 20 21 errorlevel -302 22 radix dec 23 24BAUDHI equ ((80000/4)/48)-1 25;;BAUDLO equ 129 26BAUDLO equ 8000000/(4800*16)-1 27 28 29;---------------------------------------------------------------------- 30; RAM Declarations 31 32 33; 34INT_VAR UDATA 0x00 35w_temp RES 1 36status_temp RES 1 37pclath_temp RES 1 38 39 40 41GPR_DAT UDATA 42 43#define RX_BUF_SIZE 0x10 44 45temp1 RES 1 46temp2 RES 1 47temp3 RES 1 48 49tx_ptr RES 1 50 51rxLastByte RES 1 52rxFlag RES 1 53 54;---------------------------------------------------------------------- 55; ********************* RESET VECTOR LOCATION ******************** 56;---------------------------------------------------------------------- 57RESET_VECTOR CODE 0x000 ; processor reset vector 58 goto start ; go to beginning of program 59 60 61 62;------------------------------------------------------------------------ 63; 64; Interrupt Vector 65; 66;------------------------------------------------------------------------ 67 68INT_VECTOR CODE 0x018 ; interrupt vector location 69 70 movwf w_temp 71 swapf STATUS,w 72 clrf STATUS 73 movwf status_temp 74 movf PCLATH,w 75 movwf pclath_temp 76 clrf PCLATH 77 78 btfsc INTCON,PEIE 79 btfss PIR1,RCIF 80 goto int_done 81 82;;; Received a Character 83 .assert "rcreg == txreg, '*** FAILED sent character looped back'" 84 nop 85 movf RCREG,W 86 movwf rxLastByte 87 bsf rxFlag,0 88 89int_done: 90 clrf STATUS 91 movf pclath_temp,w 92 movwf PCLATH 93 swapf status_temp,w 94 movwf STATUS 95 swapf w_temp,f 96 swapf w_temp,w 97 retfie 98 99 100;; ---------------------------------------------------- 101;; 102;; start 103;; 104 105MAIN CODE 106start 107 108 .sim "break c 0x100000" 109 .sim "module library libgpsim_modules" 110 .sim "module load usart U1" 111 .sim ".xpos = 48" 112 .sim ".ypos = 48" 113 114 .sim "U1.xpos = 240.0" 115 .sim "U1.ypos = 168" 116 117 .sim "node PIC_tx" 118 .sim "node PIC_rx" 119 120 ;; Tie the USART module to the PIC 121 .sim "attach PIC_tx portc6 U1.RXPIN" 122 .sim "attach PIC_rx portc7 U1.TXPIN" 123 124 ;; Set the USART module's Baud Rate 125 126 .sim "U1.txbaud = 4800" 127 .sim "U1.rxbaud = 4800" 128 .sim "U1.loop = true" 129 130 ;; USART Initialization 131 ;; 132 ;; Turn on the high baud rate (BRGH), disable the transmitter, 133 ;; disable synchronous mode. 134 ;; 135 136 clrf STATUS 137 138 bsf PORTC,6 ;Make sure the TX line drives high when 139 ;it is programmed as an output. 140 141 clrf TRISC ;RRR test 142 bsf TRISC,6 ;RX is an input 143 bsf TRISC,7 ;TX EUSART sets pin direction 144 .assert "p18f2455.frequency == 1000000., 'FAILED 18f2455 default intrc frequency'" 145 nop 146 movlw 0x70 147 movwf OSCCON 148 .assert "p18f2455.frequency == 8000000., 'FAILED 18f2455 frequency osccon=070'" 149 nop 150 151 ;; CSRC - clock source is a don't care 152 ;; TX9 - 0 8-bit data 153 ;; TXEN - 0 don't enable the transmitter. 154 ;; SYNC - 0 Asynchronous 155 ;; BRGH - 1 Select high baud rate divisor 156 ;; TRMT - x read only 157 ;; TX9D - 0 not used 158 159 movlw (1<<BRGH) 160 movwf TXSTA 161 162 movlw BAUDLO ;4800 baud at 10MHz clock. 163 movwf SPBRG 164 165 166 .assert "(portc & 0x40) == 0x40, 'FAILED: TX bit initilized as high'" 167 clrf tx_ptr 168 169 ;; Turn on the serial port 170 movlw (1<<SPEN) | (1<<CREN) 171 movwf RCSTA 172 173 movf RCREG,w ;Clear RCIF 174 bsf INTCON,GIE 175 bsf INTCON,PEIE 176 177 movf RCREG,w ;Clear RCIF 178 movf RCREG,w ;Clear RCIF 179 180 ;; Test TXIF, RCIF bits of PIR1 are not writable 181 182 clrf PIR1 183 bsf PIR1,RCIF 184 bsf PIR1,TXIF 185 .assert "pir1 == 0x00, '*** FAILED TXIF, RCIF not writable'" 186 nop 187 188 ;; Enable the transmitter 189 bsf TXSTA,TXEN 190 .assert "pir1 == 0x10, '*** FAILED TXIF should now be set'" 191 bsf PIE1,RCIE ; Enable Rx interrupts 192 193 ;; Now Transmit some data and verify that it is transmitted correctly. 194 195 call TransmitNextByte 196 .assert "U1.rx == 0x31, '*** FAILED sending 0x31'" 197 nop 198 call TransmitNextByte 199 .assert "U1.rx == 0x32, '*** FAILED sending 0x32'" 200 nop 201 call TransmitNextByte 202 .assert "U1.rx == 0x33, '*** FAILED sending 0x33'" 203 nop 204 call TransmitNextByte 205 .assert "U1.rx == 0x34, '*** FAILED sending 0x34'" 206 nop 207 208 ;; Switch to 16-bit BRG mode 209 bsf BAUDCON,BRG16 210 movlw low(BAUDHI) 211 movwf SPBRG 212 movlw high(BAUDHI) 213 movwf SPBRGH 214 rcall delay 215 216 call TransmitNextByte 217 .assert "U1.rx == 0x35, '*** FAILED sending 0x35'" 218 call TransmitNextByte 219 .assert "U1.rx == 0x36, '*** FAILED sending 0x36'" 220 call TransmitNextByte 221 .assert "U1.rx == 0x37, '*** FAILED sending 0x37'" 222 call TransmitNextByte 223 .assert "U1.rx == 0x38, '*** FAILED sending 0x38'" 224 call TransmitNextByte 225 .assert "U1.rx == 0x39, '*** FAILED sending 0x39'" 226 nop 227; 228; setup tmr0 229; 230 movlw 0xC5 ; Tmr0 internal clock prescaler 64 231 movwf T0CON 232 233 clrf TMR0L 234 movlw 0x55 235 movwf TXREG 236 237 btfss PIR1,TXIF ;Did the interrupt flag get set? 238 goto $-1 239 240 btfss TXSTA,TRMT ;Wait 'til through transmitting 241 bra $-2 242; 243; At 9600 baud each bit takes 0.104 msec. TRMT will be low > 9 bits 244; and < 10 bits or between 0.9375 and 1.041 msec. 245; with oscillator at 8MHz and TMR0 / 64 expect between 58 and 65 246; TMR0 cycles. 247 248 movf TMR0L,W 249 250 .assert "tmr0 > 58 && tmr0 < 65, '*** FAILED baud rate'" 251 nop 252 clrf rxFlag 253 call rx_loop 254 255 ; Disable interrupts because the following tests don't give good receive bytes 256 bcf PIE1,RCIE 257 258 bsf TXSTA,SENDB ; request a break sequence 259 btfss PORTC,6 ; Shouldn't happen just yet 260 .assert "'*** FAILED break sent too soon'" 261 nop 262 263 clrf TMR0L 264 movlw 0x55 265 movwf TXREG 266 267 rcall delay 268 269 btfsc PORTC,6 ; Should happen by now 270 .assert "'*** FAILED to send break'" 271 nop 272 273 btfss PORTC,6 ; Wait for stop bit 274 bra $-2 275; 276; At 4800 baud each bit takes 0.208 msec. Output will be low for 277; start + 12 bit times or 2.70 msec. With 8Mhz TMR0 / 64 is 85 TMR0 counts. 278 279 movf TMR0L,W 280 281 .assert "tmr0 > 81 && tmr0 < 89, '*** FAILED sync pulse'" 282 nop 283 284done: 285 .assert "'*** PASSED E-Usart on 18F2455'" 286 goto $ 287 288 289 290tx_message: 291 incf tx_ptr,w 292 andlw 0x0f 293 movwf tx_ptr 294 addlw 0x30 295 return 296 297 298delay: 299 decfsz temp2,f 300 bra delay 301 return 302 303 304 305TransmitNextByte: 306 clrf rxFlag 307 call tx_message 308 btfss PIR1,TXIF 309 bra $-2 310 movwf TXREG 311 clrwdt 312 313rx_loop: 314 315 btfss rxFlag,0 316 bra rx_loop 317 return 318 319 end 320