1 /*
2 * Copyright (c) 2011-2018, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file vphal_render_vebox_g9_base.cpp
24 //! \brief Interface and structure specific for SKL (GEN9) Vebox
25 //! \details Interface and structure specific for SKL (GEN9) Vebox
26 //!
27 #include "vphal.h"
28 #include "vphal_render_vebox_base.h"
29 #include "vphal_render_vebox_g9_base.h"
30 #include "vphal_render_sfc_g9_base.h"
31 #include "vphal_render_vebox_util_base.h"
32 #include "vpkrnheader.h"
33 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
34 #include "igvpkrn_isa_g9.h"
35 #endif
36
37 #define MAX_INPUT_PREC_BITS 16
38 #define DOWNSHIFT_WITH_ROUND(x, n) (((x) + (((n) > 0) ? (1 << ((n) - 1)) : 0)) >> (n))
39 #define INTERP(x0, x1, x, y0, y1) ((uint32_t) floor(y0+(x-x0)*(y1-y0)/(double)(x1-x0)))
40
41 const char g_KernelDNDI_Str_g9[KERNEL_VEBOX_BASE_MAX][MAX_PATH] =
42 {
43 DBG_TEXT("Reserved"),
44 DBG_TEXT("UpdateDNState"),
45 };
46
47 // Kernel Params ---------------------------------------------------------------
48 const RENDERHAL_KERNEL_PARAM g_Vebox_KernelParam_g9[KERNEL_VEBOX_BASE_MAX] =
49 {
50 ///* GRF_Count
51 // | BT_Count
52 // | | Sampler_Count
53 // | | | Thread_Count
54 // | | | | GRF_Start_Register
55 // | | | | | CURBE_Length
56 // | | | | | | block_width
57 // | | | | | | | block_height
58 // | | | | | | | | blocks_x
59 // | | | | | | | | | blocks_y
60 // | | | | | | | | | |*/
61 { 0, 0, 0, VPHAL_USE_MEDIA_THREADS_MAX, 0, 0, 0, 0, 0, 0 }, // Reserved
62 { 4, 34, 0, VPHAL_USE_MEDIA_THREADS_MAX, 0, 1, 64, 8, 1, 1 }, // UPDATEDNSTATE
63 };
64
65 const uint32_t dwDenoiseASDThreshold[NOISEFACTOR_MAX + 1] = {
66 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542,
67 544, 546, 548, 550, 552, 554, 556, 558, 560, 562, 564, 566, 568, 570, 572, 574,
68 576, 578, 580, 582, 584, 586, 588, 590, 592, 594, 596, 598, 600, 602, 604, 606,
69 608, 610, 612, 614, 616, 618, 620, 622, 624, 626, 628, 630, 632, 634, 636, 638,
70 640 };
71
72 const uint32_t dwDenoiseHistoryDelta[NOISEFACTOR_MAX + 1] = {
73 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
74 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
75 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
76 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
77 8 };
78
79 const uint32_t dwDenoiseMaximumHistory[NOISEFACTOR_MAX + 1] = {
80 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
81 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
82 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
83 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
84 208 };
85
86 const uint32_t dwDenoiseSTADThreshold[NOISEFACTOR_MAX + 1] = {
87 2048, 2052, 2056, 2060, 2064, 2068, 2072, 2076, 2080, 2084, 2088, 2092, 2096, 2100, 2104, 2108,
88 2112, 2116, 2120, 2124, 2128, 2132, 2136, 2140, 2144, 2148, 2152, 2156, 2160, 2164, 2168, 2172,
89 2176, 2180, 2184, 2188, 2192, 2196, 2200, 2204, 2208, 2212, 2216, 2220, 2224, 2228, 2232, 2236,
90 2240, 2244, 2248, 2252, 2256, 2260, 2264, 2268, 2272, 2276, 2280, 2284, 2288, 2292, 2296, 2300,
91 2304 };
92
93 const uint32_t dwDenoiseSCMThreshold[NOISEFACTOR_MAX + 1] = {
94 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542,
95 544, 546, 548, 550, 552, 554, 556, 558, 560, 562, 564, 566, 568, 570, 572, 574,
96 576, 578, 580, 582, 584, 586, 588, 590, 592, 594, 596, 598, 600, 602, 604, 606,
97 608, 610, 612, 614, 616, 618, 620, 622, 624, 626, 628, 630, 632, 634, 636, 638,
98 640 };
99
100 const uint32_t dwDenoiseMPThreshold[NOISEFACTOR_MAX + 1] = {
101 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
102 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
103 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
104 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
105 2 };
106
107 const uint32_t dwLTDThreshold[NOISEFACTOR_MAX + 1] = {
108 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
109 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
110 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
111 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
112 128 };
113
114 const uint32_t dwTDThreshold[NOISEFACTOR_MAX + 1] = {
115 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
116 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
117 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
118 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
119 192 };
120
121 const uint32_t dwGoodNeighborThreshold[NOISEFACTOR_MAX + 1] = {
122 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
124 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
125 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
126 0 };
127
128 const uint32_t dwPixRangeThreshold0[NOISEFACTOR_MAX + 1] = {
129 32, 37, 42, 47, 52, 57, 62, 67, 72, 77, 82, 87, 92, 97, 102, 107,
130 112, 117, 122, 127, 132, 137, 142, 147, 152, 157, 162, 167, 172, 177, 182, 187,
131 192, 198, 204, 210, 216, 222, 228, 234, 240, 246, 252, 258, 264, 270, 276, 282,
132 288, 294, 300, 306, 312, 318, 324, 330, 336, 342, 348, 354, 360, 366, 372, 378,
133 384 };
134
135 const uint32_t dwPixRangeThreshold1[NOISEFACTOR_MAX + 1] = {
136 64, 70, 76, 82, 88, 94, 100, 106, 112, 118, 124, 130, 136, 142, 148, 154,
137 160, 166, 172, 178, 184, 190, 196, 202, 208, 214, 220, 226, 232, 238, 244, 250,
138 256, 266, 276, 286, 296, 306, 316, 326, 336, 346, 356, 366, 376, 386, 396, 406,
139 416, 426, 436, 446, 456, 466, 476, 486, 496, 506, 516, 526, 536, 546, 556, 566,
140 576 };
141
142 const uint32_t dwPixRangeThreshold2[NOISEFACTOR_MAX + 1] = {
143 128, 140, 152, 164, 176, 188, 200, 212, 224, 236, 248, 260, 272, 284, 296, 308,
144 320, 332, 344, 356, 368, 380, 392, 404, 416, 428, 440, 452, 464, 476, 488, 500,
145 512, 524, 536, 548, 560, 572, 584, 596, 608, 620, 632, 644, 656, 668, 680, 692,
146 704, 716, 728, 740, 752, 764, 776, 788, 800, 812, 824, 836, 848, 860, 872, 884,
147 896 };
148
149 const uint32_t dwPixRangeThreshold3[NOISEFACTOR_MAX + 1] = {
150 128, 144, 160, 176, 192, 208, 224, 240, 256, 272, 288, 304, 320, 336, 352, 368,
151 384, 400, 416, 432, 448, 464, 480, 496, 512, 528, 544, 560, 576, 592, 608, 624,
152 640, 660, 680, 700, 720, 740, 760, 780, 800, 820, 840, 860, 880, 900, 920, 940,
153 960, 980, 1000, 1020, 1040, 1060, 1080, 1100, 1120, 1140, 1160, 1180, 1200, 1220, 1240, 1260,
154 1280 };
155
156 const uint32_t dwPixRangeThreshold4[NOISEFACTOR_MAX + 1] = {
157 128, 152, 176, 200, 224, 248, 272, 296, 320, 344, 368, 392, 416, 440, 464, 488,
158 512, 536, 560, 584, 608, 632, 656, 680, 704, 728, 752, 776, 800, 824, 848, 872,
159 896, 928, 960, 992, 1024, 1056, 1088, 1120, 1152, 1184, 1216, 1248, 1280, 1312, 1344, 1376,
160 1408, 1440, 1472, 1504, 1536, 1568, 1600, 1632, 1664, 1696, 1728, 1760, 1792, 1824, 1856, 1888,
161 1920 };
162
163 const uint32_t dwPixRangeThreshold5[NOISEFACTOR_MAX + 1] = {
164 128, 164, 200, 236, 272, 308, 344, 380, 416, 452, 488, 524, 560, 596, 632, 668,
165 704, 740, 776, 812, 848, 884, 920, 956, 992, 1028, 1064, 1100, 1136, 1172, 1208, 1244,
166 1280, 1320, 1360, 1400, 1440, 1480, 1520, 1560, 1600, 1640, 1680, 1720, 1760, 1800, 1840, 1880,
167 1920, 1960, 2000, 2040, 2080, 2120, 2160, 2200, 2240, 2280, 2320, 2360, 2400, 2440, 2480, 2520,
168 2560 };
169
170 const uint32_t dwPixRangeWeight0[NOISEFACTOR_MAX + 1] = {
171 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
172 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
173 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
174 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
175 16 };
176
177 const uint32_t dwPixRangeWeight1[NOISEFACTOR_MAX + 1] = {
178 9, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 11, 11, 11,
179 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 13, 13, 13, 13, 13, 13,
180 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
181 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
182 15 };
183
184 const uint32_t dwPixRangeWeight2[NOISEFACTOR_MAX + 1] = {
185 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5,
186 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9,
187 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11,
188 11, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
189 13 };
190
191 const uint32_t dwPixRangeWeight3[NOISEFACTOR_MAX + 1] = {
192 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 2, 2, 2,
193 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4,
194 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6, 7, 7, 7,
195 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9,
196 10 };
197
198 const uint32_t dwPixRangeWeight4[NOISEFACTOR_MAX + 1] = {
199 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
200 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
201 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 4, 4, 4,
202 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6,
203 7 };
204
205 const uint32_t dwPixRangeWeight5[NOISEFACTOR_MAX + 1] = {
206 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
207 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
208 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2,
209 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
210 4 };
211
212 const uint32_t dwLTDThresholdUV[NOISEFACTOR_MAX + 1] = {
213 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
214 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
215 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
216 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
217 8 };
218
219 const uint32_t dwTDThresholdUV[NOISEFACTOR_MAX + 1] = {
220 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
221 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
222 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
223 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
224 14 };
225
226 const uint32_t dwSTADThresholdUV[NOISEFACTOR_MAX + 1] = {
227 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131,
228 132, 132, 132, 132, 133, 133, 133, 133, 134, 134, 134, 134, 135, 135, 135, 135,
229 136, 136, 136, 136, 137, 137, 137, 137, 138, 138, 138, 138, 139, 139, 139, 139,
230 140, 140, 140, 140, 141, 141, 141, 141, 142, 142, 142, 142, 143, 143, 143, 143,
231 144 };
232
233 //!
234 //! \brief IsFormatMMCSupported
235 //! \details Check if the format of vebox output surface is supported by MMC
236 //! \param [in] Format
237 //! \return bool true if suported, otherwise not supported
238 //!
IsFormatMMCSupported(MOS_FORMAT Format)239 bool VPHAL_VEBOX_STATE_G9_BASE::IsFormatMMCSupported(
240 MOS_FORMAT Format)
241 {
242 bool bRet;
243
244 bRet = false;
245
246 if ((Format != Format_NV12) &&
247 (Format != Format_YUY2) &&
248 (Format != Format_YUYV) &&
249 (Format != Format_UYVY) &&
250 (Format != Format_YVYU) &&
251 (Format != Format_VYUY) &&
252 (Format != Format_AYUV) &&
253 (Format != Format_Y416) &&
254 (Format != Format_A8B8G8R8) &&
255 (Format != Format_A16B16G16R16))
256 {
257 VPHAL_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX MMC ouput.", Format);
258 goto finish;
259 }
260
261 bRet = true;
262
263 finish:
264 return bRet;
265 }
266
GetFFDISurfParams(VPHAL_CSPACE & ColorSpace,VPHAL_SAMPLE_TYPE & SampleType)267 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::GetFFDISurfParams(
268 VPHAL_CSPACE &ColorSpace,
269 VPHAL_SAMPLE_TYPE &SampleType)
270 {
271 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
272
273 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
274 {
275 ColorSpace = m_sfcPipeState->GetInputColorSpace();
276 }
277 else
278 {
279 ColorSpace = m_currentSurface->ColorSpace;
280 }
281
282 // When IECP is enabled and Bob or interlaced scaling is selected for interlaced input,
283 // output surface's SampleType should be same to input's. Bob is being
284 // done in Composition part
285 if (pRenderData->bIECP &&
286 ((m_currentSurface->pDeinterlaceParams &&
287 m_currentSurface->pDeinterlaceParams->DIMode == DI_MODE_BOB) ||
288 m_currentSurface->bInterlacedScaling))
289 {
290 SampleType = m_currentSurface->SampleType;
291 }
292 else
293 {
294 SampleType = SAMPLE_PROGRESSIVE;
295 }
296
297 return MOS_STATUS_SUCCESS;
298 }
299
300 //!
301 //! \brief Get Output surface params needed when allocate surfaces
302 //! \details Get Output surface params needed when allocate surfaces
303 //! \param [out] Format
304 //! Format of output surface
305 //! \param [out] TileType
306 //! Tile type of output surface
307 //! \return MOS_STATUS
308 //! Return MOS_STATUS_SUCCESS if success, otherwise failed
309 //!
GetOutputSurfParams(MOS_FORMAT & Format,MOS_TILE_TYPE & TileType)310 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::GetOutputSurfParams(
311 MOS_FORMAT &Format,
312 MOS_TILE_TYPE &TileType)
313 {
314 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
315
316 if (pRenderData->bDeinterlace)
317 {
318 Format = Format_YUY2;
319 TileType = MOS_TILE_Y;
320 }
321 else
322 {
323 Format = IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) ?
324 m_sfcPipeState->GetInputFormat() :
325 m_currentSurface->Format;
326
327 TileType = m_currentSurface->TileType;
328 }
329
330 return MOS_STATUS_SUCCESS;
331 }
332
333 //!
334 //! \brief Check for DN only case
335 //! \details Check for DN only case
336 //! \return bool
337 //! Return true if DN only case, otherwise not
338 //!
IsDNOnly()339 bool VPHAL_VEBOX_STATE_G9_BASE::IsDNOnly()
340 {
341 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
342
343 return pRenderData->bDenoise &&
344 (!pRenderData->bDeinterlace) &&
345 (!IsQueryVarianceEnabled()) &&
346 (!IsIECPEnabled());
347 }
348
IsFFDISurfNeeded()349 bool VPHAL_VEBOX_STATE_G9_BASE::IsFFDISurfNeeded()
350 {
351 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
352
353 if (pRenderData->bDeinterlace ||
354 IsQueryVarianceEnabled() ||
355 pRenderData->bIECP ||
356 (pRenderData->bDenoise && IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))) // DN + SFC needs IECP implicitly and outputs to DI surface
357 {
358 return true;
359 }
360 else
361 {
362 return false;
363 }
364 }
365
IsFFDNSurfNeeded()366 bool VPHAL_VEBOX_STATE_G9_BASE::IsFFDNSurfNeeded()
367 {
368 return GetLastExecRenderData()->bDenoise ? true : false;
369 }
370
IsSTMMSurfNeeded()371 bool VPHAL_VEBOX_STATE_G9_BASE::IsSTMMSurfNeeded()
372 {
373
374 return (GetLastExecRenderData()->bDenoise || GetLastExecRenderData()->bDeinterlace);
375 }
376
377 //!
378 //! \brief Vebox allocate resources
379 //! \details Allocate resources that will be used in Vebox
380 //! \return MOS_STATUS
381 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
382 //!
AllocateResources()383 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::AllocateResources()
384 {
385 MOS_STATUS eStatus;
386 PMOS_INTERFACE pOsInterface;
387 PRENDERHAL_INTERFACE pRenderHal;
388 MOS_FORMAT format;
389 MOS_TILE_TYPE TileType;
390 uint32_t dwWidth;
391 uint32_t dwHeight;
392 uint32_t dwSize;
393 int32_t i;
394 bool bAllocated;
395 bool bDIEnable;
396 bool bSurfCompressible;
397 bool bFFDNSurfCompressible;
398 MOS_RESOURCE_MMC_MODE SurfCompressionMode;
399 MOS_RESOURCE_MMC_MODE FFDNSurfCompressionMode;
400 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam;
401 PMHW_VEBOX_INTERFACE pVeboxInterface;
402 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
403 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
404
405 bAllocated = false;
406 bSurfCompressible = false;
407 bFFDNSurfCompressible = false;
408 SurfCompressionMode = MOS_MMC_DISABLED;
409 FFDNSurfCompressionMode = MOS_MMC_DISABLED;
410 pOsInterface = pVeboxState->m_pOsInterface;
411 pRenderHal = pVeboxState->m_pRenderHal;
412 pVeboxInterface = pVeboxState->m_pVeboxInterface;
413
414 GetOutputSurfParams(format, TileType);
415
416 // In DN only case, input, output and previous De-noised
417 // surfaces all should have precisely the same memory compression status.
418 // Either all these surfaces should be compressed together
419 // or none of them compressed at all.This is HW limitation.
420 if (IsDNOnly())
421 {
422 bSurfCompressible = pVeboxState->m_currentSurface->bCompressible;
423 SurfCompressionMode = pVeboxState->m_currentSurface->bIsCompressed ? MOS_MMC_HORIZONTAL : MOS_MMC_DISABLED;
424 }
425 // Only Tiled Y surfaces support MMC
426 else if (pVeboxState->bEnableMMC &&
427 (TileType == MOS_TILE_Y) &&
428 pVeboxState->IsFormatMMCSupported(format))
429 {
430 bSurfCompressible = true;
431 SurfCompressionMode = MOS_MMC_HORIZONTAL;
432 }
433
434 // Allocate FFDI/IECP surfaces----------------------------------------------
435 if (IsFFDISurfNeeded())
436 {
437 VPHAL_CSPACE ColorSpace;
438 VPHAL_SAMPLE_TYPE SampleType;
439
440 GetFFDISurfParams(ColorSpace, SampleType);
441
442 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
443 {
444 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
445 pOsInterface,
446 pVeboxState->FFDISurfaces[i],
447 "VeboxFFDISurface_g9",
448 format,
449 MOS_GFXRES_2D,
450 TileType,
451 pVeboxState->m_currentSurface->dwWidth,
452 pVeboxState->m_currentSurface->dwHeight,
453 bSurfCompressible,
454 SurfCompressionMode,
455 &bAllocated));
456
457 pVeboxState->FFDISurfaces[i]->SampleType = SampleType;
458
459 // Copy rect sizes so that if input surface state needs to adjust,
460 // output surface can be adjustted also.
461 pVeboxState->FFDISurfaces[i]->rcSrc = pVeboxState->m_currentSurface->rcSrc;
462 pVeboxState->FFDISurfaces[i]->rcDst = pVeboxState->m_currentSurface->rcDst;
463 // Copy max src rect
464 pVeboxState->FFDISurfaces[i]->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
465
466 // Copy Rotation, it's used in setting SFC state
467 pVeboxState->FFDISurfaces[i]->Rotation = pVeboxState->m_currentSurface->Rotation;
468
469 pVeboxState->FFDISurfaces[i]->ColorSpace = ColorSpace;
470
471 if (bAllocated)
472 {
473 // Report Compress Status
474 m_reporting->FFDICompressible = bSurfCompressible;
475 m_reporting->FFDICompressMode = (uint8_t)(SurfCompressionMode);
476 }
477 }
478 }
479 else
480 {
481 // Free FFDI surfaces
482 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
483 {
484 if (pVeboxState->FFDISurfaces[i])
485 {
486 pOsInterface->pfnFreeResource(
487 pOsInterface,
488 &pVeboxState->FFDISurfaces[i]->OsResource);
489 }
490 }
491 }
492
493 // When DI switch to DNDI, the first FFDN surface pitch doesn't match with
494 // the input surface pitch and cause the flicker issue
495 // Or for 2 clip playback in WMP, the first one is HW decoding, the second one is SW decoding,
496 // when the second clip playback starting without media pipeline recreation,
497 // the internal FFDNSurfaces are compressed, but VP input surface is uncompressed.
498 if ((pVeboxState->bDIEnabled && !pVeboxState->bDNEnabled && pRenderData->bDenoise) ||
499 ((pVeboxState->m_currentSurface->bIsCompressed == false) && ((bSurfCompressible == true) || (pVeboxState->FFDNSurfaces[0]->bIsCompressed == true))))
500 {
501 bFFDNSurfCompressible = pVeboxState->m_currentSurface->bCompressible;
502 FFDNSurfCompressionMode = pVeboxState->m_currentSurface->bIsCompressed ? MOS_MMC_HORIZONTAL : MOS_MMC_DISABLED;
503 }
504 else
505 {
506 bFFDNSurfCompressible = bSurfCompressible;
507 FFDNSurfCompressionMode = SurfCompressionMode;
508 }
509
510 // Allocate FFDN surfaces---------------------------------------------------
511 if (IsFFDNSurfNeeded())
512 {
513 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
514 {
515 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
516 pOsInterface,
517 pVeboxState->FFDNSurfaces[i],
518 "VeboxFFDNSurface_g9",
519 pVeboxState->m_currentSurface->Format,
520 MOS_GFXRES_2D,
521 pVeboxState->m_currentSurface->TileType,
522 pVeboxState->m_currentSurface->dwWidth,
523 pVeboxState->m_currentSurface->dwHeight,
524 bFFDNSurfCompressible,
525 FFDNSurfCompressionMode,
526 &bAllocated));
527
528 // if allocated, pVeboxState->PreviousSurface is not valid for DN reference.
529 if (bAllocated)
530 {
531 // If DI is enabled, try to use app's reference if provided
532 if (pRenderData->bRefValid &&
533 pRenderData->bDeinterlace &&
534 (pVeboxState->m_currentSurface->pBwdRef != nullptr) &&
535 (pVeboxState->FFDNSurfaces[i]->dwPitch == pVeboxState->m_currentSurface->pBwdRef->dwPitch))
536 {
537 CopySurfaceValue(pVeboxState->m_previousSurface, pVeboxState->m_currentSurface->pBwdRef);
538 }
539 else
540 {
541 pRenderData->bRefValid = false;
542 }
543 }
544
545 // DN's output format should be same to input
546 pVeboxState->FFDNSurfaces[i]->SampleType =
547 pVeboxState->m_currentSurface->SampleType;
548
549 // Copy rect sizes so that if input surface state needs to adjust,
550 // output surface can be adjustted also.
551 pVeboxState->FFDNSurfaces[i]->rcSrc = pVeboxState->m_currentSurface->rcSrc;
552 pVeboxState->FFDNSurfaces[i]->rcDst = pVeboxState->m_currentSurface->rcDst;
553 // Copy max src rect
554 pVeboxState->FFDNSurfaces[i]->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
555
556 // Set Colorspace of FFDN
557 pVeboxState->FFDNSurfaces[i]->ColorSpace = pVeboxState->m_currentSurface->ColorSpace;
558
559 // Copy FrameID and parameters, as DN output will be used as next blt's current
560 pVeboxState->FFDNSurfaces[i]->FrameID = pVeboxState->m_currentSurface->FrameID;
561 pVeboxState->FFDNSurfaces[i]->pDenoiseParams = pVeboxState->m_currentSurface->pDenoiseParams;
562
563 if (bAllocated)
564 {
565 // Report Compress Status
566 m_reporting->FFDNCompressible = bFFDNSurfCompressible;
567 m_reporting->FFDNCompressMode = (uint8_t)(FFDNSurfCompressionMode);
568 }
569 }
570 }
571 else
572 {
573 // Free FFDN surfaces
574 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
575 {
576 if (pVeboxState->FFDNSurfaces[i])
577 {
578 pOsInterface->pfnFreeResource(
579 pOsInterface,
580 &pVeboxState->FFDNSurfaces[i]->OsResource);
581 }
582 }
583 }
584
585 // Adjust the rcMaxSrc of pRenderTarget when Vebox output is enabled
586 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
587 {
588 pRenderData->pRenderTarget->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
589 }
590
591 // Allocate STMM (Spatial-Temporal Motion Measure) Surfaces------------------
592 if (IsSTMMSurfNeeded())
593 {
594 if (pVeboxState->bEnableMMC)
595 {
596 bSurfCompressible = true;
597 SurfCompressionMode = MOS_MMC_HORIZONTAL;
598 }
599 else
600 {
601 bSurfCompressible = false;
602 SurfCompressionMode = MOS_MMC_DISABLED;
603 }
604
605 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
606 {
607 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
608 pOsInterface,
609 &pVeboxState->STMMSurfaces[i],
610 "VeboxSTMMSurface_g9",
611 Format_STMM,
612 MOS_GFXRES_2D,
613 MOS_TILE_Y,
614 pVeboxState->m_currentSurface->dwWidth,
615 pVeboxState->m_currentSurface->dwHeight,
616 bSurfCompressible,
617 SurfCompressionMode,
618 &bAllocated));
619
620 if (bAllocated)
621 {
622 VPHAL_RENDER_CHK_STATUS(VeboxInitSTMMHistory(i));
623
624 // Report Compress Status
625 m_reporting->STMMCompressible = bSurfCompressible;
626 m_reporting->STMMCompressMode = (uint8_t)(SurfCompressionMode);
627 }
628 }
629 }
630 else
631 {
632 // Free DI history buffers (STMM = Spatial-temporal motion measure)
633 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
634 {
635 pOsInterface->pfnFreeResource(
636 pOsInterface,
637 &pVeboxState->STMMSurfaces[i].OsResource);
638 }
639 }
640
641 // Allocate Statistics State Surface----------------------------------------
642 // Width to be a aligned on 64 bytes and height is 1/4 the height
643 // Per frame information written twice per frame for 2 slices
644 // Surface to be a rectangle aligned with dwWidth to get proper dwSize
645 bDIEnable = pRenderData->bDeinterlace || IsQueryVarianceEnabled();
646
647 VPHAL_RENDER_CHK_STATUS(VpHal_InitVeboxSurfaceParams(
648 pVeboxState->m_currentSurface, &MhwVeboxSurfaceParam));
649 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->VeboxAdjustBoundary(
650 &MhwVeboxSurfaceParam,
651 &dwWidth,
652 &dwHeight,
653 bDIEnable));
654
655 dwWidth = MOS_ALIGN_CEIL(dwWidth, 64);
656 dwHeight = MOS_ROUNDUP_DIVIDE(dwHeight, 4) +
657 MOS_ROUNDUP_DIVIDE(VPHAL_VEBOX_STATISTICS_SIZE_G9 * sizeof(uint32_t), dwWidth);
658 dwSize = dwWidth * dwHeight;
659
660 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
661 pOsInterface,
662 &pVeboxState->VeboxStatisticsSurface,
663 "VeboxStatisticsSurface_g9",
664 Format_Buffer,
665 MOS_GFXRES_BUFFER,
666 MOS_TILE_LINEAR,
667 dwSize,
668 1,
669 false,
670 MOS_MMC_DISABLED,
671 &bAllocated));
672
673 if (bAllocated)
674 {
675 // initialize Statistics Surface
676 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
677 pOsInterface,
678 &(pVeboxState->VeboxStatisticsSurface.OsResource),
679 dwSize,
680 0));
681
682 pVeboxState->dwVeboxPerBlockStatisticsWidth = dwWidth;
683 pVeboxState->dwVeboxPerBlockStatisticsHeight = dwHeight -
684 MOS_ROUNDUP_DIVIDE(VPHAL_VEBOX_STATISTICS_SIZE_G9 * sizeof(uint32_t), dwWidth);
685 }
686
687 #if VEBOX_AUTO_DENOISE_SUPPORTED
688 // Allocate Temp Surface for Vebox Update kernels----------------------------------------
689 // the surface size is one Page
690 dwSize = MHW_PAGE_SIZE;
691
692 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
693 pOsInterface,
694 &pVeboxState->VeboxTempSurface,
695 "VeboxTempSurface_g9",
696 Format_Buffer,
697 MOS_GFXRES_BUFFER,
698 MOS_TILE_LINEAR,
699 dwSize,
700 1,
701 false,
702 MOS_MMC_DISABLED,
703 &bAllocated));
704
705 if (bAllocated)
706 {
707 // initialize Statistics Surface
708 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
709 pOsInterface,
710 &(pVeboxState->VeboxTempSurface.OsResource),
711 dwSize,
712 0));
713 }
714
715 // Allocate Spatial Attributes Configuration Surface for DN kernel Gen9+-----------
716 dwSize = MHW_PAGE_SIZE;
717
718 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
719 pOsInterface,
720 &pVeboxState->VeboxSpatialAttributesConfigurationSurface,
721 "VeboxSpatialAttributesConfigurationSurface_g9",
722 Format_RAW,
723 MOS_GFXRES_BUFFER,
724 MOS_TILE_LINEAR,
725 dwSize,
726 1,
727 false,
728 MOS_MMC_DISABLED,
729 &bAllocated));
730
731 if (bAllocated)
732 {
733 // initialize Spatial Attributes Configuration Surface
734 VPHAL_RENDER_CHK_STATUS(VeboxInitSpatialAttributesConfiguration());
735 }
736 #endif
737
738 finish:
739 if (eStatus != MOS_STATUS_SUCCESS)
740 {
741 pVeboxState->FreeResources();
742 }
743
744 return eStatus;
745 }
746
747 //!
748 //! \brief Vebox free resources
749 //! \details Free resources that are used in Vebox
750 //! \return void
751 //!
FreeResources()752 void VPHAL_VEBOX_STATE_G9_BASE::FreeResources()
753 {
754 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
755 int32_t i;
756 PMOS_INTERFACE pOsInterface = pVeboxState->m_pOsInterface;
757
758 // Free FFDI surfaces
759 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
760 {
761 if (pVeboxState->FFDISurfaces[i])
762 {
763 pOsInterface->pfnFreeResource(
764 pOsInterface,
765 &pVeboxState->FFDISurfaces[i]->OsResource);
766 }
767 }
768
769 // Free FFDN surfaces
770 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
771 {
772 if (pVeboxState->FFDNSurfaces[i])
773 {
774 pOsInterface->pfnFreeResource(
775 pOsInterface,
776 &pVeboxState->FFDNSurfaces[i]->OsResource);
777 }
778 }
779
780 // Free DI history buffers (STMM = Spatial-temporal motion measure)
781 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
782 {
783 pOsInterface->pfnFreeResource(
784 pOsInterface,
785 &pVeboxState->STMMSurfaces[i].OsResource);
786 }
787
788 // Free Statistics data surface for VEBOX
789 pOsInterface->pfnFreeResource(
790 pOsInterface,
791 &pVeboxState->VeboxStatisticsSurface.OsResource);
792
793 #if VEBOX_AUTO_DENOISE_SUPPORTED
794 // Free Spatial Attributes Configuration Surface for DN kernel
795 pOsInterface->pfnFreeResource(
796 pOsInterface,
797 &pVeboxState->VeboxSpatialAttributesConfigurationSurface.OsResource);
798
799 // Free Temp Surface for VEBOX
800 pOsInterface->pfnFreeResource(
801 pOsInterface,
802 &pVeboxState->VeboxTempSurface.OsResource);
803 #endif
804
805 // Free SFC resources
806 if (MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrSFCPipe) &&
807 m_sfcPipeState)
808 {
809 m_sfcPipeState->FreeResources();
810 }
811
812 }
813
814 //!
815 //! \brief Setup Vebox_DI_IECP Command params for VEBOX final output surface on G9
816 //! \details Setup Vebox_DI_IECP Command params for VEBOX final output surface on G9
817 //! \param [in] bDiScdEnable
818 //! Is DI/Variances report enabled
819 //! \param [in,out] pVeboxDiIecpCmdParams
820 //! Pointer to VEBOX_DI_IECP command parameters
821 //! \return MOS_STATUS
822 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
823 //!
SetupDiIecpStateForOutputSurf(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)824 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupDiIecpStateForOutputSurf(
825 bool bDiScdEnable,
826 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
827 {
828 PMOS_INTERFACE pOsInterface;
829 PRENDERHAL_INTERFACE pRenderHal;
830 PMHW_VEBOX_INTERFACE pVeboxInterface;
831 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
832 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
833 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams;
834 PVPHAL_SURFACE pSurface;
835 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
836
837 pOsInterface = pVeboxState->m_pOsInterface;
838 pRenderHal = pVeboxState->m_pRenderHal;
839 pVeboxInterface = pVeboxState->m_pVeboxInterface;
840
841 // VEBOX final output surface
842 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
843 {
844 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
845 pOsInterface,
846 &pRenderData->pRenderTarget->OsResource,
847 true,
848 true));
849
850 pVeboxDiIecpCmdParams->pOsResCurrOutput =
851 &pRenderData->pRenderTarget->OsResource;
852 pVeboxDiIecpCmdParams->dwCurrOutputSurfOffset =
853 pRenderData->pRenderTarget->dwOffset;
854 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
855 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
856
857 if (IsFormatMMCSupported(pRenderData->pRenderTarget->Format) &&
858 (pRenderData->Component == COMPONENT_VPreP) &&
859 (pRenderData->pRenderTarget->CompressionMode == MOS_MMC_HORIZONTAL))
860 {
861 // Update control bits for Current Output Surf
862 pSurface = pRenderData->pRenderTarget;
863 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
864 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
865 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
866 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
867 &VeboxSurfCntlParams,
868 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
869 }
870 }
871 else if (bDiScdEnable)
872 {
873 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
874 pOsInterface,
875 &pVeboxState->FFDISurfaces[pRenderData->iFrame1]->OsResource,
876 true,
877 true));
878
879 pVeboxDiIecpCmdParams->pOsResCurrOutput =
880 &pVeboxState->FFDISurfaces[pRenderData->iFrame1]->OsResource;
881 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
882 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
883
884 // Update control bits for Current Output Surf
885 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame1];
886 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
887 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
888 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
889 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
890 &VeboxSurfCntlParams,
891 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
892
893 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
894 pOsInterface,
895 &pVeboxState->FFDISurfaces[pRenderData->iFrame0]->OsResource,
896 true,
897 true));
898
899 pVeboxDiIecpCmdParams->pOsResPrevOutput =
900 &pVeboxState->FFDISurfaces[pRenderData->iFrame0]->OsResource;
901 pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value =
902 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
903
904 // Update control bits for PrevOutput surface
905 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame0];
906 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
907 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
908 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
909 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
910 &VeboxSurfCntlParams,
911 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value)));
912 }
913 else if (IsIECPEnabled()) // IECP output surface without DI
914 {
915 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
916 pOsInterface,
917 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource,
918 true,
919 true));
920
921 pVeboxDiIecpCmdParams->pOsResCurrOutput =
922 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource;
923 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
924 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
925
926 // Update control bits for CurrOutputSurf surface
927 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
928 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
929 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
930 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
931 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
932 &VeboxSurfCntlParams,
933 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
934 }
935
936 finish:
937 return eStatus;
938 }
939
940 //!
941 //! \brief Setup Vebox_DI_IECP Command params for Gen9
942 //! \details Setup Vebox_DI_IECP Command params for Gen9
943 //! \param [in] bDiScdEnable
944 //! Is DI/Variances report enabled
945 //! \param [in,out] pVeboxDiIecpCmdParams
946 //! Pointer to VEBOX_DI_IECP command parameters
947 //! \return MOS_STATUS
948 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
949 //!
SetupDiIecpState(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)950 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupDiIecpState(
951 bool bDiScdEnable,
952 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
953 {
954 PMOS_INTERFACE pOsInterface;
955 PRENDERHAL_INTERFACE pRenderHal;
956 uint32_t dwWidth;
957 uint32_t dwHeight;
958 bool bDIEnable;
959 MOS_STATUS eStatus;
960 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam;
961 PMHW_VEBOX_INTERFACE pVeboxInterface;
962 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams;
963 PVPHAL_SURFACE pSurface;
964 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
965 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
966
967 pOsInterface = pVeboxState->m_pOsInterface;
968 pRenderHal = pVeboxState->m_pRenderHal;
969 pVeboxInterface = pVeboxState->m_pVeboxInterface;
970 MOS_ZeroMemory(pVeboxDiIecpCmdParams, sizeof(*pVeboxDiIecpCmdParams));
971
972 // Align dwEndingX with surface state
973 bDIEnable = pRenderData->bDeinterlace || IsQueryVarianceEnabled();
974 VPHAL_RENDER_CHK_STATUS(VpHal_InitVeboxSurfaceParams(
975 pVeboxState->m_currentSurface, &MhwVeboxSurfaceParam));
976 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->VeboxAdjustBoundary(
977 &MhwVeboxSurfaceParam,
978 &dwWidth,
979 &dwHeight,
980 bDIEnable));
981
982 pVeboxDiIecpCmdParams->dwStartingX = 0;
983 pVeboxDiIecpCmdParams->dwEndingX = dwWidth - 1;
984
985 // Input Surface
986 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
987 pOsInterface,
988 &pVeboxState->m_currentSurface->OsResource,
989 false,
990 true));
991
992 pVeboxDiIecpCmdParams->pOsResCurrInput =
993 &pVeboxState->m_currentSurface->OsResource;
994 pVeboxDiIecpCmdParams->dwCurrInputSurfOffset =
995 pVeboxState->m_currentSurface->dwOffset;
996 pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value =
997 pVeboxState->DnDiSurfMemObjCtl.CurrentInputSurfMemObjCtl;
998
999 // Update control bits for current surface
1000 pSurface = pVeboxState->m_currentSurface;
1001 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1002 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1003 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1004 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1005 &VeboxSurfCntlParams,
1006 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value)));
1007
1008 // Reference surface
1009 if (pRenderData->bRefValid)
1010 {
1011 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1012 pOsInterface,
1013 &pVeboxState->m_previousSurface->OsResource,
1014 false,
1015 true));
1016
1017 pVeboxDiIecpCmdParams->pOsResPrevInput =
1018 &pVeboxState->m_previousSurface->OsResource;
1019 pVeboxDiIecpCmdParams->dwPrevInputSurfOffset =
1020 pVeboxState->m_previousSurface->dwOffset;
1021 pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value =
1022 pVeboxState->DnDiSurfMemObjCtl.PreviousInputSurfMemObjCtl;
1023
1024 // Update control bits for PreviousSurface surface
1025 pSurface = pVeboxState->m_previousSurface;
1026 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1027 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1028 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1029 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1030 &VeboxSurfCntlParams,
1031 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value)));
1032 }
1033
1034 // VEBOX final output surface
1035 VPHAL_RENDER_CHK_STATUS(SetupDiIecpStateForOutputSurf(bDiScdEnable, pVeboxDiIecpCmdParams));
1036
1037 // DN intermediate output surface
1038 if (IsFFDNSurfNeeded())
1039 {
1040 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1041 pOsInterface,
1042 &pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut]->OsResource,
1043 true,
1044 true));
1045
1046 pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput =
1047 &pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut]->OsResource;
1048 pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value =
1049 pVeboxState->DnDiSurfMemObjCtl.DnOutSurfMemObjCtl;
1050
1051 // Update control bits for DenoisedCurrOutputSurf surface
1052 pSurface = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1053 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1054 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1055 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1056 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1057 &VeboxSurfCntlParams,
1058 (uint32_t *)&(pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value)));
1059
1060 // For DN + SFC scenario, allocate FFDISurfaces also
1061 // since this usage needs IECP implicitly
1062 // For DN + DI + SFC, DI have registered FFDISurfaces, So don't register again
1063 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) && !bDiScdEnable)
1064 {
1065 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1066 pOsInterface,
1067 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource,
1068 true,
1069 true));
1070
1071 pVeboxDiIecpCmdParams->pOsResCurrOutput =
1072 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource;
1073 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
1074 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1075
1076 // Update control bits for CurrOutputSurf surface
1077 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1078 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1079 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1080 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1081 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1082 &VeboxSurfCntlParams,
1083 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1084 }
1085 }
1086
1087 // STMM surface
1088 if (bDiScdEnable || IsSTMMSurfNeeded())
1089 {
1090 // STMM in
1091 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1092 pOsInterface,
1093 &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn].OsResource,
1094 false,
1095 true));
1096
1097 pVeboxDiIecpCmdParams->pOsResStmmInput =
1098 &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn].OsResource;
1099 pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value =
1100 pVeboxState->DnDiSurfMemObjCtl.STMMInputSurfMemObjCtl;
1101
1102 // Update control bits for stmm input surface
1103 pSurface = &(pVeboxState->STMMSurfaces[pRenderData->iCurHistIn]);
1104 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1105 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1106 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1107 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1108 &VeboxSurfCntlParams,
1109 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value)));
1110
1111 // STMM out
1112 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1113 pOsInterface,
1114 &pVeboxState->STMMSurfaces[pRenderData->iCurHistOut].OsResource,
1115 true,
1116 true));
1117
1118 pVeboxDiIecpCmdParams->pOsResStmmOutput =
1119 &pVeboxState->STMMSurfaces[pRenderData->iCurHistOut].OsResource;
1120 pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value =
1121 pVeboxState->DnDiSurfMemObjCtl.STMMOutputSurfMemObjCtl;
1122
1123 // Update control bits for stmm output surface
1124 pSurface = &(pVeboxState->STMMSurfaces[pRenderData->iCurHistOut]);
1125 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1126 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1127 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1128 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1129 &VeboxSurfCntlParams,
1130 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value)));
1131 }
1132
1133 // Statistics data: GNE, FMD
1134 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1135 pOsInterface,
1136 &pVeboxState->VeboxStatisticsSurface.OsResource,
1137 true,
1138 true));
1139
1140 pVeboxDiIecpCmdParams->pOsResStatisticsOutput =
1141 &pVeboxState->VeboxStatisticsSurface.OsResource;
1142 pVeboxDiIecpCmdParams->StatisticsOutputSurfCtrl.Value =
1143 pVeboxState->DnDiSurfMemObjCtl.StatisticsOutputSurfMemObjCtl;
1144
1145 finish:
1146 return eStatus;
1147 }
1148
1149 //!
1150 //! \brief Vebox query statistics surface layout
1151 //! \details Get Specific Layout Info like GNE Offset, size of per frame info inside
1152 //! Vebox Statistics Surface for SKL+
1153 //! SKL+ changes:
1154 //! 1) ACE histogram is outside of Vebox Statistics Surface;
1155 //! 2) Add White Balence Statistics;
1156 //!
1157 //! | Layout of Statistics surface when DI enabled and DN either On or Off on SKL+\n
1158 //! | --------------------------------------------------------------\n
1159 //! | | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1160 //! | |-------------------------------------------------------------\n
1161 //! | | 16 bytes for x=0, Y=4 | ...\n
1162 //! | |------------------------------\n
1163 //! | | ...\n
1164 //! | |------------------------------\n
1165 //! | | 16 bytes for x=0, Y=height-4| ...\n
1166 //! | |-----------------------------------------------Pitch--------------\n
1167 //! | | 17 DW Reserved | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1168 //! | |------------------------------------------------------------------\n
1169 //! | | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1170 //! | |------------------------------------------------------------------\n
1171 //! | | 17 DW Reserved | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1172 //! | |------------------------------------------------------------------\n
1173 //! | | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1174 //! | -------------------------------------------------------------------\n
1175 //! |\n
1176 //! | Layout of Statistics surface when DN enabled and DI disabled\n
1177 //! | --------------------------------------------------------------\n
1178 //! | | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1179 //! | |-------------------------------------------------------------\n
1180 //! | | 16 bytes for x=0, Y=4 | ...\n
1181 //! | |------------------------------\n
1182 //! | | ...\n
1183 //! | |------------------------------\n
1184 //! | | 16 bytes for x=0, Y=height-4| ...\n
1185 //! | |-----------------------------------------------Pitch--------------\n
1186 //! | | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1187 //! | |------------------------------------------------------------------\n
1188 //! | | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1189 //! | -------------------------------------------------------------------\n
1190 //! |\n
1191 //! | Layout of Statistics surface when both DN and DI are disabled\n
1192 //! | ------------------------------------------------Pitch--------------\n
1193 //! | | 17 DW White Balence0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1194 //! | |------------------------------------------------------------------\n
1195 //! | | 17 DW White Balence1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1196 //! | -------------------------------------------------------------------\n
1197 //! \param [in] QueryType
1198 //! Query type
1199 //! \param [out] pQuery
1200 //! return layout type
1201 //! \return MOS_STATUS
1202 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1203 //!
VeboxQueryStatLayout(VEBOX_STAT_QUERY_TYPE QueryType,uint32_t * pQuery)1204 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::VeboxQueryStatLayout(
1205 VEBOX_STAT_QUERY_TYPE QueryType,
1206 uint32_t* pQuery)
1207 {
1208 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1209
1210 VPHAL_RENDER_ASSERT(pQuery);
1211
1212 switch (QueryType)
1213 {
1214 case VEBOX_STAT_QUERY_GNE_OFFEST:
1215 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_GNE_OFFSET_G9;
1216 break;
1217
1218 case VEBOX_STAT_QUERY_PER_FRAME_SIZE:
1219 *pQuery = VPHAL_VEBOX_STATISTICS_PER_FRAME_SIZE_G9;
1220 break;
1221
1222 case VEBOX_STAT_QUERY_FMD_OFFEST:
1223 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_FMD_OFFSET_G9;
1224 break;
1225
1226 case VEBOX_STAT_QUERY_STD_OFFEST:
1227 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_STD_OFFSET_G9;
1228 break;
1229
1230 default:
1231 VPHAL_RENDER_ASSERTMESSAGE("Vebox Statistics Layout Query, type ('%d') is not implemented.", QueryType);
1232 eStatus = MOS_STATUS_UNKNOWN;
1233 break;
1234 }
1235
1236 return eStatus;
1237 }
1238
1239 //!
1240 //! \brief Vebox get Luma default value
1241 //! \details Initialize luma denoise paramters w/ default values.
1242 //! \param [out] pLumaParams
1243 //! Pointer to Luma DN parameter
1244 //! \return void
1245 //!
GetLumaDefaultValue(PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams)1246 void VPHAL_VEBOX_STATE_G9_BASE::GetLumaDefaultValue(
1247 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams)
1248 {
1249 VPHAL_RENDER_ASSERT(pLumaParams);
1250
1251 pLumaParams->dwDenoiseASDThreshold = NOISE_ABSSUMTEMPORALDIFF_THRESHOLD_DEFAULT_G9;
1252 pLumaParams->dwDenoiseHistoryDelta = NOISE_HISTORY_DELTA_DEFAULT;
1253 pLumaParams->dwDenoiseMaximumHistory = NOISE_HISTORY_MAX_DEFAULT_G9;
1254 pLumaParams->dwDenoiseSTADThreshold = NOISE_SUMABSTEMPORALDIFF_THRESHOLD_DEFAULT_G9;
1255 pLumaParams->dwDenoiseSCMThreshold = NOISE_SPATIALCOMPLEXITYMATRIX_THRESHOLD_DEFAULT_G9;
1256 pLumaParams->dwDenoiseMPThreshold = NOISE_NUMMOTIONPIXELS_THRESHOLD_DEFAULT_G9;
1257 pLumaParams->dwLTDThreshold = NOISE_LOWTEMPORALPIXELDIFF_THRESHOLD_DEFAULT_G9;
1258 pLumaParams->dwTDThreshold = NOISE_TEMPORALPIXELDIFF_THRESHOLD_DEFAULT_G9;
1259 }
1260
1261 //!
1262 //! \brief Vebox set DN parameter
1263 //! \details Set denoise paramters for luma and chroma.
1264 //! \param [in] pSrcSurface
1265 //! Pointer to input surface of Vebox
1266 //! \param [in] pLumaParams
1267 //! Pointer to Luma DN parameter
1268 //! \param [in] pChromaParams
1269 //! Pointer to Chroma DN parameter
1270 //! \return MOS_STATUS
1271 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1272 //!
SetDNDIParams(PVPHAL_SURFACE pSrcSurface,PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,PVPHAL_DNUV_PARAMS pChromaParams)1273 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetDNDIParams(
1274 PVPHAL_SURFACE pSrcSurface,
1275 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,
1276 PVPHAL_DNUV_PARAMS pChromaParams)
1277 {
1278 MOS_STATUS eStatus;
1279 PVPHAL_DENOISE_PARAMS pDNParams;
1280 uint32_t dwDenoiseFactor;
1281 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1282
1283 VPHAL_RENDER_ASSERT(pSrcSurface);
1284 VPHAL_RENDER_ASSERT(pLumaParams);
1285 VPHAL_RENDER_ASSERT(pChromaParams);
1286 VPHAL_RENDER_ASSERT(pRenderData);
1287
1288 eStatus = MOS_STATUS_SUCCESS;
1289 pDNParams = pSrcSurface->pDenoiseParams;
1290
1291 VPHAL_RENDER_ASSERT(pDNParams);
1292
1293 // Set Luma DN params
1294 if (pRenderData->bDenoise)
1295 {
1296 // Setup Denoise Params
1297 GetLumaDefaultValue(pLumaParams);
1298
1299 // Initialize pixel range threshold array
1300 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[0] = NOISE_BLF_RANGE_THRESHOLD_S0_DEFAULT;
1301 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[1] = NOISE_BLF_RANGE_THRESHOLD_S1_DEFAULT;
1302 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[2] = NOISE_BLF_RANGE_THRESHOLD_S2_DEFAULT;
1303 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[3] = NOISE_BLF_RANGE_THRESHOLD_S3_DEFAULT;
1304 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[4] = NOISE_BLF_RANGE_THRESHOLD_S4_DEFAULT;
1305 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[5] = NOISE_BLF_RANGE_THRESHOLD_S5_DEFAULT;
1306
1307 // Initialize pixel range weight array
1308 pRenderData->VeboxDNDIParams.dwPixRangeWeight[0] = NOISE_BLF_RANGE_WGTS0_DEFAULT;
1309 pRenderData->VeboxDNDIParams.dwPixRangeWeight[1] = NOISE_BLF_RANGE_WGTS1_DEFAULT;
1310 pRenderData->VeboxDNDIParams.dwPixRangeWeight[2] = NOISE_BLF_RANGE_WGTS2_DEFAULT;
1311 pRenderData->VeboxDNDIParams.dwPixRangeWeight[3] = NOISE_BLF_RANGE_WGTS3_DEFAULT;
1312 pRenderData->VeboxDNDIParams.dwPixRangeWeight[4] = NOISE_BLF_RANGE_WGTS4_DEFAULT;
1313 pRenderData->VeboxDNDIParams.dwPixRangeWeight[5] = NOISE_BLF_RANGE_WGTS5_DEFAULT;
1314
1315 // Denoise Slider case (no auto DN detect)
1316 if (!pDNParams->bAutoDetect)
1317 {
1318 dwDenoiseFactor = (uint32_t)pDNParams->fDenoiseFactor;
1319
1320 if (dwDenoiseFactor > NOISEFACTOR_MAX)
1321 {
1322 dwDenoiseFactor = NOISEFACTOR_MAX;
1323 }
1324
1325 pLumaParams->dwDenoiseHistoryDelta = dwDenoiseHistoryDelta[dwDenoiseFactor];
1326 pLumaParams->dwDenoiseMaximumHistory = dwDenoiseMaximumHistory[dwDenoiseFactor];
1327 pLumaParams->dwDenoiseASDThreshold = dwDenoiseASDThreshold[dwDenoiseFactor];
1328 pLumaParams->dwDenoiseSCMThreshold = dwDenoiseSCMThreshold[dwDenoiseFactor];
1329 pLumaParams->dwDenoiseMPThreshold = dwDenoiseMPThreshold[dwDenoiseFactor];
1330 pLumaParams->dwLTDThreshold = dwLTDThreshold[dwDenoiseFactor];
1331 pLumaParams->dwTDThreshold = dwTDThreshold[dwDenoiseFactor];
1332 pLumaParams->dwDenoiseSTADThreshold = dwDenoiseSTADThreshold[dwDenoiseFactor];
1333
1334 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[0] = dwPixRangeThreshold0[dwDenoiseFactor];
1335 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[1] = dwPixRangeThreshold1[dwDenoiseFactor];
1336 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[2] = dwPixRangeThreshold2[dwDenoiseFactor];
1337 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[3] = dwPixRangeThreshold3[dwDenoiseFactor];
1338 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[4] = dwPixRangeThreshold4[dwDenoiseFactor];
1339 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[5] = dwPixRangeThreshold5[dwDenoiseFactor];
1340
1341 pRenderData->VeboxDNDIParams.dwPixRangeWeight[0] = dwPixRangeWeight0[dwDenoiseFactor];
1342 pRenderData->VeboxDNDIParams.dwPixRangeWeight[1] = dwPixRangeWeight1[dwDenoiseFactor];
1343 pRenderData->VeboxDNDIParams.dwPixRangeWeight[2] = dwPixRangeWeight2[dwDenoiseFactor];
1344 pRenderData->VeboxDNDIParams.dwPixRangeWeight[3] = dwPixRangeWeight3[dwDenoiseFactor];
1345 pRenderData->VeboxDNDIParams.dwPixRangeWeight[4] = dwPixRangeWeight4[dwDenoiseFactor];
1346 pRenderData->VeboxDNDIParams.dwPixRangeWeight[5] = dwPixRangeWeight5[dwDenoiseFactor];
1347 }
1348 }
1349
1350 // Set Chroma DN params
1351 if (pRenderData->bChromaDenoise)
1352 {
1353 // Setup Denoise Params
1354 pChromaParams->dwHistoryDeltaUV = NOISE_HISTORY_DELTA_DEFAULT;
1355 pChromaParams->dwHistoryMaxUV = NOISE_HISTORY_MAX_DEFAULT;
1356
1357 // Denoise Slider case (no auto DN detect)
1358 if (!pDNParams->bAutoDetect)
1359 {
1360 dwDenoiseFactor = (uint32_t)pDNParams->fDenoiseFactor;
1361
1362 if (dwDenoiseFactor > NOISEFACTOR_MAX)
1363 {
1364 dwDenoiseFactor = NOISEFACTOR_MAX;
1365 }
1366
1367 pChromaParams->dwLTDThresholdU =
1368 pChromaParams->dwLTDThresholdV = dwLTDThresholdUV[dwDenoiseFactor];
1369
1370 pChromaParams->dwTDThresholdU =
1371 pChromaParams->dwTDThresholdV = dwTDThresholdUV[dwDenoiseFactor];
1372
1373 pChromaParams->dwSTADThresholdU =
1374 pChromaParams->dwSTADThresholdV = dwSTADThresholdUV[dwDenoiseFactor];
1375 }
1376 }
1377
1378 if (pDNParams && pDNParams->bEnableHVSDenoise)
1379 {
1380 VPHAL_VEBOX_STATE::VeboxSetHVSDNParams(pSrcSurface);
1381 }
1382
1383 return eStatus;
1384 }
1385
1386 //!
1387 //! \brief Get output surface of Vebox
1388 //! \details Get output surface of Vebox in current operation
1389 //! \param [in] bDiVarianceEnable
1390 //! Is DI/Variances report enabled
1391 //! \return PVPHAL_SURFACE
1392 //! Corresponding output surface pointer
1393 //!
GetSurfOutput(bool bDiVarianceEnable)1394 PVPHAL_SURFACE VPHAL_VEBOX_STATE_G9_BASE::GetSurfOutput(
1395 bool bDiVarianceEnable)
1396 {
1397 PVPHAL_SURFACE pSurface = nullptr;
1398 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1399 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1400
1401 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData)) // Vebox output pipe
1402 {
1403 pSurface = pRenderData->pRenderTarget;
1404 }
1405 else if (bDiVarianceEnable) // DNDI, DI, DI + IECP
1406 {
1407 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame0];
1408 }
1409 else if (IsIECPEnabled()) // DN + IECP or IECP only
1410 {
1411 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1412 }
1413 else if (pRenderData->bDenoise) // DN only
1414 {
1415 pSurface = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1416 }
1417 else if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData)) // Write to SFC
1418 {
1419 // Vebox o/p should not be written to memory
1420 pSurface = nullptr;
1421 }
1422 else
1423 {
1424 VPHAL_RENDER_ASSERTMESSAGE("Unable to determine Vebox Output Surface.");
1425 }
1426
1427 return pSurface;
1428 }
1429
1430 //!
1431 //! \brief Setup surface states for Vebox
1432 //! \details Setup surface states for use in the current Vebox Operation
1433 //! \param [in] bDiVarianceEnable
1434 //! Is DI/Variances report enabled
1435 //! \param [in,out] pVeboxSurfaceStateCmdParams
1436 //! Pointer to VEBOX_SURFACE_STATE command parameters
1437 //! \return void
1438 //!
SetupSurfaceStates(bool bDiVarianceEnable,PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)1439 void VPHAL_VEBOX_STATE_G9_BASE::SetupSurfaceStates(
1440 bool bDiVarianceEnable,
1441 PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)
1442 {
1443 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1444 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1445
1446 MOS_ZeroMemory(pVeboxSurfaceStateCmdParams,
1447 sizeof(VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS));
1448
1449 pVeboxSurfaceStateCmdParams->pSurfInput = pVeboxState->m_currentSurface;
1450
1451 pVeboxSurfaceStateCmdParams->pSurfOutput = pVeboxState->GetSurfOutput(bDiVarianceEnable);
1452
1453 pVeboxSurfaceStateCmdParams->pSurfSTMM = &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn];
1454 pVeboxSurfaceStateCmdParams->pSurfDNOutput = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1455
1456 pVeboxSurfaceStateCmdParams->bDIEnable = bDiVarianceEnable;
1457
1458 }
1459
UseKernelResource()1460 bool VPHAL_VEBOX_STATE_G9_BASE::UseKernelResource()
1461 {
1462 return false; // can always use driver resource in clear memory
1463 }
1464
1465 //!
1466 //! \brief Setup Vebox_State Command parameter
1467 //! \param [in] bDiVarianceEnable
1468 //! Is DI/Variances report enabled
1469 //! \param [in,out] pVeboxStateCmdParams
1470 //! Pointer to VEBOX_STATE command parameters
1471 //! \return MOS_STATUS
1472 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1473 //!
SetupVeboxState(bool bDiVarianceEnable,PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)1474 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupVeboxState(
1475 bool bDiVarianceEnable,
1476 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)
1477 {
1478 PMHW_VEBOX_MODE pVeboxMode;
1479 PMOS_INTERFACE pOsInterface;
1480 MOS_STATUS eStatus;
1481
1482 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1483 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1484
1485 pVeboxMode = &pVeboxStateCmdParams->VeboxMode;
1486 pOsInterface = pVeboxState->m_pOsInterface;
1487 eStatus = MOS_STATUS_SUCCESS;
1488
1489 MOS_ZeroMemory(pVeboxStateCmdParams, sizeof(*pVeboxStateCmdParams));
1490
1491 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) ||
1492 IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
1493 {
1494 // On SKL, GlobalIECP must be enabled when the output pipe is Vebox or SFC
1495 pVeboxMode->GlobalIECPEnable = true;
1496 }
1497 else
1498 {
1499 pVeboxMode->GlobalIECPEnable = IsIECPEnabled();
1500 }
1501
1502 pVeboxMode->DIEnable = bDiVarianceEnable;
1503
1504 pVeboxMode->SFCParallelWriteEnable = IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) &&
1505 (pRenderData->bDenoise || bDiVarianceEnable);
1506 pVeboxMode->DNEnable = pRenderData->bDenoise;
1507 pVeboxMode->DNDIFirstFrame = !pRenderData->bRefValid;
1508
1509 pVeboxMode->DIOutputFrames = SetDIOutputFrame(pRenderData, pVeboxState, pVeboxMode);
1510
1511 pVeboxMode->DisableEncoderStatistics = true;
1512
1513 if((pVeboxMode->DIEnable == false) &&
1514 (pVeboxMode->DNEnable != false || pVeboxMode->HotPixelFilteringEnable != false) &&
1515 ((pVeboxState->bDisableTemporalDenoiseFilter) ||
1516 (IS_RGB_CSPACE(pVeboxState->m_currentSurface->ColorSpace)) ||
1517 (pVeboxMode->HotPixelFilteringEnable && (pVeboxMode->DNEnable == false) && (pVeboxMode->DIEnable == false))))
1518 {
1519 pVeboxMode->DisableTemporalDenoiseFilter = true;
1520 // GlobalIECP or Demosaic must be enabled even if IECP not used
1521 pVeboxMode->GlobalIECPEnable = true;
1522 }
1523 else
1524 {
1525 pVeboxMode->DisableTemporalDenoiseFilter = false;
1526 }
1527
1528 pVeboxStateCmdParams->bUseVeboxHeapKernelResource
1529 = UseKernelResource();
1530
1531 // This field must be set if 00b for products that don't have 2 slices.
1532 if (MEDIA_IS_SKU(pVeboxState->m_pRenderHal->pSkuTable, FtrSingleVeboxSlice))
1533 {
1534 pVeboxMode->SingleSliceVeboxEnable = 0;
1535 }
1536 else
1537 {
1538 // Permanent program limitation that should go in all the configurations of SKLGT which have 2 VEBOXes (i.e. GT3 & GT4)
1539 // VEBOX1 should be disabled whenever there is an VE-SFC workload.
1540 // This is because we have only one SFC all the GT configurations and that SFC is tied to VEBOX0.Hence the programming restriction.
1541 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
1542 {
1543 pVeboxMode->SingleSliceVeboxEnable = 1;
1544 }
1545 else
1546 {
1547 pVeboxMode->SingleSliceVeboxEnable = 0;
1548 }
1549 }
1550
1551 return eStatus;
1552 }
1553
1554 //!
1555 //! \brief Get the output pipe on SKL
1556 //! \details There are 3 output pipes on SKL. Check which output pipe can be applied
1557 //! \param [in] pcRenderParams
1558 //! Pointer to VpHal render parameters
1559 //! \param [in] pSrcSurface
1560 //! Pointer to input surface of Vebox
1561 //! \param [out] pbCompNeeded
1562 //! return whether composition is needed after Vebox/SFC
1563 //! \return VPHAL_OUTPUT_PIPE_MODE
1564 //! return the output pipe mode
1565 //!
GetOutputPipe(PCVPHAL_RENDER_PARAMS pcRenderParams,PVPHAL_SURFACE pSrcSurface,bool * pbCompNeeded)1566 VPHAL_OUTPUT_PIPE_MODE VPHAL_VEBOX_STATE_G9_BASE::GetOutputPipe(
1567 PCVPHAL_RENDER_PARAMS pcRenderParams,
1568 PVPHAL_SURFACE pSrcSurface,
1569 bool* pbCompNeeded)
1570 {
1571 VPHAL_OUTPUT_PIPE_MODE OutputPipe;
1572 bool bCompBypassFeasible;
1573 bool bOutputPipeVeboxFeasible;
1574 PVPHAL_SURFACE pTarget;
1575 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1576
1577 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1578
1579 bCompBypassFeasible = IS_COMP_BYPASS_FEASIBLE(*pbCompNeeded, pcRenderParams, pSrcSurface);
1580
1581 if (!bCompBypassFeasible)
1582 {
1583 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1584 goto finish;
1585 }
1586
1587 //Let Kernel to cover the DI cases VEBOX cannot handle.
1588 if (pSrcSurface->pDeinterlaceParams &&
1589 pSrcSurface->pDeinterlaceParams->DIMode == DI_MODE_BOB &&
1590 ((IS_VEBOX_SURFACE_HEIGHT_UNALIGNED(pSrcSurface, 4) &&
1591 pSrcSurface->Format == Format_NV12) ||
1592 !this->IsDiFormatSupported(pSrcSurface)))
1593 {
1594 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1595 goto finish;
1596 }
1597
1598 bOutputPipeVeboxFeasible = IS_OUTPUT_PIPE_VEBOX_FEASIBLE(pVeboxState, pcRenderParams, pSrcSurface);
1599 if (bOutputPipeVeboxFeasible)
1600 {
1601 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_VEBOX;
1602 goto finish;
1603 }
1604
1605 pTarget = pcRenderParams->pTarget[0];
1606 // Check if SFC can be the output pipe
1607 if (m_sfcPipeState)
1608 {
1609 OutputPipe = m_sfcPipeState->GetOutputPipe(
1610 pSrcSurface,
1611 pTarget,
1612 pcRenderParams);
1613 }
1614 else
1615 {
1616 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1617 }
1618
1619 // Explore the potential to still output by VEBOX and perform quick color fill in composition
1620 if (bCompBypassFeasible &&
1621 OutputPipe == VPHAL_OUTPUT_PIPE_MODE_COMP &&
1622 pcRenderParams->pColorFillParams &&
1623 pSrcSurface->rcDst.left == pTarget->rcDst.left &&
1624 pSrcSurface->rcDst.top == pTarget->rcDst.top &&
1625 pSrcSurface->rcDst.right == pTarget->rcDst.right &&
1626 pSrcSurface->rcDst.bottom < pTarget->rcDst.bottom)
1627 {
1628 int32_t lTargetBottom;
1629 lTargetBottom = pTarget->rcDst.bottom;
1630 pTarget->rcDst.bottom = pSrcSurface->rcDst.bottom;
1631
1632 // Check if Vebox can be the output pipe again
1633 bOutputPipeVeboxFeasible = IS_OUTPUT_PIPE_VEBOX_FEASIBLE(pVeboxState, pcRenderParams, pSrcSurface);
1634 if (bOutputPipeVeboxFeasible)
1635 {
1636 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_VEBOX;
1637 pTarget->bFastColorFill = true;
1638 }
1639 pTarget->rcDst.bottom = lTargetBottom;
1640 }
1641
1642 finish:
1643 *pbCompNeeded = (OutputPipe == VPHAL_OUTPUT_PIPE_MODE_COMP) ? true : false;
1644 return OutputPipe;
1645 }
1646
1647 //!
1648 //! \brief Vebox is needed on SKL
1649 //! \details Check if Vebox Render operation can be applied
1650 //! \param [in] pcRenderParams
1651 //! Pointer to VpHal render parameters
1652 //! \param [in,out] pRenderPassData
1653 //! Pointer to Render data
1654 //! \return bool
1655 //! return true if Vebox is needed, otherwise false
1656 //!
IsNeeded(PCVPHAL_RENDER_PARAMS pcRenderParams,RenderpassData * pRenderPassData)1657 bool VPHAL_VEBOX_STATE_G9_BASE::IsNeeded(
1658 PCVPHAL_RENDER_PARAMS pcRenderParams,
1659 RenderpassData *pRenderPassData)
1660 {
1661 PVPHAL_VEBOX_RENDER_DATA pRenderData;
1662 PRENDERHAL_INTERFACE pRenderHal;
1663 PVPHAL_SURFACE pRenderTarget;
1664 bool bVeboxNeeded;
1665 PMOS_INTERFACE pOsInterface;
1666 MOS_STATUS eStatus;
1667 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1668 PVPHAL_SURFACE pSrcSurface;
1669
1670 bVeboxNeeded = false;
1671 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pRenderHal);
1672 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pOsInterface);
1673
1674 pRenderHal = pVeboxState->m_pRenderHal;
1675 pOsInterface = pVeboxState->m_pOsInterface;
1676
1677 pRenderTarget = pcRenderParams->pTarget[0];
1678 pRenderData = GetLastExecRenderData();
1679 pSrcSurface = pRenderPassData->pSrcSurface;
1680
1681 VPHAL_RENDER_CHK_NULL(pSrcSurface);
1682 VPHAL_RENDER_CHK_NULL(pRenderTarget);
1683
1684 // Check whether VEBOX is available
1685 // VTd doesn't support VEBOX
1686 if (!MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrVERing))
1687 {
1688 pRenderPassData->bCompNeeded = true;
1689 goto finish;
1690 }
1691
1692 // check if 16aligned UserPtr enabling.
1693 if (pSrcSurface->b16UsrPtr || pRenderTarget->b16UsrPtr)
1694 {
1695 pRenderPassData->bCompNeeded = true;
1696 goto finish;
1697 }
1698
1699 // Check if the Surface size is greater than 64x16 which is the minimum Width and Height VEBOX can handle
1700 if (pSrcSurface->dwWidth < MHW_VEBOX_MIN_WIDTH || pSrcSurface->dwHeight < MHW_VEBOX_MIN_HEIGHT)
1701 {
1702 pRenderPassData->bCompNeeded = true;
1703 goto finish;
1704 }
1705
1706 pRenderData->Init();
1707 if (MEDIA_IS_SKU(m_pSkuTable, FtrSFCPipe) && m_sfcPipeState)
1708 {
1709 m_sfcPipeState->InitRenderData();
1710 }
1711
1712 // Determine the output pipe before setting the rendering flags for Vebox and SFC
1713 SET_VPHAL_OUTPUT_PIPE(
1714 pRenderData,
1715 GetOutputPipe(
1716 pcRenderParams,
1717 pSrcSurface,
1718 &pRenderPassData->bCompNeeded));
1719
1720 // Set MMC State
1721 SET_VPHAL_MMC_STATE(pRenderData, pVeboxState->bEnableMMC);
1722
1723 // Update execution state based on current and past events such as the
1724 // # of future and past frames available.
1725 pVeboxState->UpdateVeboxExecutionState(
1726 pSrcSurface,
1727 pRenderData->OutputPipe);
1728
1729 // Set Component
1730 SET_VPHAL_COMPONENT(pRenderData, pcRenderParams->Component);
1731
1732 // Check if Vebox can be used to process the surface
1733 // if Hdr enabled on Gen9, do not use VE feature to avoid VPOutputPipe report fail.
1734 if (!pRenderPassData->bHdrNeeded && pVeboxState->IsFormatSupported(pSrcSurface))
1735 {
1736 // Save Alpha passed by App to be used in Vebox
1737 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
1738 {
1739 pRenderData->pAlphaParams = pcRenderParams->pCompAlpha;
1740 }
1741
1742 // Setup Rendering Flags for Vebox
1743 VeboxSetRenderingFlags(
1744 pSrcSurface,
1745 pRenderTarget);
1746
1747 // Vebox is needed if Vebox isn't bypassed
1748 bVeboxNeeded = !pRenderData->bVeboxBypass;
1749 }
1750
1751 // if ScalingPreference == VPHAL_SCALING_PREFER_SFC_FOR_VEBOX, use SFC only when VEBOX is required
1752 if ((pSrcSurface->ScalingPreference == VPHAL_SCALING_PREFER_SFC_FOR_VEBOX) &&
1753 (bVeboxNeeded == false))
1754 {
1755 VPHAL_RENDER_NORMALMESSAGE("DDI choose to use SFC only for VEBOX, and since VEBOX is not required, change to Composition.");
1756 pRenderData->OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1757 pRenderPassData->bCompNeeded = true;
1758 }
1759
1760 if (pRenderPassData->bHdrNeeded && IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
1761 {
1762 // The comp bypass check is skipped for SFC feasibiliy to allow HDR support,
1763 // if still HdrSfc path is not enabled, need to switch back to composition (HDR render path)
1764 // otherwise, traditional SFC path will direct output to render target and not compatible with HDR render path.
1765 pRenderData->OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1766 pRenderPassData->bCompNeeded = true;
1767 }
1768
1769 // Check if we want to enable SFC processing
1770 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
1771 {
1772 // Setup Rendering Flags for SFC pipe
1773 m_sfcPipeState->SetRenderingFlags(
1774 pcRenderParams->pColorFillParams,
1775 pcRenderParams->pCompAlpha,
1776 pSrcSurface,
1777 pRenderTarget,
1778 pRenderData);
1779
1780 // Update Vebox Rendering Flags when the output pipe is SFC.
1781 // If input surface format is AYUV, and just have one layer as primary,Procamp can also enable.
1782 // Those flags cannot be updated inside Vebox's SetRenderingFlags due to ScalingPreference option will
1783 // turn back to composition when Vebox is not needed in above code.
1784 pRenderData->bProcamp = (IS_YUV_FORMAT(pSrcSurface->Format) ||
1785 (pSrcSurface->Format == Format_AYUV &&
1786 pcRenderParams->uSrcCount == 1)) &&
1787 pSrcSurface->pProcampParams &&
1788 pSrcSurface->pProcampParams->bEnabled;
1789 pRenderData->bBeCsc = IS_RGB_CSPACE(pSrcSurface->ColorSpace);
1790 pRenderData->bIECP = pRenderData->bIECP ||
1791 pRenderData->bProcamp ||
1792 pRenderData->bBeCsc;
1793
1794 bVeboxNeeded = true;
1795 }
1796
1797 finish:
1798 return bVeboxNeeded;
1799 }
1800
1801 //!
1802 //! \brief Vebox get the back-end colorspace conversion matrix
1803 //! \details When the i/o is A8R8G8B8 or X8R8G8B8, the transfer matrix
1804 //! needs to be updated accordingly
1805 //! \param [in] pSrcSurface
1806 //! Pointer to input surface of Vebox
1807 //! \param [in] pOutSurface
1808 //! Pointer to output surface of Vebox
1809 //! \return void
1810 //!
VeboxGetBeCSCMatrix(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pOutSurface)1811 void VPHAL_VEBOX_STATE_G9_BASE::VeboxGetBeCSCMatrix(
1812 PVPHAL_SURFACE pSrcSurface,
1813 PVPHAL_SURFACE pOutSurface)
1814 {
1815 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1816 float fTemp[3];
1817
1818 // Get the matrix to use for conversion
1819 VpHal_GetCscMatrix(
1820 pSrcSurface->ColorSpace,
1821 pOutSurface->ColorSpace,
1822 pVeboxState->fCscCoeff,
1823 pVeboxState->fCscInOffset,
1824 pVeboxState->fCscOutOffset);
1825
1826 // Vebox CSC converts RGB input to YUV for SFC
1827 // Vebox only supports A8B8G8R8 input, swap the 1st and 3rd
1828 // columns of the transfer matrix for A8R8G8B8 and X8R8G8B8
1829 // This only happens when SFC output is used
1830 if ((pSrcSurface->Format == Format_A8R8G8B8) ||
1831 (pSrcSurface->Format == Format_X8R8G8B8))
1832 {
1833 fTemp[0] = pVeboxState->fCscCoeff[0];
1834 fTemp[1] = pVeboxState->fCscCoeff[3];
1835 fTemp[2] = pVeboxState->fCscCoeff[6];
1836
1837 pVeboxState->fCscCoeff[0] = pVeboxState->fCscCoeff[2];
1838 pVeboxState->fCscCoeff[3] = pVeboxState->fCscCoeff[5];
1839 pVeboxState->fCscCoeff[6] = pVeboxState->fCscCoeff[8];
1840
1841 pVeboxState->fCscCoeff[2] = fTemp[0];
1842 pVeboxState->fCscCoeff[5] = fTemp[1];
1843 pVeboxState->fCscCoeff[8] = fTemp[2];
1844 }
1845 }
1846
1847 #if VEBOX_AUTO_DENOISE_SUPPORTED
1848 //!
1849 //! \brief Load update kernel curbe data
1850 //! \details Loads the static data of update kernel to curbe
1851 //! \param [out] iCurbeOffsetOutDN
1852 //! Pointer to DN kernel curbe offset
1853 //! \return MOS_STATUS
1854 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1855 //!
LoadUpdateDenoiseKernelStaticData(int32_t * iCurbeOffsetOutDN)1856 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::LoadUpdateDenoiseKernelStaticData(
1857 int32_t* iCurbeOffsetOutDN)
1858 {
1859 PRENDERHAL_INTERFACE pRenderHal;
1860 VEBOX_STATE_UPDATE_STATIC_DATA_G9 DNStaticData; // DN Update kernelStatic parameters
1861 PMHW_VEBOX_INTERFACE pVeboxInterface;
1862 PVPHAL_DENOISE_PARAMS pDenoiseParams; // Denoise
1863 int32_t iOffset0, iOffset1;
1864 MOS_STATUS eStatus;
1865 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1866 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1867
1868 pRenderHal = pVeboxState->m_pRenderHal;
1869 pVeboxInterface = pVeboxState->m_pVeboxInterface;
1870 eStatus = MOS_STATUS_SUCCESS;
1871
1872 // init the static data
1873 MOS_ZeroMemory(&DNStaticData, sizeof(VEBOX_STATE_UPDATE_STATIC_DATA_G9));
1874
1875 pDenoiseParams = m_currentSurface->pDenoiseParams;
1876 VPHAL_RENDER_ASSERT(pDenoiseParams);
1877
1878 // Get offset for slice0 and slice1
1879 VPHAL_RENDER_CHK_STATUS(VeboxGetStatisticsSurfaceOffsets(
1880 &iOffset0,
1881 &iOffset1));
1882
1883 // Load DN update kernel CURBE data
1884 if (pRenderData->bAutoDenoise)
1885 {
1886 // set the curbe data for DN update kernel
1887 DNStaticData.DW00.OffsetToSlice0 = iOffset0;
1888 DNStaticData.DW01.OffsetToSlice1 = iOffset1;
1889 DNStaticData.DW02.FirstFrameFlag = pVeboxState->bFirstFrame;
1890 DNStaticData.DW02.NoiseLevel = pDenoiseParams->NoiseLevel;
1891 DNStaticData.DW03.RangeThrAdp2NLvl = 1;
1892 DNStaticData.DW04.VeboxStatisticsSurface = BI_DN_STATISTICS_SURFACE;
1893 DNStaticData.DW05.VeboxDndiStateSurface = BI_DN_VEBOX_STATE_SURFACE;
1894 DNStaticData.DW06.VeboxTempSurface = BI_DN_TEMP_SURFACE;
1895 DNStaticData.DW07.VeboxSpatialAttributesConfigurationSurface = BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE;
1896
1897 *iCurbeOffsetOutDN = pRenderHal->pfnLoadCurbeData(
1898 pRenderHal,
1899 pRenderData->pMediaState,
1900 &DNStaticData,
1901 sizeof(DNStaticData));
1902
1903 if (*iCurbeOffsetOutDN < 0)
1904 {
1905 eStatus = MOS_STATUS_UNKNOWN;
1906 goto finish;
1907 }
1908
1909 pRenderData->iCurbeLength += sizeof(DNStaticData);
1910 }
1911
1912 finish:
1913 return eStatus;
1914 }
1915
1916 //!
1917 //! \brief Setup surface states for Denoise
1918 //! \details Setup Surface State for Vebox States Auto DN kernel
1919 //! \return MOS_STATUS
1920 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1921 //!
SetupSurfaceStatesForDenoise()1922 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupSurfaceStatesForDenoise()
1923 {
1924 PRENDERHAL_INTERFACE pRenderHal;
1925 PMOS_INTERFACE pOsInterface;
1926 RENDERHAL_SURFACE_STATE_PARAMS SurfaceParams;
1927 MOS_STATUS eStatus;
1928 MOS_FORMAT tmpFormat;
1929 bool bUseKernelResource;
1930 const MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
1931 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1932 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1933
1934 eStatus = MOS_STATUS_SUCCESS;
1935 pRenderHal = pVeboxState->m_pRenderHal;
1936 pOsInterface = pVeboxState->m_pOsInterface;
1937 VPHAL_RENDER_CHK_STATUS(pVeboxState->m_pVeboxInterface->GetVeboxHeapInfo(
1938 &pVeboxHeap));
1939 VPHAL_RENDER_CHK_NULL(pVeboxHeap);
1940 VPHAL_RENDER_CHK_NULL(pOsInterface);
1941 VPHAL_RENDER_CHK_NULL(pOsInterface->osCpInterface);
1942
1943 bUseKernelResource = UseKernelResource();
1944
1945 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
1946 MOS_ZeroMemory(&pVeboxState->VeboxHeapResource, sizeof(VPHAL_SURFACE));
1947 MOS_ZeroMemory(&pVeboxState->tmpResource, sizeof(VPHAL_SURFACE));
1948
1949 // Treat the 1D buffer as 2D surface
1950 // VEBox State Surface
1951 pVeboxState->VeboxHeapResource.Format = Format_L8;
1952 pVeboxState->VeboxHeapResource.dwWidth = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
1953 pVeboxState->VeboxHeapResource.dwPitch = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
1954 pVeboxState->VeboxHeapResource.dwHeight =
1955 MOS_ROUNDUP_DIVIDE(pVeboxHeap->uiInstanceSize, SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH);
1956 pVeboxState->VeboxHeapResource.dwOffset =
1957 pVeboxHeap->uiInstanceSize *
1958 pVeboxHeap->uiCurState;
1959 pVeboxState->VeboxHeapResource.TileType = MOS_TILE_LINEAR;
1960 pVeboxState->VeboxHeapResource.OsResource = bUseKernelResource ?
1961 pVeboxHeap->KernelResource :
1962 pVeboxHeap->DriverResource;
1963
1964 // Temp Surface: for Noise Level History
1965 pVeboxState->tmpResource.Format = Format_L8;
1966 pVeboxState->tmpResource.dwWidth = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
1967 pVeboxState->tmpResource.dwPitch = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
1968 pVeboxState->tmpResource.dwHeight =
1969 MOS_ROUNDUP_DIVIDE(MHW_PAGE_SIZE, SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH);
1970 pVeboxState->tmpResource.dwOffset = 0;
1971 pVeboxState->tmpResource.TileType = MOS_TILE_LINEAR;
1972 pVeboxState->tmpResource.OsResource = pVeboxState->VeboxTempSurface.OsResource;
1973
1974 // Statistics Surface-----------------------------------------------------------
1975 tmpFormat = pVeboxState->VeboxStatisticsSurface.Format;
1976 pVeboxState->VeboxStatisticsSurface.Format = Format_RAW;
1977
1978 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetBufferSurfaceForHwAccess(
1979 pRenderHal,
1980 &pVeboxState->VeboxStatisticsSurface,
1981 &pVeboxState->RenderHalVeboxStatisticsSurface,
1982 nullptr,
1983 pRenderData->iBindingTable,
1984 BI_DN_STATISTICS_SURFACE,
1985 false));
1986
1987 pVeboxState->VeboxStatisticsSurface.Format = tmpFormat;
1988
1989 // VEBox State Surface-----------------------------------------------------------
1990 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
1991
1992 SurfaceParams.Type = pRenderHal->SurfaceTypeDefault;
1993 SurfaceParams.bRenderTarget = true;
1994 SurfaceParams.bWidthInDword_Y = true;
1995 SurfaceParams.bWidthInDword_UV = true;
1996 SurfaceParams.Boundary = RENDERHAL_SS_BOUNDARY_ORIGINAL;
1997 SurfaceParams.bWidth16Align = false;
1998
1999 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetSurfaceForHwAccess(
2000 pRenderHal,
2001 &pVeboxState->VeboxHeapResource,
2002 &pVeboxState->RenderHalVeboxHeapResource,
2003 &SurfaceParams,
2004 pRenderData->iBindingTable,
2005 BI_DN_VEBOX_STATE_SURFACE,
2006 true));
2007
2008 // VEBox Temp Surface-----------------------------------------------------------
2009 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2010
2011 SurfaceParams.Type = pRenderHal->SurfaceTypeDefault;
2012 SurfaceParams.bRenderTarget = true;
2013 SurfaceParams.bWidthInDword_Y = true;
2014 SurfaceParams.bWidthInDword_UV = true;
2015 SurfaceParams.Boundary = RENDERHAL_SS_BOUNDARY_ORIGINAL;
2016 SurfaceParams.bWidth16Align = false;
2017
2018 // set bRenderTarget=false to skip first frame for PermeatePatchForHM().
2019 if (pVeboxState->bFirstFrame && pOsInterface->osCpInterface->IsHMEnabled())
2020 {
2021 SurfaceParams.bRenderTarget = false;
2022 }
2023
2024 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetSurfaceForHwAccess(
2025 pRenderHal,
2026 &pVeboxState->tmpResource,
2027 &pVeboxState->RenderHalTmpResource,
2028 &SurfaceParams,
2029 pRenderData->iBindingTable,
2030 BI_DN_TEMP_SURFACE,
2031 true));
2032
2033 // Spatial Attributes Configuration Surface------------------------------------
2034 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2035
2036 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetBufferSurfaceForHwAccess(
2037 pRenderHal,
2038 &pVeboxState->VeboxSpatialAttributesConfigurationSurface,
2039 &pVeboxState->RenderHalVeboxSpatialAttributesConfigurationSurface,
2040 &SurfaceParams,
2041 pRenderData->iBindingTable,
2042 BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE,
2043 false));
2044
2045 finish:
2046 return eStatus;
2047 }
2048 #endif
2049
2050 //!
2051 //! \brief Setup kernels for Vebox auto mode features
2052 //! \details Setup kernels that co-operate with Vebox auto mode features
2053 //! \param [in] iKDTIndex
2054 //! Index to Kernel Parameter Array (defined platform specific)
2055 //! \return MOS_STATUS
2056 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
2057 //!
SetupVeboxKernel(int32_t iKDTIndex)2058 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupVeboxKernel(
2059 int32_t iKDTIndex)
2060 {
2061 Kdll_CacheEntry *pCacheEntryTable; // Kernel Cache Entry table
2062 Kdll_FilterEntry *pFilter; // Kernel Filter (points to base of filter array)
2063 int32_t iKUID; // Kernel Unique ID (DNDI uses combined kernels)
2064 int32_t iInlineLength; // Inline data length
2065 MOS_STATUS eStatus; // Return code
2066 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
2067 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2068
2069 // Initialize Variables
2070 eStatus = MOS_STATUS_SUCCESS;
2071 pFilter = &pVeboxState->SearchFilter[0];
2072 pCacheEntryTable = pVeboxState->m_pKernelDllState->ComponentKernelCache.pCacheEntries;
2073
2074 // Initialize States
2075 MOS_ZeroMemory(pFilter, sizeof(pVeboxState->SearchFilter));
2076 MOS_ZeroMemory(&pRenderData->KernelEntry[iKDTIndex], sizeof(Kdll_CacheEntry));
2077
2078 #if VEBOX_AUTO_DENOISE_SUPPORTED
2079 if (iKDTIndex == KERNEL_UPDATEDNSTATE)
2080 {
2081 iKUID = IDR_VP_UpdateDNState;
2082 iInlineLength = 0; // No inline data
2083 pRenderData->PerfTag = VPHAL_VEBOX_UPDATE_DN_STATE;
2084 }
2085 else // Incorrect index to kernel parameters array
2086 #endif
2087 {
2088 VPHAL_RENDER_ASSERTMESSAGE(
2089 "Incorrect index to kernel parameters array.");
2090 eStatus = MOS_STATUS_UNKNOWN;
2091 goto finish;
2092 }
2093
2094 // Store pointer to Kernel Parameter
2095 pRenderData->pKernelParam[iKDTIndex] =
2096 &pVeboxState->pKernelParamTable[iKDTIndex];
2097
2098 // Set Parameters for Kernel Entry
2099 pRenderData->KernelEntry[iKDTIndex].iKUID = iKUID;
2100 pRenderData->KernelEntry[iKDTIndex].iKCID = -1;
2101 pRenderData->KernelEntry[iKDTIndex].iFilterSize = 2;
2102 pRenderData->KernelEntry[iKDTIndex].pFilter = pFilter;
2103 pRenderData->KernelEntry[iKDTIndex].iSize = pCacheEntryTable[iKUID].iSize;
2104 pRenderData->KernelEntry[iKDTIndex].pBinary = pCacheEntryTable[iKUID].pBinary;
2105
2106 // set the Inline Data length
2107 pRenderData->iInlineLength = iInlineLength;
2108
2109 VPHAL_RENDER_NORMALMESSAGE(
2110 "Vebox Kernels: %s", g_KernelDNDI_Str_g9[iKDTIndex]);
2111
2112 finish:
2113 return eStatus;
2114 }
2115
2116 //!
2117 //! \brief Vebox format support check
2118 //! \details Checks to see if Vebox operation is supported with source surface format
2119 //! \param [in] pSrcSurface
2120 //! Pointer to input surface of Vebox
2121 //! \return bool
2122 //! return true if input surface format is supported, otherwise false
2123 //!
IsFormatSupported(PVPHAL_SURFACE pSrcSurface)2124 bool VPHAL_VEBOX_STATE_G9_BASE::IsFormatSupported(
2125 PVPHAL_SURFACE pSrcSurface)
2126 {
2127 bool bRet;
2128
2129 bRet = false;
2130
2131 // Check if Sample Format is supported
2132 // Vebox only support P016 format, P010 format can be supported by faking it as P016
2133 if (pSrcSurface->Format != Format_NV12 &&
2134 pSrcSurface->Format != Format_AYUV &&
2135 pSrcSurface->Format != Format_P010 &&
2136 pSrcSurface->Format != Format_P016 &&
2137 pSrcSurface->Format != Format_P210 &&
2138 pSrcSurface->Format != Format_P216 &&
2139 pSrcSurface->Format != Format_Y8 &&
2140 pSrcSurface->Format != Format_Y16U &&
2141 pSrcSurface->Format != Format_Y16S &&
2142 !IS_PA_FORMAT(pSrcSurface->Format))
2143 {
2144 VPHAL_RENDER_NORMALMESSAGE("Unsupported Source Format '0x%08x' for VEBOX.", pSrcSurface->Format);
2145 goto finish;
2146 }
2147
2148 bRet = true;
2149
2150 finish:
2151 return bRet;
2152 }
2153
2154 //!
2155 //! \brief Vebox format support check
2156 //! \details Checks to see if RT format is supported when Vebox output pipe is selected
2157 //! \param [in] pSrcSurface
2158 //! Pointer to Render source surface of VPP BLT
2159 //! \param [in] pRTSurface
2160 //! Pointer to Render target surface of VPP BLT
2161 //! \return bool
2162 //! return true if render target surface format is supported, otherwise false
2163 //!
IsRTFormatSupported(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pRTSurface)2164 bool VPHAL_VEBOX_STATE_G9_BASE::IsRTFormatSupported(
2165 PVPHAL_SURFACE pSrcSurface,
2166 PVPHAL_SURFACE pRTSurface)
2167 {
2168 bool bRet;
2169
2170 bRet = false;
2171
2172 // Check if RT Format is supported by Vebox
2173 if (IS_PA_FORMAT(pRTSurface->Format) ||
2174 pRTSurface->Format == Format_NV12 ||
2175 pRTSurface->Format == Format_AYUV ||
2176 pRTSurface->Format == Format_P010 ||
2177 pRTSurface->Format == Format_P016 ||
2178 pRTSurface->Format == Format_P210 ||
2179 pRTSurface->Format == Format_P216 ||
2180 pRTSurface->Format == Format_Y8 ||
2181 pRTSurface->Format == Format_Y16U ||
2182 pRTSurface->Format == Format_Y16S)
2183 {
2184 // Supported Vebox Render Target format. Vebox Pipe Output can be selected.
2185 bRet = true;
2186 }
2187
2188 if ((pSrcSurface->ColorSpace == CSpace_BT2020) &&
2189 ((pSrcSurface->Format == Format_P010) ||
2190 (pSrcSurface->Format == Format_P016)) &&
2191 IS_RGB32_FORMAT(pRTSurface->Format))
2192 {
2193 bRet = true;
2194 }
2195
2196 return bRet;
2197 }
2198
2199 //!
2200 //! \brief Vebox format support check for DN
2201 //! \details Check if the input surface format is supported for DN
2202 //! \param [in] pSrcSurface
2203 //! Pointer to input surface of Vebox
2204 //! \return bool
2205 //! return true if input surface format is supported, otherwise false
2206 //!
IsDnFormatSupported(PVPHAL_SURFACE pSrcSurface)2207 bool VPHAL_VEBOX_STATE_G9_BASE::IsDnFormatSupported(
2208 PVPHAL_SURFACE pSrcSurface)
2209 {
2210 bool bRet;
2211
2212 bRet = false;
2213 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
2214
2215 if ((pSrcSurface->Format != Format_YUYV) &&
2216 (pSrcSurface->Format != Format_VYUY) &&
2217 (pSrcSurface->Format != Format_YVYU) &&
2218 (pSrcSurface->Format != Format_UYVY) &&
2219 (pSrcSurface->Format != Format_YUY2) &&
2220 (pSrcSurface->Format != Format_Y8) &&
2221 (pSrcSurface->Format != Format_NV12) &&
2222 (pSrcSurface->Format != Format_A8B8G8R8) &&
2223 (pSrcSurface->Format != Format_A16B16G16R16))
2224 {
2225 VPHAL_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX DN.", pSrcSurface->Format);
2226 goto finish;
2227 }
2228
2229 bRet = true;
2230
2231 finish:
2232 return bRet;
2233 }
2234
2235 //!
2236 //! \brief Check if surface format is supported by DI
2237 //! \details Check if surface format is supported by DI
2238 //! \param [in] pSrc
2239 //! Pointer to input surface of Vebox
2240 //! \return bool
2241 //! Return true if surface format is supported, otherwise return false
2242 //!
IsDiFormatSupported(PVPHAL_SURFACE pSrc)2243 bool VPHAL_VEBOX_STATE_G9_BASE::IsDiFormatSupported(
2244 PVPHAL_SURFACE pSrc)
2245 {
2246 bool bRet = false;
2247
2248 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrc);
2249
2250 if (pSrc->Format != Format_AYUV &&
2251 pSrc->Format != Format_Y410 &&
2252 pSrc->Format != Format_Y416 &&
2253 pSrc->Format != Format_P010 &&
2254 pSrc->Format != Format_P016 &&
2255 pSrc->Format != Format_A8B8G8R8 &&
2256 pSrc->Format != Format_A8R8G8B8 &&
2257 pSrc->Format != Format_B10G10R10A2 &&
2258 pSrc->Format != Format_R10G10B10A2 &&
2259 pSrc->Format != Format_A16B16G16R16 &&
2260 pSrc->Format != Format_A16R16G16B16)
2261 {
2262 bRet = true;
2263 }
2264 else
2265 {
2266 bRet = false;
2267 }
2268
2269 finish:
2270 return bRet;
2271 }
2272
CreateSfcState()2273 VphalSfcState* VPHAL_VEBOX_STATE_G9_BASE::CreateSfcState()
2274 {
2275 #if __VPHAL_SFC_SUPPORTED
2276 VphalSfcState *sfcState = MOS_New(VphalSfcStateG9, m_pOsInterface, m_pRenderHal, m_pSfcInterface);
2277 #else
2278 VphalSfcState *sfcState = nullptr;
2279 #endif
2280
2281 return sfcState;
2282 }
2283
VPHAL_VEBOX_STATE_G9_BASE(PMOS_INTERFACE pOsInterface,PMHW_VEBOX_INTERFACE pVeboxInterface,PMHW_SFC_INTERFACE pSfcInterface,PRENDERHAL_INTERFACE pRenderHal,PVPHAL_VEBOX_EXEC_STATE pVeboxExecState,PVPHAL_RNDR_PERF_DATA pPerfData,const VPHAL_DNDI_CACHE_CNTL & dndiCacheCntl,MOS_STATUS * peStatus)2284 VPHAL_VEBOX_STATE_G9_BASE::VPHAL_VEBOX_STATE_G9_BASE(
2285 PMOS_INTERFACE pOsInterface,
2286 PMHW_VEBOX_INTERFACE pVeboxInterface,
2287 PMHW_SFC_INTERFACE pSfcInterface,
2288 PRENDERHAL_INTERFACE pRenderHal,
2289 PVPHAL_VEBOX_EXEC_STATE pVeboxExecState,
2290 PVPHAL_RNDR_PERF_DATA pPerfData,
2291 const VPHAL_DNDI_CACHE_CNTL &dndiCacheCntl,
2292 MOS_STATUS *peStatus) :
2293 VPHAL_VEBOX_STATE(pOsInterface, pVeboxInterface, pSfcInterface, pRenderHal, pVeboxExecState, pPerfData, dndiCacheCntl, peStatus)
2294 {
2295 // States
2296 pKernelParamTable = (PRENDERHAL_KERNEL_PARAM)g_Vebox_KernelParam_g9;
2297 iNumFFDISurfaces = 2; // PE on: 4 used. PE off: 2 used
2298
2299 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
2300 m_hvsKernelBinary = (uint8_t *)IGVP_HVS_DENOISE_G900;
2301 m_hvsKernelBinarySize = IGVP_HVS_DENOISE_G900_SIZE;
2302 #endif
2303 }
2304
2305