1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // (C) 2006 Thomas Gleixner <tglx@linutronix.de>
4 //
5 // Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
6
7 #include <linux/kernel.h>
8 #include <linux/types.h>
9 #include <linux/interrupt.h>
10 #include <linux/list.h>
11 #include <linux/timer.h>
12 #include <linux/init.h>
13 #include <linux/serial_core.h>
14 #include <linux/serial_s3c.h>
15 #include <linux/platform_device.h>
16 #include <linux/io.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/rawnand.h>
19 #include <linux/mtd/nand-ecc-sw-hamming.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/memblock.h>
22
23 #include <asm/mach/arch.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/irq.h>
26
27 #include <asm/setup.h>
28 #include <asm/irq.h>
29 #include <asm/mach-types.h>
30
31 #include "regs-gpio.h"
32 #include "gpio-samsung.h"
33 #include "gpio-cfg.h"
34
35 #include <linux/platform_data/fb-s3c2410.h>
36
37 #include <linux/platform_data/i2c-s3c2410.h>
38 #include <linux/platform_data/mtd-nand-s3c2410.h>
39
40 #include "devs.h"
41 #include "cpu.h"
42
43 #include "s3c24xx.h"
44
45 static struct map_desc vstms_iodesc[] __initdata = {
46 };
47
48 static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
49 [0] = {
50 .hwport = 0,
51 .flags = 0,
52 .ucon = 0x3c5,
53 .ulcon = 0x03,
54 .ufcon = 0x51,
55 },
56 [1] = {
57 .hwport = 1,
58 .flags = 0,
59 .ucon = 0x3c5,
60 .ulcon = 0x03,
61 .ufcon = 0x51,
62 },
63 [2] = {
64 .hwport = 2,
65 .flags = 0,
66 .ucon = 0x3c5,
67 .ulcon = 0x03,
68 .ufcon = 0x51,
69 }
70 };
71
72 static struct mtd_partition __initdata vstms_nand_part[] = {
73 [0] = {
74 .name = "Boot Agent",
75 .size = 0x7C000,
76 .offset = 0,
77 },
78 [1] = {
79 .name = "UBoot Config",
80 .offset = 0x7C000,
81 .size = 0x4000,
82 },
83 [2] = {
84 .name = "Kernel",
85 .offset = 0x80000,
86 .size = 0x200000,
87 },
88 [3] = {
89 .name = "RFS",
90 .offset = 0x280000,
91 .size = 0x3d80000,
92 },
93 };
94
95 static struct s3c2410_nand_set __initdata vstms_nand_sets[] = {
96 [0] = {
97 .name = "NAND",
98 .nr_chips = 1,
99 .nr_partitions = ARRAY_SIZE(vstms_nand_part),
100 .partitions = vstms_nand_part,
101 },
102 };
103
104 /* choose a set of timings which should suit most 512Mbit
105 * chips and beyond.
106 */
107
108 static struct s3c2410_platform_nand __initdata vstms_nand_info = {
109 .tacls = 20,
110 .twrph0 = 60,
111 .twrph1 = 20,
112 .nr_sets = ARRAY_SIZE(vstms_nand_sets),
113 .sets = vstms_nand_sets,
114 .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
115 };
116
117 static struct platform_device *vstms_devices[] __initdata = {
118 &s3c_device_ohci,
119 &s3c_device_wdt,
120 &s3c_device_i2c0,
121 &s3c_device_iis,
122 &s3c_device_rtc,
123 &s3c_device_nand,
124 &s3c2412_device_dma,
125 };
126
vstms_fixup(struct tag * tags,char ** cmdline)127 static void __init vstms_fixup(struct tag *tags, char **cmdline)
128 {
129 if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
130 memblock_add(0x30000000, SZ_64M);
131 }
132 }
133
vstms_map_io(void)134 static void __init vstms_map_io(void)
135 {
136 s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
137 s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
138 s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
139 }
140
vstms_init_time(void)141 static void __init vstms_init_time(void)
142 {
143 s3c2412_init_clocks(12000000);
144 s3c24xx_timer_init();
145 }
146
vstms_init(void)147 static void __init vstms_init(void)
148 {
149 s3c_i2c0_set_platdata(NULL);
150 s3c_nand_set_platdata(&vstms_nand_info);
151 /* Configure the I2S pins (GPE0...GPE4) in correct mode */
152 s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
153 S3C_GPIO_PULL_NONE);
154 platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
155 }
156
157 MACHINE_START(VSTMS, "VSTMS")
158 .atag_offset = 0x100,
159
160 .fixup = vstms_fixup,
161 .init_irq = s3c2412_init_irq,
162 .init_machine = vstms_init,
163 .map_io = vstms_map_io,
164 .init_time = vstms_init_time,
165 MACHINE_END
166