1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
3
4 /*
5 * SDW Intel Init Routines
6 *
7 * Initializes and creates SDW devices based on ACPI and Hardware values
8 */
9
10 #include <linux/acpi.h>
11 #include <linux/export.h>
12 #include <linux/interrupt.h>
13 #include <linux/io.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/soundwire/sdw_intel.h>
18 #include "cadence_master.h"
19 #include "intel.h"
20
21 #define SDW_SHIM_LCAP 0x0
22 #define SDW_SHIM_BASE 0x2C000
23 #define SDW_ALH_BASE 0x2C800
24 #define SDW_LINK_BASE 0x30000
25 #define SDW_LINK_SIZE 0x10000
26
sdw_intel_cleanup(struct sdw_intel_ctx * ctx)27 static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
28 {
29 struct sdw_intel_link_res *link = ctx->links;
30 u32 link_mask;
31 int i;
32
33 if (!link)
34 return 0;
35
36 link_mask = ctx->link_mask;
37
38 for (i = 0; i < ctx->count; i++, link++) {
39 if (!(link_mask & BIT(i)))
40 continue;
41
42 if (link->pdev) {
43 pm_runtime_disable(&link->pdev->dev);
44 platform_device_unregister(link->pdev);
45 }
46
47 if (!link->clock_stop_quirks)
48 pm_runtime_put_noidle(link->dev);
49 }
50
51 return 0;
52 }
53
54 #define HDA_DSP_REG_ADSPIC2 (0x10)
55 #define HDA_DSP_REG_ADSPIS2 (0x14)
56 #define HDA_DSP_REG_ADSPIC2_SNDW BIT(5)
57
58 /**
59 * sdw_intel_enable_irq() - enable/disable Intel SoundWire IRQ
60 * @mmio_base: The mmio base of the control register
61 * @enable: true if enable
62 */
sdw_intel_enable_irq(void __iomem * mmio_base,bool enable)63 void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable)
64 {
65 u32 val;
66
67 val = readl(mmio_base + HDA_DSP_REG_ADSPIC2);
68
69 if (enable)
70 val |= HDA_DSP_REG_ADSPIC2_SNDW;
71 else
72 val &= ~HDA_DSP_REG_ADSPIC2_SNDW;
73
74 writel(val, mmio_base + HDA_DSP_REG_ADSPIC2);
75 }
76 EXPORT_SYMBOL_NS(sdw_intel_enable_irq, SOUNDWIRE_INTEL_INIT);
77
sdw_intel_thread(int irq,void * dev_id)78 irqreturn_t sdw_intel_thread(int irq, void *dev_id)
79 {
80 struct sdw_intel_ctx *ctx = dev_id;
81 struct sdw_intel_link_res *link;
82
83 list_for_each_entry(link, &ctx->link_list, list)
84 sdw_cdns_irq(irq, link->cdns);
85
86 sdw_intel_enable_irq(ctx->mmio_base, true);
87 return IRQ_HANDLED;
88 }
89 EXPORT_SYMBOL_NS(sdw_intel_thread, SOUNDWIRE_INTEL_INIT);
90
91 static struct sdw_intel_ctx
sdw_intel_probe_controller(struct sdw_intel_res * res)92 *sdw_intel_probe_controller(struct sdw_intel_res *res)
93 {
94 struct platform_device_info pdevinfo;
95 struct platform_device *pdev;
96 struct sdw_intel_link_res *link;
97 struct sdw_intel_ctx *ctx;
98 struct acpi_device *adev;
99 struct sdw_slave *slave;
100 struct list_head *node;
101 struct sdw_bus *bus;
102 u32 link_mask;
103 int num_slaves = 0;
104 int count;
105 int i;
106
107 if (!res)
108 return NULL;
109
110 if (acpi_bus_get_device(res->handle, &adev))
111 return NULL;
112
113 if (!res->count)
114 return NULL;
115
116 count = res->count;
117 dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count);
118
119 ctx = devm_kzalloc(&adev->dev, sizeof(*ctx), GFP_KERNEL);
120 if (!ctx)
121 return NULL;
122
123 ctx->count = count;
124 ctx->links = devm_kcalloc(&adev->dev, ctx->count,
125 sizeof(*ctx->links), GFP_KERNEL);
126 if (!ctx->links)
127 return NULL;
128
129 ctx->count = count;
130 ctx->mmio_base = res->mmio_base;
131 ctx->link_mask = res->link_mask;
132 ctx->handle = res->handle;
133 mutex_init(&ctx->shim_lock);
134
135 link = ctx->links;
136 link_mask = ctx->link_mask;
137
138 INIT_LIST_HEAD(&ctx->link_list);
139
140 /* Create SDW Master devices */
141 for (i = 0; i < count; i++, link++) {
142 if (!(link_mask & BIT(i))) {
143 dev_dbg(&adev->dev,
144 "Link %d masked, will not be enabled\n", i);
145 continue;
146 }
147
148 link->mmio_base = res->mmio_base;
149 link->registers = res->mmio_base + SDW_LINK_BASE
150 + (SDW_LINK_SIZE * i);
151 link->shim = res->mmio_base + SDW_SHIM_BASE;
152 link->alh = res->mmio_base + SDW_ALH_BASE;
153
154 link->ops = res->ops;
155 link->dev = res->dev;
156
157 link->clock_stop_quirks = res->clock_stop_quirks;
158 link->shim_lock = &ctx->shim_lock;
159 link->shim_mask = &ctx->shim_mask;
160 link->link_mask = link_mask;
161
162 memset(&pdevinfo, 0, sizeof(pdevinfo));
163
164 pdevinfo.parent = res->parent;
165 pdevinfo.name = "intel-sdw";
166 pdevinfo.id = i;
167 pdevinfo.fwnode = acpi_fwnode_handle(adev);
168 pdevinfo.data = link;
169 pdevinfo.size_data = sizeof(*link);
170
171 pdev = platform_device_register_full(&pdevinfo);
172 if (IS_ERR(pdev)) {
173 dev_err(&adev->dev,
174 "platform device creation failed: %ld\n",
175 PTR_ERR(pdev));
176 goto err;
177 }
178 link->pdev = pdev;
179 link->cdns = platform_get_drvdata(pdev);
180
181 if (!link->cdns) {
182 dev_err(&adev->dev, "failed to get link->cdns\n");
183 /*
184 * 1 will be subtracted from i in the err label, but we need to call
185 * intel_link_dev_unregister for this ldev, so plus 1 now
186 */
187 i++;
188 goto err;
189 }
190 list_add_tail(&link->list, &ctx->link_list);
191 bus = &link->cdns->bus;
192 /* Calculate number of slaves */
193 list_for_each(node, &bus->slaves)
194 num_slaves++;
195 }
196
197 ctx->ids = devm_kcalloc(&adev->dev, num_slaves,
198 sizeof(*ctx->ids), GFP_KERNEL);
199 if (!ctx->ids)
200 goto err;
201
202 ctx->num_slaves = num_slaves;
203 i = 0;
204 list_for_each_entry(link, &ctx->link_list, list) {
205 bus = &link->cdns->bus;
206 list_for_each_entry(slave, &bus->slaves, node) {
207 ctx->ids[i].id = slave->id;
208 ctx->ids[i].link_id = bus->link_id;
209 i++;
210 }
211 }
212
213 return ctx;
214
215 err:
216 ctx->count = i;
217 sdw_intel_cleanup(ctx);
218 return NULL;
219 }
220
221 static int
sdw_intel_startup_controller(struct sdw_intel_ctx * ctx)222 sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
223 {
224 struct acpi_device *adev;
225 struct sdw_intel_link_res *link;
226 u32 caps;
227 u32 link_mask;
228 int i;
229
230 if (acpi_bus_get_device(ctx->handle, &adev))
231 return -EINVAL;
232
233 /* Check SNDWLCAP.LCOUNT */
234 caps = ioread32(ctx->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP);
235 caps &= GENMASK(2, 0);
236
237 /* Check HW supported vs property value */
238 if (caps < ctx->count) {
239 dev_err(&adev->dev,
240 "BIOS master count is larger than hardware capabilities\n");
241 return -EINVAL;
242 }
243
244 if (!ctx->links)
245 return -EINVAL;
246
247 link = ctx->links;
248 link_mask = ctx->link_mask;
249
250 /* Startup SDW Master devices */
251 for (i = 0; i < ctx->count; i++, link++) {
252 if (!(link_mask & BIT(i)))
253 continue;
254
255 intel_master_startup(link->pdev);
256
257 if (!link->clock_stop_quirks) {
258 /*
259 * we need to prevent the parent PCI device
260 * from entering pm_runtime suspend, so that
261 * power rails to the SoundWire IP are not
262 * turned off.
263 */
264 pm_runtime_get_noresume(link->dev);
265 }
266 }
267
268 return 0;
269 }
270
271 /**
272 * sdw_intel_probe() - SoundWire Intel probe routine
273 * @res: resource data
274 *
275 * This registers a platform device for each Master handled by the controller,
276 * and SoundWire Master and Slave devices will be created by the platform
277 * device probe. All the information necessary is stored in the context, and
278 * the res argument pointer can be freed after this step.
279 * This function will be called after sdw_intel_acpi_scan() by SOF probe.
280 */
281 struct sdw_intel_ctx
sdw_intel_probe(struct sdw_intel_res * res)282 *sdw_intel_probe(struct sdw_intel_res *res)
283 {
284 return sdw_intel_probe_controller(res);
285 }
286 EXPORT_SYMBOL_NS(sdw_intel_probe, SOUNDWIRE_INTEL_INIT);
287
288 /**
289 * sdw_intel_startup() - SoundWire Intel startup
290 * @ctx: SoundWire context allocated in the probe
291 *
292 * Startup Intel SoundWire controller. This function will be called after
293 * Intel Audio DSP is powered up.
294 */
sdw_intel_startup(struct sdw_intel_ctx * ctx)295 int sdw_intel_startup(struct sdw_intel_ctx *ctx)
296 {
297 return sdw_intel_startup_controller(ctx);
298 }
299 EXPORT_SYMBOL_NS(sdw_intel_startup, SOUNDWIRE_INTEL_INIT);
300 /**
301 * sdw_intel_exit() - SoundWire Intel exit
302 * @ctx: SoundWire context allocated in the probe
303 *
304 * Delete the controller instances created and cleanup
305 */
sdw_intel_exit(struct sdw_intel_ctx * ctx)306 void sdw_intel_exit(struct sdw_intel_ctx *ctx)
307 {
308 sdw_intel_cleanup(ctx);
309 }
310 EXPORT_SYMBOL_NS(sdw_intel_exit, SOUNDWIRE_INTEL_INIT);
311
sdw_intel_process_wakeen_event(struct sdw_intel_ctx * ctx)312 void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx)
313 {
314 struct sdw_intel_link_res *link;
315 u32 link_mask;
316 int i;
317
318 if (!ctx->links)
319 return;
320
321 link = ctx->links;
322 link_mask = ctx->link_mask;
323
324 /* Startup SDW Master devices */
325 for (i = 0; i < ctx->count; i++, link++) {
326 if (!(link_mask & BIT(i)))
327 continue;
328
329 intel_master_process_wakeen_event(link->pdev);
330 }
331 }
332 EXPORT_SYMBOL_NS(sdw_intel_process_wakeen_event, SOUNDWIRE_INTEL_INIT);
333
334 MODULE_LICENSE("Dual BSD/GPL");
335 MODULE_DESCRIPTION("Intel Soundwire Init Library");
336