1/* 2 * Copyright © 2006-2013 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Wang Zhenyu <zhenyu.z.wang@intel.com> 25 * Keith Packard <keithp@keithp.com> 26 */ 27 28/* 29 * Input parameters 30 */ 31 32/* Destination X/Y */ 33define(`dst_x_uw', `g1.8<2,4,0>UW') 34define(`dst_y_uw', `g1.10<2,4,0>UW') 35define(`screen_x0', `g1.0<0,1,0>F') 36define(`screen_y0', `g1.4<0,1,0>F') 37 38/* UV flag */ 39define(`interleaved_uv', `g2.0<0,1,0>UW') 40 41/* Source transformation parameters */ 42define(`src_du_dx', `g6.0<0,1,0>F') 43define(`src_du_dy', `g6.4<0,1,0>F') 44define(`src_uo', `g6.12<0,1,0>F') 45define(`src_dv_dx', `g6.16<0,1,0>F') 46define(`src_dv_dy', `g6.20<0,1,0>F') 47define(`src_vo', `g6.28<0,1,0>F') 48define(`src_dw_dx', `g7.0<0,1,0>F') 49define(`src_dw_dy', `g7.4<0,1,0>F') 50define(`src_wo', `g7.12<0,1,0>F') 51 52define(`mask_du_dx', `g8.0<0,1,0>F') 53define(`mask_du_dy', `g8.4<0,1,0>F') 54define(`mask_uo', `g8.12<0,1,0>F') 55define(`mask_dv_dx', `g8.16<0,1,0>F') 56define(`mask_dv_dy', `g8.20<0,1,0>F') 57define(`mask_vo', `g8.28<0,1,0>F') 58define(`mask_dw_dx', `g9.0<0,1,0>F') 59define(`mask_dw_dy', `g9.4<0,1,0>F') 60define(`mask_wo', `g9.12<0,1,0>F') 61 62/* Attribute for snb+ */ 63define(`a0_a_x',`g10.0<0,1,0>F') 64define(`a0_a_y',`g10.16<0,1,0>F') 65 66/* 67 * Local variables. Pairs must be aligned on even reg boundry 68 */ 69 70/* this holds the X dest coordinates */ 71define(`dst_x', `g42') 72define(`dst_x_0', `dst_x') 73define(`dst_x_1', `g43') 74 75/* this holds the Y dest coordinates */ 76define(`dst_y', `g44') 77define(`dst_y_0', `dst_y') 78define(`dst_y_1', `g45') 79 80/* When computing x * dn/dx, use this */ 81define(`temp_x', `g30') 82define(`temp_x_0', `temp_x') 83define(`temp_x_1', `g31') 84 85/* When computing y * dn/dy, use this */ 86define(`temp_y', `g28') 87define(`temp_y_0', temp_y) 88define(`temp_y_1', `g29') 89 90/* when loading x/y, use these to hold them in UW format */ 91define(`temp_x_uw', temp_x) 92define(`temp_y_uw', temp_y) 93 94/* compute source and mask u/v to this pair to send to sampler */ 95define(`src_msg', `m1') 96define(`src_msg_ind',`1') 97define(`src_u', `m2') 98define(`src_v', `m4') 99define(`src_w', `g12') 100define(`src_w_0', `src_w') 101define(`src_w_1', `g13') 102 103define(`mask_msg', `m7') 104define(`mask_msg_ind',`7') 105define(`mask_u', `m8') 106define(`mask_v', `m10') 107define(`mask_w', `src_w') 108define(`mask_w_0', `src_w_0') 109define(`mask_w_1', `src_w_1') 110 111/* sample src to these registers */ 112define(`src_sample_base', `g14') 113 114define(`src_sample_r', `g14') 115define(`src_sample_r_01', `g14') 116define(`src_sample_r_23', `g15') 117 118define(`src_sample_g', `g16') 119define(`src_sample_g_01', `g16') 120define(`src_sample_g_23', `g17') 121 122define(`src_sample_b', `g18') 123define(`src_sample_b_01', `g18') 124define(`src_sample_b_23', `g19') 125 126define(`src_sample_a', `g20') 127define(`src_sample_a_01', `g20') 128define(`src_sample_a_23', `g21') 129 130/* sample mask to these registers */ 131define(`mask_sample_base', `g22') 132 133define(`mask_sample_r', `g22') 134define(`mask_sample_r_01', `g22') 135define(`mask_sample_r_23', `g23') 136 137define(`mask_sample_g', `g24') 138define(`mask_sample_g_01', `g24') 139define(`mask_sample_g_23', `g25') 140 141define(`mask_sample_b', `g26') 142define(`mask_sample_b_01', `g26') 143define(`mask_sample_b_23', `g27') 144 145define(`mask_sample_a', `g28') 146define(`mask_sample_a_01', `g28') 147define(`mask_sample_a_23', `g29') 148 149/* Color Balance to these registers */ 150define(`color_balance_base', `g32') 151 152define(`color_balance_r', `g32') 153define(`color_balance_r_01', `g32') 154define(`color_balance_r_23', `g33') 155 156define(`color_balance_g', `g34') 157define(`color_balance_g_01', `g34') 158define(`color_balance_g_23', `g35') 159 160define(`color_balance_b', `g36') 161define(`color_balance_b_01', `g37') 162define(`color_balance_b_23', `g37') 163 164define(`color_balance_a', `g38') 165define(`color_balance_a_01', `g39') 166define(`color_balance_a_23', `g39') 167 168/* data port SIMD16 send registers */ 169 170define(`data_port_msg_0', `m0') 171define(`data_port_msg_0_ind', `0') 172define(`data_port_msg_1', `m1') 173define(`data_port_r_01', `m2') 174define(`data_port_g_01', `m3') 175define(`data_port_b_01', `m4') 176define(`data_port_a_01', `m5') 177 178define(`data_port_r_23', `m6') 179define(`data_port_g_23', `m7') 180define(`data_port_b_23', `m8') 181define(`data_port_a_23', `m9') 182 183