1 /*
2 * Copyright (c) 2015-2021, Intel Corporation
3 *
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_vebox_g12_X.cpp
24 //! \brief Constructs vebox commands on Gen12-based platforms
25 //! \details Each client facing function both creates a HW command and adds
26 //! that command to a command or batch buffer.
27 //!
28
29 #include "mhw_vebox_g12_X.h"
30 #include "mos_solo_generic.h"
31 #include "media_user_settings_mgr_g12.h"
32 #include "mhw_mi_g12_X.h"
33 #include "hal_oca_interface.h"
34
35
36 // H2S Manual Mode Coef
37 static const uint16_t g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Input_g12[HDR_OETF_1DLUT_POINT_NUMBER] =
38 {
39 0, 257, 514, 771, 1028, 1285, 1542, 1799, 2056, 2313, 2570, 2827, 3084, 3341, 3598, 3855,
40 4112, 4369, 4626, 4883, 5140, 5397, 5654, 5911, 6168, 6425, 6682, 6939, 7196, 7453, 7710, 7967,
41 8224, 8481, 8738, 8995, 9252, 9509, 9766, 10023, 10280, 10537, 10794, 11051, 11308, 11565, 11822, 12079,
42 12336, 12593, 12850, 13107, 13364, 13621, 13878, 14135, 14392, 14649, 14906, 15163, 15420, 15677, 15934, 16191,
43 16448, 16705, 16962, 17219, 17476, 17733, 17990, 18247, 18504, 18761, 19018, 19275, 19532, 19789, 20046, 20303,
44 20560, 20817, 21074, 21331, 21588, 21845, 22102, 22359, 22616, 22873, 23130, 23387, 23644, 23901, 24158, 24415,
45 24672, 24929, 25186, 25443, 25700, 25957, 26214, 26471, 26728, 26985, 27242, 27499, 27756, 28013, 28270, 28527,
46 28784, 29041, 29298, 29555, 29812, 30069, 30326, 30583, 30840, 31097, 31354, 31611, 31868, 32125, 32382, 32639,
47 32896, 33153, 33410, 33667, 33924, 34181, 34438, 34695, 34952, 35209, 35466, 35723, 35980, 36237, 36494, 36751,
48 37008, 37265, 37522, 37779, 38036, 38293, 38550, 38807, 39064, 39321, 39578, 39835, 40092, 40349, 40606, 40863,
49 41120, 41377, 41634, 41891, 42148, 42405, 42662, 42919, 43176, 43433, 43690, 43947, 44204, 44461, 44718, 44975,
50 45232, 45489, 45746, 46003, 46260, 46517, 46774, 47031, 47288, 47545, 47802, 48059, 48316, 48573, 48830, 49087,
51 49344, 49601, 49858, 50115, 50372, 50629, 50886, 51143, 51400, 51657, 51914, 52171, 52428, 52685, 52942, 53199,
52 53456, 53713, 53970, 54227, 54484, 54741, 54998, 55255, 55512, 55769, 56026, 56283, 56540, 56797, 57054, 57311,
53 57568, 57825, 58082, 58339, 58596, 58853, 59110, 59367, 59624, 59881, 60138, 60395, 60652, 60909, 61166, 61423,
54 61680, 61937, 62194, 62451, 62708, 62965, 63222, 63479, 63736, 63993, 64250, 64507, 64764, 65021, 65278, 65535
55 };
56
57 static const uint16_t g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output_g12[HDR_OETF_1DLUT_POINT_NUMBER] =
58 {
59 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
60 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4,
61 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 11, 11, 12,
62 13, 14, 15, 16, 17, 18, 19, 20, 22, 23, 24, 26, 27, 29, 31, 32,
63 34, 36, 38, 40, 43, 45, 47, 50, 52, 55, 58, 61, 64, 67, 71, 74,
64 78, 82, 86, 90, 95, 99, 104, 109, 114, 119, 125, 131, 137, 143, 150, 157,
65 164, 171, 179, 187, 195, 204, 213, 222, 232, 242, 252, 263, 274, 286, 298, 311,
66 324, 338, 352, 367, 382, 398, 414, 431, 449, 467, 486, 506, 527, 548, 570, 593,
67 617, 641, 667, 693, 721, 749, 779, 809, 841, 874, 908, 944, 980, 1018, 1058, 1099,
68 1141, 1185, 1231, 1278, 1327, 1377, 1430, 1484, 1541, 1599, 1660, 1722, 1787, 1855, 1925, 1997,
69 2072, 2150, 2230, 2314, 2400, 2490, 2583, 2679, 2778, 2882, 2989, 3099, 3214, 3333, 3457, 3584,
70 3717, 3854, 3996, 4143, 4296, 4454, 4618, 4787, 4963, 5146, 5335, 5530, 5733, 5943, 6161, 6387,
71 6621, 6863, 7115, 7375, 7645, 7925, 8215, 8515, 8827, 9150, 9485, 9832, 10192, 10565, 10952, 11353,
72 11769, 12200, 12647, 13110, 13591, 14089, 14606, 15142, 15698, 16275, 16873, 17494, 18138, 18805, 19498, 20217,
73 20963, 21736, 22539, 23372, 24237, 25134, 26066, 27032, 28036, 29077, 30158, 31281, 32446, 33656, 34912, 36217,
74 37572, 38979, 40441, 41959, 43536, 45174, 46876, 48645, 50482, 52392, 54376, 56438, 58582, 60810, 63127, 65535
75 };
76
77 static const uint16_t g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[HDR_OETF_1DLUT_POINT_NUMBER] =
78 {
79 0, 257, 514, 771, 1028, 1285, 1542, 1799, 2056, 2313, 2570, 2827, 3084, 3341, 3598, 3855,
80 4112, 4369, 4626, 4883, 5140, 5397, 5654, 5911, 6168, 6425, 6682, 6939, 7196, 7453, 7710, 7967,
81 8224, 8481, 8738, 8995, 9252, 9509, 9766, 10023, 10280, 10537, 10794, 11051, 11308, 11565, 11822, 12079,
82 12336, 12593, 12850, 13107, 13364, 13621, 13878, 14135, 14392, 14649, 14906, 15163, 15420, 15677, 15934, 16191,
83 16448, 16705, 16962, 17219, 17476, 17733, 17990, 18247, 18504, 18761, 19018, 19275, 19532, 19789, 20046, 20303,
84 20560, 20817, 21074, 21331, 21588, 21845, 22102, 22359, 22616, 22873, 23130, 23387, 23644, 23901, 24158, 24415,
85 24672, 24929, 25186, 25443, 25700, 25957, 26214, 26471, 26728, 26985, 27242, 27499, 27756, 28013, 28270, 28527,
86 28784, 29041, 29298, 29555, 29812, 30069, 30326, 30583, 30840, 31097, 31354, 31611, 31868, 32125, 32382, 32639,
87 32896, 33153, 33410, 33667, 33924, 34181, 34438, 34695, 34952, 35209, 35466, 35723, 35980, 36237, 36494, 36751,
88 37008, 37265, 37522, 37779, 38036, 38293, 38550, 38807, 39064, 39321, 39578, 39835, 40092, 40349, 40606, 40863,
89 41120, 41377, 41634, 41891, 42148, 42405, 42662, 42919, 43176, 43433, 43690, 43947, 44204, 44461, 44718, 44975,
90 45232, 45489, 45746, 46003, 46260, 46517, 46774, 47031, 47288, 47545, 47802, 48059, 48316, 48573, 48830, 49087,
91 49344, 49601, 49858, 50115, 50372, 50629, 50886, 51143, 51400, 51657, 51914, 52171, 52428, 52685, 52942, 53199,
92 53456, 53713, 53970, 54227, 54484, 54741, 54998, 55255, 55512, 55769, 56026, 56283, 56540, 56797, 57054, 57311,
93 57568, 57825, 58082, 58339, 58596, 58853, 59110, 59367, 59624, 59881, 60138, 60395, 60652, 60909, 61166, 61423,
94 61680, 61937, 62194, 62451, 62708, 62965, 63222, 63479, 63736, 63993, 64250, 64507, 64764, 65021, 65278, 65535
95 };
96
97 static const uint16_t g_Hdr_ColorCorrect_OETF_Rec709_Output_g12[HDR_OETF_1DLUT_POINT_NUMBER] =
98 {
99 0, 1157, 2313, 3469, 4626, 5788, 6838, 7795, 8680, 9505, 10282, 11017, 11716, 12383, 13023, 13639,
100 14232, 14805, 15359, 15898, 16420, 16929, 17424, 17907, 18379, 18840, 19291, 19733, 20165, 20589, 21006, 21414,
101 21816, 22211, 22599, 22981, 23357, 23727, 24092, 24451, 24806, 25155, 25500, 25841, 26177, 26509, 26837, 27161,
102 27481, 27798, 28111, 28421, 28727, 29030, 29330, 29627, 29921, 30213, 30501, 30786, 31069, 31350, 31628, 31903,
103 32176, 32447, 32715, 32982, 33246, 33507, 33767, 34025, 34281, 34535, 34787, 35037, 35285, 35531, 35776, 36019,
104 36260, 36500, 36738, 36974, 37209, 37443, 37674, 37905, 38134, 38361, 38587, 38812, 39035, 39257, 39478, 39697,
105 39915, 40132, 40348, 40562, 40776, 40988, 41199, 41409, 41617, 41825, 42031, 42237, 42441, 42645, 42847, 43048,
106 43249, 43448, 43646, 43844, 44040, 44236, 44430, 44624, 44817, 45009, 45200, 45390, 45580, 45768, 45956, 46143,
107 46329, 46514, 46699, 46882, 47065, 47248, 47429, 47610, 47790, 47969, 48147, 48325, 48502, 48679, 48854, 49029,
108 49204, 49378, 49551, 49723, 49895, 50066, 50236, 50406, 50575, 50744, 50912, 51080, 51246, 51413, 51578, 51743,
109 51908, 52072, 52235, 52398, 52560, 52722, 52883, 53044, 53204, 53364, 53523, 53682, 53840, 53997, 54154, 54311,
110 54467, 54623, 54778, 54932, 55086, 55240, 55393, 55546, 55699, 55850, 56002, 56153, 56303, 56453, 56603, 56752,
111 56901, 57049, 57197, 57345, 57492, 57639, 57785, 57931, 58076, 58221, 58366, 58510, 58654, 58798, 58941, 59083,
112 59226, 59368, 59509, 59651, 59792, 59932, 60072, 60212, 60351, 60490, 60629, 60768, 60906, 61043, 61181, 61318,
113 61454, 61591, 61727, 61862, 61998, 62133, 62267, 62402, 62536, 62669, 62803, 62936, 63069, 63201, 63333, 63465,
114 63597, 63728, 63859, 63990, 64120, 64250, 64380, 64509, 64638, 64767, 64896, 65024, 65152, 65280, 65408, 65535
115 };
116
117 const int32_t g_Vebox_BT2020_Inverse_Pixel_Value_g12[256] =
118 {
119 0x0000, 0x14bc, 0x15a8, 0x1694, 0x1780, 0x1870, 0x195c, 0x1a48, 0x1b34, 0x1c24, 0x1d10, 0x1dfc, 0x1eec, 0x1fd8, 0x20c4, 0x21b0,
120 0x22a0, 0x238c, 0x2478, 0x2568, 0x2654, 0x2740, 0x282c, 0x291c, 0x2a08, 0x2af4, 0x2be0, 0x2cd0, 0x2dbc, 0x2ea8, 0x2f98, 0x3084,
121 0x3170, 0x325c, 0x334c, 0x3438, 0x3524, 0x3614, 0x3700, 0x37ec, 0x38d8, 0x39c8, 0x3ab4, 0x3ba0, 0x3c8c, 0x3d7c, 0x3e68, 0x3f54,
122 0x4044, 0x4130, 0x421c, 0x4308, 0x43f8, 0x44e4, 0x45d0, 0x46c0, 0x47ac, 0x4898, 0x4984, 0x4a74, 0x4b60, 0x4c4c, 0x4d38, 0x4e28,
123 0x4f14, 0x5000, 0x50f0, 0x51dc, 0x52c8, 0x53b4, 0x54a4, 0x5590, 0x567c, 0x576c, 0x5858, 0x5944, 0x5a30, 0x5b20, 0x5c0c, 0x5cf8,
124 0x5de8, 0x5ed4, 0x5fc0, 0x60ac, 0x619c, 0x6288, 0x6374, 0x6460, 0x6550, 0x663c, 0x6728, 0x6818, 0x6904, 0x69f0, 0x6adc, 0x6bcc,
125 0x6cb8, 0x6da4, 0x6e94, 0x6f80, 0x706c, 0x7158, 0x7248, 0x7334, 0x7420, 0x750c, 0x75fc, 0x76e8, 0x77d4, 0x78c4, 0x79b0, 0x7a9c,
126 0x7b88, 0x7c78, 0x7d64, 0x7e50, 0x7f40, 0x802c, 0x8118, 0x8204, 0x82f4, 0x83e0, 0x84cc, 0x85b8, 0x86a8, 0x8794, 0x8880, 0x8970,
127 0x8a5c, 0x8b48, 0x8c34, 0x8d24, 0x8e10, 0x8efc, 0x8fec, 0x90d8, 0x91c4, 0x92b0, 0x93a0, 0x948c, 0x9578, 0x9664, 0x9754, 0x9840,
128 0x992c, 0x9a1c, 0x9b08, 0x9bf4, 0x9ce0, 0x9dd0, 0x9ebc, 0x9fa8, 0xa098, 0xa184, 0xa270, 0xa35c, 0xa44c, 0xa538, 0xa624, 0xa714,
129 0xa800, 0xa8ec, 0xa9d8, 0xaac8, 0xabb4, 0xaca0, 0xad8c, 0xae7c, 0xaf68, 0xb054, 0xb144, 0xb230, 0xb31c, 0xb408, 0xb4f8, 0xb5e4,
130 0xb6d0, 0xb7c0, 0xb8ac, 0xb998, 0xba84, 0xbb74, 0xbc60, 0xbd4c, 0xbe38, 0xbf28, 0xc014, 0xc100, 0xc1f0, 0xc2dc, 0xc3c8, 0xc4b4,
131 0xc5a4, 0xc690, 0xc77c, 0xc86c, 0xc958, 0xca44, 0xcb30, 0xcc20, 0xcd0c, 0xcdf8, 0xcee4, 0xcfd4, 0xd0c0, 0xd1ac, 0xd29c, 0xd388,
132 0xd474, 0xd560, 0xd650, 0xd73c, 0xd828, 0xd918, 0xda04, 0xdaf0, 0xdbdc, 0xdccc, 0xddb8, 0xdea4, 0xdf94, 0xe080, 0xe16c, 0xe258,
133 0xe348, 0xe434, 0xe520, 0xe60c, 0xe6fc, 0xe7e8, 0xe8d4, 0xe9c4, 0xeab0, 0xeb9c, 0xec88, 0xed78, 0xee64, 0xef50, 0xf040, 0xf12c,
134 0xf218, 0xf304, 0xf3f4, 0xf4e0, 0xf5cc, 0xf6b8, 0xf7a8, 0xf894, 0xf980, 0xfa70, 0xfb5c, 0xfc48, 0xfd34, 0xfe24, 0xff10, 0xffff
135 };
136
137 const int32_t g_Vebox_BT2020_Forward_Pixel_Value_g12[256] =
138 {
139 0x0000, 0x049c, 0x0598, 0x0694, 0x0794, 0x0890, 0x098c, 0x0a8c, 0x0b88, 0x0c84, 0x0d84, 0x0e80, 0x0f7c, 0x107c, 0x1178, 0x1274,
140 0x1374, 0x1470, 0x156c, 0x166c, 0x1768, 0x1864, 0x1964, 0x1a60, 0x1b5c, 0x1c5c, 0x1d58, 0x1e54, 0x1f54, 0x2050, 0x214c, 0x224c,
141 0x2348, 0x2444, 0x2544, 0x2640, 0x273c, 0x283c, 0x2938, 0x2a34, 0x2b34, 0x2c30, 0x2d30, 0x2e2c, 0x2f28, 0x3028, 0x3124, 0x3220,
142 0x3320, 0x341c, 0x3518, 0x3618, 0x3714, 0x3810, 0x3910, 0x3a0c, 0x3b08, 0x3c08, 0x3d04, 0x3e00, 0x3f00, 0x3ffc, 0x40f8, 0x41f8,
143 0x42f4, 0x43f0, 0x44f0, 0x45ec, 0x46e8, 0x47e8, 0x48e4, 0x49e0, 0x4ae0, 0x4bdc, 0x4cd8, 0x4dd8, 0x4ed4, 0x4fd0, 0x50d0, 0x51cc,
144 0x52c8, 0x53c8, 0x54c4, 0x55c4, 0x56c0, 0x57bc, 0x58bc, 0x59b8, 0x5ab4, 0x5bb4, 0x5cb0, 0x5dac, 0x5eac, 0x5fa8, 0x60a4, 0x61a4,
145 0x62a0, 0x639c, 0x649c, 0x6598, 0x6694, 0x6794, 0x6890, 0x698c, 0x6a8c, 0x6b88, 0x6c84, 0x6d84, 0x6e80, 0x6f7c, 0x707c, 0x7178,
146 0x7274, 0x7374, 0x7470, 0x756c, 0x766c, 0x7768, 0x7864, 0x7964, 0x7a60, 0x7b5c, 0x7c5c, 0x7d58, 0x7e58, 0x7f54, 0x8050, 0x8150,
147 0x824c, 0x8348, 0x8448, 0x8544, 0x8640, 0x8740, 0x883c, 0x8938, 0x8a38, 0x8b34, 0x8c30, 0x8d30, 0x8e2c, 0x8f28, 0x9028, 0x9124,
148 0x9220, 0x9320, 0x941c, 0x9518, 0x9618, 0x9714, 0x9810, 0x9910, 0x9a0c, 0x9b08, 0x9c08, 0x9d04, 0x9e00, 0x9f00, 0x9ffc, 0xa0f8,
149 0xa1f8, 0xa2f4, 0xa3f0, 0xa4f0, 0xa5ec, 0xa6ec, 0xa7e8, 0xa8e4, 0xa9e4, 0xaae0, 0xabdc, 0xacdc, 0xadd8, 0xaed4, 0xafd4, 0xb0d0,
150 0xb1cc, 0xb2cc, 0xb3c8, 0xb4c4, 0xb5c4, 0xb6c0, 0xb7bc, 0xb8bc, 0xb9b8, 0xbab4, 0xbbb4, 0xbcb0, 0xbdac, 0xbeac, 0xbfa8, 0xc0a4,
151 0xc1a4, 0xc2a0, 0xc39c, 0xc49c, 0xc598, 0xc694, 0xc794, 0xc890, 0xc98c, 0xca8c, 0xcb88, 0xcc84, 0xcd84, 0xce80, 0xcf80, 0xd07c,
152 0xd178, 0xd278, 0xd374, 0xd470, 0xd570, 0xd66c, 0xd768, 0xd868, 0xd964, 0xda60, 0xdb60, 0xdc5c, 0xdd58, 0xde58, 0xdf54, 0xe050,
153 0xe150, 0xe24c, 0xe348, 0xe448, 0xe544, 0xe640, 0xe740, 0xe83c, 0xe938, 0xea38, 0xeb34, 0xec30, 0xed30, 0xee2c, 0xef28, 0xf028,
154 0xf124, 0xf220, 0xf320, 0xf41c, 0xf518, 0xf618, 0xf714, 0xf814, 0xf910, 0xfa0c, 0xfb0c, 0xfc08, 0xfd04, 0xfe04, 0xff00, 0xffff
155 };
156 const int32_t g_Vebox_BT2020_Inverse_Gamma_LUT_g12[256] =
157 {
158 0x0000, 0x049c, 0x04cc, 0x0503, 0x053a, 0x0574, 0x05ae, 0x05e9, 0x0626, 0x0665, 0x06a5, 0x06e5, 0x0729, 0x076c, 0x07b1, 0x07f7,
159 0x083f, 0x0888, 0x08d2, 0x091f, 0x096c, 0x09bb, 0x0a0a, 0x0a5d, 0x0aaf, 0x0b03, 0x0b58, 0x0bb0, 0x0c09, 0x0c62, 0x0cbf, 0x0d1b,
160 0x0d79, 0x0dd8, 0x0e3a, 0x0e9c, 0x0f00, 0x0f66, 0x0fcd, 0x1035, 0x109e, 0x110b, 0x1177, 0x11e5, 0x1254, 0x12c6, 0x1339, 0x13ac,
161 0x1423, 0x149a, 0x1512, 0x158c, 0x1609, 0x1685, 0x1704, 0x1785, 0x1806, 0x1889, 0x190d, 0x1995, 0x1a1c, 0x1aa5, 0x1b2f, 0x1bbe,
162 0x1c4b, 0x1cda, 0x1d6d, 0x1dff, 0x1e92, 0x1f27, 0x1fc0, 0x2059, 0x20f2, 0x2190, 0x222d, 0x22cc, 0x236c, 0x2410, 0x24b3, 0x2558,
163 0x2601, 0x26a9, 0x2752, 0x27fe, 0x28ad, 0x295b, 0x2a0b, 0x2abd, 0x2b73, 0x2c28, 0x2cde, 0x2d99, 0x2e53, 0x2f0e, 0x2fcb, 0x308c,
164 0x314c, 0x320e, 0x32d5, 0x339a, 0x3460, 0x3528, 0x35f6, 0x36c1, 0x378e, 0x385d, 0x3931, 0x3a03, 0x3ad7, 0x3bb0, 0x3c87, 0x3d60,
165 0x3e3a, 0x3f1a, 0x3ff8, 0x40d7, 0x41bc, 0x429f, 0x4383, 0x4469, 0x4555, 0x463e, 0x4729, 0x4816, 0x4909, 0x49f9, 0x4aeb, 0x4be3,
166 0x4cd8, 0x4dcf, 0x4ec8, 0x4fc7, 0x50c3, 0x51c1, 0x52c5, 0x53c6, 0x54c9, 0x55ce, 0x56d9, 0x57e1, 0x58eb, 0x59f6, 0x5b08, 0x5c17,
167 0x5d28, 0x5e3f, 0x5f54, 0x606a, 0x6181, 0x62a0, 0x63bb, 0x64d8, 0x65fc, 0x671c, 0x683e, 0x6962, 0x6a8d, 0x6bb5, 0x6cde, 0x6e0e,
168 0x6f3b, 0x706a, 0x719a, 0x72d1, 0x7405, 0x753b, 0x7672, 0x77b1, 0x78ec, 0x7a29, 0x7b6d, 0x7cad, 0x7def, 0x7f33, 0x807e, 0x81c6,
169 0x830f, 0x8460, 0x85ad, 0x86fb, 0x884c, 0x89a4, 0x8af8, 0x8c4e, 0x8da6, 0x8f05, 0x9061, 0x91be, 0x9323, 0x9483, 0x95e6, 0x974a,
170 0x98b7, 0x9a1f, 0x9b89, 0x9cfb, 0x9e68, 0x9fd8, 0xa149, 0xa2c2, 0xa437, 0xa5ae, 0xa726, 0xa8a7, 0xaa23, 0xaba2, 0xad28, 0xaeaa,
171 0xb02d, 0xb1b3, 0xb341, 0xb4ca, 0xb655, 0xb7e9, 0xb977, 0xbb08, 0xbc9b, 0xbe36, 0xbfcc, 0xc164, 0xc305, 0xc4a1, 0xc63e, 0xc7de,
172 0xc986, 0xcb2a, 0xcccf, 0xce76, 0xd026, 0xd1d1, 0xd37e, 0xd533, 0xd6e4, 0xd896, 0xda4a, 0xdc08, 0xddc0, 0xdf7a, 0xe13d, 0xe2fb,
173 0xe4bb, 0xe67c, 0xe847, 0xea0c, 0xebd4, 0xed9d, 0xef6f, 0xf13c, 0xf30b, 0xf4e4, 0xf6b6, 0xf88b, 0xfa62, 0xfc42, 0xfe1c, 0xffff,
174 };
175
176 const int32_t g_Vebox_BT2020_Forward_Gamma_LUT_g12[256] =
177 {
178 0x0000, 0x14bc, 0x1901, 0x1cd0, 0x2060, 0x23a3, 0x26b2, 0x29a2, 0x2c60, 0x2eff, 0x318a, 0x33f3, 0x3644, 0x388a, 0x3ab5, 0x3cce,
179 0x3ee0, 0x40db, 0x42c9, 0x44b3, 0x4689, 0x4854, 0x4a1c, 0x4bd4, 0x4d82, 0x4f2f, 0x50cd, 0x5264, 0x53f9, 0x5582, 0x5703, 0x5885,
180 0x59fb, 0x5b6a, 0x5cdb, 0x5e40, 0x5fa0, 0x6100, 0x6257, 0x63a9, 0x64fc, 0x6646, 0x6790, 0x68d2, 0x6a10, 0x6b4f, 0x6c86, 0x6db9,
181 0x6eee, 0x701a, 0x7144, 0x726f, 0x7393, 0x74b3, 0x75d6, 0x76f1, 0x780a, 0x7924, 0x7a37, 0x7b48, 0x7c5b, 0x7d68, 0x7e72, 0x7f7e,
182 0x8083, 0x8187, 0x828d, 0x838c, 0x8489, 0x8589, 0x8683, 0x877a, 0x8874, 0x8968, 0x8a5b, 0x8b4f, 0x8c3e, 0x8d2c, 0x8e1b, 0x8f06,
183 0x8fee, 0x90d9, 0x91bf, 0x92a6, 0x9389, 0x946a, 0x954e, 0x962c, 0x970a, 0x97e9, 0x98c3, 0x999d, 0x9a78, 0x9b4f, 0x9c24, 0x9cfc,
184 0x9dcf, 0x9ea1, 0x9f76, 0xa045, 0xa114, 0xa1e5, 0xa2b1, 0xa37d, 0xa44a, 0xa514, 0xa5dc, 0xa6a6, 0xa76d, 0xa832, 0xa8f9, 0xa9bd,
185 0xaa7f, 0xab44, 0xac05, 0xacc4, 0xad86, 0xae44, 0xaf02, 0xafc1, 0xb07c, 0xb137, 0xb1f4, 0xb2ad, 0xb368, 0xb41f, 0xb4d6, 0xb58e,
186 0xb643, 0xb6f8, 0xb7ae, 0xb861, 0xb913, 0xb9c7, 0xba78, 0xbb28, 0xbbda, 0xbc89, 0xbd36, 0xbde6, 0xbe93, 0xbf3f, 0xbfed, 0xc097,
187 0xc141, 0xc1ed, 0xc296, 0xc33e, 0xc3e8, 0xc48f, 0xc535, 0xc5de, 0xc683, 0xc727, 0xc7ce, 0xc871, 0xc914, 0xc9b9, 0xca5a, 0xcafc,
188 0xcb9f, 0xcc3f, 0xccde, 0xcd80, 0xce1e, 0xcebf, 0xcf5c, 0xcff9, 0xd098, 0xd134, 0xd1cf, 0xd26d, 0xd307, 0xd3a1, 0xd43d, 0xd4d6,
189 0xd56e, 0xd609, 0xd6a0, 0xd738, 0xd7d1, 0xd867, 0xd8fd, 0xd994, 0xda29, 0xdabe, 0xdb54, 0xdbe8, 0xdc7b, 0xdd10, 0xdda2, 0xde34,
190 0xdec8, 0xdf59, 0xdfea, 0xe07d, 0xe10c, 0xe19c, 0xe22d, 0xe2bc, 0xe34a, 0xe3db, 0xe468, 0xe4f5, 0xe584, 0xe611, 0xe69f, 0xe72b,
191 0xe7b6, 0xe843, 0xe8ce, 0xe958, 0xe9e4, 0xea6e, 0xeaf7, 0xeb82, 0xec0b, 0xec93, 0xed1d, 0xeda4, 0xee2c, 0xeeb5, 0xef3b, 0xefc1,
192 0xf049, 0xf0cf, 0xf154, 0xf1db, 0xf25f, 0xf2e4, 0xf36a, 0xf3ed, 0xf471, 0xf4f6, 0xf579, 0xf5fb, 0xf67f, 0xf701, 0xf783, 0xf806,
193 0xf887, 0xf907, 0xf98a, 0xfa0a, 0xfa8a, 0xfb0b, 0xfb8a, 0xfc0b, 0xfc8a, 0xfd08, 0xfd89, 0xfe06, 0xfe84, 0xff03, 0xff80, 0xffff
194 };
195
MhwVeboxInterfaceG12(PMOS_INTERFACE pInputInterface)196 MhwVeboxInterfaceG12::MhwVeboxInterfaceG12(
197 PMOS_INTERFACE pInputInterface)
198 : MhwVeboxInterfaceGeneric(pInputInterface)
199 {
200 MHW_FUNCTION_ENTER;
201 MEDIA_SYSTEM_INFO *pGtSystemInfo;
202
203 m_veboxSettings = g_Vebox_Settings_g12;
204
205 #if (_DEBUG || _RELEASE_INTERNAL)
206 // On G12, HDR state will be used if 1K 1DLUT mapping needed. Only for debug purpose.
207 {
208 MOS_STATUS eRegStatus = MOS_STATUS_SUCCESS;
209 MOS_USER_FEATURE_VALUE_DATA UserFeatureData = {};
210 bool b1K1DLutEnabled = false;
211 eRegStatus = MOS_UserFeature_ReadValue_ID(
212 nullptr,
213 __VPHAL_ENABLE_1K_1DLUT_ID,
214 &UserFeatureData,
215 m_osInterface->pOsContext);
216 if (eRegStatus == MOS_STATUS_SUCCESS)
217 {
218 b1K1DLutEnabled = (UserFeatureData.u32Data > 0) ? true : false;
219 }
220 m_veboxSettings.uiHdrStateSize = b1K1DLutEnabled ? MHW_PAGE_SIZE * 18 : m_veboxSettings.uiHdrStateSize;
221 }
222 #endif
223
224 m_vebox0InUse = false;
225 m_vebox1InUse = false;
226 m_veboxScalabilitySupported = false;
227 m_veboxSplitRatio = 50;
228 memset(&m_chromaParams, 0, sizeof(m_chromaParams));
229 MOS_SecureMemcpy(m_BT2020InvPixelValue, sizeof(uint32_t)* 256, g_Vebox_BT2020_Inverse_Pixel_Value_g12, sizeof(uint32_t)* 256);
230 MOS_SecureMemcpy(m_BT2020FwdPixelValue, sizeof(uint32_t)* 256, g_Vebox_BT2020_Forward_Pixel_Value_g12, sizeof(uint32_t)* 256);
231 MOS_SecureMemcpy(m_BT2020InvGammaLUT, sizeof(uint32_t)* 256, g_Vebox_BT2020_Inverse_Gamma_LUT_g12, sizeof(uint32_t)* 256);
232 MOS_SecureMemcpy(m_BT2020FwdGammaLUT, sizeof(uint32_t)* 256, g_Vebox_BT2020_Forward_Gamma_LUT_g12, sizeof(uint32_t)* 256);
233
234 MOS_ZeroMemory(&m_laceColorCorrection, sizeof(m_laceColorCorrection));
235
236 MHW_CHK_NULL_NO_STATUS_RETURN(pInputInterface);
237 pGtSystemInfo = pInputInterface->pfnGetGtSystemInfo(pInputInterface);
238 MHW_CHK_NULL_NO_STATUS_RETURN(pGtSystemInfo);
239
240 if (pGtSystemInfo->VEBoxInfo.IsValid &&
241 pGtSystemInfo->VEBoxInfo.Instances.Bits.VEBox0Enabled &&
242 pGtSystemInfo->VEBoxInfo.Instances.Bits.VEBox1Enabled)
243 {
244 m_veboxScalabilitySupported = true;
245 }
246
247 #if (_DEBUG || _RELEASE_INTERNAL)
248 MOS_USER_FEATURE_VALUE_DATA UserFeatureData;
249 // read the "Vebox Split Ratio" user feature
250 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
251 MOS_UserFeature_ReadValue_ID(
252 nullptr,
253 __MEDIA_USER_FEATURE_VALUE_VEBOX_SPLIT_RATIO_ID,
254 &UserFeatureData,
255 m_osInterface->pOsContext);
256 m_veboxSplitRatio = UserFeatureData.u32Data;
257 #endif
258 }
259
SetVeboxIecpStateBecsc(mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD * pVeboxIecpState,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,bool bEnableFECSC)260 void MhwVeboxInterfaceG12::SetVeboxIecpStateBecsc(
261 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState,
262 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
263 bool bEnableFECSC)
264 {
265 PMHW_CAPPIPE_PARAMS pCapPipeParams = nullptr;
266 MOS_FORMAT dstFormat;
267
268 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpState);
269 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpParams);
270
271 pCapPipeParams = &pVeboxIecpParams->CapPipeParams;
272 dstFormat = pVeboxIecpParams->dstFormat;
273
274 #define SET_COEFS(_c0, _c1, _c2, _c3, _c4, _c5, _c6, _c7, _c8) \
275 { \
276 pVeboxIecpState->CscState.DW0.C0 = _c0; \
277 pVeboxIecpState->CscState.DW1.C1 = _c1; \
278 pVeboxIecpState->CscState.DW2.C2 = _c2; \
279 pVeboxIecpState->CscState.DW3.C3 = _c3; \
280 pVeboxIecpState->CscState.DW4.C4 = _c4; \
281 pVeboxIecpState->CscState.DW5.C5 = _c5; \
282 pVeboxIecpState->CscState.DW6.C6 = _c6; \
283 pVeboxIecpState->CscState.DW7.C7 = _c7; \
284 pVeboxIecpState->CscState.DW8.C8 = _c8; \
285 }
286
287 #define SET_INPUT_OFFSETS(_in1, _in2, _in3) \
288 { \
289 pVeboxIecpState->CscState.DW9.OffsetIn1 = _in1; \
290 pVeboxIecpState->CscState.DW10.OffsetIn2 = _in2; \
291 pVeboxIecpState->CscState.DW11.OffsetIn3 = _in3; \
292 }
293
294 #define SET_OUTPUT_OFFSETS(_out1, _out2, _out3) \
295 { \
296 pVeboxIecpState->CscState.DW9.OffsetOut1 = _out1; \
297 pVeboxIecpState->CscState.DW10.OffsetOut2 = _out2; \
298 pVeboxIecpState->CscState.DW11.OffsetOut3 = _out3; \
299 }
300
301 MHW_CHK_NULL_NO_STATUS_RETURN(pCapPipeParams);
302 if (pCapPipeParams->bActive)
303 {
304 // Application controlled CSC operation
305 if (pCapPipeParams->BECSCParams.bActive)
306 {
307 pVeboxIecpState->CscState.DW0.TransformEnable = true;
308
309 if (IS_RGB_SWAP(dstFormat))
310 {
311 pVeboxIecpState->CscState.DW0.YuvChannelSwap = true;
312 }
313
314 // Coeff is S2.16, so multiply the floating value by 65536
315 SET_COEFS(
316 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[0][0] * 65536)),
317 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[0][1] * 65536)),
318 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[0][2] * 65536)),
319 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[1][0] * 65536)),
320 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[1][1] * 65536)),
321 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[1][2] * 65536)),
322 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[2][0] * 65536)),
323 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[2][1] * 65536)),
324 ((uint32_t)(pCapPipeParams->BECSCParams.Matrix[2][2] * 65536)));
325 SET_INPUT_OFFSETS(
326 ((uint32_t)pCapPipeParams->BECSCParams.PreOffset[0]),
327 ((uint32_t)pCapPipeParams->BECSCParams.PreOffset[1]),
328 ((uint32_t)pCapPipeParams->BECSCParams.PreOffset[2]));
329 SET_OUTPUT_OFFSETS(
330 ((uint32_t)pCapPipeParams->BECSCParams.PostOffset[0]),
331 ((uint32_t)pCapPipeParams->BECSCParams.PostOffset[1]),
332 ((uint32_t)pCapPipeParams->BECSCParams.PostOffset[2]));
333 }
334 // YUV 4:4:4 CSC to xBGR or xRGB
335 else if ((bEnableFECSC || (pVeboxIecpParams->srcFormat == Format_AYUV)) &&
336 (IS_RGB_FORMAT(dstFormat)))
337 {
338 pVeboxIecpState->CscState.DW0.TransformEnable = true;
339
340 if (IS_RGB_SWAP(dstFormat))
341 {
342 pVeboxIecpState->CscState.DW0.YuvChannelSwap = true;
343 }
344
345 // CSC matrix to convert YUV 4:4:4 to xBGR. e.g. Format_A8B8G8R8. In the
346 // event that dstFormat is xRGB, driver sets R & B channel swapping via
347 // CscState.DW0.YuvChannelSwap so a separate matrix is not needed.
348
349 if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT601)
350 {
351 SET_COEFS(76284, 0, 104595, 76284, MOS_BITFIELD_VALUE((uint32_t)-25689, 19), MOS_BITFIELD_VALUE((uint32_t)-53280, 19), 76284, 132186, 0);
352
353 SET_INPUT_OFFSETS(MOS_BITFIELD_VALUE((uint32_t)-2048, 16),
354 MOS_BITFIELD_VALUE((uint32_t)-16384, 16),
355 MOS_BITFIELD_VALUE((uint32_t)-16384, 16));
356 SET_OUTPUT_OFFSETS(0, 0, 0);
357 }
358 else if (pVeboxIecpParams->ColorSpace == MHW_CSpace_BT709)
359 {
360 SET_COEFS(76284, 0, 117506, 76284, MOS_BITFIELD_VALUE((uint32_t)-13958, 19), MOS_BITFIELD_VALUE((uint32_t)-34930, 19), 76284, 138412, 0);
361
362 SET_INPUT_OFFSETS(MOS_BITFIELD_VALUE((uint32_t)-2048, 16),
363 MOS_BITFIELD_VALUE((uint32_t)-16384, 16),
364 MOS_BITFIELD_VALUE((uint32_t)-16384, 16));
365 SET_OUTPUT_OFFSETS(0, 0, 0);
366 }
367 else
368 {
369 MHW_ASSERT(false);
370 }
371 }
372 }
373 else if (pVeboxIecpParams->bCSCEnable)
374 {
375 pVeboxIecpState->CscState.DW0.TransformEnable = true;
376
377 if (IS_RGB_SWAP(dstFormat))
378 {
379 pVeboxIecpState->CscState.DW0.YuvChannelSwap = true;
380 }
381
382 // Coeff is S2.16, so multiply the floating value by 65536
383 SET_COEFS(
384 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[0] * 65536.0F)),
385 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[1] * 65536.0F)),
386 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[2] * 65536.0F)),
387 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[3] * 65536.0F)),
388 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[4] * 65536.0F)),
389 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[5] * 65536.0F)),
390 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[6] * 65536.0F)),
391 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[7] * 65536.0F)),
392 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscCoeff[8] * 65536.0F)));
393
394 // Offset is S15, but the SW offsets are calculated as 8bits,
395 // so left shift them 7bits to be in the position of MSB
396 SET_INPUT_OFFSETS(
397 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[0] * 128.0F)),
398 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[1] * 128.0F)),
399 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscInOffset[2] * 128.0F)));
400 SET_OUTPUT_OFFSETS(
401 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[0] * 128.0F)),
402 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[1] * 128.0F)),
403 ((uint32_t)MOS_F_ROUND(pVeboxIecpParams->pfCscOutOffset[2] * 128.0F)));
404 }
405
406 pVeboxIecpState->AlphaAoiState.DW0.AlphaFromStateSelect = pVeboxIecpParams->bAlphaEnable;
407
408 if (pVeboxIecpParams->dstFormat == Format_Y416)
409 {
410 pVeboxIecpState->AlphaAoiState.DW0.ColorPipeAlpha = pVeboxIecpParams->wAlphaValue;
411 }
412 else
413 {
414 // Alpha is U16, but the SW alpha is calculated as 8bits,
415 // so left shift it 8bits to be in the position of MSB
416 pVeboxIecpState->AlphaAoiState.DW0.ColorPipeAlpha = pVeboxIecpParams->wAlphaValue * 256;
417 }
418
419 #undef SET_COEFS
420 #undef SET_INPUT_OFFSETS
421 #undef SET_OUTPUT_OFFSETS
422 }
423
SetVeboxSurfaces(PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam,PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam,mhw_vebox_g12_X::VEBOX_SURFACE_STATE_CMD * pVeboxSurfaceState,bool bIsOutputSurface,bool bDIEnable)424 void MhwVeboxInterfaceG12::SetVeboxSurfaces(
425 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,
426 PMHW_VEBOX_SURFACE_PARAMS pDerivedSurfaceParam,
427 PMHW_VEBOX_SURFACE_PARAMS pSkinScoreSurfaceParam,
428 mhw_vebox_g12_X::VEBOX_SURFACE_STATE_CMD *pVeboxSurfaceState,
429 bool bIsOutputSurface,
430 bool bDIEnable)
431 {
432 uint32_t dwFormat;
433 uint32_t dwSurfaceWidth;
434 uint32_t dwSurfaceHeight;
435 uint32_t dwSurfacePitch;
436 bool bHalfPitchForChroma;
437 bool bInterleaveChroma;
438 uint16_t wUXOffset;
439 uint16_t wUYOffset;
440 uint16_t wVXOffset;
441 uint16_t wVYOffset;
442 uint8_t bBayerOffset;
443 uint8_t bBayerStride;
444 uint8_t bBayerInputAlignment;
445
446 mhw_vebox_g12_X::VEBOX_SURFACE_STATE_CMD VeboxSurfaceState;
447
448 MHW_CHK_NULL_NO_STATUS_RETURN(pSurfaceParam);
449 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxSurfaceState);
450
451 // Initialize
452 dwSurfaceWidth = 0;
453 dwSurfaceHeight = 0;
454 dwSurfacePitch = 0;
455 bHalfPitchForChroma = false;
456 bInterleaveChroma = false;
457 wUXOffset = 0;
458 wUYOffset = 0;
459 wVXOffset = 0;
460 wVYOffset = 0;
461 bBayerOffset = 0;
462 bBayerStride = 0;
463 bBayerInputAlignment = 0;
464 *pVeboxSurfaceState = VeboxSurfaceState;
465
466 switch (pSurfaceParam->Format)
467 {
468 case Format_NV12:
469 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR4208;
470 bInterleaveChroma = true;
471 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
472 break;
473
474 case Format_YUYV:
475 case Format_YUY2:
476 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBNORMAL;
477 break;
478
479 case Format_UYVY:
480 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPY;
481 break;
482
483 case Format_AYUV:
484 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED444A8;
485 break;
486
487 case Format_Y416:
488 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44416;
489 break;
490
491 case Format_Y410:
492 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED44410;
493 break;
494
495 case Format_YVYU:
496 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUV;
497 break;
498
499 case Format_VYUY:
500 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_YCRCBSWAPUVY;
501 break;
502
503 case Format_A8B8G8R8:
504 case Format_X8B8G8R8:
505 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
506 break;
507
508 case Format_A16B16G16R16:
509 case Format_A16R16G16B16:
510 case Format_A16B16G16R16F:
511 case Format_A16R16G16B16F:
512 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R16G16B16A16;
513 break;
514
515 case Format_L8:
516 case Format_P8:
517 case Format_Y8:
518 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y8UNORM;
519 break;
520
521 case Format_IRW0:
522 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
523 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE;
524 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
525 break;
526
527 case Format_IRW1:
528 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
529 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED;
530 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
531 break;
532
533 case Format_IRW2:
534 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
535 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED;
536 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
537 break;
538
539 case Format_IRW3:
540 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
541 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE;
542 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_16_BITINPUTATA16_BITSTRIDE;
543 break;
544
545 case Format_IRW4:
546 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
547 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE;
548 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
549 break;
550
551 case Format_IRW5:
552 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
553 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED;
554 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
555 break;
556
557 case Format_IRW6:
558 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
559 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED;
560 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
561 break;
562
563 case Format_IRW7:
564 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_BAYERPATTERN;
565 bBayerOffset = VeboxSurfaceState.BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE;
566 bBayerStride = VeboxSurfaceState.BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE;
567 break;
568
569 case Format_P010:
570 case Format_P016:
571 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42016;
572 bInterleaveChroma = true;
573 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
574 break;
575
576 case Format_A8R8G8B8:
577 case Format_X8R8G8B8:
578 if (bIsOutputSurface)
579 {
580 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_B8G8R8A8UNORM;
581 }
582 else
583 {
584 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB;
585 }
586 break;
587
588 case Format_R10G10B10A2:
589 case Format_B10G10R10A2:
590 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_R10G10B10A2UNORMR10G10B10A2UNORMSRGB;
591 break;
592
593 case Format_Y216:
594 case Format_Y210:
595 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PACKED42216;
596 break;
597
598 case Format_P216:
599 case Format_P210:
600 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_PLANAR42216;
601 wUYOffset = (uint16_t)pSurfaceParam->dwUYoffset;
602 break;
603
604 case Format_Y16S:
605 case Format_Y16U:
606 dwFormat = VeboxSurfaceState.SURFACE_FORMAT_Y16UNORM;
607 break;
608
609 default:
610 MHW_ASSERTMESSAGE("Unsupported format.");
611 goto finish;
612 break;
613 }
614
615 if (!bIsOutputSurface)
616 {
617 // camera pipe will use 10/12/14 for LSB, 0 for MSB. For other pipeline,
618 // dwBitDepth is inherited from pSrc->dwDepth which may not among (0,10,12,14)
619 // For such cases should use MSB as default value.
620 switch (pSurfaceParam->dwBitDepth)
621 {
622 case 10:
623 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_10BITLSBALIGNEDDATA;
624 break;
625
626 case 12:
627 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_12BITLSBALIGNEDDATA;
628 break;
629
630 case 14:
631 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_14BITLSBALIGNEDDATA;
632 break;
633
634 case 0:
635 default:
636 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_MSBALIGNEDDATA;
637 break;
638 }
639 }
640 else
641 {
642 bBayerInputAlignment = VeboxSurfaceState.BAYER_INPUT_ALIGNMENT_MSBALIGNEDDATA;
643 }
644
645 // adjust boundary for vebox
646 VeboxAdjustBoundary(
647 pSurfaceParam,
648 &dwSurfaceWidth,
649 &dwSurfaceHeight,
650 bDIEnable);
651
652 dwSurfacePitch = (pSurfaceParam->TileType == MOS_TILE_LINEAR) ? MOS_ALIGN_CEIL(pSurfaceParam->dwPitch, MHW_VEBOX_LINEAR_PITCH) : pSurfaceParam->dwPitch;
653
654 pVeboxSurfaceState->DW1.SurfaceIdentification = bIsOutputSurface;
655 pVeboxSurfaceState->DW2.Width = dwSurfaceWidth - 1;
656 pVeboxSurfaceState->DW2.Height = dwSurfaceHeight - 1;
657
658 pVeboxSurfaceState->DW3.HalfPitchForChroma = bHalfPitchForChroma;
659 pVeboxSurfaceState->DW3.InterleaveChroma = bInterleaveChroma;
660 pVeboxSurfaceState->DW3.SurfaceFormat = dwFormat;
661 pVeboxSurfaceState->DW3.BayerInputAlignment = bBayerInputAlignment;
662 pVeboxSurfaceState->DW3.BayerPatternOffset = bBayerOffset;
663 pVeboxSurfaceState->DW3.BayerPatternFormat = bBayerStride;
664 pVeboxSurfaceState->DW3.SurfacePitch = dwSurfacePitch - 1;
665 pVeboxSurfaceState->DW3.TiledSurface = (pSurfaceParam->TileType != MOS_TILE_LINEAR) ? true : false;
666 pVeboxSurfaceState->DW3.TileWalk = (pSurfaceParam->TileType == MOS_TILE_Y)
667 ? VeboxSurfaceState.TILE_WALK_TILEWALKYMAJOR
668 : VeboxSurfaceState.TILE_WALK_TILEWALKXMAJOR;
669 pVeboxSurfaceState->DW4.XOffsetForU = wUXOffset;
670 pVeboxSurfaceState->DW4.YOffsetForU = wUYOffset;
671 pVeboxSurfaceState->DW5.XOffsetForV = wVXOffset;
672 pVeboxSurfaceState->DW5.YOffsetForV = wVYOffset;
673
674 // May fix this for stereo surfaces
675 pVeboxSurfaceState->DW6.YOffsetForFrame = pSurfaceParam->dwYoffset;
676 pVeboxSurfaceState->DW6.XOffsetForFrame = 0;
677
678 pVeboxSurfaceState->DW7.DerivedSurfacePitch = pDerivedSurfaceParam->dwPitch - 1;
679 pVeboxSurfaceState->DW8.SurfacePitchForSkinScoreOutputSurfaces = (bIsOutputSurface && pSkinScoreSurfaceParam->bActive) ? (pSkinScoreSurfaceParam->dwPitch - 1) : 0;
680
681 finish:
682 return;
683 }
684
setVeboxPrologCmd(PMHW_MI_INTERFACE mhwMiInterface,PMOS_COMMAND_BUFFER cmdBuffer)685 MOS_STATUS MhwVeboxInterfaceG12::setVeboxPrologCmd(
686 PMHW_MI_INTERFACE mhwMiInterface,
687 PMOS_COMMAND_BUFFER cmdBuffer)
688 {
689 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
690 uint64_t auxTableBaseAddr = 0;
691
692 MHW_RENDERHAL_CHK_NULL(mhwMiInterface);
693 MHW_RENDERHAL_CHK_NULL(cmdBuffer);
694 MHW_RENDERHAL_CHK_NULL(m_osInterface);
695
696 auxTableBaseAddr = m_osInterface->pfnGetAuxTableBaseAddr(m_osInterface);
697
698 if (auxTableBaseAddr)
699 {
700 MHW_MI_LOAD_REGISTER_IMM_PARAMS lriParams;
701 MOS_ZeroMemory(&lriParams, sizeof(MHW_MI_LOAD_REGISTER_IMM_PARAMS));
702
703 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVe0AuxTableBaseLow;
704 lriParams.dwData = (auxTableBaseAddr & 0xffffffff);
705 MHW_RENDERHAL_CHK_STATUS(mhwMiInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
706
707 lriParams.dwRegister = MhwMiInterfaceG12::m_mmioVe0AuxTableBaseHigh;
708 lriParams.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
709 MHW_RENDERHAL_CHK_STATUS(mhwMiInterface->AddMiLoadRegisterImmCmd(cmdBuffer, &lriParams));
710 }
711
712 finish:
713 return eStatus;
714 }
715
VeboxAdjustBoundary(PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,uint32_t * pdwSurfaceWidth,uint32_t * pdwSurfaceHeight,bool bDIEnable)716 MOS_STATUS MhwVeboxInterfaceG12::VeboxAdjustBoundary(
717 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,
718 uint32_t *pdwSurfaceWidth,
719 uint32_t *pdwSurfaceHeight,
720 bool bDIEnable)
721 {
722 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
723
724 MHW_CHK_NULL(pSurfaceParam);
725 MHW_CHK_NULL(pdwSurfaceWidth);
726 MHW_CHK_NULL(pdwSurfaceHeight);
727 MHW_CHK_STATUS(AdjustBoundary(pSurfaceParam, pdwSurfaceWidth, pdwSurfaceHeight, bDIEnable));
728
729 finish:
730 return eStatus;
731 }
732
AddVeboxState(PMOS_COMMAND_BUFFER pCmdBuffer,PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams,bool bCmBuffer)733 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxState(
734 PMOS_COMMAND_BUFFER pCmdBuffer,
735 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams,
736 bool bCmBuffer)
737 {
738 MOS_STATUS eStatus;
739 PMOS_INTERFACE pOsInterface;
740 PMOS_CONTEXT pOsContext = nullptr;
741 PMOS_RESOURCE pVeboxParamResource = nullptr;
742 PMOS_RESOURCE pVeboxHeapResource = nullptr;
743 PMHW_VEBOX_HEAP pVeboxHeap;
744 PMHW_VEBOX_MODE pVeboxMode;
745 PMHW_VEBOX_CHROMA_SAMPLING pChromaSampling;
746 PMHW_VEBOX_3D_LUT pLUT3D;
747 uint32_t uiInstanceBaseAddr = 0;
748 MHW_RESOURCE_PARAMS ResourceParams;
749 MOS_ALLOC_GFXRES_PARAMS AllocParamsForBufferLinear;
750 mhw_vebox_g12_X::VEBOX_STATE_CMD cmd;
751
752 MHW_CHK_NULL(m_osInterface);
753 MHW_CHK_NULL(m_osInterface->pOsContext);
754 MHW_CHK_NULL(pCmdBuffer);
755 MHW_CHK_NULL(pVeboxStateCmdParams);
756
757 // Initialize
758 eStatus = MOS_STATUS_SUCCESS;
759 pOsInterface = m_osInterface;
760 pOsContext = m_osInterface->pOsContext;
761 pVeboxMode = &pVeboxStateCmdParams->VeboxMode;
762 pLUT3D = &pVeboxStateCmdParams->LUT3D;
763 pChromaSampling = &pVeboxStateCmdParams->ChromaSampling;
764
765 if (!pVeboxStateCmdParams->bNoUseVeboxHeap)
766 {
767 MHW_CHK_NULL(m_veboxHeap);
768
769 pVeboxHeap = m_veboxHeap;
770 if (bCmBuffer)
771 {
772 pVeboxParamResource = pVeboxStateCmdParams->pVeboxParamSurf;
773 }
774 else
775 {
776 pVeboxHeapResource = pVeboxStateCmdParams->bUseVeboxHeapKernelResource ? &pVeboxHeap->KernelResource : &pVeboxHeap->DriverResource;
777
778 // Calculate the instance base address
779 uiInstanceBaseAddr = pVeboxHeap->uiInstanceSize * pVeboxHeap->uiCurState;
780 }
781
782 TraceIndirectStateInfo(*pCmdBuffer, *pOsContext, bCmBuffer, pVeboxStateCmdParams->bUseVeboxHeapKernelResource);
783
784 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
785 if (bCmBuffer)
786 {
787 ResourceParams.presResource = pVeboxParamResource;
788 ResourceParams.dwOffset = pVeboxHeap->uiDndiStateOffset;
789 }
790 else
791 {
792 ResourceParams.presResource = pVeboxHeapResource;
793 ResourceParams.dwOffset = pVeboxHeap->uiDndiStateOffset + uiInstanceBaseAddr;
794 }
795 ResourceParams.pdwCmd = & (cmd.DW2.Value);
796 ResourceParams.dwLocationInCmd = 2;
797 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
798
799 MHW_CHK_STATUS(pfnAddResourceToCmd(
800 pOsInterface,
801 pCmdBuffer,
802 &ResourceParams));
803
804 HalOcaInterface::OnIndirectState(*pCmdBuffer, *pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiDndiStateSize);
805
806 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
807 if (bCmBuffer)
808 {
809 ResourceParams.presResource = pVeboxParamResource;
810 ResourceParams.dwOffset = pVeboxHeap->uiIecpStateOffset;
811 }
812 else
813 {
814 ResourceParams.presResource = pVeboxHeapResource;
815 ResourceParams.dwOffset = pVeboxHeap->uiIecpStateOffset + uiInstanceBaseAddr;
816 }
817 ResourceParams.pdwCmd = & (cmd.DW4.Value);
818 ResourceParams.dwLocationInCmd = 4;
819 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
820 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
821
822 MHW_CHK_STATUS(pfnAddResourceToCmd(
823 pOsInterface,
824 pCmdBuffer,
825 &ResourceParams));
826
827 HalOcaInterface::OnIndirectState(*pCmdBuffer, *pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiIecpStateSize);
828
829 // Gamut Expansion, HDR and Forward Gamma Correction are mutually exclusive.
830 if (pVeboxMode && pVeboxMode->Hdr1DLutEnable)
831 {
832 // If HDR is enabled, this points to a buffer containing the HDR state.
833 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
834 if (bCmBuffer)
835 {
836 ResourceParams.presResource = pVeboxParamResource;
837 ResourceParams.dwOffset = pVeboxHeap->uiHdrStateOffset;
838 }
839 else
840 {
841 ResourceParams.presResource = pVeboxHeapResource;
842 ResourceParams.dwOffset = pVeboxHeap->uiHdrStateOffset + uiInstanceBaseAddr;
843 }
844 ResourceParams.pdwCmd = &(cmd.DW6.Value);
845 ResourceParams.dwLocationInCmd = 6;
846 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
847 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
848
849 MHW_CHK_STATUS(pfnAddResourceToCmd(
850 pOsInterface,
851 pCmdBuffer,
852 &ResourceParams));
853
854 HalOcaInterface::OnIndirectState(*pCmdBuffer, *pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiHdrStateSize);
855 }
856 else
857 {
858 // If Gamut Expansion is enabled, this points to a buffer containing the Gamut Expansion Gamma Correction state.
859 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
860 if (bCmBuffer)
861 {
862 ResourceParams.presResource = pVeboxParamResource;
863 ResourceParams.dwOffset = pVeboxHeap->uiGamutStateOffset;
864 }
865 else
866 {
867 ResourceParams.presResource = pVeboxHeapResource;
868 ResourceParams.dwOffset = pVeboxHeap->uiGamutStateOffset + uiInstanceBaseAddr;
869 }
870 ResourceParams.pdwCmd = &(cmd.DW6.Value);
871 ResourceParams.dwLocationInCmd = 6;
872 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
873 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
874
875 MHW_CHK_STATUS(pfnAddResourceToCmd(
876 pOsInterface,
877 pCmdBuffer,
878 &ResourceParams));
879
880 HalOcaInterface::OnIndirectState(*pCmdBuffer, *pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiGamutStateSize);
881 }
882
883 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
884 if (bCmBuffer)
885 {
886 ResourceParams.presResource = pVeboxParamResource;
887 ResourceParams.dwOffset = pVeboxHeap->uiVertexTableOffset;
888 }
889 else
890 {
891 ResourceParams.presResource = pVeboxHeapResource;
892 ResourceParams.dwOffset = pVeboxHeap->uiVertexTableOffset + uiInstanceBaseAddr;
893 }
894 ResourceParams.pdwCmd = & (cmd.DW8.Value);
895 ResourceParams.dwLocationInCmd = 8;
896 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
897 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
898
899 MHW_CHK_STATUS(pfnAddResourceToCmd(
900 pOsInterface,
901 pCmdBuffer,
902 &ResourceParams));
903
904 HalOcaInterface::OnIndirectState(*pCmdBuffer, *pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiVertexTableSize);
905
906 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
907 if (bCmBuffer)
908 {
909 ResourceParams.presResource = pVeboxParamResource;
910 ResourceParams.dwOffset = pVeboxHeap->uiCapturePipeStateOffset;
911 }
912 else
913 {
914 ResourceParams.presResource = pVeboxHeapResource;
915 ResourceParams.dwOffset = pVeboxHeap->uiCapturePipeStateOffset + uiInstanceBaseAddr;
916 }
917
918 ResourceParams.pdwCmd = & (cmd.DW10.Value);
919 ResourceParams.dwLocationInCmd = 10;
920 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
921 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
922
923 MHW_CHK_STATUS(pfnAddResourceToCmd(
924 pOsInterface,
925 pCmdBuffer,
926 &ResourceParams));
927
928 HalOcaInterface::OnIndirectState(*pCmdBuffer, *pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiCapturePipeStateSize);
929
930 if (pVeboxStateCmdParams->pLaceLookUpTables)
931 {
932 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
933 ResourceParams.presResource = pVeboxStateCmdParams->pLaceLookUpTables;
934 ResourceParams.dwOffset = 0;
935 ResourceParams.pdwCmd = & (cmd.DW12.Value);
936 ResourceParams.dwLocationInCmd = 12;
937 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
938 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
939
940 MHW_CHK_STATUS(pfnAddResourceToCmd(
941 pOsInterface,
942 pCmdBuffer,
943 &ResourceParams));
944 }
945
946 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
947 if (bCmBuffer)
948 {
949 ResourceParams.presResource = pVeboxParamResource;
950 ResourceParams.dwOffset = pVeboxHeap->uiGammaCorrectionStateOffset;
951 }
952 else
953 {
954 ResourceParams.presResource = pVeboxHeapResource;
955 ResourceParams.dwOffset = pVeboxHeap->uiGammaCorrectionStateOffset + uiInstanceBaseAddr;
956 }
957 ResourceParams.pdwCmd = & (cmd.DW14_15.Value[0]);
958 ResourceParams.dwLocationInCmd = 14;
959 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
960 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
961
962 MHW_CHK_STATUS(pfnAddResourceToCmd(
963 pOsInterface,
964 pCmdBuffer,
965 &ResourceParams));
966
967 HalOcaInterface::OnIndirectState(*pCmdBuffer, *pOsContext, ResourceParams.presResource, ResourceParams.dwOffset, false, m_veboxSettings.uiGammaCorrectionStateSize);
968
969 if (pVeboxStateCmdParams->pVebox3DLookUpTables)
970 {
971 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
972 ResourceParams.presResource = pVeboxStateCmdParams->pVebox3DLookUpTables;
973 ResourceParams.dwOffset = 0;
974 ResourceParams.pdwCmd = &(cmd.DW16.Value);
975 ResourceParams.dwLocationInCmd = 16;
976 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
977 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
978
979 MHW_CHK_STATUS(pfnAddResourceToCmd(
980 pOsInterface,
981 pCmdBuffer,
982 &ResourceParams));
983 }
984 }
985 else
986 {
987 // Allocate Resource to avoid Page Fault issue since HW will access it
988 if (Mos_ResourceIsNull(&pVeboxStateCmdParams->DummyIecpResource))
989 {
990 MOS_ZeroMemory(&AllocParamsForBufferLinear, sizeof(MOS_ALLOC_GFXRES_PARAMS));
991
992 AllocParamsForBufferLinear.Type = MOS_GFXRES_BUFFER;
993 AllocParamsForBufferLinear.TileType = MOS_TILE_LINEAR;
994 AllocParamsForBufferLinear.Format = Format_Buffer;
995 AllocParamsForBufferLinear.dwBytes = m_veboxSettings.uiIecpStateSize;
996 AllocParamsForBufferLinear.pBufName = "DummyIecpResource";
997
998 MHW_CHK_STATUS(pOsInterface->pfnAllocateResource(
999 pOsInterface,
1000 &AllocParamsForBufferLinear,
1001 &pVeboxStateCmdParams->DummyIecpResource));
1002 }
1003
1004 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1005 ResourceParams.presResource = &pVeboxStateCmdParams->DummyIecpResource;
1006 ResourceParams.dwOffset = 0;
1007 ResourceParams.pdwCmd = &(cmd.DW4.Value);
1008 ResourceParams.dwLocationInCmd = 4;
1009 ResourceParams.HwCommandType = MOS_VEBOX_STATE;
1010 ResourceParams.dwSharedMocsOffset = 1 - ResourceParams.dwLocationInCmd;
1011
1012 MHW_CHK_STATUS(pfnAddResourceToCmd(
1013 pOsInterface,
1014 pCmdBuffer,
1015 &ResourceParams));
1016
1017 HalOcaInterface::OnIndirectState(*pCmdBuffer, *pOsContext, ResourceParams.presResource, 0, true, 0);
1018 }
1019
1020 MHW_CHK_NULL(pVeboxMode);
1021 MHW_CHK_NULL(pLUT3D);
1022 MHW_CHK_NULL(pChromaSampling);
1023
1024 cmd.DW1.ColorGamutExpansionEnable = pVeboxMode->ColorGamutExpansionEnable;
1025 cmd.DW1.ColorGamutCompressionEnable = pVeboxMode->ColorGamutCompressionEnable;
1026 cmd.DW1.GlobalIecpEnable = pVeboxMode->GlobalIECPEnable;
1027 cmd.DW1.DnEnable = pVeboxMode->DNEnable;
1028 cmd.DW1.DiEnable = pVeboxMode->DIEnable;
1029 cmd.DW1.DnDiFirstFrame = pVeboxMode->DNDIFirstFrame;
1030 cmd.DW1.DiOutputFrames = pVeboxMode->DIOutputFrames;
1031 cmd.DW1.DemosaicEnable = pVeboxMode->DemosaicEnable;
1032 cmd.DW1.VignetteEnable = pVeboxMode->VignetteEnable;
1033 cmd.DW1.AlphaPlaneEnable = pVeboxMode->AlphaPlaneEnable;
1034 cmd.DW1.HotPixelFilteringEnable = pVeboxMode->HotPixelFilteringEnable;
1035 cmd.DW1.LaceCorrectionEnable = pVeboxMode->LACECorrectionEnable;
1036 cmd.DW1.DisableEncoderStatistics = pVeboxMode->DisableEncoderStatistics;
1037 cmd.DW1.DisableTemporalDenoiseFilter = pVeboxMode->DisableTemporalDenoiseFilter;
1038 cmd.DW1.SinglePipeEnable = pVeboxMode->SinglePipeIECPEnable;
1039 cmd.DW1.ScalarMode = pVeboxMode->ScalarMode;
1040 cmd.DW1.ForwardGammaCorrectionEnable = pVeboxMode->ForwardGammaCorrectionEnable;
1041 cmd.DW1.HdrEnable = pVeboxMode->Hdr1DLutEnable;
1042 cmd.DW1.Fp16ModeEnable = pVeboxMode->Fp16ModeEnable;
1043 cmd.DW1.StateSurfaceControlBits = (pOsInterface->pfnCachePolicyGetMemoryObject(
1044 MOS_MP_RESOURCE_USAGE_DEFAULT,
1045 pOsInterface->pfnGetGmmClientContext(pOsInterface))).DwordValue;
1046
1047 cmd.DW17.EncDataControlFor3DLUT = 0;
1048
1049 cmd.DW17.ArbitrationPriorityControlForLut3D = pLUT3D->ArbitrationPriorityControl;
1050 // In GmmCachePolicyExt.h, Gen9/Gen10/Gen11/Gen12 has the same definition for MEMORY_OBJECT_CONTROL_STATE.
1051 // In MHW_MEMORY_OBJECT_CONTROL_PARAMS, we only defined Gen9 which intended to use for Gen9 later, so reuse Gen9 index.
1052 cmd.DW17.Lut3DMOCStable = pVeboxStateCmdParams->Vebox3DLookUpTablesSurfCtrl.Gen9.Index;
1053 cmd.DW18.Lut3DEnable = pLUT3D->Lut3dEnable;
1054 cmd.DW18.Lut3DSize = pLUT3D->Lut3dSize;
1055
1056 cmd.DW18.ChromaUpsamplingCoSitedHorizontalOffset = pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset;
1057 cmd.DW18.ChromaUpsamplingCoSitedVerticalOffset = pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset;
1058 cmd.DW18.ChromaDownsamplingCoSitedHorizontalOffset = pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset;
1059 cmd.DW18.ChromaDownsamplingCoSitedVerticalOffset = pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset;
1060 cmd.DW18.BypassChromaUpsampling = pChromaSampling->BypassChromaUpsampling;
1061 cmd.DW18.BypassChromaDownsampling = pChromaSampling->BypassChromaDownsampling;
1062
1063 Mos_AddCommand(pCmdBuffer, &cmd, cmd.byteSize);
1064
1065 finish:
1066 return eStatus;
1067 }
1068
AddVeboxDiIecp(PMOS_COMMAND_BUFFER pCmdBuffer,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)1069 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxDiIecp(
1070 PMOS_COMMAND_BUFFER pCmdBuffer,
1071 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
1072 {
1073 MOS_STATUS eStatus;
1074 PMOS_INTERFACE pOsInterface;
1075 MHW_RESOURCE_PARAMS ResourceParams;
1076
1077 mhw_vebox_g12_X::VEB_DI_IECP_CMD cmd;
1078 MHW_CHK_NULL(m_osInterface);
1079 MHW_CHK_NULL(pCmdBuffer);
1080 MHW_CHK_NULL(pVeboxDiIecpCmdParams);
1081 MHW_ASSERT(MOS_IS_ALIGNED(pVeboxDiIecpCmdParams->dwCurrInputSurfOffset, MHW_PAGE_SIZE)); // offset should be aligned with 4KB
1082 MHW_ASSERT(MOS_IS_ALIGNED(pVeboxDiIecpCmdParams->dwPrevInputSurfOffset, MHW_PAGE_SIZE)); // offset should be aligned with 4KB
1083
1084 // Initialize
1085 eStatus = MOS_STATUS_SUCCESS;
1086 pOsInterface = m_osInterface;
1087
1088 if (pVeboxDiIecpCmdParams->pOsResCurrInput)
1089 {
1090 // For IPU Camera only
1091 #if !EMUL
1092 GMM_RESOURCE_FLAG gmmFlags = {0};
1093 gmmFlags = pVeboxDiIecpCmdParams->pOsResCurrInput->pGmmResInfo->GetResFlags();
1094 if (gmmFlags.Gpu.CameraCapture)
1095 {
1096 pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value = pOsInterface->pfnCachePolicyGetMemoryObject(
1097 MOS_MHW_GMM_RESOURCE_USAGE_CAMERA_CAPTURE,
1098 pOsInterface->pfnGetGmmClientContext(pOsInterface)).DwordValue;
1099 MHW_NORMALMESSAGE(" disable the CameraCapture input caches ");
1100 }
1101 #endif
1102
1103 if (pVeboxDiIecpCmdParams->CurInputSurfMMCState != MOS_MEMCOMP_DISABLED)
1104 {
1105 mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *pSurfCtrlBits;
1106 pSurfCtrlBits = (mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD*)&pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value;
1107 pSurfCtrlBits->DW0.MemoryCompressionEnable = 1;
1108 pSurfCtrlBits->DW0.CompressionType = pSurfCtrlBits->MEMORY_COMPRESSION_TYPE_MEDIA_COMPRESSION_ENABLE;
1109 if (pVeboxDiIecpCmdParams->CurInputSurfMMCState == MOS_MEMCOMP_RC)
1110 {
1111 pSurfCtrlBits->DW0.CompressionType = pSurfCtrlBits->MEMORY_COMPRESSION_TYPE_RENDER_COMPRESSION_ENABLE;
1112 }
1113 switch (pVeboxDiIecpCmdParams->pOsResCurrInput->TileType)
1114 {
1115 case MOS_TILE_YF:
1116 pSurfCtrlBits->DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
1117 break;
1118 case MOS_TILE_YS:
1119 pSurfCtrlBits->DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
1120 break;
1121 default:
1122 pSurfCtrlBits->DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
1123 break;
1124 }
1125 }
1126 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1127 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResCurrInput;
1128 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->dwCurrInputSurfOffset + pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value;
1129 ResourceParams.pdwCmd = & (cmd.DW2.Value);
1130 ResourceParams.dwLocationInCmd = 2;
1131 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1132
1133 MHW_CHK_STATUS(pfnAddResourceToCmd(
1134 pOsInterface,
1135 pCmdBuffer,
1136 &ResourceParams));
1137 }
1138
1139 if (pVeboxDiIecpCmdParams->pOsResPrevInput)
1140 {
1141 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1142 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResPrevInput;
1143 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value + pVeboxDiIecpCmdParams->dwPrevInputSurfOffset;
1144 ResourceParams.pdwCmd = & (cmd.DW4.Value);
1145 ResourceParams.dwLocationInCmd = 4;
1146 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1147
1148 MHW_CHK_STATUS(pfnAddResourceToCmd(
1149 pOsInterface,
1150 pCmdBuffer,
1151 &ResourceParams));
1152 }
1153
1154 if (pVeboxDiIecpCmdParams->pOsResStmmInput)
1155 {
1156 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1157 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResStmmInput;
1158 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value;
1159 ResourceParams.pdwCmd = & (cmd.DW6.Value);
1160 ResourceParams.dwLocationInCmd = 6;
1161 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1162
1163 MHW_CHK_STATUS(pfnAddResourceToCmd(
1164 pOsInterface,
1165 pCmdBuffer,
1166 &ResourceParams));
1167 }
1168
1169 if (pVeboxDiIecpCmdParams->pOsResStmmOutput)
1170 {
1171 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1172 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResStmmOutput;
1173 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value;
1174 ResourceParams.pdwCmd = & (cmd.DW8.Value);
1175 ResourceParams.dwLocationInCmd = 8;
1176 ResourceParams.bIsWritable = true;
1177 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1178
1179 MHW_CHK_STATUS(pfnAddResourceToCmd(
1180 pOsInterface,
1181 pCmdBuffer,
1182 &ResourceParams));
1183 }
1184
1185 if (pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput)
1186 {
1187 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1188 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput;
1189 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value;
1190 ResourceParams.pdwCmd = & (cmd.DW10.Value);
1191 ResourceParams.dwLocationInCmd = 10;
1192 ResourceParams.bIsWritable = true;
1193 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1194
1195 MHW_CHK_STATUS(pfnAddResourceToCmd(
1196 pOsInterface,
1197 pCmdBuffer,
1198 &ResourceParams));
1199 }
1200
1201 if (pVeboxDiIecpCmdParams->pOsResCurrOutput)
1202 {
1203 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1204 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResCurrOutput;
1205 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value + pVeboxDiIecpCmdParams->dwCurrOutputSurfOffset;
1206 ResourceParams.pdwCmd = & (cmd.DW12.Value);
1207 ResourceParams.dwLocationInCmd = 12;
1208 ResourceParams.bIsWritable = true;
1209 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1210
1211 MHW_CHK_STATUS(pfnAddResourceToCmd(
1212 pOsInterface,
1213 pCmdBuffer,
1214 &ResourceParams));
1215 }
1216
1217 if (pVeboxDiIecpCmdParams->pOsResPrevOutput)
1218 {
1219 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1220 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResPrevOutput;
1221 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value;
1222 ResourceParams.pdwCmd = & (cmd.DW14.Value);
1223 ResourceParams.dwLocationInCmd = 14;
1224 ResourceParams.bIsWritable = true;
1225 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1226
1227 MHW_CHK_STATUS(pfnAddResourceToCmd(
1228 pOsInterface,
1229 pCmdBuffer,
1230 &ResourceParams));
1231 }
1232
1233 if (pVeboxDiIecpCmdParams->pOsResStatisticsOutput)
1234 {
1235 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1236 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResStatisticsOutput;
1237 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->StatisticsOutputSurfCtrl.Value;
1238 ResourceParams.pdwCmd = & (cmd.DW16.Value);
1239 ResourceParams.dwLocationInCmd = 16;
1240 ResourceParams.bIsWritable = true;
1241 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1242
1243 MHW_CHK_STATUS(pfnAddResourceToCmd(
1244 pOsInterface,
1245 pCmdBuffer,
1246 &ResourceParams));
1247 }
1248
1249 if (pVeboxDiIecpCmdParams->pOsResAlphaOrVignette)
1250 {
1251 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1252 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResAlphaOrVignette;
1253 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->AlphaOrVignetteSurfCtrl.Value;
1254 ResourceParams.pdwCmd = & (cmd.DW18.Value);
1255 ResourceParams.dwLocationInCmd = 18;
1256 ResourceParams.bIsWritable = true;
1257 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1258
1259 MHW_CHK_STATUS(pfnAddResourceToCmd(
1260 pOsInterface,
1261 pCmdBuffer,
1262 &ResourceParams));
1263 }
1264
1265 if (pVeboxDiIecpCmdParams->pOsResLaceOrAceOrRgbHistogram)
1266 {
1267 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1268 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResLaceOrAceOrRgbHistogram;
1269 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->LaceOrAceOrRgbHistogramSurfCtrl.Value;
1270 ResourceParams.pdwCmd = & (cmd.DW20.Value);
1271 ResourceParams.dwLocationInCmd = 20;
1272 ResourceParams.bIsWritable = true;
1273 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1274
1275 MHW_CHK_STATUS(pfnAddResourceToCmd(
1276 pOsInterface,
1277 pCmdBuffer,
1278 &ResourceParams));
1279 }
1280
1281 if (pVeboxDiIecpCmdParams->pOsResSkinScoreSurface)
1282 {
1283 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
1284 ResourceParams.presResource = pVeboxDiIecpCmdParams->pOsResSkinScoreSurface;
1285 ResourceParams.dwOffset = pVeboxDiIecpCmdParams->SkinScoreSurfaceSurfCtrl.Value;
1286 ResourceParams.pdwCmd = & (cmd.DW22.Value);
1287 ResourceParams.dwLocationInCmd = 22;
1288 ResourceParams.bIsWritable = true;
1289 ResourceParams.HwCommandType = MOS_VEBOX_DI_IECP;
1290
1291 MHW_CHK_STATUS(pfnAddResourceToCmd(
1292 pOsInterface,
1293 pCmdBuffer,
1294 &ResourceParams));
1295 }
1296
1297 if (m_vebox0InUse == false && m_vebox1InUse == false)
1298 {
1299 cmd.DW1.EndingX = pVeboxDiIecpCmdParams->dwEndingX;
1300 cmd.DW1.StartingX = pVeboxDiIecpCmdParams->dwStartingX;
1301 }
1302 else if (m_veboxScalabilitySupported)
1303 {
1304 uint32_t iMediumX;
1305 MHW_ASSERT(pVeboxDiIecpCmdParams->dwEndingX >= 127);
1306
1307 iMediumX = MOS_ALIGN_FLOOR(((pVeboxDiIecpCmdParams->dwEndingX + 1) * m_veboxSplitRatio / 100), 64);
1308 iMediumX = MOS_CLAMP_MIN_MAX(iMediumX, 64, (pVeboxDiIecpCmdParams->dwEndingX - 63));
1309
1310 if (m_vebox0InUse == true &&
1311 m_vebox1InUse == false)
1312 {
1313 cmd.DW1.EndingX = iMediumX - 1;
1314 cmd.DW1.StartingX = pVeboxDiIecpCmdParams->dwStartingX;
1315 }
1316 else if (m_vebox0InUse == false &&
1317 m_vebox1InUse == true)
1318 {
1319 cmd.DW1.EndingX = pVeboxDiIecpCmdParams->dwEndingX;
1320 cmd.DW1.StartingX = iMediumX;
1321 }
1322 else
1323 {
1324 MHW_ASSERTMESSAGE("Unsupported Vebox Scalability Settings");
1325 }
1326 }
1327 else
1328 {
1329 MHW_ASSERTMESSAGE("Unsupported Vebox Scalability Settings");
1330 }
1331
1332 Mos_AddCommand(pCmdBuffer, &cmd, cmd.byteSize);
1333
1334 finish:
1335 return eStatus;
1336 }
1337
AddVeboxGamutState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)1338 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxGamutState(
1339 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
1340 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
1341 {
1342 PMHW_VEBOX_HEAP pVeboxHeap;
1343 uint32_t uiOffset;
1344 uint32_t i;
1345 double dInverseGamma = 0;
1346 double dForwardGamma = 1.0; // init as 1.0 as default to avoid divisor be 0
1347 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1348 uint16_t usGE_Values[256][8] = {0};
1349 bool bEnableCCM = false;
1350
1351 PMHW_1DLUT_PARAMS p1DLutParams = nullptr;
1352 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pIecpState;
1353 mhw_vebox_g12_X::VEBOX_GAMUT_CONTROL_STATE_CMD *pGamutState, gamutCmd;
1354 mhw_vebox_g12_X::Gamut_Expansion_Gamma_Correction_CMD *pVeboxGEGammaCorrection, VeboxGEGammaCorrection;
1355
1356 MHW_CHK_NULL(pVeboxGamutParams);
1357 MHW_CHK_NULL(pVeboxIecpParams);
1358 MHW_CHK_NULL(m_veboxHeap);
1359
1360 pVeboxHeap = m_veboxHeap;
1361 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
1362
1363 pIecpState =
1364 (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1365 pVeboxHeap->uiIecpStateOffset +
1366 uiOffset);
1367 pVeboxGEGammaCorrection =
1368 (mhw_vebox_g12_X::Gamut_Expansion_Gamma_Correction_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1369 pVeboxHeap->uiGamutStateOffset +
1370 uiOffset);
1371
1372 MHW_CHK_NULL(pIecpState);
1373 MHW_CHK_NULL(pVeboxGEGammaCorrection);
1374
1375 // Must initialize VeboxIecpState even if it is not used because GCE
1376 // requires GlobalIECP enable bit to be turned on
1377 if (!pVeboxIecpParams)
1378 {
1379 IecpStateInitialization(pIecpState);
1380 }
1381 pGamutState = &pIecpState->GamutState;
1382 MHW_CHK_NULL(pGamutState);
1383
1384 if (pVeboxGamutParams->GCompMode != MHW_GAMUT_MODE_NONE)
1385 {
1386 if (pVeboxGamutParams->GCompMode == MHW_GAMUT_MODE_BASIC)
1387 {
1388 pGamutState->DW15.Fullrangemappingenable = false;
1389
1390 if (pVeboxGamutParams->GCompBasicMode == gamutCmd.GCC_BASICMODESELECTION_SCALINGFACTOR)
1391 {
1392 pGamutState->DW17.GccBasicmodeselection = gamutCmd.GCC_BASICMODESELECTION_SCALINGFACTOR;
1393 pGamutState->DW17.Basicmodescalingfactor =
1394 pVeboxGamutParams->iBasicModeScalingFactor;
1395 }
1396 }
1397 else if (pVeboxGamutParams->GCompMode == MHW_GAMUT_MODE_ADVANCED)
1398 {
1399 pGamutState->DW15.Fullrangemappingenable = true;
1400 pGamutState->DW15.D1Out = pVeboxGamutParams->iDout;
1401 pGamutState->DW15.DOutDefault = pVeboxGamutParams->iDoutDefault;
1402 pGamutState->DW15.DInDefault = pVeboxGamutParams->iDinDefault;
1403 pGamutState->DW16.D1In = pVeboxGamutParams->iDin;
1404 }
1405 else
1406 {
1407 MHW_ASSERTMESSAGE("Invalid GAMUT MODE");
1408 }
1409
1410 // Set Vertex Table if Gamut Compression is enabled
1411 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::AddVeboxVertexTable(pVeboxGamutParams->ColorSpace);
1412 }
1413
1414 // Initialize the Gamut_Expansion_Gamma_Correction.
1415 *pVeboxGEGammaCorrection = VeboxGEGammaCorrection;
1416 if (pVeboxGamutParams->GExpMode != MHW_GAMUT_MODE_NONE)
1417 {
1418 // Need to convert YUV input to RGB before GE
1419 pIecpState->CscState.DW0.TransformEnable = true;
1420 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1421 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1422 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1423 {
1424 pIecpState->CscState.DW0.C0 = 1192;
1425 pIecpState->CscState.DW1.C1 = MOS_BITFIELD_VALUE((uint32_t)-2, 19);
1426 pIecpState->CscState.DW2.C2 = 1634;
1427 pIecpState->CscState.DW3.C3 = 1192;
1428 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-401, 19);
1429 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-833, 19);
1430 pIecpState->CscState.DW6.C6 = 1192;
1431 pIecpState->CscState.DW7.C7 = 2066;
1432 pIecpState->CscState.DW8.C8 = MOS_BITFIELD_VALUE((uint32_t)-1, 19);
1433 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-64, 16);
1434 pIecpState->CscState.DW9.OffsetOut1 = 0;
1435 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1436 pIecpState->CscState.DW10.OffsetOut2 = 0;
1437 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1438 pIecpState->CscState.DW11.OffsetOut3 = 0;
1439 }
1440 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1441 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1442 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1443 {
1444 pIecpState->CscState.DW0.C0 = 1192;
1445 pIecpState->CscState.DW1.C1 = MOS_BITFIELD_VALUE((uint32_t)-1, 19);
1446 pIecpState->CscState.DW2.C2 = 1835;
1447 pIecpState->CscState.DW3.C3 = 1192;
1448 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-218, 19);
1449 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-537, 19);
1450 pIecpState->CscState.DW6.C6 = 1192;
1451 pIecpState->CscState.DW7.C7 = 2164;
1452 pIecpState->CscState.DW8.C8 = 1;
1453 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-64, 16);
1454 pIecpState->CscState.DW9.OffsetOut1 = 0;
1455 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1456 pIecpState->CscState.DW10.OffsetOut2 = 0;
1457 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-512, 16);
1458 pIecpState->CscState.DW11.OffsetOut3 = 0;
1459 }
1460 else
1461 {
1462 MHW_ASSERTMESSAGE("Unknown primary");
1463 }
1464
1465 if (pVeboxGamutParams->GExpMode == MHW_GAMUT_MODE_BASIC)
1466 {
1467 pGamutState->DW0.GlobalModeEnable = true;
1468 pGamutState->DW1.CmW = 1023;
1469 }
1470 else if (pVeboxGamutParams->GExpMode == MHW_GAMUT_MODE_ADVANCED)
1471 {
1472 pGamutState->DW0.GlobalModeEnable = false;
1473 }
1474 else
1475 {
1476 MHW_ASSERTMESSAGE("Invalid GAMUT MODE");
1477 }
1478
1479 pGamutState->DW1.C0 = pVeboxGamutParams->Matrix[0][0];
1480 pGamutState->DW0.C1 = pVeboxGamutParams->Matrix[0][1];
1481 pGamutState->DW3.C2 = pVeboxGamutParams->Matrix[0][2];
1482 pGamutState->DW2.C3 = pVeboxGamutParams->Matrix[1][0];
1483 pGamutState->DW5.C4 = pVeboxGamutParams->Matrix[1][1];
1484 pGamutState->DW4.C5 = pVeboxGamutParams->Matrix[1][2];
1485 pGamutState->DW7.C6 = pVeboxGamutParams->Matrix[2][0];
1486 pGamutState->DW6.C7 = pVeboxGamutParams->Matrix[2][1];
1487 pGamutState->DW8.C8 = pVeboxGamutParams->Matrix[2][2];
1488 }
1489 else if (pVeboxGamutParams->bGammaCorr)
1490 {
1491 // Need to convert YUV input to RGB before Gamma Correction
1492 pIecpState->CscState.DW0.TransformEnable = true;
1493 if (IS_RGB_SWAP(pVeboxGamutParams->dstFormat))
1494 {
1495 pIecpState->CscState.DW0.YuvChannelSwap = true;
1496 }
1497 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601 ||
1498 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC601 ||
1499 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT601_FullRange)
1500 {
1501 pIecpState->CscState.DW0.C0 = 76309;
1502 pIecpState->CscState.DW1.C1 = 0;
1503 pIecpState->CscState.DW2.C2 = 104597;
1504 pIecpState->CscState.DW3.C3 = 76309;
1505 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-25675, 19);
1506 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-53279, 19);
1507 pIecpState->CscState.DW6.C6 = 76309;
1508 pIecpState->CscState.DW7.C7 = 132201;
1509 pIecpState->CscState.DW8.C8 = 0;
1510 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1511 pIecpState->CscState.DW9.OffsetOut1 = 0;
1512 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1513 pIecpState->CscState.DW10.OffsetOut2 = 0;
1514 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1515 pIecpState->CscState.DW11.OffsetOut3 = 0;
1516 }
1517 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709 ||
1518 pVeboxGamutParams->ColorSpace == MHW_CSpace_xvYCC709 ||
1519 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT709_FullRange)
1520 {
1521 pIecpState->CscState.DW0.C0 = 76309;
1522 pIecpState->CscState.DW1.C1 = 0;
1523 pIecpState->CscState.DW2.C2 = 117489;
1524 pIecpState->CscState.DW3.C3 = 76309;
1525 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-13975, 19);
1526 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-34925, 19);
1527 pIecpState->CscState.DW6.C6 = 76309;
1528 pIecpState->CscState.DW7.C7 = 138438;
1529 pIecpState->CscState.DW8.C8 = 0;
1530 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
1531 pIecpState->CscState.DW9.OffsetOut1 = 0;
1532 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1533 pIecpState->CscState.DW10.OffsetOut2 = 0;
1534 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
1535 pIecpState->CscState.DW11.OffsetOut3 = 0;
1536 }
1537 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020)
1538 {
1539 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1540 }
1541 else
1542 {
1543 MHW_ASSERTMESSAGE("Unknown primary");
1544 }
1545
1546 // CCM is needed for CSC(BT2020->BT709/BT601 or vice versa with Different Gamma).
1547 bEnableCCM = (pVeboxGamutParams->InputGammaValue == pVeboxGamutParams->OutputGammaValue) ? false : true;
1548 pGamutState->DW0.GlobalModeEnable = true;
1549 pGamutState->DW1.CmW = 1023;
1550 if ((pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020) && bEnableCCM)
1551 {
1552 if (pVeboxGamutParams->dstColorSpace == MHW_CSpace_BT709)
1553 {
1554 pGamutState->DW1.C0 = 108190;
1555 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38288, 21);
1556 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4747, 21);
1557 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-7967, 21);
1558 pGamutState->DW5.C4 = 74174;
1559 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-557, 21);
1560 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1198, 21);
1561 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6587, 21);
1562 pGamutState->DW8.C8 = 73321;
1563 }
1564 else
1565 {
1566 pGamutState->DW1.C0 = 116420;
1567 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-45094, 21);
1568 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-5785, 21);
1569 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-10586, 21);
1570 pGamutState->DW5.C4 = 77814;
1571 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-1705, 21);
1572 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1036, 21);
1573 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6284, 21);
1574 pGamutState->DW8.C8 = 72864;
1575 }
1576 }
1577 else
1578 {
1579 pGamutState->DW1.C0 = 65536;
1580 pGamutState->DW0.C1 = 0;
1581 pGamutState->DW3.C2 = 0;
1582 pGamutState->DW2.C3 = 0;
1583 pGamutState->DW5.C4 = 65536;
1584 pGamutState->DW4.C5 = 0;
1585 pGamutState->DW7.C6 = 0;
1586 pGamutState->DW6.C7 = 0;
1587 pGamutState->DW8.C8 = 65536;
1588 pGamutState->DW9.OffsetInR = 0;
1589 pGamutState->DW10.OffsetInG = 0;
1590 pGamutState->DW11.OffsetInB = 0;
1591 pGamutState->DW12.OffsetOutR = 0;
1592 pGamutState->DW13.OffsetOutG = 0;
1593 pGamutState->DW14.OffsetOutB = 0;
1594 }
1595
1596 if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_1P0)
1597 {
1598 dInverseGamma = 1.0;
1599 }
1600 else if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_2P2)
1601 {
1602 dInverseGamma = 2.2;
1603 }
1604 else if (pVeboxGamutParams->InputGammaValue == MHW_GAMMA_2P6)
1605 {
1606 dInverseGamma = 2.6;
1607 }
1608 else
1609 {
1610 MHW_ASSERTMESSAGE("Invalid InputGammaValue");
1611 }
1612
1613 if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_1P0)
1614 {
1615 dForwardGamma = 1.0;
1616 }
1617 else if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_2P2)
1618 {
1619 dForwardGamma = 2.2;
1620 }
1621 else if (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_2P6)
1622 {
1623 dForwardGamma = 2.6;
1624 }
1625 else
1626 {
1627 MHW_ASSERTMESSAGE("Invalid OutputGammaValue");
1628 }
1629
1630 if ((pVeboxGamutParams->InputGammaValue == MHW_GAMMA_1P0) && (pVeboxGamutParams->OutputGammaValue == MHW_GAMMA_1P0))
1631 {
1632 for (i = 0; i < 256; i++)
1633 {
1634 usGE_Values[i][0] = 257 * i;
1635 usGE_Values[i][1] =
1636 usGE_Values[i][2] =
1637 usGE_Values[i][3] = 257 * i;
1638
1639 usGE_Values[i][4] = 257 * i;
1640 usGE_Values[i][5] =
1641 usGE_Values[i][6] =
1642 usGE_Values[i][7] = 257 * i;
1643 }
1644 // Copy two uint16_t to one DW (UNT32).
1645 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1646 }
1647 else
1648 {
1649 for (i = 0; i < 255; i++)
1650 {
1651 usGE_Values[i][0] = 256 * i;
1652 usGE_Values[i][1] =
1653 usGE_Values[i][2] =
1654 usGE_Values[i][3] = (uint16_t)MOS_F_ROUND(pow((double)((double)i / 256), dInverseGamma) * 65536);
1655
1656 usGE_Values[i][4] = 256 * i;
1657 usGE_Values[i][5] =
1658 usGE_Values[i][6] =
1659 usGE_Values[i][7] = (uint16_t)MOS_F_ROUND(pow((double)((double)i / 256), 1 / dForwardGamma) * 65536);
1660 }
1661 // Copy two uint16_t to one DW (UNT32).
1662 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1020, usGE_Values, sizeof(uint16_t) * 8 * 255);
1663 }
1664 }
1665 else if (pVeboxGamutParams->bH2S)
1666 {
1667 VeboxInterface_H2SManualMode(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1668 }
1669 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020 ||
1670 pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange) // BT2020 CSC case
1671 {
1672 if (pVeboxIecpParams->s1DLutParams.bActive)
1673 {
1674 //CCM setting if 1Dlut VEBOX HDR enabled
1675 p1DLutParams = &pVeboxIecpParams->s1DLutParams;
1676
1677 pIecpState->CcmState.DW1.C0 = p1DLutParams->pCCM[0];
1678 pIecpState->CcmState.DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[1], 27);
1679 pIecpState->CcmState.DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[2], 27);
1680 pIecpState->CcmState.DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[3], 27);
1681 pIecpState->CcmState.DW5.C4 = p1DLutParams->pCCM[4];
1682 pIecpState->CcmState.DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[5], 27);
1683 pIecpState->CcmState.DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[6], 27);
1684 pIecpState->CcmState.DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)p1DLutParams->pCCM[7], 27);
1685 pIecpState->CcmState.DW8.C8 = p1DLutParams->pCCM[8];
1686 pIecpState->CcmState.DW9.OffsetInR = p1DLutParams->pCCM[9];
1687 pIecpState->CcmState.DW10.OffsetInG = p1DLutParams->pCCM[10];
1688 pIecpState->CcmState.DW11.OffsetInB = p1DLutParams->pCCM[11];
1689 pIecpState->CcmState.DW12.OffsetOutR = p1DLutParams->pCCM[12];
1690 pIecpState->CcmState.DW13.OffsetOutG = p1DLutParams->pCCM[13];
1691 pIecpState->CcmState.DW14.OffsetOutB = p1DLutParams->pCCM[14];
1692
1693 pGamutState->DW0.GlobalModeEnable = false;
1694 // Still need to set CSC params here
1695 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1696 goto finish;
1697 }
1698
1699 pGamutState->DW0.GlobalModeEnable = true;
1700 pGamutState->DW1.CmW = 1023; // Colorimetric accurate image
1701 if (pVeboxGamutParams->dstColorSpace == MHW_CSpace_BT601)
1702 {
1703 pGamutState->DW1.C0 = 116420;
1704 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-45094, 21);
1705 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-5785, 21);
1706 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-10586, 21);
1707 pGamutState->DW5.C4 = 77814;
1708 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-1705, 21);
1709 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1036, 21);
1710 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6284, 21);
1711 pGamutState->DW8.C8 = 72864;
1712 }
1713 else //BT709, sRGB has same chromaticity CIE 1931
1714 {
1715 pGamutState->DW1.C0 = 108190;
1716 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38288, 21);
1717 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4747, 21);
1718 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-7967, 21);
1719 pGamutState->DW5.C4 = 74174;
1720 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-557, 21);
1721 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1198, 21);
1722 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6587, 21);
1723 pGamutState->DW8.C8 = 73321;
1724 }
1725
1726 for (i = 0; i < 256; i++)
1727 {
1728 usGE_Values[i][0] = (uint16_t)m_BT2020InvPixelValue[i];
1729 usGE_Values[i][1] =
1730 usGE_Values[i][2] =
1731 usGE_Values[i][3] = (uint16_t)m_BT2020InvGammaLUT[i];
1732
1733 usGE_Values[i][4] = (uint16_t)m_BT2020FwdPixelValue[i];
1734 usGE_Values[i][5] =
1735 usGE_Values[i][6] =
1736 usGE_Values[i][7] = (uint16_t)m_BT2020FwdGammaLUT[i];
1737 }
1738 // Copy two UNT16 to one DW(UNT32).
1739 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1740 // Back end CSC setting, need to convert BT2020 YUV input to RGB before GE
1741 VeboxInterface_BT2020YUVToRGB(m_veboxHeap, pVeboxIecpParams, pVeboxGamutParams);
1742 }
1743 else if (pVeboxIecpParams && pVeboxIecpParams->s1DLutParams.bActive)
1744 {
1745 uint16_t in_val = 0, vchan1_y = 0, vchan2_u = 0, vchan3_v = 0;
1746 uint32_t nIndex = 0;
1747 uint16_t* pForwardGamma = (uint16_t*)pVeboxIecpParams->s1DLutParams.p1DLUT;
1748 MHW_CHK_NULL(pForwardGamma);
1749
1750 // Gamut Expansion setting
1751 pGamutState->DW0.GlobalModeEnable = true;
1752 pGamutState->DW1.CmW = 1023;
1753 dInverseGamma = 1.0;
1754
1755 for (uint32_t i = 0; i < pVeboxIecpParams->s1DLutParams.LUTSize; i++)
1756 {
1757 usGE_Values[i][0] = 257 * i;
1758 usGE_Values[i][1] =
1759 usGE_Values[i][2] =
1760 usGE_Values[i][3] = 257 * i;
1761
1762 nIndex = 4 * i;
1763 in_val = pForwardGamma[nIndex];
1764 vchan1_y = pForwardGamma[nIndex + 1];
1765 vchan2_u = pForwardGamma[nIndex + 2];
1766 vchan3_v = pForwardGamma[nIndex + 3];
1767
1768 // ayuv: in_val, vchan1_y, vchan2_u, vchan3_v
1769 usGE_Values[i][4] = (i == 0) ? 0 : ((i == 255) ? 0xffff : in_val);
1770 usGE_Values[i][5] = vchan1_y;
1771 usGE_Values[i][6] = vchan2_u;
1772 usGE_Values[i][7] = vchan3_v;
1773 }
1774 pGamutState->DW1.C0 = 65536;
1775 pGamutState->DW0.C1 = 0;
1776 pGamutState->DW3.C2 = 0;
1777 pGamutState->DW2.C3 = 0;
1778 pGamutState->DW5.C4 = 65536;
1779 pGamutState->DW4.C5 = 0;
1780 pGamutState->DW7.C6 = 0;
1781 pGamutState->DW6.C7 = 0;
1782 pGamutState->DW8.C8 = 65536;
1783 pGamutState->DW9.OffsetInR = 0;
1784 pGamutState->DW10.OffsetInG = 0;
1785 pGamutState->DW11.OffsetInB = 0;
1786 pGamutState->DW12.OffsetOutR = 0;
1787 pGamutState->DW13.OffsetOutG = 0;
1788 pGamutState->DW14.OffsetOutB = 0;
1789 // Copy two uint16_t to one DW (UNT32).
1790 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t) * 1024, usGE_Values, sizeof(uint16_t) * 8 * 256);
1791 }
1792 else
1793 {
1794 MHW_ASSERTMESSAGE("Unknown branch!");
1795 }
1796
1797 finish:
1798 return eStatus;
1799 }
1800
AddVeboxHdrState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)1801 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxHdrState(
1802 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
1803 {
1804 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1805 mhw_vebox_g12_X::VEBOX_HDR_STATE_CMD *pVeboxHdrState = nullptr;
1806 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pIecpState = nullptr;
1807 PMHW_VEBOX_HEAP pVeboxHeap = nullptr;
1808 uint32_t uiOffset = 0;
1809
1810 MHW_CHK_NULL(pVeboxIecpParams);
1811 MHW_CHK_NULL(m_veboxHeap);
1812
1813 pVeboxHeap = m_veboxHeap;
1814 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
1815
1816 pVeboxHdrState =
1817 (mhw_vebox_g12_X::VEBOX_HDR_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1818 pVeboxHeap->uiHdrStateOffset +
1819 uiOffset);
1820
1821 pIecpState =
1822 (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD*)(pVeboxHeap->pLockedDriverResourceMem +
1823 pVeboxHeap->uiIecpStateOffset +
1824 uiOffset);
1825
1826 MHW_CHK_NULL(pVeboxHdrState);
1827 MHW_CHK_NULL(pIecpState);
1828
1829 // Program 1DLUT in Inverse Gamma with 1024 entries / 16bit precision from API level
1830 if (pVeboxIecpParams->s1DLutParams.bActive && (pVeboxIecpParams->s1DLutParams.LUTSize == 1024))
1831 {
1832 // HW provides 4K 1DLUT inverse gamma
1833 mhw_vebox_g12_X::VEBOX_HDR_INV_GAMMA_CORRECTION_STATE_CMD* pInverseGamma = pVeboxHdrState->PRGBCorrectedValue;
1834 uint16_t* p1DLut = (uint16_t*)pVeboxIecpParams->s1DLutParams.p1DLUT;
1835 for (uint32_t i = 0; i < pVeboxIecpParams->s1DLutParams.LUTSize; i++)
1836 {
1837 pInverseGamma[i * 4].DW0.Value = 0;
1838 pInverseGamma[i * 4].DW1.InverseRChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 1] << 16); // 32 bit precision
1839 pInverseGamma[i * 4].DW2.InverseGChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 2] << 16); // 32 bit precision
1840 pInverseGamma[i * 4].DW3.InverseBChannelGammaCorrectionValue = (uint32_t)(p1DLut[4 * i + 3] << 16); // 32 bit precision
1841
1842 pInverseGamma[i * 4 + 1] = pInverseGamma[i * 4];
1843 pInverseGamma[i * 4 + 2] = pInverseGamma[i * 4];
1844 pInverseGamma[i * 4 + 3] = pInverseGamma[i * 4];
1845 }
1846
1847 pVeboxHdrState->DW17440.ToneMappingEnable = false;
1848
1849 // Program Forward Gamma as identity matrix
1850 mhw_vebox_g12_X::VEBOX_HDR_FWD_GAMMA_CORRECTION_STATE_CMD* pForwardGamma = pVeboxHdrState->ForwardGammaLUTvalue;
1851 for (uint32_t i = 0; i < 256; i++)
1852 {
1853 pForwardGamma[i].DW0.PointValueForForwardGammaLut = (uint32_t)((uint64_t)pow(2, 32) - 1) / 255 * i; // 32 bit precision
1854 pForwardGamma[i].DW1.ForwardRChannelGammaCorrectionValue = 257 * i; // 16 bit precision
1855 pForwardGamma[i].DW2.ForwardGChannelGammaCorrectionValue = 257 * i; // 16 bit precision
1856 pForwardGamma[i].DW3.ForwardBChannelGammaCorrectionValue = 257 * i; // 16 bit precision
1857 }
1858 // Program CCM as identity matrix
1859 pIecpState->CcmState.DW0.ColorCorrectionMatrixEnable = true;
1860 pIecpState->CcmState.DW1.C0 = 65536;
1861 pIecpState->CcmState.DW0.C1 = 0;
1862 pIecpState->CcmState.DW3.C2 = 0;
1863 pIecpState->CcmState.DW2.C3 = 0;
1864 pIecpState->CcmState.DW5.C4 = 65536;
1865 pIecpState->CcmState.DW4.C5 = 0;
1866 pIecpState->CcmState.DW7.C6 = 0;
1867 pIecpState->CcmState.DW6.C7 = 0;
1868 pIecpState->CcmState.DW8.C8 = 65536;
1869 pIecpState->CcmState.DW9.OffsetInR = 0;
1870 pIecpState->CcmState.DW10.OffsetInG = 0;
1871 pIecpState->CcmState.DW11.OffsetInB = 0;
1872 pIecpState->CcmState.DW12.OffsetOutR = 0;
1873 pIecpState->CcmState.DW13.OffsetOutG = 0;
1874 pIecpState->CcmState.DW14.OffsetOutB = 0;
1875 }
1876 finish:
1877 return eStatus;
1878 }
1879
FindVeboxGpuNodeToUse(PMHW_VEBOX_GPUNODE_LIMIT pGpuNodeLimit)1880 MOS_STATUS MhwVeboxInterfaceG12::FindVeboxGpuNodeToUse(
1881 PMHW_VEBOX_GPUNODE_LIMIT pGpuNodeLimit)
1882 {
1883 MOS_GPU_NODE VeboxGpuNode = MOS_GPU_NODE_VE;
1884 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1885
1886 MHW_CHK_NULL(pGpuNodeLimit);
1887
1888 // KMD Virtual Engine, use virtual GPU NODE-- MOS_GPU_NODE_VE
1889 pGpuNodeLimit->dwGpuNodeToUse = VeboxGpuNode;
1890
1891 #if !EMUL
1892 #if (_DEBUG || _RELEASE_INTERNAL)
1893 if (m_osInterface != nullptr && m_osInterface->bEnableDbgOvrdInVE && !m_veboxScalabilitySupported)
1894 {
1895 eStatus = MOS_STATUS_INVALID_PARAMETER;
1896 MHW_ASSERTMESSAGE("not support DebugOverride on current OS or Platform.");
1897 goto finish;
1898 }
1899
1900 if ((m_osInterface != nullptr && m_osInterface->bEnableDbgOvrdInVE) ||
1901 Mos_Solo_IsInUse(m_osInterface))
1902 {
1903 MHW_CHK_STATUS(ValidateVeboxScalabilityConfig());
1904 }
1905 #endif
1906
1907 Mos_Solo_CheckNodeLimitation(m_osInterface, &pGpuNodeLimit->dwGpuNodeToUse);
1908 #endif
1909
1910 finish:
1911 return eStatus;
1912 }
1913
AddVeboxDndiState(PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)1914 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxDndiState(
1915 PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)
1916 {
1917 PMHW_VEBOX_HEAP pVeboxHeap = nullptr;
1918 uint32_t uiOffset = 0;
1919 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1920
1921 mhw_vebox_g12_X::VEBOX_DNDI_STATE_CMD *pVeboxDndiState, mVeboxDndiState;
1922
1923 MHW_CHK_NULL(pVeboxDndiParams);
1924 MHW_CHK_NULL(m_veboxHeap);
1925
1926 pVeboxHeap = m_veboxHeap;
1927 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
1928 pVeboxDndiState =
1929 (mhw_vebox_g12_X::VEBOX_DNDI_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
1930 pVeboxHeap->uiDndiStateOffset +
1931 uiOffset);
1932 MHW_CHK_NULL(pVeboxDndiState);
1933 *pVeboxDndiState = mVeboxDndiState;
1934
1935 pVeboxDndiState->DW0.DenoiseMaximumHistory = pVeboxDndiParams->dwDenoiseMaximumHistory;
1936 pVeboxDndiState->DW0.DenoiseStadThreshold = pVeboxDndiParams->dwDenoiseSTADThreshold;
1937 pVeboxDndiState->DW1.DenoiseAsdThreshold = pVeboxDndiParams->dwDenoiseASDThreshold;
1938 pVeboxDndiState->DW1.DenoiseHistoryIncrease = pVeboxDndiParams->dwDenoiseHistoryDelta;
1939 pVeboxDndiState->DW1.DenoiseMovingPixelThreshold = pVeboxDndiParams->dwDenoiseMPThreshold;
1940 pVeboxDndiState->DW2.TemporalDifferenceThreshold = pVeboxDndiParams->dwTDThreshold;
1941 pVeboxDndiState->DW3.LowTemporalDifferenceThreshold = pVeboxDndiParams->dwLTDThreshold;
1942 pVeboxDndiState->DW3.ProgressiveDn = pVeboxDndiParams->bProgressiveDN;
1943 pVeboxDndiState->DW3.HotPixelCountLuma = pVeboxDndiParams->dwHotPixelCount;
1944 pVeboxDndiState->DW4.DenoiseThresholdForSumOfComplexityMeasureLuma = pVeboxDndiParams->dwDenoiseSCMThreshold;
1945 pVeboxDndiState->DW4.HotPixelThresholdLuma = pVeboxDndiParams->dwHotPixelThreshold;
1946 pVeboxDndiState->DW5.ChromaDenoiseStadThreshold = pVeboxDndiParams->dwChromaSTADThreshold;
1947 pVeboxDndiState->DW5.HotPixelCountChromaU = m_chromaParams.dwHotPixelCountChromaU;
1948 pVeboxDndiState->DW5.HotPixelThresholdChromaU = m_chromaParams.dwHotPixelThresholdChromaU;
1949 pVeboxDndiState->DW6.ChromaDenoiseEnable = pVeboxDndiParams->bChromaDNEnable;
1950 pVeboxDndiState->DW6.ChromaTemporalDifferenceThreshold = pVeboxDndiParams->dwChromaTDThreshold;
1951 pVeboxDndiState->DW7.ChromaLowTemporalDifferenceThreshold = pVeboxDndiParams->dwChromaLTDThreshold;
1952 pVeboxDndiState->DW7.HotPixelCountChromaV = m_chromaParams.dwHotPixelCountChromaV;
1953 pVeboxDndiState->DW7.HotPixelThresholdChromaV = m_chromaParams.dwHotPixelThresholdChromaV;
1954 pVeboxDndiState->DW8.ChromaDenoiseMovingPixelThreshold = m_chromaParams.dwHotPixelThresholdChromaV;
1955
1956 pVeboxDndiState->DW9.DnyWr040 = pVeboxDndiParams->dwPixRangeWeight[0];
1957 pVeboxDndiState->DW9.DnyWr140 = pVeboxDndiParams->dwPixRangeWeight[1];
1958 pVeboxDndiState->DW9.DnyWr240 = pVeboxDndiParams->dwPixRangeWeight[2];
1959 pVeboxDndiState->DW9.DnyWr340 = pVeboxDndiParams->dwPixRangeWeight[3];
1960 pVeboxDndiState->DW9.DnyWr440 = pVeboxDndiParams->dwPixRangeWeight[4];
1961 pVeboxDndiState->DW9.DnyWr540 = pVeboxDndiParams->dwPixRangeWeight[5];
1962
1963 pVeboxDndiState->DW11.DnyPrt5120 = pVeboxDndiParams->dwPixRangeThreshold[5];
1964 pVeboxDndiState->DW12.DnyPrt4120 = pVeboxDndiParams->dwPixRangeThreshold[4];
1965 pVeboxDndiState->DW12.DnyPrt3120 = pVeboxDndiParams->dwPixRangeThreshold[3];
1966 pVeboxDndiState->DW13.DnyPrt2120 = pVeboxDndiParams->dwPixRangeThreshold[2];
1967 pVeboxDndiState->DW13.DnyPrt1120 = pVeboxDndiParams->dwPixRangeThreshold[1];
1968 pVeboxDndiState->DW14.DnyPrt0120 = pVeboxDndiParams->dwPixRangeThreshold[0];
1969
1970 pVeboxDndiState->DW16.DnuWr040 = m_chromaParams.dwPixRangeWeightChromaU[0];
1971 pVeboxDndiState->DW16.DnuWr140 = m_chromaParams.dwPixRangeWeightChromaU[1];
1972 pVeboxDndiState->DW16.DnuWr240 = m_chromaParams.dwPixRangeWeightChromaU[2];
1973 pVeboxDndiState->DW16.DnuWr340 = m_chromaParams.dwPixRangeWeightChromaU[3];
1974 pVeboxDndiState->DW16.DnuWr440 = m_chromaParams.dwPixRangeWeightChromaU[4];
1975 pVeboxDndiState->DW16.DnuWr540 = m_chromaParams.dwPixRangeWeightChromaU[5];
1976
1977 pVeboxDndiState->DW18.DnuPrt5120 = m_chromaParams.dwPixRangeThresholdChromaU[5];
1978 pVeboxDndiState->DW19.DnuPrt4120 = m_chromaParams.dwPixRangeThresholdChromaU[4];
1979 pVeboxDndiState->DW19.DnuPrt3120 = m_chromaParams.dwPixRangeThresholdChromaU[3];
1980 pVeboxDndiState->DW20.DnuPrt2120 = m_chromaParams.dwPixRangeThresholdChromaU[2];
1981 pVeboxDndiState->DW20.DnuPrt1120 = m_chromaParams.dwPixRangeThresholdChromaU[1];
1982 pVeboxDndiState->DW21.DnuPrt0120 = m_chromaParams.dwPixRangeThresholdChromaU[0];
1983
1984 pVeboxDndiState->DW23.DnvWr040 = m_chromaParams.dwPixRangeWeightChromaV[0];
1985 pVeboxDndiState->DW23.DnvWr5140 = m_chromaParams.dwPixRangeWeightChromaV[1];
1986 pVeboxDndiState->DW23.DnvWr240 = m_chromaParams.dwPixRangeWeightChromaV[2];
1987 pVeboxDndiState->DW23.DnvWr340 = m_chromaParams.dwPixRangeWeightChromaV[3];
1988 pVeboxDndiState->DW23.DnvWr440 = m_chromaParams.dwPixRangeWeightChromaV[4];
1989 pVeboxDndiState->DW23.DnvWr540 = m_chromaParams.dwPixRangeWeightChromaV[5];
1990
1991 pVeboxDndiState->DW25.DnvPrt5120 = m_chromaParams.dwPixRangeThresholdChromaV[5];
1992 pVeboxDndiState->DW26.DnvPrt4120 = m_chromaParams.dwPixRangeThresholdChromaV[4];
1993 pVeboxDndiState->DW26.DnvPrt3120 = m_chromaParams.dwPixRangeThresholdChromaV[3];
1994 pVeboxDndiState->DW27.DnvPrt2120 = m_chromaParams.dwPixRangeThresholdChromaV[2];
1995 pVeboxDndiState->DW27.DnvPrt1120 = m_chromaParams.dwPixRangeThresholdChromaV[1];
1996 pVeboxDndiState->DW28.DnvPrt0120 = m_chromaParams.dwPixRangeThresholdChromaV[0];
1997
1998 pVeboxDndiState->DW38.DnDiTopFirst = pVeboxDndiParams->bDNDITopFirst;
1999
2000 pVeboxDndiState->DW39.ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame = pVeboxDndiParams->dwFMDFirstFieldCurrFrame;
2001 pVeboxDndiState->DW39.ProgressiveCadenceReconstructionFor2NdFieldOfPreviousFrame = pVeboxDndiParams->dwFMDSecondFieldPrevFrame;
2002
2003 // Improved Deinterlacing
2004 pVeboxDndiState->DW36.LumatdmWt = pVeboxDndiParams->dwLumaTDMWeight;
2005 pVeboxDndiState->DW36.ChromatdmWt = pVeboxDndiParams->dwChromaTDMWeight;
2006
2007 pVeboxDndiState->DW37.CoringThresholdForSvcm = pVeboxDndiParams->dwSVCMThreshold;
2008 pVeboxDndiState->DW37.DeltabitValueForSvcm = pVeboxDndiParams->dwSVCMDelta;
2009 pVeboxDndiState->DW37.CoringThresholdForShcm = pVeboxDndiParams->dwSHCMThreshold;
2010 pVeboxDndiState->DW37.DeltabitValueForShcm = pVeboxDndiParams->dwSHCMDelta;
2011
2012 pVeboxDndiState->DW39.ChromaSmallerWindowForTdm = pVeboxDndiParams->bTDMChromaSmallerWindow;
2013 pVeboxDndiState->DW39.LumaSmallerWindowForTdm = pVeboxDndiParams->bTDMLumaSmallerWindow;
2014 pVeboxDndiState->DW39.Fastercovergence = pVeboxDndiParams->bFasterConvergence;
2015
2016 pVeboxDndiState->DW40.SadWt0 = pVeboxDndiParams->dwSADWT0;
2017 pVeboxDndiState->DW40.SadWt1 = pVeboxDndiParams->dwSADWT1;
2018 pVeboxDndiState->DW40.SadWt2 = pVeboxDndiParams->dwSADWT2;
2019 pVeboxDndiState->DW40.SadWt3 = pVeboxDndiParams->dwSADWT3;
2020 pVeboxDndiState->DW41.SadWt4 = pVeboxDndiParams->dwSADWT4;
2021 pVeboxDndiState->DW41.SadWt6 = pVeboxDndiParams->dwSADWT6;
2022
2023 pVeboxDndiState->DW41.CoringThresholdForLumaSadCalculation = pVeboxDndiParams->dwLumaTDMCoringThreshold;
2024 pVeboxDndiState->DW41.CoringThresholdForChromaSadCalculation = pVeboxDndiParams->dwChromaTDMCoringThreshold;
2025
2026 pVeboxDndiState->DW42.ParDiffcheckslackthreshold = pVeboxDndiParams->dwDiffCheckSlackThreshold;
2027 pVeboxDndiState->DW42.ParTearinghighthreshold = pVeboxDndiParams->dwTearingHighThreshold;
2028 pVeboxDndiState->DW42.ParTearinglowthreshold = pVeboxDndiParams->dwTearingLowThreshold;
2029 pVeboxDndiState->DW42.ParDirectioncheckth = pVeboxDndiParams->dwDirectionCheckThreshold;
2030 pVeboxDndiState->DW42.ParSyntheticcontentcheck = pVeboxDndiParams->bSyntheticContentCheck;
2031 pVeboxDndiState->DW42.ParLocalcheck = pVeboxDndiParams->bLocalCheck;
2032 pVeboxDndiState->DW42.ParUsesyntheticcontentmedian = pVeboxDndiParams->bUseSyntheticContentMedian;
2033 pVeboxDndiState->DW42.BypassDeflicker = pVeboxDndiParams->bBypassDeflickerFilter;
2034
2035 pVeboxDndiState->DW43.Lpfwtlut0 = pVeboxDndiParams->dwLPFWtLUT0;
2036 pVeboxDndiState->DW43.Lpfwtlut1 = pVeboxDndiParams->dwLPFWtLUT1;
2037 pVeboxDndiState->DW43.Lpfwtlut2 = pVeboxDndiParams->dwLPFWtLUT2;
2038 pVeboxDndiState->DW43.Lpfwtlut3 = pVeboxDndiParams->dwLPFWtLUT3;
2039 pVeboxDndiState->DW44.Lpfwtlut4 = pVeboxDndiParams->dwLPFWtLUT4;
2040 pVeboxDndiState->DW44.Lpfwtlut5 = pVeboxDndiParams->dwLPFWtLUT5;
2041 pVeboxDndiState->DW44.Lpfwtlut6 = pVeboxDndiParams->dwLPFWtLUT6;
2042 pVeboxDndiState->DW44.Lpfwtlut7 = pVeboxDndiParams->dwLPFWtLUT7;
2043
2044 pVeboxDndiState->DW10.DnyThmin120 = 512;
2045 pVeboxDndiState->DW10.DnyThmax120 = 2048;
2046 pVeboxDndiState->DW11.DnyDynThmin120 = 256;
2047
2048 pVeboxDndiState->DW14.DnyWd2040 = 10;
2049 pVeboxDndiState->DW14.DnyWd2140 = 10;
2050 pVeboxDndiState->DW14.DnyWd2240 = 8;
2051 pVeboxDndiState->DW15.DnyWd0040 = 12;
2052 pVeboxDndiState->DW15.DnyWd0140 = 12;
2053 pVeboxDndiState->DW15.DnyWd0240 = 10;
2054 pVeboxDndiState->DW15.DnyWd1040 = 12;
2055 pVeboxDndiState->DW15.DnyWd1140 = 11;
2056 pVeboxDndiState->DW15.DnyWd1240 = 10;
2057
2058 pVeboxDndiState->DW17.DnuThmin120 = 512;
2059 pVeboxDndiState->DW17.DnuThmax120 = 2048;
2060 pVeboxDndiState->DW18.DnuDynThmin120 = 256;
2061
2062 pVeboxDndiState->DW21.DnuWd2040 = 10;
2063 pVeboxDndiState->DW21.DnuWd2140 = 10;
2064 pVeboxDndiState->DW21.DnuWd2240 = 8;
2065 pVeboxDndiState->DW22.DnuWd0040 = 12;
2066 pVeboxDndiState->DW22.DnuWd0140 = 12;
2067 pVeboxDndiState->DW22.DnuWd0240 = 10;
2068 pVeboxDndiState->DW22.DnuWd1040 = 12;
2069 pVeboxDndiState->DW22.DnuWd1140 = 11;
2070 pVeboxDndiState->DW22.DnuWd1240 = 10;
2071
2072 pVeboxDndiState->DW24.DnvThmin120 = 512;
2073 pVeboxDndiState->DW24.DnvThmax120 = 2048;
2074 pVeboxDndiState->DW25.DnvDynThmin120 = 256;
2075
2076 pVeboxDndiState->DW28.DnvWd2040 = 10;
2077 pVeboxDndiState->DW28.DnvWd2140 = 10;
2078 pVeboxDndiState->DW28.DnvWd2240 = 8;
2079 pVeboxDndiState->DW29.DnvWd0040 = 12;
2080 pVeboxDndiState->DW29.DnvWd0140 = 12;
2081 pVeboxDndiState->DW29.DnvWd0240 = 10;
2082 pVeboxDndiState->DW29.DnvWd1040 = 12;
2083 pVeboxDndiState->DW29.DnvWd1140 = 11;
2084 pVeboxDndiState->DW29.DnvWd1240 = 10;
2085
2086 pVeboxDndiState->DW31.SmallSobelCountThreshold = 6;
2087 pVeboxDndiState->DW32.LargeSobelCountThreshold = 6;
2088 pVeboxDndiState->DW32.MedianSobelCountThreshold = 40;
2089
2090 pVeboxDndiState->DW34.StmmC2 = 2;
2091 pVeboxDndiState->DW35.MaximumStmm = 150;
2092 pVeboxDndiState->DW35.MultiplierForVecm = 30;
2093 pVeboxDndiState->DW35.BlendingConstantAcrossTimeForSmallValuesOfStmm = 125;
2094 pVeboxDndiState->DW35.BlendingConstantAcrossTimeForLargeValuesOfStmm = 64;
2095
2096 pVeboxDndiState->DW36.FmdTemporalDifferenceThreshold = 175;
2097 pVeboxDndiState->DW36.StmmOutputShift = 5;
2098 pVeboxDndiState->DW36.StmmShiftUp = 1;
2099 pVeboxDndiState->DW36.MinimumStmm = 118;
2100
2101 pVeboxDndiState->DW38.McdiEnable = 1;
2102 pVeboxDndiState->DW38.FmdTearThreshold = 2;
2103 pVeboxDndiState->DW38.Fmd2VerticalDifferenceThreshold = 100;
2104 pVeboxDndiState->DW38.Fmd1VerticalDifferenceThreshold = 16;
2105
2106 pVeboxDndiState->DW45.SynthticFrame = pVeboxDndiParams->bSyntheticFrame;
2107
2108 // copy the DW0-DW33 SLIM_IPU_DN_PARAMS to VEBOX_DNDI_STATE, DW34-DW48 for DI according to DI DDI setting.
2109 if (pVeboxDndiParams->bEnableSlimIPUDenoise)
2110 {
2111 uint32_t slimIpuDnCmdSize = MHW_VEBOX_SLIM_IPU_DN_CMD_SIZE_INUSE * sizeof(pVeboxDndiState->DW0); //buffer size in use for SLIM IPU DN
2112
2113 if (nullptr == pVeboxDndiParams->pSystemMem || pVeboxDndiParams->MemSizeInBytes != sizeof(*pVeboxDndiState) || pVeboxDndiParams->MemSizeInBytes < slimIpuDnCmdSize)
2114 {
2115 MHW_ASSERTMESSAGE("SlimIPUDenoise size is invaild");
2116 return MOS_STATUS_INVALID_PARAMETER;
2117 }
2118
2119 MOS_SecureMemcpy(pVeboxDndiState, sizeof(*pVeboxDndiState), pVeboxDndiParams->pSystemMem, slimIpuDnCmdSize); // only copy dw0 - dw33 for DN
2120
2121 pVeboxDndiState->DW3.ProgressiveDn = pVeboxDndiParams->bProgressiveDN;
2122 }
2123
2124 finish:
2125 return eStatus;
2126 }
2127
AddVeboxIecpState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)2128 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxIecpState(
2129 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
2130 {
2131 bool bEnableFECSC = false;
2132 PMHW_FORWARD_GAMMA_SEG pFwdGammaSeg;
2133 uint8_t *p3DLUT;
2134 PMHW_VEBOX_HEAP pVeboxHeap;
2135 uint32_t uiOffset;
2136 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2137
2138 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState;
2139
2140 MHW_CHK_NULL(pVeboxIecpParams);
2141 MHW_CHK_NULL(m_veboxHeap);
2142
2143 pVeboxHeap = m_veboxHeap;
2144 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2145 pVeboxIecpState = (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
2146 pVeboxHeap->uiIecpStateOffset +
2147 uiOffset);
2148 MHW_CHK_NULL(pVeboxIecpState);
2149 IecpStateInitialization(pVeboxIecpState);
2150
2151 if (pVeboxIecpParams->ColorPipeParams.bActive)
2152 {
2153 // Enable STD/E (Skin Tone Detection/Enhancement)
2154 SetVeboxIecpStateSTE(
2155 &pVeboxIecpState->StdSteState,
2156 &pVeboxIecpParams->ColorPipeParams);
2157
2158 // Enable TCC (Total Color Control)
2159 if (pVeboxIecpParams->ColorPipeParams.bEnableTCC)
2160 {
2161 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateTCC(
2162 &pVeboxIecpState->TccState,
2163 &pVeboxIecpParams->ColorPipeParams);
2164 }
2165 }
2166
2167 // Enable ACE (Automatic Contrast Enhancement). Enable LACE if it's enabled.
2168 if (pVeboxIecpParams->bAce ||
2169 (pVeboxIecpParams->ColorPipeParams.bActive &&
2170 pVeboxIecpParams->ColorPipeParams.bEnableACE))
2171 {
2172 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateACELACE(
2173 &pVeboxIecpState->AceState,
2174 &pVeboxIecpState->AlphaAoiState,
2175 (pVeboxIecpParams->ColorPipeParams.bEnableLACE == true) ? true : false);
2176 }
2177
2178 if (pVeboxIecpParams->CapPipeParams.bActive)
2179 {
2180 // IECP needs to operate in YUV space
2181 if ((pVeboxIecpParams->srcFormat != Format_AYUV) &&
2182 (pVeboxIecpParams->dstFormat == Format_AYUV ||
2183 pVeboxIecpParams->dstFormat == Format_Y416 ||
2184 pVeboxIecpParams->ProcAmpParams.bActive ||
2185 pVeboxIecpParams->ColorPipeParams.bActive))
2186 {
2187 bEnableFECSC = true;
2188 }
2189 else if (pVeboxIecpParams->CapPipeParams.FECSCParams.bActive)
2190 {
2191 bEnableFECSC = true;
2192 }
2193 else
2194 {
2195 bEnableFECSC = false;
2196 }
2197
2198 // Enable Front End CSC so that input to IECP will be in YUV color space
2199 if (bEnableFECSC)
2200 {
2201 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateFecsc(&pVeboxIecpState->FrontEndCsc, pVeboxIecpParams);
2202 }
2203
2204 // Enable Color Correction Matrix
2205 if (pVeboxIecpParams->CapPipeParams.ColorCorrectionParams.bActive)
2206 {
2207 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateCcm(
2208 pVeboxIecpState,
2209 &pVeboxIecpParams->CapPipeParams,
2210 65536);
2211 }
2212 }
2213
2214 if (pVeboxIecpParams->bFeCSCEnable)
2215 {
2216 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateFecsc(&pVeboxIecpState->FrontEndCsc, pVeboxIecpParams);
2217 }
2218
2219 // Enable Back End CSC for capture pipeline or Vebox output pipe
2220 if (pVeboxIecpParams->CapPipeParams.bActive ||
2221 pVeboxIecpParams->bCSCEnable)
2222 {
2223 SetVeboxIecpStateBecsc(
2224 pVeboxIecpState,
2225 pVeboxIecpParams,
2226 bEnableFECSC);
2227 }
2228
2229 // Enable ProcAmp
2230 if (pVeboxIecpParams->ProcAmpParams.bActive &&
2231 pVeboxIecpParams->ProcAmpParams.bEnabled)
2232 {
2233 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxIecpStateProcAmp(
2234 &pVeboxIecpState->ProcampState,
2235 &pVeboxIecpParams->ProcAmpParams);
2236 }
2237
2238 if (pVeboxIecpParams && pVeboxIecpParams->CapPipeParams.bActive)
2239 {
2240 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::AddVeboxCapPipeState(
2241 &pVeboxIecpParams->CapPipeParams);
2242 }
2243
2244 if (pVeboxIecpParams &&
2245 pVeboxIecpParams->CapPipeParams.bActive &&
2246 pVeboxIecpParams->CapPipeParams.FwdGammaParams.bActive)
2247 {
2248 pFwdGammaSeg =
2249 (PMHW_FORWARD_GAMMA_SEG)(pVeboxHeap->pLockedDriverResourceMem +
2250 pVeboxHeap->uiGammaCorrectionStateOffset +
2251 uiOffset);
2252 MHW_CHK_NULL(pFwdGammaSeg);
2253 MOS_SecureMemcpy(
2254 pFwdGammaSeg,
2255 sizeof(MHW_FORWARD_GAMMA_SEG) * MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT,
2256 &pVeboxIecpParams->CapPipeParams.FwdGammaParams.Segment[0],
2257 sizeof(MHW_FORWARD_GAMMA_SEG) * MHW_FORWARD_GAMMA_SEGMENT_CONTROL_POINT);
2258 }
2259
2260 finish:
2261 return eStatus;
2262 }
2263
AddVeboxIecpAceState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)2264 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxIecpAceState(
2265 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)
2266 {
2267 PMHW_ACE_PARAMS pAceParams;
2268 PMHW_LACE_PARAMS pLaceParams;
2269 PMHW_VEBOX_HEAP pVeboxHeap;
2270 int32_t uiOffset;
2271 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2272 const uint32_t uiFullRangeYOffsetInU16 = 0;
2273 const uint32_t uiLimitedRangeYOffsetInU16 = 4096;
2274 const uint32_t uiUOffsetInU16 = 32768;
2275 const uint32_t uiVOffsetInU16 = 32768;
2276
2277 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState;
2278
2279 MHW_CHK_NULL(pVeboxIecpParams);
2280 MHW_CHK_NULL(m_veboxHeap);
2281
2282 pVeboxHeap = m_veboxHeap;
2283 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2284
2285 pVeboxIecpState = (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem +
2286 pVeboxHeap->uiIecpStateOffset +
2287 uiOffset);
2288 MHW_CHK_NULL(pVeboxIecpState);
2289
2290 MhwVeboxInterfaceGeneric<mhw_vebox_g12_X>::SetVeboxAceLaceState(pVeboxIecpParams, pVeboxIecpState);
2291
2292 if (pVeboxIecpParams->ColorPipeParams.bActive &&
2293 pVeboxIecpParams->ColorPipeParams.bEnableLACE)
2294 {
2295 pLaceParams = &pVeboxIecpParams->ColorPipeParams.LaceParams;
2296
2297 pVeboxIecpState->AceState.DW0.MinAceLuma = pLaceParams->wMinAceLuma;
2298 pVeboxIecpState->AceState.DW12.MaxAceLuma = pLaceParams->wMaxAceLuma;
2299
2300 pVeboxIecpState->AceState.DW13.LaceColorCorrectionEnable = m_laceColorCorrection.bColorCorrectionEnable;
2301 if (m_laceColorCorrection.bYUVFullRange)
2302 {
2303 pVeboxIecpState->AceState.DW13.LaceYOffset = uiFullRangeYOffsetInU16;
2304 pVeboxIecpState->AceState.DW14.LaceUOffset = uiUOffsetInU16;
2305 pVeboxIecpState->AceState.DW14.LaceVOffset = uiVOffsetInU16;
2306 }
2307 else
2308 {
2309 pVeboxIecpState->AceState.DW13.LaceYOffset = uiLimitedRangeYOffsetInU16;
2310 pVeboxIecpState->AceState.DW14.LaceUOffset = uiUOffsetInU16;
2311 pVeboxIecpState->AceState.DW14.LaceVOffset = uiVOffsetInU16;
2312 }
2313
2314 pVeboxIecpState->AceState.DW15.LaceGammaCurveBias0 = m_laceColorCorrection.colorWeightLut.iBias[0];
2315 pVeboxIecpState->AceState.DW15.LaceGammaCurvePoint0 = m_laceColorCorrection.colorWeightLut.iPoint[0];
2316 pVeboxIecpState->AceState.DW15.LaceGammaCurveSlope0 = m_laceColorCorrection.colorWeightLut.iSlope[0];
2317
2318 pVeboxIecpState->AceState.DW16.LaceGammaCurveBias1 = m_laceColorCorrection.colorWeightLut.iBias[1];
2319 pVeboxIecpState->AceState.DW16.LaceGammaCurvePoint1 = m_laceColorCorrection.colorWeightLut.iPoint[1];
2320 pVeboxIecpState->AceState.DW16.LaceGammaCurveSlope1 = m_laceColorCorrection.colorWeightLut.iSlope[1];
2321
2322 pVeboxIecpState->AceState.DW17.LaceGammaCurveBias2 = m_laceColorCorrection.colorWeightLut.iBias[2];
2323 pVeboxIecpState->AceState.DW17.LaceGammaCurvePoint2 = m_laceColorCorrection.colorWeightLut.iPoint[2];
2324 pVeboxIecpState->AceState.DW17.LaceGammaCurveSlope2 = m_laceColorCorrection.colorWeightLut.iSlope[2];
2325
2326 pVeboxIecpState->AceState.DW18.LaceGammaCurveBias3 = m_laceColorCorrection.colorWeightLut.iBias[3];
2327 pVeboxIecpState->AceState.DW18.LaceGammaCurvePoint3 = m_laceColorCorrection.colorWeightLut.iPoint[3];
2328 pVeboxIecpState->AceState.DW18.LaceGammaCurveSlope3 = m_laceColorCorrection.colorWeightLut.iSlope[3];
2329
2330 pVeboxIecpState->AceState.DW19.LaceGammaCurveBias4 = m_laceColorCorrection.colorWeightLut.iBias[4];
2331 pVeboxIecpState->AceState.DW19.LaceGammaCurvePoint4 = m_laceColorCorrection.colorWeightLut.iPoint[4];
2332 pVeboxIecpState->AceState.DW19.LaceGammaCurveSlope4 = m_laceColorCorrection.colorWeightLut.iSlope[4];
2333
2334 pVeboxIecpState->AceState.DW20.LaceGammaCurveBias5 = m_laceColorCorrection.colorWeightLut.iBias[5];
2335 pVeboxIecpState->AceState.DW20.LaceGammaCurvePoint5 = m_laceColorCorrection.colorWeightLut.iPoint[5];
2336 pVeboxIecpState->AceState.DW20.LaceGammaCurveSlope5 = m_laceColorCorrection.colorWeightLut.iSlope[5];
2337
2338 pVeboxIecpState->AceState.DW21.LaceGammaCurveBias6 = m_laceColorCorrection.colorWeightLut.iBias[6];
2339 pVeboxIecpState->AceState.DW21.LaceGammaCurvePoint6 = m_laceColorCorrection.colorWeightLut.iPoint[6];
2340 pVeboxIecpState->AceState.DW21.LaceGammaCurveSlope6 = m_laceColorCorrection.colorWeightLut.iSlope[6];
2341
2342 pVeboxIecpState->AceState.DW22.LaceGammaCurveBias7 = m_laceColorCorrection.colorWeightLut.iBias[7];
2343 pVeboxIecpState->AceState.DW22.LaceGammaCurvePoint7 = m_laceColorCorrection.colorWeightLut.iPoint[7];
2344 pVeboxIecpState->AceState.DW22.LaceGammaCurveSlope7 = m_laceColorCorrection.colorWeightLut.iSlope[7];
2345
2346 pVeboxIecpState->AceState.DW23.LaceGammaCurveBias8 = m_laceColorCorrection.colorWeightLut.iBias[8];
2347 pVeboxIecpState->AceState.DW23.LaceGammaCurvePoint8 = m_laceColorCorrection.colorWeightLut.iPoint[8];
2348 pVeboxIecpState->AceState.DW23.LaceGammaCurveSlope8 = m_laceColorCorrection.colorWeightLut.iSlope[8];
2349
2350 pVeboxIecpState->AceState.DW24.LaceGammaCurveBias9 = m_laceColorCorrection.colorWeightLut.iBias[9];
2351 pVeboxIecpState->AceState.DW24.LaceGammaCurvePoint9 = m_laceColorCorrection.colorWeightLut.iPoint[9];
2352 pVeboxIecpState->AceState.DW24.LaceGammaCurveSlope9 = m_laceColorCorrection.colorWeightLut.iSlope[9];
2353
2354 pVeboxIecpState->AceState.DW25.LaceGammaCurveBias10 = m_laceColorCorrection.colorWeightLut.iBias[10];
2355 pVeboxIecpState->AceState.DW25.LaceGammaCurvePoint10 = m_laceColorCorrection.colorWeightLut.iPoint[10];
2356 pVeboxIecpState->AceState.DW25.LaceGammaCurveSlope10 = m_laceColorCorrection.colorWeightLut.iSlope[10];
2357
2358 pVeboxIecpState->AceState.DW26.LaceGammaCurveBias11 = m_laceColorCorrection.colorWeightLut.iBias[11];
2359 pVeboxIecpState->AceState.DW26.LaceGammaCurvePoint11 = m_laceColorCorrection.colorWeightLut.iPoint[11];
2360 pVeboxIecpState->AceState.DW26.LaceGammaCurveSlope11 = m_laceColorCorrection.colorWeightLut.iSlope[11];
2361
2362 pVeboxIecpState->AceState.DW27.LaceGammaCurveBias12 = m_laceColorCorrection.colorWeightLut.iBias[12];
2363 pVeboxIecpState->AceState.DW27.LaceGammaCurvePoint12 = m_laceColorCorrection.colorWeightLut.iPoint[12];
2364 pVeboxIecpState->AceState.DW27.LaceGammaCurveSlope12 = m_laceColorCorrection.colorWeightLut.iSlope[12];
2365
2366 pVeboxIecpState->AceState.DW28.LaceGammaCurveBias13 = m_laceColorCorrection.colorWeightLut.iBias[13];
2367 pVeboxIecpState->AceState.DW28.LaceGammaCurvePoint13 = m_laceColorCorrection.colorWeightLut.iPoint[13];
2368 pVeboxIecpState->AceState.DW28.LaceGammaCurveSlope13 = m_laceColorCorrection.colorWeightLut.iSlope[13];
2369
2370 pVeboxIecpState->AceState.DW29.LaceGammaCurveBias14 = m_laceColorCorrection.colorWeightLut.iBias[14];
2371 pVeboxIecpState->AceState.DW29.LaceGammaCurvePoint14 = m_laceColorCorrection.colorWeightLut.iPoint[14];
2372 pVeboxIecpState->AceState.DW29.LaceGammaCurveSlope14 = m_laceColorCorrection.colorWeightLut.iSlope[14];
2373
2374 pVeboxIecpState->AceState.DW30.LaceGammaCurveBias15 = m_laceColorCorrection.colorWeightLut.iBias[15];
2375 pVeboxIecpState->AceState.DW30.LaceGammaCurvePoint15 = m_laceColorCorrection.colorWeightLut.iPoint[15];
2376 pVeboxIecpState->AceState.DW30.LaceGammaCurveSlope15 = m_laceColorCorrection.colorWeightLut.iSlope[15];
2377 }
2378
2379 finish:
2380 return eStatus;
2381 }
2382
2383 #if (_DEBUG || _RELEASE_INTERNAL)
ValidateVeboxScalabilityConfig()2384 MOS_STATUS MhwVeboxInterfaceG12::ValidateVeboxScalabilityConfig()
2385 {
2386 MEDIA_SYSTEM_INFO *pGtSystemInfo;
2387 MOS_FORCE_VEBOX eForceVebox;
2388 bool bScalableVEMode;
2389 bool bUseVE1, bUseVE2;
2390 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2391
2392 MHW_CHK_NULL(m_osInterface);
2393
2394 eForceVebox = m_osInterface->eForceVebox;
2395 bScalableVEMode = ((m_osInterface->bVeboxScalabilityMode) ? true : false);
2396 pGtSystemInfo = m_osInterface->pfnGetGtSystemInfo(m_osInterface);
2397 MHW_CHK_NULL(pGtSystemInfo);
2398
2399 if (eForceVebox != MOS_FORCE_VEBOX_NONE &&
2400 eForceVebox != MOS_FORCE_VEBOX_1 &&
2401 eForceVebox != MOS_FORCE_VEBOX_2 &&
2402 eForceVebox != MOS_FORCE_VEBOX_1_2)
2403 {
2404 eStatus = MOS_STATUS_INVALID_PARAMETER;
2405 MHW_ASSERTMESSAGE("eForceVebox value is invalid.");
2406 goto finish;
2407 }
2408
2409 if (!bScalableVEMode &&
2410 (eForceVebox == MOS_FORCE_VEBOX_1_2))
2411 {
2412 eStatus = MOS_STATUS_INVALID_PARAMETER;
2413 MHW_ASSERTMESSAGE("eForceVebox value is not consistent with scalability mode.");
2414 goto finish;
2415 }
2416
2417 if (bScalableVEMode && !m_veboxScalabilitySupported)
2418 {
2419 eStatus = MOS_STATUS_INVALID_PARAMETER;
2420 MHW_ASSERTMESSAGE("scalability mode is not allowed on current platform!");
2421 goto finish;
2422 }
2423
2424 bUseVE1 = bUseVE2 = false;
2425 if (eForceVebox == MOS_FORCE_VEBOX_NONE)
2426 {
2427 bUseVE1 = true;
2428 }
2429 else
2430 {
2431 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_1, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE1);
2432 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_2, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE2);
2433 }
2434
2435 if (!pGtSystemInfo->VEBoxInfo.IsValid ||
2436 (bUseVE1 && !pGtSystemInfo->VEBoxInfo.Instances.Bits.VEBox0Enabled) ||
2437 (bUseVE2 && !pGtSystemInfo->VEBoxInfo.Instances.Bits.VEBox1Enabled))
2438 {
2439 eStatus = MOS_STATUS_INVALID_PARAMETER;
2440 MHW_ASSERTMESSAGE("the forced VEBOX is not enabled in current platform.");
2441 goto finish;
2442 }
2443
2444 finish:
2445 return eStatus;
2446 }
2447 #endif
2448
SetVeboxInUse(bool inputVebox0,bool inputVebox1)2449 MOS_STATUS MhwVeboxInterfaceG12::SetVeboxInUse(
2450 bool inputVebox0,
2451 bool inputVebox1)
2452 {
2453 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2454
2455 m_vebox0InUse = inputVebox0;
2456 m_vebox1InUse = inputVebox1;
2457
2458 return eStatus;
2459 }
2460
IsScalabilitySupported()2461 bool MhwVeboxInterfaceG12::IsScalabilitySupported()
2462 {
2463 return m_veboxScalabilitySupported;
2464 }
2465
2466
VeboxInterface_BT2020YUVToRGB(PMHW_VEBOX_HEAP pVeboxHeapInput,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)2467 MOS_STATUS MhwVeboxInterfaceG12::VeboxInterface_BT2020YUVToRGB(
2468 PMHW_VEBOX_HEAP pVeboxHeapInput,
2469 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
2470 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
2471 {
2472 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pIecpState;
2473 PMHW_VEBOX_HEAP pVeboxHeap;
2474 uint32_t uiOffset;
2475 MOS_STATUS eStatus = MOS_STATUS_NULL_POINTER;
2476
2477 MHW_CHK_NULL(pVeboxHeapInput);
2478
2479 MOS_UNUSED(pVeboxIecpParams);
2480 MOS_UNUSED(pVeboxGamutParams);
2481
2482 pVeboxHeap = pVeboxHeapInput;
2483 MHW_CHK_NULL(pVeboxHeap);
2484
2485 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2486 pIecpState = (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiIecpStateOffset + uiOffset);
2487
2488 MHW_CHK_NULL(pIecpState);
2489
2490 pIecpState->CscState.DW0.TransformEnable = true;
2491
2492 if (IS_RGB_SWAP(pVeboxGamutParams->dstFormat))
2493 {
2494 pIecpState->CscState.DW0.YuvChannelSwap = true;
2495 }
2496
2497 if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020) // Limited->Full
2498 {
2499 if (pVeboxIecpParams->s1DLutParams.bActive)
2500 {
2501 // The updated value for TGL VEBOX HDR and Fp16 path
2502 pIecpState->CscState.DW0.C0 = 76533;
2503 pIecpState->CscState.DW1.C1 = 0;
2504 pIecpState->CscState.DW2.C2 = 110337;
2505 pIecpState->CscState.DW3.C3 = 76533;
2506 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12312, 19);
2507 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-42751, 19);
2508 pIecpState->CscState.DW6.C6 = 76533;
2509 pIecpState->CscState.DW7.C7 = 140776;
2510 pIecpState->CscState.DW8.C8 = 0;
2511
2512 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
2513 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2514 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2515
2516 pIecpState->CscState.DW9.OffsetOut1 = 0;
2517 pIecpState->CscState.DW10.OffsetOut2 = 0;
2518 pIecpState->CscState.DW11.OffsetOut3 = 0;
2519 }
2520 else
2521 {
2522 pIecpState->CscState.DW0.C0 = 76607;
2523 pIecpState->CscState.DW1.C1 = 0;
2524 pIecpState->CscState.DW2.C2 = 110443;
2525 pIecpState->CscState.DW3.C3 = 76607;
2526 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-12325, 19);
2527 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-42793, 19);
2528 pIecpState->CscState.DW6.C6 = 76607;
2529 pIecpState->CscState.DW7.C7 = 140911;
2530 pIecpState->CscState.DW8.C8 = 0;
2531
2532 pIecpState->CscState.DW9.OffsetIn1 = MOS_BITFIELD_VALUE((uint32_t)-2048, 16);
2533 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2534 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2535
2536 pIecpState->CscState.DW9.OffsetOut1 = 0;
2537 pIecpState->CscState.DW10.OffsetOut2 = 0;
2538 pIecpState->CscState.DW11.OffsetOut3 = 0;
2539 }
2540 }
2541 else if (pVeboxGamutParams->ColorSpace == MHW_CSpace_BT2020_FullRange) // Full->Full
2542 {
2543 pIecpState->CscState.DW0.C0 = 65536;
2544 pIecpState->CscState.DW1.C1 = 0;
2545 pIecpState->CscState.DW2.C2 = 96639;
2546 pIecpState->CscState.DW3.C3 = 65536;
2547 pIecpState->CscState.DW4.C4 = MOS_BITFIELD_VALUE((uint32_t)-10784, 19);
2548 pIecpState->CscState.DW5.C5 = MOS_BITFIELD_VALUE((uint32_t)-37444, 19);
2549 pIecpState->CscState.DW6.C6 = 65536;
2550 pIecpState->CscState.DW7.C7 = 123299;
2551 pIecpState->CscState.DW8.C8 = 0;
2552
2553 pIecpState->CscState.DW9.OffsetIn1 = 0;
2554 pIecpState->CscState.DW10.OffsetIn2 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2555 pIecpState->CscState.DW11.OffsetIn3 = MOS_BITFIELD_VALUE((uint32_t)-16384, 16);
2556
2557 pIecpState->CscState.DW9.OffsetOut1 = 0;
2558 pIecpState->CscState.DW10.OffsetOut2 = 0;
2559 pIecpState->CscState.DW11.OffsetOut3 = 0;
2560 }
2561 else
2562 {
2563 MHW_ASSERTMESSAGE("Unsupported BeCSC input color space");
2564 }
2565
2566 eStatus = MOS_STATUS_SUCCESS;
2567
2568 finish:
2569 return eStatus;
2570 }
2571
VeboxInterface_H2SManualMode(PMHW_VEBOX_HEAP pVeboxHeapInput,PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)2572 MOS_STATUS MhwVeboxInterfaceG12::VeboxInterface_H2SManualMode(
2573 PMHW_VEBOX_HEAP pVeboxHeapInput,
2574 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams,
2575 PMHW_VEBOX_GAMUT_PARAMS pVeboxGamutParams)
2576 {
2577 PMHW_VEBOX_HEAP pVeboxHeap;
2578 uint32_t uiOffset;
2579
2580 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pIecpState;
2581 mhw_vebox_g12_X::VEBOX_GAMUT_CONTROL_STATE_CMD *pGamutState;
2582 mhw_vebox_g12_X::Gamut_Expansion_Gamma_Correction_CMD *pVeboxGEGammaCorrection, VeboxGeGammaCorrection;
2583 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2584
2585 // HDR H2S algorithm related
2586 int32_t iToneMappingX[5] = { 40, 200, 1000, 2000, 4000 };
2587 int32_t iToneMappingY[4] = { 2500, 5000, 10000, 10000 };
2588 float fPivotX[5] = { 0.0, 0.0, 0.0, 0.0, 0.0 };
2589 float fPivotY[4] = { 0.0, 0.0, 0.0, 0.0 };
2590 float fSlope[5] = { 0.0, 0.0, 0.0, 0.0, 0.0 };
2591 float fMaxCLL = 0.0;
2592 // OETF parameters, corresponding to input
2593 uint32_t uiOETF[HDR_OETF_1DLUT_POINT_NUMBER] = { 0 };
2594 uint16_t usGE_Values[256][8] = { 0 };
2595
2596 MHW_CHK_NULL(pVeboxGamutParams);
2597 MHW_CHK_NULL(pVeboxHeapInput);
2598
2599 pVeboxHeap = pVeboxHeapInput;
2600 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize;
2601 pIecpState = (mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD*)(pVeboxHeap->pLockedDriverResourceMem + pVeboxHeap->uiIecpStateOffset + uiOffset);
2602 pVeboxGEGammaCorrection = (mhw_vebox_g12_X::Gamut_Expansion_Gamma_Correction_CMD *)(pVeboxHeap->pLockedDriverResourceMem
2603 + pVeboxHeap->uiGamutStateOffset + uiOffset);
2604 fMaxCLL = (65535 * (float)pVeboxGamutParams->uiMaxCLL) / 10000;
2605
2606 MHW_CHK_NULL(pIecpState);
2607 MHW_CHK_NULL(pVeboxGEGammaCorrection);
2608
2609 // Must initialize VeboxIecpState even if it is not used because GCE
2610 // requires GlobalIECP enable bit to be turned on
2611 if (!pVeboxIecpParams)
2612 {
2613 IecpStateInitialization(pIecpState);
2614 }
2615 pGamutState = &pIecpState->GamutState;
2616
2617 for (int32_t i = 0; i < 4; i++)
2618 {
2619 fPivotX[i] = (iToneMappingY[i] < 10000) ? (65535 * (float)iToneMappingX[i]) / 10000 : MOS_MIN((65535 * (float)iToneMappingX[i]) / 10000, fMaxCLL);
2620 fPivotY[i] = (65535 * (float)iToneMappingY[i]) / 10000;
2621 }
2622 fPivotX[4] = MOS_MIN((65535 * (float)iToneMappingX[4]) / 10000, fMaxCLL);
2623
2624 // Slope
2625 fSlope[0] = fPivotX[0] > 0 ? (float)(fPivotY[0] / fPivotX[0]) : 0;
2626 fPivotY[0] = fSlope[0] * fPivotX[0];
2627 for (int32_t i = 1; i < 4; i++)
2628 {
2629 fSlope[i] = (fPivotX[i] - fPivotX[i - 1]) > 0 ? (float)(fPivotY[i] - fPivotY[i - 1]) / (fPivotX[i] - fPivotX[i - 1]) : 0;
2630 fPivotY[i] = fSlope[i] * (fPivotX[i] - fPivotX[i - 1]) + fPivotY[i - 1];
2631 }
2632 fSlope[4] = (fPivotX[4] - fPivotX[3]) > 0 ? (float)(65535 - fPivotY[3]) / (fPivotX[4] - fPivotX[3]) : 0;
2633
2634 // Linear Operation
2635 for (int32_t n = 1; n < HDR_OETF_1DLUT_POINT_NUMBER; n++)
2636 {
2637 if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] < fSlope[0] * fPivotX[0])
2638 {
2639 uiOETF[n] = (uint32_t)((float)(g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n]) / fSlope[0]);
2640 }
2641 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] < fSlope[1] * (fPivotX[1] - fPivotX[0]) + fPivotY[0])
2642 {
2643 uiOETF[n] = (uint32_t)(((float)(g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n]) - fPivotY[0]) / fSlope[1] + fPivotX[0]);
2644 }
2645 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] < fSlope[2] * (fPivotX[2] - fPivotX[1]) + fPivotY[1])
2646 {
2647 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] - fPivotY[1]) / fSlope[2] + fPivotX[1]);
2648 }
2649 else if ((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] < fSlope[3] * (fPivotX[3] - fPivotX[2]) + fPivotY[2])
2650 {
2651 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] - fPivotY[2]) / fSlope[3] + fPivotX[2]);
2652 }
2653 else
2654 {
2655 uiOETF[n] = (uint32_t)(((float)g_Hdr_ColorCorrect_OETF_Rec709_Input_g12[n] - fPivotY[3]) / fSlope[4] + fPivotX[3]);
2656 }
2657 }
2658 uiOETF[0] = 0;
2659 uiOETF[255] = 65535;
2660
2661 // Back end CSC setting, need to convert BT2020 YUV input to RGB before GE
2662 VeboxInterface_BT2020YUVToRGB(pVeboxHeap, pVeboxIecpParams, pVeboxGamutParams);
2663
2664 // Global setting
2665 pGamutState->DW0.GlobalModeEnable = true;
2666 pGamutState->DW1.CmW = 1023; // Colorimetric accurate image
2667
2668 // CCM
2669 pGamutState->DW1.C0 = 108822;
2670 pGamutState->DW0.C1 = MOS_BITFIELD_VALUE((uint32_t)-38511, 21);
2671 pGamutState->DW3.C2 = MOS_BITFIELD_VALUE((uint32_t)-4774, 21);
2672 pGamutState->DW2.C3 = MOS_BITFIELD_VALUE((uint32_t)-8163, 21);
2673 pGamutState->DW5.C4 = 74246;
2674 pGamutState->DW4.C5 = MOS_BITFIELD_VALUE((uint32_t)-547, 21);
2675 pGamutState->DW7.C6 = MOS_BITFIELD_VALUE((uint32_t)-1190, 21);
2676 pGamutState->DW6.C7 = MOS_BITFIELD_VALUE((uint32_t)-6592, 21);
2677 pGamutState->DW8.C8 = 73317;
2678
2679 // Gamma Expansion
2680 *pVeboxGEGammaCorrection = VeboxGeGammaCorrection;
2681 for (int32_t i = 0; i < 255; i++)
2682 {
2683 usGE_Values[i][0] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Input_g12[i];
2684 usGE_Values[i][1] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output_g12[i];
2685 usGE_Values[i][2] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output_g12[i];
2686 usGE_Values[i][3] = g_Hdr_ColorCorrect_EOTF_SMPTE_ST2084_Output_g12[i];
2687
2688 usGE_Values[i][4] = (uint16_t)uiOETF[i];
2689 usGE_Values[i][5] = g_Hdr_ColorCorrect_OETF_Rec709_Output_g12[i];
2690 usGE_Values[i][6] = g_Hdr_ColorCorrect_OETF_Rec709_Output_g12[i];
2691 usGE_Values[i][7] = g_Hdr_ColorCorrect_OETF_Rec709_Output_g12[i];
2692 }
2693 // Keep the last 4 DWs' value as defult 65535.See mhw_vebox_g10_X::Gamut_Expansion_Gamma_Correction_CMD();
2694 MOS_SecureMemcpy(pVeboxGEGammaCorrection, sizeof(uint32_t)* 1020, usGE_Values, sizeof(uint16_t)* 2040);
2695
2696 finish:
2697 return eStatus;
2698 }
2699
IecpStateInitialization(mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD * pVeboxIecpState)2700 void MhwVeboxInterfaceG12::IecpStateInitialization(mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD *pVeboxIecpState)
2701 {
2702 MHW_CHK_NULL_NO_STATUS_RETURN(pVeboxIecpState);
2703
2704 mhw_vebox_g12_X::VEBOX_IECP_STATE_CMD IecpState;
2705 *pVeboxIecpState = IecpState;
2706
2707 // Re-set the values
2708 pVeboxIecpState->StdSteState.DW5.InvMarginVyl = 3300;
2709 pVeboxIecpState->StdSteState.DW5.InvSkinTypesMargin = 1638;
2710 pVeboxIecpState->StdSteState.DW12.B3U = 140;
2711 pVeboxIecpState->StdSteState.DW27.Hues0Dark = 256;
2712 pVeboxIecpState->StdSteState.DW27.Hues1Dark = 0;
2713
2714 pVeboxIecpState->AceState.DW0.LaceHistogramSize = 1;
2715
2716 pVeboxIecpState->TccState.DW0.Satfactor1 = 160;
2717 pVeboxIecpState->TccState.DW0.Satfactor2 = 160;
2718 pVeboxIecpState->TccState.DW0.Satfactor3 = 160;
2719 pVeboxIecpState->TccState.DW1.Satfactor4 = 160;
2720 pVeboxIecpState->TccState.DW1.Satfactor5 = 160;
2721 pVeboxIecpState->TccState.DW1.Satfactor6 = 160;
2722
2723 pVeboxIecpState->GamutState.DW2.CmS = 640;
2724 pVeboxIecpState->GamutState.DW3.AG = 26;
2725 pVeboxIecpState->GamutState.DW4.AB = 26;
2726 pVeboxIecpState->GamutState.DW5.RS = 768;
2727 pVeboxIecpState->GamutState.DW6.CmI = 192;
2728 pVeboxIecpState->GamutState.DW7.RI = 128;
2729
2730 return;
2731 }
2732
AdjustBoundary(PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,uint32_t * pdwSurfaceWidth,uint32_t * pdwSurfaceHeight,bool bDIEnable)2733 MOS_STATUS MhwVeboxInterfaceG12::AdjustBoundary(
2734 PMHW_VEBOX_SURFACE_PARAMS pSurfaceParam,
2735 uint32_t *pdwSurfaceWidth,
2736 uint32_t *pdwSurfaceHeight,
2737 bool bDIEnable)
2738 {
2739 uint16_t wWidthAlignUnit;
2740 uint16_t wHeightAlignUnit;
2741 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2742
2743 MHW_CHK_NULL(pSurfaceParam);
2744 MHW_CHK_NULL(pdwSurfaceWidth);
2745 MHW_CHK_NULL(pdwSurfaceHeight);
2746
2747 // initialize
2748 wHeightAlignUnit = 1;
2749 wWidthAlignUnit = 1;
2750
2751 switch (pSurfaceParam->Format)
2752 {
2753 case Format_NV12:
2754 wHeightAlignUnit = bDIEnable ? 4 : 2;
2755 wWidthAlignUnit = 2;
2756 break;
2757
2758 case Format_YUYV:
2759 case Format_YUY2:
2760 case Format_UYVY:
2761 case Format_YVYU:
2762 case Format_VYUY:
2763 case Format_Y210:
2764 case Format_Y216:
2765 wHeightAlignUnit = bDIEnable ? 2 : 1;
2766 wWidthAlignUnit = 2;
2767 break;
2768
2769 case Format_AYUV:
2770 case Format_Y416:
2771 wHeightAlignUnit = 1;
2772 wWidthAlignUnit = 2;
2773 break;
2774
2775 // For other formats, we will not do any special alignment
2776 case Format_A8R8G8B8:
2777 case Format_X8R8G8B8:
2778 case Format_A8B8G8R8:
2779 case Format_X8B8G8R8:
2780 case Format_L8:
2781 default:
2782 break;
2783 }
2784
2785 //When Crop being used in vebox, source surface height/width is updated in VeboxAdjustBoundary(), and the rcMaxSrc is used for crop rectangle.
2786 //But in dynamic Crop case, if the rcMaxSrc is larger than the rcSrc, the input pdwSurfaceHeight/pdwSurfaceWidth will be the input surface size.
2787 //And if the target surface size is smaller than input surface, it may lead to pagefault issue . So in Vebox Crop case, we set the pdwSurfaceHeight/pdwSurfaceWidth
2788 //with rcSrc to ensure Vebox input size is same with target Dstrec.
2789 if (pSurfaceParam->bVEBOXCroppingUsed)
2790 {
2791 *pdwSurfaceHeight = MOS_ALIGN_CEIL(
2792 MOS_MIN(pSurfaceParam->dwHeight, MOS_MAX((uint32_t)pSurfaceParam->rcSrc.bottom, MHW_VEBOX_MIN_HEIGHT)),
2793 wHeightAlignUnit);
2794 *pdwSurfaceWidth = MOS_ALIGN_CEIL(
2795 MOS_MIN(pSurfaceParam->dwWidth, MOS_MAX((uint32_t)pSurfaceParam->rcSrc.right, MHW_VEBOX_MIN_WIDTH)),
2796 wWidthAlignUnit);
2797 MHW_NORMALMESSAGE("bVEBOXCroppingUsed = true, pSurfaceParam->rcSrc.bottom: %d, pSurfaceParam->rcSrc.right: %d; pdwSurfaceHeight: %d, pdwSurfaceWidth: %d;",
2798 (uint32_t)pSurfaceParam->rcSrc.bottom,
2799 (uint32_t)pSurfaceParam->rcSrc.right,
2800 *pdwSurfaceHeight,
2801 *pdwSurfaceWidth);
2802 MT_LOG5(MT_VP_MHW_VE_ADJUST_SURFPARAM, MT_NORMAL, MT_VP_RENDER_VE_CROPPING, 1, MT_RECT_BOTTOM, pSurfaceParam->rcSrc.bottom, MT_RECT_RIGHT, pSurfaceParam->rcSrc.right,
2803 MT_SURF_HEIGHT, *pdwSurfaceHeight, MT_SURF_WIDTH, *pdwSurfaceWidth);
2804 }
2805 else
2806 {
2807 // Align width and height with max src renctange with consideration of
2808 // these conditions:
2809 // The minimum of width/height should equal to or larger than
2810 // MHW_VEBOX_MIN_WIDTH/HEIGHT. The maximum of width/heigh should equal
2811 // to or smaller than surface width/height
2812 *pdwSurfaceHeight = MOS_ALIGN_CEIL(
2813 MOS_MIN(pSurfaceParam->dwHeight, MOS_MAX((uint32_t)pSurfaceParam->rcMaxSrc.bottom, MHW_VEBOX_MIN_HEIGHT)),
2814 wHeightAlignUnit);
2815 *pdwSurfaceWidth = MOS_ALIGN_CEIL(
2816 MOS_MIN(pSurfaceParam->dwWidth, MOS_MAX((uint32_t)pSurfaceParam->rcMaxSrc.right, MHW_VEBOX_MIN_WIDTH)),
2817 wWidthAlignUnit);
2818 MHW_NORMALMESSAGE("bVEBOXCroppingUsed = false, pSurfaceParam->rcMaxSrc.bottom: %d, pSurfaceParam->rcMaxSrc.right: %d; pdwSurfaceHeight: %d, pdwSurfaceWidth: %d;",
2819 (uint32_t)pSurfaceParam->rcMaxSrc.bottom,
2820 (uint32_t)pSurfaceParam->rcMaxSrc.right,
2821 *pdwSurfaceHeight,
2822 *pdwSurfaceWidth);
2823 }
2824
2825 finish:
2826 return eStatus;
2827 }
2828
AddVeboxSurfaceControlBits(PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,uint32_t * pSurfCtrlBits)2829 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxSurfaceControlBits(
2830 PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,
2831 uint32_t *pSurfCtrlBits)
2832 {
2833 PLATFORM Platform = {};
2834 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2835
2836 mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *pVeboxSurfCtrlBits;
2837
2838 MHW_CHK_NULL(pVeboxSurfCntlParams);
2839 MHW_CHK_NULL(pSurfCtrlBits);
2840 MHW_CHK_NULL(m_osInterface);
2841
2842 m_osInterface->pfnGetPlatform(m_osInterface, &Platform);
2843
2844 pVeboxSurfCtrlBits = (mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD *)pSurfCtrlBits;
2845
2846 if (pVeboxSurfCntlParams->CompressionMode != MOS_MMC_DISABLED)
2847 {
2848 MHW_CHK_NULL(pVeboxSurfCtrlBits);
2849 pVeboxSurfCtrlBits->DW0.MemoryCompressionEnable = 1;
2850
2851 if (pVeboxSurfCntlParams->CompressionMode == MOS_MMC_RC)
2852 {
2853 pVeboxSurfCtrlBits->DW0.CompressionType = 1;
2854 }
2855 }
2856
2857 finish:
2858 return eStatus;
2859 }
2860
2861
AddVeboxTilingConvert(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VEBOX_SURFACE_PARAMS inSurParams,PMHW_VEBOX_SURFACE_PARAMS outSurParams)2862 MOS_STATUS MhwVeboxInterfaceG12::AddVeboxTilingConvert(
2863 PMOS_COMMAND_BUFFER cmdBuffer,
2864 PMHW_VEBOX_SURFACE_PARAMS inSurParams,
2865 PMHW_VEBOX_SURFACE_PARAMS outSurParams)
2866 {
2867 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2868 PMOS_RESOURCE surface = nullptr;
2869 PMOS_RESOURCE inputSurface;
2870 PMOS_RESOURCE outputSurface;
2871 mhw_vebox_g12_X::VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD veboxInputSurfCtrlBits, veboxOutputSurfCtrlBits;
2872 mhw_vebox_g12_X::VEBOX_TILING_CONVERT_CMD cmd;
2873 MHW_RESOURCE_PARAMS ResourceParams = { 0 };
2874
2875 MHW_CHK_NULL(cmdBuffer);
2876 MHW_CHK_NULL(m_osInterface);
2877 MHW_CHK_NULL(inSurParams);
2878 MHW_CHK_NULL(outSurParams);
2879
2880 inputSurface = inSurParams->pOsResource;
2881 outputSurface = outSurParams->pOsResource;
2882
2883 MHW_CHK_NULL(inputSurface);
2884 MHW_CHK_NULL(outputSurface);
2885
2886 // Set up VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS
2887 MOS_ZeroMemory(&veboxInputSurfCtrlBits, sizeof(veboxInputSurfCtrlBits));
2888 MOS_ZeroMemory(&veboxOutputSurfCtrlBits, sizeof(veboxOutputSurfCtrlBits));
2889
2890 veboxInputSurfCtrlBits.DW0.IndexToMemoryObjectControlStateMocsTables =
2891 veboxOutputSurfCtrlBits.DW0.IndexToMemoryObjectControlStateMocsTables =
2892 (m_osInterface->pfnCachePolicyGetMemoryObject(
2893 MOS_MP_RESOURCE_USAGE_DEFAULT,
2894 m_osInterface->pfnGetGmmClientContext(m_osInterface))).Gen12.Index;
2895
2896 // Set Input surface compression status
2897 if (inSurParams->CompressionMode != MOS_MMC_DISABLED)
2898 {
2899 veboxInputSurfCtrlBits.DW0.MemoryCompressionEnable = true;
2900
2901 if (inSurParams->CompressionMode == MOS_MMC_RC)
2902 {
2903 veboxInputSurfCtrlBits.DW0.CompressionType = 1;
2904 }
2905 else
2906 {
2907 veboxInputSurfCtrlBits.DW0.CompressionType = 0;
2908 }
2909 }
2910
2911 switch (inputSurface->TileType)
2912 {
2913 case MOS_TILE_YF:
2914 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
2915 break;
2916 case MOS_TILE_YS:
2917 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
2918 break;
2919 default:
2920 veboxInputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
2921 break;
2922 }
2923
2924 // Set Output surface compression status
2925 if (outputSurface)
2926 {
2927 // Double Buffer copy
2928 surface = outputSurface;
2929
2930 if (outSurParams->CompressionMode != MOS_MMC_DISABLED)
2931 {
2932 veboxInputSurfCtrlBits.DW0.MemoryCompressionEnable = true;
2933
2934 if (outSurParams->CompressionMode == MOS_MMC_RC)
2935 {
2936 veboxInputSurfCtrlBits.DW0.CompressionType = 1;
2937 }
2938 else
2939 {
2940 veboxInputSurfCtrlBits.DW0.CompressionType = 0;
2941 }
2942 }
2943
2944 if (surface)
2945 {
2946 switch (surface->TileType)
2947 {
2948 case MOS_TILE_YF:
2949 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYF;
2950 break;
2951 case MOS_TILE_YS:
2952 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_TILEYS;
2953 break;
2954 default:
2955 veboxOutputSurfCtrlBits.DW0.TiledResourceModeForOutputFrameSurfaceBaseAddress = TRMODE_NONE;
2956 break;
2957 }
2958 }
2959
2960 }
2961 else
2962 {
2963 // In-Place Resolve
2964 surface = inputSurface;
2965
2966 if (inSurParams->CompressionMode == MOS_MMC_MC)
2967 {
2968 veboxOutputSurfCtrlBits.DW0.MemoryCompressionEnable = true;
2969 veboxOutputSurfCtrlBits.DW0.CompressionType = 1;
2970 }
2971 }
2972
2973 MOS_ZeroMemory(&ResourceParams, sizeof(MHW_RESOURCE_PARAMS));
2974 InitMocsParams(ResourceParams, &cmd.DW1_2.Value[0], 1, 6);
2975 ResourceParams.presResource = inputSurface;
2976 ResourceParams.HwCommandType = MOS_VEBOX_TILING_CONVERT;
2977
2978 // set up DW[2:1], input graphics address
2979 ResourceParams.dwLocationInCmd = 1;
2980 ResourceParams.pdwCmd = &(cmd.DW1_2.Value[0]);
2981 ResourceParams.bIsWritable = false;
2982 ResourceParams.dwOffset = inSurParams->dwOffset + veboxInputSurfCtrlBits.DW0.Value;
2983 MHW_CHK_STATUS(pfnAddResourceToCmd(m_osInterface, cmdBuffer, &ResourceParams));
2984
2985 MOS_ZeroMemory(&ResourceParams, sizeof(MHW_RESOURCE_PARAMS));
2986 InitMocsParams(ResourceParams, &cmd.DW3_4.Value[0], 1, 6);
2987
2988 if (outputSurface)
2989 {
2990 ResourceParams.presResource = outputSurface;
2991 }
2992 else
2993 {
2994 ResourceParams.presResource = inputSurface;
2995 }
2996
2997 ResourceParams.HwCommandType = MOS_VEBOX_TILING_CONVERT;
2998
2999 // set up DW[4:3], output graphics address
3000 ResourceParams.dwLocationInCmd = 3;
3001 ResourceParams.pdwCmd = &(cmd.DW3_4.Value[0]);
3002 ResourceParams.bIsWritable = true;
3003 ResourceParams.dwOffset =
3004 (outputSurface != nullptr ? outSurParams->dwOffset : inSurParams->dwOffset) + veboxOutputSurfCtrlBits.DW0.Value;
3005 MHW_CHK_STATUS(pfnAddResourceToCmd(m_osInterface, cmdBuffer, &ResourceParams));
3006
3007 Mos_AddCommand(cmdBuffer, &cmd, cmd.byteSize);
3008
3009 finish:
3010 return eStatus;
3011 }
3012
3013
SetVeboxChromaParams(MHW_VEBOX_CHROMA_PARAMS * chromaParams)3014 MOS_STATUS MhwVeboxInterfaceG12::SetVeboxChromaParams(
3015 MHW_VEBOX_CHROMA_PARAMS *chromaParams)
3016 {
3017 MHW_CHK_NULL_RETURN(chromaParams);
3018 MOS_SecureMemcpy(&m_chromaParams, sizeof(MHW_VEBOX_CHROMA_PARAMS), chromaParams, sizeof(MHW_VEBOX_CHROMA_PARAMS));
3019
3020 return MOS_STATUS_SUCCESS;
3021 }
3022
SetVeboxLaceColorParams(MHW_LACE_COLOR_CORRECTION * pLaceColorParams)3023 MOS_STATUS MhwVeboxInterfaceG12::SetVeboxLaceColorParams(
3024 MHW_LACE_COLOR_CORRECTION *pLaceColorParams)
3025 {
3026 MHW_CHK_NULL_RETURN(pLaceColorParams);
3027 MOS_SecureMemcpy(&m_laceColorCorrection, sizeof(MHW_LACE_COLOR_CORRECTION), pLaceColorParams, sizeof(MHW_LACE_COLOR_CORRECTION));
3028
3029 return MOS_STATUS_SUCCESS;
3030 }
3031
3032 //!
3033 //! \brief Create Gpu Context for Vebox
3034 //! \details Create Gpu Context for Vebox
3035 //! \param [in] pOsInterface
3036 //! OS interface
3037 //! \param [in] VeboxGpuContext
3038 //! Vebox Gpu Context
3039 //! \param [in] VeboxGpuNode
3040 //! Vebox Gpu Node
3041 //! \return MOS_STATUS
3042 //! MOS_STATUS_SUCCESS if success, else fail reason
3043 //!
CreateGpuContext(PMOS_INTERFACE pOsInterface,MOS_GPU_CONTEXT VeboxGpuContext,MOS_GPU_NODE VeboxGpuNode)3044 MOS_STATUS MhwVeboxInterfaceG12::CreateGpuContext(
3045 PMOS_INTERFACE pOsInterface,
3046 MOS_GPU_CONTEXT VeboxGpuContext,
3047 MOS_GPU_NODE VeboxGpuNode)
3048 {
3049 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3050
3051 MHW_CHK_NULL(pOsInterface);
3052
3053 Mos_SetVirtualEngineSupported(pOsInterface, true);
3054 Mos_CheckVirtualEngineSupported(pOsInterface, true, true);
3055
3056 if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(pOsInterface))
3057 {
3058 MOS_GPUCTX_CREATOPTIONS createOption;
3059
3060 // Create VEBOX/VEBOX2 Context
3061 MHW_CHK_STATUS(pOsInterface->pfnCreateGpuContext(
3062 pOsInterface,
3063 VeboxGpuContext,
3064 VeboxGpuNode,
3065 &createOption));
3066 }
3067 else
3068 {
3069 MOS_GPUCTX_CREATOPTIONS_ENHANCED createOptionenhanced;
3070
3071 createOptionenhanced.LRCACount = 1;
3072 createOptionenhanced.UsingSFC = true;
3073
3074 // Create VEBOX/VEBOX2 Context
3075 MHW_CHK_STATUS(pOsInterface->pfnCreateGpuContext(
3076 pOsInterface,
3077 VeboxGpuContext,
3078 VeboxGpuNode,
3079 &createOptionenhanced));
3080 }
3081
3082 finish:
3083 return eStatus;
3084 }
3085