1 /*===================== begin_copyright_notice ================================== 2 3 Copyright (c) 2017-2021, Intel Corporation 4 5 Permission is hereby granted, free of charge, to any person obtaining a 6 copy of this software and associated documentation files (the "Software"), 7 to deal in the Software without restriction, including without limitation 8 the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 and/or sell copies of the Software, and to permit persons to whom the 10 Software is furnished to do so, subject to the following conditions: 11 12 The above copyright notice and this permission notice shall be included 13 in all copies or substantial portions of the Software. 14 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 16 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 OTHER DEALINGS IN THE SOFTWARE. 22 23 ======================= end_copyright_notice ==================================*/ 24 25 //! \file mhw_vdbox_vdenc_g12_X.h 26 //! \details Defines functions for constructing Vdbox Vdenc commands on Gen12-based platforms 27 //! 28 29 #ifndef __MHW_VDBOX_VDENC_G12_X_H__ 30 #define __MHW_VDBOX_VDENC_G12_X_H__ 31 32 #include "mhw_vdbox_vdenc_generic.h" 33 #include "mhw_vdbox_vdenc_hwcmd_g12_X.h" 34 #include "mhw_vdbox_g12_X.h" 35 36 #define VDENCHEVC_RSC_OFFSET_C420OR422_DXX_LCU32OR64_4K_G12 1824 37 #define VDENCHEVC_RSC_OFFSET_C420OR422_DXX_LCU32OR64_8K_G12 2304 38 #define VDENCHEVC_RSC_OFFSET_C444_D8_LCU32OR64_4K_G12 1568 39 #define VDENCHEVC_RSC_OFFSET_C444_D8_LCU32OR64_8K_G12 2112 40 #define VDENCHEVC_RSC_OFFSET_C444_D10_LCU32OR64_4K_G12 2336 41 #define VDENCHEVC_RSC_OFFSET_C444_D10_LCU32OR64_8K_G12 1600 42 #define VDENCHEVC_RSC_OFFSET_C444_D12_LCU32OR64_4K_G12 2336 43 #define VDENCHEVC_RSC_OFFSET_C444_D12_LCU32OR64_8K_G12 1600 44 45 // TGL rowstore Cache Values 46 #define VP9VDENCROWSTORE_BASEADDRESS_1536 1536 47 #define VP9VDENCROWSTORE_BASEADDRESS_2304 2304 48 #define VP9VDENCROWSTORE_BASEADDRESS_2368 2368 49 #define VP9VDENCROWSTORE_BASEADDRESS_2112 2112 50 #define VP9VDENCROWSTORE_BASEADDRESS_1920 1920 51 #define VP9VDENCROWSTORE_BASEADDRESS_768 768 52 #define RESERVED_VDENC_ROWSTORE_BASEADDRESS 2370 53 #define RESERVED_VDENC_IPDL_ROWSTORE_BASEADDRESS 384 54 #define AVC_VDENC_IPDL_ROWSTORE_BASEADDRESS 512 55 56 #define GEN12_AVC_VDENC_ROWSTORE_BASEADDRESS 1280 57 #define GEN12_AVC_VDENC_ROWSTORE_BASEADDRESS_MBAFF 1536 58 #define GEN12_VP8_VDENC_ROWSTORE_BASEADDRESS 1536 59 60 #define OFFSET_OF(TYPE, MEMBER) ((size_t) & ((TYPE *)0)->MEMBER ) 61 62 typedef struct _MHW_VDBOX_VDENC_CONTROL_STATE_PARAMS 63 { 64 bool bVdencInitialization; 65 }MHW_VDBOX_VDENC_CONTROL_STATE_PARAMS, *PMHW_VDBOX_VDENC_CONTROL_STATE_PARAMS; 66 67 struct MHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12 : public MHW_VDBOX_VDENC_WALKER_STATE_PARAMS 68 { 69 // GEN11+ tiling support 70 PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G12 pTileCodingParams = nullptr; 71 uint32_t dwNumberOfPipes = 0; 72 uint32_t dwTileId = 0; 73 uint32_t IBCControl = 0; 74 uint32_t RowStaticInfo_31_0 = 0; 75 uint32_t RowStaticInfo_63_32 = 0; 76 uint32_t RowStaticInfo_95_64 = 0; 77 uint32_t RowStaticInfo_127_96 = 0; 78 uint32_t ctbSize = 0; 79 uint32_t minCodingBlkSize = 0; 80 uint32_t frameWidthMinus1 = 0; 81 uint32_t frameHeightMinus1 = 0; 82 }; 83 using PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12 = MHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12 *; 84 85 struct MHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12 86 { 87 union 88 { 89 struct 90 { 91 uint16_t bWaitDoneHEVC : 1; 92 uint16_t bWaitDoneVDENC : 1; 93 uint16_t bWaitDoneMFL : 1; 94 uint16_t bWaitDoneMFX : 1; 95 uint16_t bWaitDoneVDCmdMsgParser : 1; 96 uint16_t bFlushHEVC : 1; 97 uint16_t bFlushVDENC : 1; 98 uint16_t bFlushMFL : 1; 99 uint16_t bFlushMFX : 1; 100 uint16_t bWaitDoneAV1 : 1; 101 uint16_t bFlushAV1 : 1; 102 uint16_t : 5; 103 }; 104 struct 105 { 106 uint16_t Value; 107 }; 108 }Flags; 109 }; 110 using PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12 = MHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12 *; 111 112 //! MHW Vdbox Vdenc interface for Gen12 113 /*! 114 This class defines the Vdenc command construction functions for Gen12 platforms as template 115 */ 116 template <typename TVdencCmds> 117 class MhwVdboxVdencInterfaceG12 : public MhwVdboxVdencInterfaceGeneric<TVdencCmds> 118 { 119 protected: 120 enum CommandsNumberOfAddresses 121 { 122 MI_FLUSH_DW_CMD_NUMBER_OF_ADDRESSES = 1, 123 MI_BATCH_BUFFER_START_CMD_NUMBER_OF_ADDRESSES = 1, 124 VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES = 21 125 }; 126 127 enum VdencSurfaceFormat 128 { 129 vdencSurfaceFormatYuv422 = 0x0, 130 vdencSurfaceFormatRgba4444 = 0x1, 131 vdencSurfaceFormatYuv444 = 0x2, 132 vdencSurfaceFormatP010Variant = 0x3, 133 vdencSurfaceFormatPlanar420_8 = 0x4, 134 vdencSurfaceFormatYcrcbSwapy422 = 0x5, 135 vdencSurfaceFormatYcrcbSwapuv422 = 0x6, 136 vdencSurfaceFormatYcrcbSwapuvy422 = 0x7, 137 vdencSurfaceFormatY216 = 0x8, 138 vdencSurfaceFormatY210 = 0x8, // Same value is used to represent Y216 and Y210 139 vdencSurfaceFormatRgba_10_10_10_2 = 0x9, 140 vdencSurfaceFormatY410 = 0xa, 141 vdencSurfaceFormatNv21 = 0xb, 142 vdencSurfaceFormatY416 = 0xc, 143 vdencSurfaceFormatP010 = 0xd, 144 vdencSurfaceFormatPlanarP016 = 0xe, 145 vdencSurfaceFormatY8Unorm = 0xf, 146 vdencSurfaceFormatY16 = 0x10, 147 vdencSurfaceFormatY216Variant = 0x11, 148 vdencSurfaceFormatY416Variant = 0x12, 149 vdencSurfaceFormatYuyvVariant = 0x13, 150 vdencSurfaceFormatAyuvVariant = 0x14, 151 }; 152 153 enum VDENC_WALKER_STATE_IBC_CONTROL 154 { 155 VDENC_WALKER_STATE_COMMAND_IBC_CONTROL_IBC_DISABLED_G12 = 0x0, 156 VDENC_WALKER_STATE_COMMAND_IBC_CONTROL_IBC_ONLY_LBC_G12 = 0x1, 157 VDENC_WALKER_STATE_COMMAND_IBC_CONTROL_IBC_ENABLED_TBCLBC_G12 = 0x3, 158 }; 159 InitRowstoreUserFeatureSettings()160 MOS_STATUS InitRowstoreUserFeatureSettings() override 161 { 162 MHW_FUNCTION_ENTER; 163 164 MOS_USER_FEATURE_VALUE_DATA userFeatureData; 165 MEDIA_FEATURE_TABLE *skuTable = this->m_osInterface->pfnGetSkuTable(this->m_osInterface); 166 167 MHW_MI_CHK_NULL(skuTable); 168 169 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData)); 170 if (this->m_osInterface->bSimIsActive) 171 { 172 // Disable RowStore Cache on simulation by default 173 userFeatureData.u32Data = 1; 174 } 175 else 176 { 177 userFeatureData.u32Data = 0; 178 } 179 180 userFeatureData.i32DataFlag = MOS_USER_FEATURE_VALUE_DATA_FLAG_CUSTOM_DEFAULT_VALUE_TYPE; 181 #if (_DEBUG || _RELEASE_INTERNAL) 182 MOS_UserFeature_ReadValue_ID( 183 nullptr, 184 __MEDIA_USER_FEATURE_VALUE_ROWSTORE_CACHE_DISABLE_ID, 185 &userFeatureData, 186 this->m_osInterface->pOsContext); 187 #endif // _DEBUG || _RELEASE_INTERNAL 188 this->m_rowstoreCachingSupported = userFeatureData.i32Data ? false : true; 189 190 if (this->m_rowstoreCachingSupported) 191 { 192 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData)); 193 #if (_DEBUG || _RELEASE_INTERNAL) 194 MOS_UserFeature_ReadValue_ID( 195 nullptr, 196 __MEDIA_USER_FEATURE_VALUE_VDENCROWSTORECACHE_DISABLE_ID, 197 &userFeatureData, 198 this->m_osInterface->pOsContext); 199 #endif // _DEBUG || _RELEASE_INTERNAL 200 this->m_vdencRowStoreCache.bSupported = userFeatureData.i32Data ? false : true; 201 } 202 203 return MOS_STATUS_SUCCESS; 204 } 205 206 //! 207 //! \brief Translate MOS type format to vdenc surface raw format 208 //! \details VDBOX protected function to translate mos format to media state format 209 //! \param MOS_FORMAT Format 210 //! [in] MOS type format 211 //! \return VdencSurfaceFormat 212 //! media state surface format 213 //! MosFormatToVdencSurfaceRawFormat(MOS_FORMAT format)214 VdencSurfaceFormat MosFormatToVdencSurfaceRawFormat(MOS_FORMAT format) 215 { 216 MHW_FUNCTION_ENTER; 217 218 switch (format) 219 { 220 case Format_A8R8G8B8: 221 case Format_X8R8G8B8: 222 case Format_A8B8G8R8: 223 return vdencSurfaceFormatRgba4444; 224 case Format_NV12: 225 case Format_NV11: 226 case Format_P208: 227 case Format_IMC1: 228 case Format_IMC2: 229 case Format_IMC3: 230 case Format_IMC4: 231 return vdencSurfaceFormatPlanar420_8; 232 case Format_400P: 233 case Format_P8: 234 return vdencSurfaceFormatY8Unorm; 235 case Format_UYVY: 236 return vdencSurfaceFormatYcrcbSwapy422; 237 case Format_YVYU: 238 return vdencSurfaceFormatYcrcbSwapuv422; 239 case Format_VYUY: 240 return vdencSurfaceFormatYcrcbSwapuvy422; 241 case Format_444P: 242 case Format_AYUV: 243 return vdencSurfaceFormatYuv444; 244 case Format_YUY2: 245 case Format_YUYV: 246 return vdencSurfaceFormatYuv422; 247 case Format_P010: 248 return vdencSurfaceFormatP010; 249 case Format_R10G10B10A2: 250 case Format_B10G10R10A2: 251 return vdencSurfaceFormatRgba_10_10_10_2; 252 // Only Y210 supported now, allocated as Y216 format by 3D driver 253 case Format_Y210: 254 case Format_Y216: 255 return vdencSurfaceFormatY216; 256 case Format_Y410: 257 return vdencSurfaceFormatY410; 258 case Format_NV21: 259 return vdencSurfaceFormatNv21; 260 default: 261 return vdencSurfaceFormatPlanar420_8; 262 } 263 264 return vdencSurfaceFormatYuv422; 265 } 266 267 //! 268 //! \brief Translate MOS type format to vdenc surface recon format 269 //! \details VDBOX protected function to translate mos format to media state recon format 270 //! \param MOS_FORMAT Format 271 //! [in] MOS type format 272 //! \return VdencSurfaceFormat 273 //! media state surface format 274 //! MosFormatToVdencSurfaceReconFormat(MOS_FORMAT format)275 VdencSurfaceFormat MosFormatToVdencSurfaceReconFormat(MOS_FORMAT format) 276 { 277 MHW_FUNCTION_ENTER; 278 279 switch (format) 280 { 281 case Format_A8R8G8B8: 282 case Format_X8R8G8B8: 283 case Format_A8B8G8R8: 284 return vdencSurfaceFormatRgba4444; 285 case Format_NV12: 286 case Format_IMC1: 287 case Format_IMC2: 288 case Format_IMC3: 289 case Format_IMC4: 290 return vdencSurfaceFormatPlanar420_8; 291 case Format_400P: 292 case Format_P8: 293 return vdencSurfaceFormatY8Unorm; 294 case Format_UYVY: 295 return vdencSurfaceFormatYcrcbSwapy422; 296 case Format_YVYU: 297 return vdencSurfaceFormatYcrcbSwapuv422; 298 case Format_VYUY: 299 return vdencSurfaceFormatYcrcbSwapuvy422; 300 case Format_444P: 301 case Format_AYUV: 302 return vdencSurfaceFormatAyuvVariant; 303 case Format_YUY2: 304 case Format_YUYV: 305 return vdencSurfaceFormatYuyvVariant; 306 case Format_P010: 307 return vdencSurfaceFormatP010Variant; 308 case Format_R10G10B10A2: 309 return vdencSurfaceFormatRgba_10_10_10_2; 310 case Format_Y216: 311 return vdencSurfaceFormatY216Variant; 312 case Format_Y410: 313 return vdencSurfaceFormatY416Variant; 314 case Format_NV21: 315 return vdencSurfaceFormatNv21; 316 default: 317 return vdencSurfaceFormatPlanar420_8; 318 } 319 } 320 321 //! 322 //! \brief Adds VD Pipeline Flush command in command buffer 323 //! \details Client facing function to add VD Pipeline Flush command in command buffer 324 //! \param [in] cmdBuffer 325 //! Command buffer to which HW command is added 326 //! \param [in] params 327 //! Params structure used to populate the HW command 328 //! \return MOS_STATUS 329 //! MOS_STATUS_SUCCESS if success, else fail type 330 //! AddVdPipelineFlushCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS params)331 MOS_STATUS AddVdPipelineFlushCmd( 332 PMOS_COMMAND_BUFFER cmdBuffer, 333 PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS params) override 334 { 335 MHW_FUNCTION_ENTER; 336 337 MHW_MI_CHK_NULL(cmdBuffer); 338 MHW_MI_CHK_NULL(params); 339 340 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 341 342 typename TVdencCmds::VD_PIPELINE_FLUSH_CMD cmd; 343 PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12 paramsG12 = (PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12)params; 344 345 cmd.DW1.HevcPipelineDone = params->Flags.bWaitDoneHEVC; 346 cmd.DW1.VdencPipelineDone = params->Flags.bWaitDoneVDENC; 347 cmd.DW1.MflPipelineDone = params->Flags.bWaitDoneMFL; 348 cmd.DW1.MfxPipelineDone = params->Flags.bWaitDoneMFX; 349 cmd.DW1.VdCommandMessageParserDone = params->Flags.bWaitDoneVDCmdMsgParser; 350 cmd.DW1.HevcPipelineCommandFlush = params->Flags.bFlushHEVC; 351 cmd.DW1.VdencPipelineCommandFlush = params->Flags.bFlushVDENC; 352 cmd.DW1.MflPipelineCommandFlush = params->Flags.bFlushMFL; 353 cmd.DW1.MfxPipelineCommandFlush = params->Flags.bFlushMFX; 354 cmd.DW1.AvpPipelineDone = paramsG12->Flags.bWaitDoneAV1; 355 cmd.DW1.AvpPipelineCommandFlush = paramsG12->Flags.bFlushAV1; 356 357 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 358 359 return MOS_STATUS_SUCCESS; 360 } 361 362 public: 363 //! 364 //! \brief Constructor 365 //! MhwVdboxVdencInterfaceG12(PMOS_INTERFACE osInterface)366 MhwVdboxVdencInterfaceG12(PMOS_INTERFACE osInterface) : MhwVdboxVdencInterfaceGeneric<TVdencCmds>(osInterface) 367 { 368 MHW_FUNCTION_ENTER; 369 370 this->m_rhoDomainStatsEnabled = true; 371 InitRowstoreUserFeatureSettings(); 372 } 373 GetVdencCmd1Size()374 inline virtual uint32_t GetVdencCmd1Size() override 375 { 376 return 0; 377 } 378 GetVdencCmd2Size()379 inline virtual uint32_t GetVdencCmd2Size() override 380 { 381 return 0; 382 } 383 384 //! 385 //! \brief Destructor 386 //! ~MhwVdboxVdencInterfaceG12()387 virtual ~MhwVdboxVdencInterfaceG12() { } 388 GetRowstoreCachingAddrs(PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams)389 MOS_STATUS GetRowstoreCachingAddrs( 390 PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams) override 391 { 392 MHW_FUNCTION_ENTER; 393 394 MHW_MI_CHK_NULL(rowstoreParams); 395 396 bool is8bit = rowstoreParams->ucBitDepthMinus8 == 0; 397 bool is10bit = rowstoreParams->ucBitDepthMinus8 == 1 || rowstoreParams->ucBitDepthMinus8 == 2; 398 bool is12bit = rowstoreParams->ucBitDepthMinus8 > 2; 399 bool isLcu32or64 = rowstoreParams->ucLCUSize == 32 || rowstoreParams->ucLCUSize == 64; 400 bool isGt2k = rowstoreParams->dwPicWidth > 2048; 401 bool isGt4k = rowstoreParams->dwPicWidth > 4096; 402 bool isGt8k = rowstoreParams->dwPicWidth > 8192; 403 uint32_t index = 0; 404 405 bool avc = rowstoreParams->Mode == CODECHAL_ENCODE_MODE_AVC; 406 bool vp8 = rowstoreParams->Mode == CODECHAL_ENCODE_MODE_VP8; 407 bool widthLE4K = rowstoreParams->dwPicWidth <= MHW_VDBOX_PICWIDTH_4K; 408 bool mbaffOrField = rowstoreParams->bMbaff || !rowstoreParams->bIsFrame; 409 this->m_vdencRowStoreCache.bEnabled = false; 410 this->m_vdencRowStoreCache.dwAddress = 0; 411 412 //VDENC row store cache setting for AVC and VP8 413 this->m_vdencRowStoreCache.bEnabled = this->m_vdencRowStoreCache.bSupported && widthLE4K && (avc || vp8); 414 this->m_vdencRowStoreCache.dwAddress = avc ? (mbaffOrField ? GEN12_AVC_VDENC_ROWSTORE_BASEADDRESS_MBAFF : 415 GEN12_AVC_VDENC_ROWSTORE_BASEADDRESS) : GEN12_VP8_VDENC_ROWSTORE_BASEADDRESS; 416 this->m_vdencRowStoreCache.dwAddress = this->m_vdencRowStoreCache.bEnabled ? this->m_vdencRowStoreCache.dwAddress : 0; 417 418 if (this->m_vdencRowStoreCache.bSupported && rowstoreParams->Mode == CODECHAL_ENCODE_MODE_HEVC) 419 { 420 if (rowstoreParams->ucChromaFormat != HCP_CHROMA_FORMAT_YUV444) 421 { 422 index = 2 * isGt4k + isLcu32or64; 423 } 424 else 425 { 426 uint32_t subidx = is12bit ? 2 : (is10bit ? 1 : 0); 427 index = 4 + 6 * isLcu32or64 + 2 * subidx + isGt4k; 428 } 429 430 if (!isGt8k) 431 { 432 this->m_vdencRowStoreCache.bEnabled = RowStoreCacheEnableHEVC[index][3]; 433 this->m_vdencRowStoreCache.dwAddress = RowStoreCacheAddrHEVC[index][3]; 434 } 435 } 436 437 //VP9 VDENC 438 if (this->m_vdencRowStoreCache.bSupported && rowstoreParams->Mode == CODECHAL_ENCODE_MODE_VP9) 439 { 440 if ((rowstoreParams->ucChromaFormat >= HCP_CHROMA_FORMAT_YUV420) && 441 (rowstoreParams->ucChromaFormat <= HCP_CHROMA_FORMAT_YUV444)) 442 { 443 index = 4 * (rowstoreParams->ucChromaFormat - HCP_CHROMA_FORMAT_YUV420) + 2 * (!is8bit) + isGt4k; 444 } 445 else 446 { 447 return MOS_STATUS_SUCCESS; 448 } 449 450 if (rowstoreParams->ucChromaFormat == HCP_CHROMA_FORMAT_YUV444 && !is8bit) 451 { 452 index += isGt2k; 453 } 454 455 if (!isGt8k) 456 { 457 this->m_vdencRowStoreCache.bEnabled = RowStoreCacheEnableVP9[index][3]; 458 this->m_vdencRowStoreCache.dwAddress = RowStoreCacheAddrVP9[index][3]; 459 } 460 } 461 462 if (this->m_vdencRowStoreCache.bSupported && rowstoreParams->Mode == CODECHAL_ENCODE_RESERVED_0) 463 { 464 this->m_vdencRowStoreCache.bEnabled = true; 465 this->m_vdencRowStoreCache.dwAddress = RESERVED_VDENC_ROWSTORE_BASEADDRESS; 466 467 //IPDL 468 this->m_vdencIpdlRowstoreCache.dwAddress = RESERVED_VDENC_IPDL_ROWSTORE_BASEADDRESS; 469 470 } 471 else if (this->m_vdencRowStoreCache.bSupported && rowstoreParams->Mode == CODECHAL_ENCODE_MODE_AVC) 472 { 473 this->m_vdencRowStoreCache.bEnabled = true; 474 475 //IPDL 476 this->m_vdencIpdlRowstoreCache.dwAddress = AVC_VDENC_IPDL_ROWSTORE_BASEADDRESS; 477 478 } 479 480 return MOS_STATUS_SUCCESS; 481 } 482 GetAvcMaxSize(uint32_t waAddDelayInVDEncDynamicSlice)483 uint32_t GetAvcMaxSize(uint32_t waAddDelayInVDEncDynamicSlice) 484 { 485 uint32_t maxSize = 486 TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::byteSize + 487 TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD::byteSize + 488 TVdencCmds::VDENC_REF_SURFACE_STATE_CMD::byteSize + 489 TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD::byteSize + 490 TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD::byteSize + 491 TVdencCmds::VDENC_CONST_QPT_STATE_CMD::byteSize + 492 TVdencCmds::VDENC_IMG_STATE_CMD::byteSize + 493 TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize + 494 TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize; 495 496 if (waAddDelayInVDEncDynamicSlice) 497 { 498 maxSize += TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize * MHW_VDBOX_VDENC_DYNAMIC_SLICE_WA_COUNT; 499 } 500 501 return maxSize; 502 } 503 GetReserved0MaxSize()504 uint32_t GetReserved0MaxSize() 505 { 506 uint maxSize = 507 TVdencCmds::VDENC_CONTROL_STATE_CMD::byteSize + 508 TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::byteSize + 509 TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD::byteSize + 510 TVdencCmds::VDENC_REF_SURFACE_STATE_CMD::byteSize + 511 TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD::byteSize + 512 TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD::byteSize + 513 TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize + 514 TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize;; 515 516 return maxSize; 517 } 518 GetVdencStateCommandsDataSize(uint32_t mode,uint32_t waAddDelayInVDEncDynamicSlice,uint32_t * commandsSize,uint32_t * patchListSize)519 MOS_STATUS GetVdencStateCommandsDataSize( 520 uint32_t mode, 521 uint32_t waAddDelayInVDEncDynamicSlice, 522 uint32_t *commandsSize, 523 uint32_t *patchListSize) override 524 { 525 MHW_FUNCTION_ENTER; 526 527 uint32_t maxSize = 0; 528 uint32_t patchListMaxSize = 0; 529 uint32_t standard = CodecHal_GetStandardFromMode(mode); 530 531 if (standard == CODECHAL_AVC) 532 { 533 maxSize = GetAvcMaxSize(waAddDelayInVDEncDynamicSlice); 534 patchListMaxSize = VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES; 535 } 536 else if (standard == CODECHAL_HEVC) 537 { 538 maxSize = 539 TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::byteSize + 540 TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD::byteSize + 541 TVdencCmds::VDENC_REF_SURFACE_STATE_CMD::byteSize + 542 TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD::byteSize + 543 TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD::byteSize + 544 TVdencCmds::VDENC_WEIGHTSOFFSETS_STATE_CMD::byteSize + 545 TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize + 546 TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize; 547 548 if (waAddDelayInVDEncDynamicSlice) 549 { 550 maxSize += TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize * MHW_VDBOX_VDENC_DYNAMIC_SLICE_WA_COUNT; 551 } 552 553 patchListMaxSize = VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES; 554 } 555 else if (standard == CODECHAL_VP9) 556 { 557 maxSize = 558 TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::byteSize + 559 TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD::byteSize + 560 TVdencCmds::VDENC_REF_SURFACE_STATE_CMD::byteSize + 561 TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD::byteSize + 562 TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD::byteSize + 563 TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize + 564 TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize; 565 566 if (waAddDelayInVDEncDynamicSlice) 567 { 568 maxSize += TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize * MHW_VDBOX_VDENC_DYNAMIC_SLICE_WA_COUNT; 569 } 570 571 patchListMaxSize = 572 MI_FLUSH_DW_CMD_NUMBER_OF_ADDRESSES + 573 MI_BATCH_BUFFER_START_CMD_NUMBER_OF_ADDRESSES + 574 VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES; 575 } 576 else if (standard == CODECHAL_RESERVED0) 577 { 578 maxSize = GetReserved0MaxSize(); 579 580 patchListMaxSize = 581 MI_FLUSH_DW_CMD_NUMBER_OF_ADDRESSES + 582 MI_BATCH_BUFFER_START_CMD_NUMBER_OF_ADDRESSES + 583 VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES; 584 } 585 else 586 { 587 MHW_ASSERTMESSAGE("Unsupported encode mode."); 588 *commandsSize = 0; 589 *patchListSize = 0; 590 return MOS_STATUS_UNKNOWN; 591 } 592 593 *commandsSize = maxSize; 594 *patchListSize = patchListMaxSize; 595 596 return MOS_STATUS_SUCCESS; 597 } 598 GetAvcSliceMaxSize()599 uint32_t GetAvcSliceMaxSize() 600 { 601 uint32_t maxSize = 602 TVdencCmds::VDENC_WEIGHTSOFFSETS_STATE_CMD::byteSize + 603 TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize + 604 TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize; 605 606 return maxSize; 607 } 608 GetReserved0TileMaxSize()609 uint32_t GetReserved0TileMaxSize() 610 { 611 uint32_t maxSize = GetVdencCmd1Size() + 612 GetVdencCmd2Size() + 613 TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize; 614 615 return maxSize; 616 } 617 GetVdencPrimitiveCommandsDataSize(uint32_t mode,uint32_t * commandsSize,uint32_t * patchListSize)618 MOS_STATUS GetVdencPrimitiveCommandsDataSize( 619 uint32_t mode, 620 uint32_t *commandsSize, 621 uint32_t *patchListSize) override 622 { 623 MHW_FUNCTION_ENTER; 624 625 uint32_t maxSize = 0; 626 uint32_t patchListMaxSize = 0; 627 uint32_t standard = CodecHal_GetStandardFromMode(mode); 628 629 if (standard == CODECHAL_AVC) 630 { 631 maxSize = GetAvcSliceMaxSize(); 632 patchListMaxSize = VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES; 633 } 634 else if (standard == CODECHAL_RESERVED0) 635 { 636 maxSize = GetReserved0TileMaxSize(); 637 } 638 else 639 { 640 MHW_ASSERTMESSAGE("Unsupported encode mode."); 641 *commandsSize = 0; 642 *patchListSize = 0; 643 return MOS_STATUS_UNKNOWN; 644 } 645 646 *commandsSize = maxSize; 647 *patchListSize = patchListMaxSize; 648 649 return MOS_STATUS_SUCCESS; 650 } 651 AddVdencPipeModeSelectCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS params)652 MOS_STATUS AddVdencPipeModeSelectCmd( 653 PMOS_COMMAND_BUFFER cmdBuffer, 654 PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS params) override 655 { 656 MHW_FUNCTION_ENTER; 657 658 MHW_MI_CHK_NULL(cmdBuffer); 659 MHW_MI_CHK_NULL(params); 660 auto paramsG12 = dynamic_cast<PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS_G12>(params); 661 MHW_MI_CHK_NULL(paramsG12); 662 typename TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD cmd; 663 664 cmd.DW1.StandardSelect = CodecHal_GetStandardFromMode(params->Mode); 665 cmd.DW1.ScalabilityMode = !(paramsG12->MultiEngineMode == MHW_VDBOX_HCP_MULTI_ENGINE_MODE_FE_LEGACY); 666 if (CODECHAL_ENCODE_MODE_HEVC == params->Mode || CODECHAL_ENCODE_RESERVED_0 == params->Mode) 667 { 668 cmd.DW1.FrameStatisticsStreamOutEnable = paramsG12->bBRCEnabled || paramsG12->bLookaheadPass; 669 } 670 // AVC VENC to be optimized later 671 else 672 { 673 cmd.DW1.FrameStatisticsStreamOutEnable = 1; 674 } 675 cmd.DW1.VdencPakObjCmdStreamOutEnable = params->bVdencPakObjCmdStreamOutEnable; 676 cmd.DW1.TlbPrefetchEnable = 1; 677 cmd.DW1.PakThresholdCheckEnable = params->bDynamicSliceEnable; 678 cmd.DW1.VdencStreamInEnable = params->bVdencStreamInEnable; 679 cmd.DW1.BitDepth = params->ucVdencBitDepthMinus8; 680 681 if (CODECHAL_ENCODE_MODE_HEVC == params->Mode || CODECHAL_ENCODE_MODE_VP9 == params->Mode || CODECHAL_ENCODE_RESERVED_0 == params->Mode) 682 { 683 cmd.DW1.PakChromaSubSamplingType = params->ChromaType; 684 } 685 // by default RGB to YUV using full to studio range 686 // can add a DDI flag to control if needed 687 cmd.DW1.OutputRangeControlAfterColorSpaceConversion = 1; 688 689 // for tile encoding 690 cmd.DW1.TileReplayEnable = paramsG12->bTileBasedReplayMode; 691 692 cmd.DW1.IsRandomAccess = paramsG12->bIsRandomAccess; 693 694 //Restriction: When this pre-fetch is enabled,TLB Prefetch Enable in VDENC_PIPE_MODE select (DW 1 bit 7) should be disabled. 695 cmd.DW2.HmeRegionPreFetchenable = 0; 696 697 // TLB prefetch performance improvement 698 if (params->Mode == CODECHAL_ENCODE_MODE_AVC) 699 { 700 cmd.DW3.PreFetchoffsetforsource = 7; 701 cmd.DW3.Numverticalreqminus1Src = 0; 702 } 703 else if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || CODECHAL_ENCODE_RESERVED_0 == params->Mode) 704 { 705 cmd.DW3.PreFetchoffsetforsource = 4; 706 cmd.DW3.Numverticalreqminus1Src = 1; 707 } 708 709 //Restriction : This field can be set only to planar source formats. 710 if (params->Format != Format_NV12 && params->Format != Format_P010) 711 { 712 cmd.DW3.SourceChromaTlbPreFetchenable = 0; 713 } 714 715 // For RGB encoding 716 if (paramsG12->bRGBEncodingMode) 717 { 718 cmd.DW1.RgbEncodingEnable = 1; 719 // To add the primary channel selection later here 720 } 721 722 // For parallel encode from display 723 if (paramsG12->bWirelessEncodeEnabled) 724 { 725 cmd.DW5.CaptureMode = TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::CAPTURE_MODE_UNNAMED1; 726 cmd.DW5.ParallelCaptureAndEncodeSessionId = paramsG12->ucWirelessSessionId; 727 cmd.DW5.TailPointerReadFrequency = 0x50; 728 } 729 730 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 731 732 return MOS_STATUS_SUCCESS; 733 } 734 AddVdencPipeBufAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS params)735 MOS_STATUS AddVdencPipeBufAddrCmd( 736 PMOS_COMMAND_BUFFER cmdBuffer, 737 PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS params) override 738 { 739 MOS_SURFACE details; 740 uint8_t refIdx; 741 742 MHW_FUNCTION_ENTER; 743 744 MHW_MI_CHK_NULL(cmdBuffer); 745 MHW_MI_CHK_NULL(params); 746 747 typename TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD cmd; 748 749 MOS_MEMCOMP_STATE mmcMode = MOS_MEMCOMP_DISABLED; 750 MHW_RESOURCE_PARAMS resourceParams; 751 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams)); 752 resourceParams.dwLsbNum = MHW_VDBOX_MFX_GENERAL_STATE_SHIFT; 753 resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR; 754 755 if (params->psRawSurface != nullptr) 756 { 757 cmd.OriginalUncompressedPicture.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(params->RawSurfMmcState) ? 1 : 0; 758 cmd.OriginalUncompressedPicture.PictureFields.DW0.CompressionType = MmcIsRc(params->RawSurfMmcState) ? 1 : 0; 759 cmd.OriginalUncompressedPicture.PictureFields.DW0.MemoryObjectControlState = 760 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_ENCODE].Value; 761 762 cmd.OriginalUncompressedPicture.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(params->psRawSurface->TileType); 763 764 resourceParams.presResource = ¶ms->psRawSurface->OsResource; 765 resourceParams.dwOffset = params->psRawSurface->dwOffset; 766 resourceParams.pdwCmd = (uint32_t*)&(cmd.OriginalUncompressedPicture.LowerAddress); 767 resourceParams.dwLocationInCmd = 10; 768 resourceParams.bIsWritable = false; 769 770 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 771 this->m_osInterface, 772 cmdBuffer, 773 &resourceParams)); 774 } 775 776 if (this->m_vdencRowStoreCache.bEnabled) 777 { 778 cmd.RowStoreScratchBuffer.BufferPictureFields.DW0.CacheSelect = TVdencCmds::VDENC_Surface_Control_Bits_CMD::CACHE_SELECT_UNNAMED1; 779 cmd.RowStoreScratchBuffer.LowerAddress.DW0.Value = this->m_vdencRowStoreCache.dwAddress << 6; 780 } 781 else if (!Mos_ResourceIsNull(params->presVdencIntraRowStoreScratchBuffer)) 782 { 783 cmd.RowStoreScratchBuffer.BufferPictureFields.DW0.MemoryObjectControlState = 784 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VDENC_ROW_STORE_BUFFER_CODEC].Value; 785 786 resourceParams.presResource = params->presVdencIntraRowStoreScratchBuffer; 787 resourceParams.dwOffset = 0; 788 resourceParams.pdwCmd = (uint32_t*)&(cmd.RowStoreScratchBuffer.LowerAddress); 789 resourceParams.dwLocationInCmd = 16; 790 resourceParams.bIsWritable = true; 791 792 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 793 this->m_osInterface, 794 cmdBuffer, 795 &resourceParams)); 796 } 797 if (params->psFwdRefSurface0) 798 { 799 resourceParams.presResource = ¶ms->psFwdRefSurface0->OsResource; 800 resourceParams.dwOffset = 0; 801 resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef0.LowerAddress); 802 resourceParams.dwLocationInCmd = 22; 803 resourceParams.bIsWritable = true; 804 805 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 806 this->m_osInterface, 807 cmdBuffer, 808 &resourceParams)); 809 } 810 811 if (params->psFwdRefSurface1) 812 { 813 resourceParams.presResource = ¶ms->psFwdRefSurface1->OsResource; 814 resourceParams.dwOffset = 0; 815 resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef1.LowerAddress); 816 resourceParams.dwLocationInCmd = 25; 817 resourceParams.bIsWritable = true; 818 819 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 820 this->m_osInterface, 821 cmdBuffer, 822 &resourceParams)); 823 } 824 825 if (params->psFwdRefSurface2) 826 { 827 resourceParams.presResource = ¶ms->psFwdRefSurface2->OsResource; 828 resourceParams.dwOffset = 0; 829 resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef2.LowerAddress); 830 resourceParams.dwLocationInCmd = 28; 831 resourceParams.bIsWritable = true; 832 833 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 834 this->m_osInterface, 835 cmdBuffer, 836 &resourceParams)); 837 } 838 if (params->presVdencStreamOutBuffer != nullptr) 839 { 840 cmd.VdencStatisticsStreamout.PictureFields.DW0.MemoryObjectControlState = 841 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_STREAMOUT_DATA_CODEC].Value; 842 843 resourceParams.presResource = params->presVdencStreamOutBuffer; 844 resourceParams.dwOffset = params->dwVdencStatsStreamOutOffset; 845 resourceParams.pdwCmd = (uint32_t*)&(cmd.VdencStatisticsStreamout.LowerAddress); 846 resourceParams.dwLocationInCmd = 34; 847 resourceParams.bIsWritable = true; 848 849 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 850 this->m_osInterface, 851 cmdBuffer, 852 &resourceParams)); 853 } 854 855 if (params->presVdencStreamInBuffer != nullptr) 856 { 857 cmd.StreaminDataPicture.PictureFields.DW0.MemoryObjectControlState = 858 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VDENC_STREAMIN_CODEC].Value; 859 860 resourceParams.presResource = params->presVdencStreamInBuffer; 861 resourceParams.dwOffset = 0; 862 resourceParams.pdwCmd = (uint32_t*)&(cmd.StreaminDataPicture.LowerAddress); 863 resourceParams.dwLocationInCmd = 13; 864 resourceParams.bIsWritable = false; 865 866 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 867 this->m_osInterface, 868 cmdBuffer, 869 &resourceParams)); 870 } 871 872 for (refIdx = 0; refIdx <= params->dwNumRefIdxL0ActiveMinus1; refIdx++) 873 { 874 if (params->presVdencReferences[refIdx]) 875 { 876 // L0 references 877 MOS_ZeroMemory(&details, sizeof(details)); 878 details.Format = Format_Invalid; 879 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdencReferences[refIdx], &details)); 880 881 resourceParams.presResource = params->presVdencReferences[refIdx]; 882 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset; 883 resourceParams.dwLocationInCmd = (refIdx * 3) + 22; 884 resourceParams.bIsWritable = false; 885 switch (refIdx) 886 { 887 case 0: 888 resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef0.LowerAddress); 889 break; 890 case 1: 891 resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef1.LowerAddress); 892 break; 893 case 2: 894 resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef2.LowerAddress); 895 break; 896 case 3: 897 resourceParams.pdwCmd = (uint32_t*)&(cmd.BwdRef0.LowerAddress); 898 break; 899 default: 900 break; 901 } 902 903 mmcMode = (params->PostDeblockSurfMmcState != MOS_MEMCOMP_DISABLED) ? 904 params->PostDeblockSurfMmcState : params->PreDeblockSurfMmcState; 905 switch (refIdx) 906 { 907 case 0: 908 cmd.FwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 909 cmd.FwdRef0.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 910 cmd.FwdRef0.PictureFields.DW0.MemoryObjectControlState = 911 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 912 cmd.FwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 913 break; 914 case 1: 915 cmd.FwdRef1.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 916 cmd.FwdRef1.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 917 cmd.FwdRef1.PictureFields.DW0.MemoryObjectControlState = 918 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 919 cmd.FwdRef1.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 920 break; 921 case 2: 922 cmd.FwdRef2.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 923 cmd.FwdRef2.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 924 cmd.FwdRef2.PictureFields.DW0.MemoryObjectControlState = 925 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 926 cmd.FwdRef2.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 927 break; 928 case 3: 929 cmd.BwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 930 cmd.BwdRef0.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 931 cmd.BwdRef0.PictureFields.DW0.MemoryObjectControlState = 932 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 933 cmd.BwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 934 break; 935 default: 936 break; 937 } 938 939 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 940 this->m_osInterface, 941 cmdBuffer, 942 &resourceParams)); 943 } 944 945 // so far VDEnc only support 2 4x/8x DS Ref Pictures 946 if ((refIdx <= 1) && params->presVdenc4xDsSurface[refIdx]) 947 { 948 if (params->Mode == CODECHAL_ENCODE_MODE_AVC) 949 { 950 // 4x DS surface for VDEnc 951 MOS_ZeroMemory(&details, sizeof(details)); 952 details.Format = Format_Invalid; 953 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc4xDsSurface[refIdx], &details)); 954 955 resourceParams.presResource = params->presVdenc4xDsSurface[refIdx]; 956 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset; 957 resourceParams.dwLocationInCmd = (refIdx * 3) + 1; 958 resourceParams.bIsWritable = false; 959 switch (refIdx) 960 { 961 case 0: 962 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef0.LowerAddress); 963 break; 964 case 1: 965 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef1.LowerAddress); 966 break; 967 default: 968 break; 969 } 970 971 mmcMode = params->Ps4xDsSurfMmcState; 972 switch (refIdx) 973 { 974 case 0: 975 cmd.DsFwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 976 cmd.DsFwdRef0.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 977 cmd.DsFwdRef0.PictureFields.DW0.MemoryObjectControlState = 978 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 979 cmd.DsFwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 980 break; 981 case 1: 982 cmd.DsFwdRef1.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 983 cmd.DsFwdRef1.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 984 cmd.DsFwdRef1.PictureFields.DW0.MemoryObjectControlState = 985 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 986 cmd.DsFwdRef1.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 987 break; 988 default: 989 break; 990 } 991 992 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 993 this->m_osInterface, 994 cmdBuffer, 995 &resourceParams)); 996 } 997 else if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_MODE_VP9 || params->Mode == CODECHAL_ENCODE_RESERVED_0) 998 { 999 // 8x DS surface 1000 MOS_ZeroMemory(&details, sizeof(details)); 1001 details.Format = Format_Invalid; 1002 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc8xDsSurface[refIdx], &details)); 1003 1004 resourceParams.presResource = params->presVdenc8xDsSurface[refIdx]; 1005 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset; 1006 resourceParams.dwLocationInCmd = (refIdx * 3) + 1; 1007 resourceParams.bIsWritable = false; 1008 switch (refIdx) 1009 { 1010 case 0: 1011 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef0.LowerAddress); 1012 break; 1013 case 1: 1014 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef1.LowerAddress); 1015 break; 1016 default: 1017 break; 1018 } 1019 1020 mmcMode = params->Ps8xDsSurfMmcState; 1021 switch (refIdx) 1022 { 1023 case 0: 1024 cmd.DsFwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 1025 cmd.DsFwdRef0.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 1026 cmd.DsFwdRef0.PictureFields.DW0.MemoryObjectControlState = 1027 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1028 cmd.DsFwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 1029 break; 1030 case 1: 1031 cmd.DsFwdRef1.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 1032 cmd.DsFwdRef1.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 1033 cmd.DsFwdRef1.PictureFields.DW0.MemoryObjectControlState = 1034 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1035 cmd.DsFwdRef1.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 1036 break; 1037 default: 1038 break; 1039 } 1040 1041 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1042 this->m_osInterface, 1043 cmdBuffer, 1044 &resourceParams)); 1045 1046 // 4x DS surface 1047 MOS_ZeroMemory(&details, sizeof(details)); 1048 details.Format = Format_Invalid; 1049 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc4xDsSurface[refIdx], &details)); 1050 1051 resourceParams.presResource = params->presVdenc4xDsSurface[refIdx]; 1052 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset; 1053 resourceParams.dwLocationInCmd = (refIdx * 3) + 37; 1054 resourceParams.bIsWritable = false; 1055 switch (refIdx) 1056 { 1057 case 0: 1058 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef04X.LowerAddress); 1059 break; 1060 case 1: 1061 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef14X.LowerAddress); 1062 break; 1063 default: 1064 break; 1065 } 1066 1067 mmcMode = params->Ps8xDsSurfMmcState; 1068 switch (refIdx) 1069 { 1070 case 0: 1071 cmd.DsFwdRef04X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 1072 cmd.DsFwdRef04X.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 1073 cmd.DsFwdRef04X.PictureFields.DW0.MemoryObjectControlState = 1074 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1075 cmd.DsFwdRef04X.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 1076 break; 1077 case 1: 1078 cmd.DsFwdRef14X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 1079 cmd.DsFwdRef14X.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 1080 cmd.DsFwdRef14X.PictureFields.DW0.MemoryObjectControlState = 1081 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1082 cmd.DsFwdRef14X.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 1083 break; 1084 default: 1085 break; 1086 } 1087 1088 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1089 this->m_osInterface, 1090 cmdBuffer, 1091 &resourceParams)); 1092 } 1093 else 1094 { 1095 MHW_ASSERTMESSAGE("Encode mode = %d not supported", params->Mode); 1096 return MOS_STATUS_INVALID_PARAMETER; 1097 } 1098 } 1099 } 1100 1101 if (!params->isLowDelayB && (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_RESERVED_0)) 1102 { 1103 if (params->presVdencReferences[refIdx]) 1104 { 1105 // L1 references 1106 MOS_ZeroMemory(&details, sizeof(details)); 1107 details.Format = Format_Invalid; 1108 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdencReferences[refIdx], &details)); 1109 1110 resourceParams.presResource = params->presVdencReferences[refIdx]; 1111 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset; 1112 resourceParams.dwLocationInCmd = OFFSET_OF(typename TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD, BwdRef0) / sizeof(uint32_t); 1113 resourceParams.bIsWritable = false; 1114 resourceParams.pdwCmd = (uint32_t*)&(cmd.BwdRef0.LowerAddress); 1115 1116 mmcMode = (params->PostDeblockSurfMmcState != MOS_MEMCOMP_DISABLED) ? 1117 params->PostDeblockSurfMmcState : params->PreDeblockSurfMmcState; 1118 1119 cmd.BwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 1120 cmd.BwdRef0.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 1121 cmd.BwdRef0.PictureFields.DW0.MemoryObjectControlState = 1122 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1123 cmd.BwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 1124 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1125 this->m_osInterface, 1126 cmdBuffer, 1127 &resourceParams)); 1128 } 1129 1130 if (params->presVdenc8xDsSurface[refIdx]) 1131 { 1132 // 8x DS surface 1133 MOS_ZeroMemory(&details, sizeof(details)); 1134 details.Format = Format_Invalid; 1135 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc8xDsSurface[refIdx], &details)); 1136 1137 resourceParams.presResource = params->presVdenc8xDsSurface[refIdx]; 1138 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset; 1139 resourceParams.dwLocationInCmd = OFFSET_OF(typename TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD, DsBwdRef0) / sizeof(uint32_t); 1140 resourceParams.bIsWritable = false; 1141 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsBwdRef0.LowerAddress); 1142 1143 mmcMode = params->Ps8xDsSurfMmcState; 1144 1145 cmd.DsBwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 1146 cmd.DsBwdRef0.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 1147 cmd.DsBwdRef0.PictureFields.DW0.MemoryObjectControlState = 1148 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1149 cmd.DsBwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 1150 1151 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1152 this->m_osInterface, 1153 cmdBuffer, 1154 &resourceParams)); 1155 } 1156 1157 if (params->presVdenc4xDsSurface[refIdx]) 1158 { 1159 // 4x DS surface 1160 MOS_ZeroMemory(&details, sizeof(details)); 1161 details.Format = Format_Invalid; 1162 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc4xDsSurface[refIdx], &details)); 1163 1164 resourceParams.presResource = params->presVdenc4xDsSurface[refIdx]; 1165 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset; 1166 resourceParams.dwLocationInCmd = OFFSET_OF(typename TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD, DsBwdRef04X) / sizeof(uint32_t); 1167 resourceParams.bIsWritable = false; 1168 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsBwdRef04X.LowerAddress); 1169 1170 mmcMode = params->Ps4xDsSurfMmcState; 1171 cmd.DsBwdRef04X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0; 1172 cmd.DsBwdRef04X.PictureFields.DW0.CompressionType = MmcIsRc(mmcMode) ? 1 : 0; 1173 cmd.DsBwdRef04X.PictureFields.DW0.MemoryObjectControlState = 1174 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1175 cmd.DsBwdRef04X.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType); 1176 1177 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1178 this->m_osInterface, 1179 cmdBuffer, 1180 &resourceParams)); 1181 } 1182 } 1183 1184 // extra surface for HEVC/VP9 1185 if ((params->Mode == CODECHAL_ENCODE_MODE_HEVC) || (params->Mode == CODECHAL_ENCODE_MODE_VP9) || (params->Mode == CODECHAL_ENCODE_RESERVED_0)) 1186 { 1187 if (params->presColMvTempBuffer[0] != nullptr) 1188 { 1189 resourceParams.presResource = params->presColMvTempBuffer[0]; 1190 resourceParams.dwOffset = 0; 1191 resourceParams.pdwCmd = (uint32_t*)&(cmd.ColocatedMv.LowerAddress); 1192 resourceParams.dwLocationInCmd = 19; 1193 resourceParams.bIsWritable = true; 1194 1195 cmd.ColocatedMv.PictureFields.DW0.MemoryCompressionEnable = 0; 1196 cmd.ColocatedMv.PictureFields.DW0.CompressionType = 0; 1197 cmd.ColocatedMv.PictureFields.DW0.MemoryObjectControlState = 1198 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1199 1200 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1201 this->m_osInterface, 1202 cmdBuffer, 1203 &resourceParams)); 1204 } 1205 1206 if (params->ps8xDsSurface != nullptr) 1207 { 1208 resourceParams.presResource = ¶ms->ps8xDsSurface->OsResource; 1209 resourceParams.dwOffset = params->ps8xDsSurface->dwOffset; 1210 resourceParams.pdwCmd = (uint32_t*)&(cmd.ScaledReferenceSurface8X.LowerAddress); 1211 resourceParams.dwLocationInCmd = 49; 1212 resourceParams.bIsWritable = true; 1213 1214 cmd.ScaledReferenceSurface8X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(params->Ps8xDsSurfMmcState) ? 1 : 0; 1215 cmd.ScaledReferenceSurface8X.PictureFields.DW0.CompressionType = MmcIsRc(params->Ps8xDsSurfMmcState) ? 1 : 0; 1216 cmd.ScaledReferenceSurface8X.PictureFields.DW0.MemoryObjectControlState = 1217 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1218 1219 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1220 this->m_osInterface, 1221 cmdBuffer, 1222 &resourceParams)); 1223 } 1224 1225 if (params->ps4xDsSurface != nullptr) 1226 { 1227 resourceParams.presResource = ¶ms->ps4xDsSurface->OsResource; 1228 resourceParams.dwOffset = params->ps4xDsSurface->dwOffset; 1229 resourceParams.pdwCmd = (uint32_t*)&(cmd.ScaledReferenceSurface4X.LowerAddress); 1230 resourceParams.dwLocationInCmd = 52; 1231 resourceParams.bIsWritable = true; 1232 1233 cmd.ScaledReferenceSurface4X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(params->Ps4xDsSurfMmcState) ? 1 : 0; 1234 cmd.ScaledReferenceSurface4X.PictureFields.DW0.CompressionType = MmcIsRc(params->Ps4xDsSurfMmcState) ? 1 : 0; 1235 cmd.ScaledReferenceSurface4X.PictureFields.DW0.MemoryObjectControlState = 1236 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1237 1238 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1239 this->m_osInterface, 1240 cmdBuffer, 1241 &resourceParams)); 1242 } 1243 1244 // CuRecord stream-out buffer, not used so far 1245 if (params->presVdencCuObjStreamOutBuffer) 1246 { 1247 resourceParams.presResource = params->presVdencCuObjStreamOutBuffer; 1248 resourceParams.dwOffset = 0; 1249 resourceParams.pdwCmd = (uint32_t*)&(cmd.VdencCuRecordStreamOutBuffer.LowerAddress); 1250 resourceParams.dwLocationInCmd = 43; 1251 resourceParams.bIsWritable = true; 1252 1253 cmd.VdencCuRecordStreamOutBuffer.PictureFields.DW0.MemoryCompressionEnable = 0; 1254 cmd.VdencCuRecordStreamOutBuffer.PictureFields.DW0.CompressionType = 0; 1255 cmd.VdencCuRecordStreamOutBuffer.PictureFields.DW0.MemoryObjectControlState = 1256 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1257 1258 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1259 this->m_osInterface, 1260 cmdBuffer, 1261 &resourceParams)); 1262 } 1263 1264 if (params->presVdencPakObjCmdStreamOutBuffer) 1265 { 1266 resourceParams.presResource = params->presVdencPakObjCmdStreamOutBuffer; 1267 resourceParams.dwOffset = 0; 1268 resourceParams.pdwCmd = (uint32_t*)&(cmd.VdencLcuPakObjCmdBuffer.LowerAddress); 1269 resourceParams.dwLocationInCmd = 46; 1270 resourceParams.bIsWritable = true; 1271 1272 cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.MemoryCompressionEnable = 0; 1273 cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.CompressionType = 0; 1274 cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.MemoryObjectControlState = 1275 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value; 1276 1277 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1278 this->m_osInterface, 1279 cmdBuffer, 1280 &resourceParams)); 1281 } 1282 1283 if (params->presSegmentMapStreamOut) 1284 { 1285 resourceParams.presResource = params->presSegmentMapStreamOut; 1286 resourceParams.dwOffset = 0; 1287 resourceParams.pdwCmd = (uint32_t*)&(cmd.Vp9SegmentationMapStreaminBuffer.LowerAddress); 1288 resourceParams.dwLocationInCmd = 55; 1289 resourceParams.bIsWritable = true; 1290 1291 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1292 this->m_osInterface, 1293 cmdBuffer, 1294 &resourceParams)); 1295 1296 resourceParams.presResource = params->presSegmentMapStreamOut; 1297 resourceParams.dwOffset = 0; 1298 resourceParams.pdwCmd = (uint32_t*)&(cmd.Vp9SegmentationMapStreamoutBuffer.LowerAddress); 1299 resourceParams.dwLocationInCmd = 58; 1300 resourceParams.bIsWritable = true; 1301 1302 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1303 this->m_osInterface, 1304 cmdBuffer, 1305 &resourceParams)); 1306 } 1307 } 1308 1309 // DW61: Weights Histogram Streamout offset 1310 // This parameter specifies the 64 byte aligned offset in the VDEnc 1311 // Statistics Streamout buffer where the luma and chroma histogram for 1312 // the weights/offsets determination is written out. 1313 1314 // The first 2 CLs(cacheline=64bytes) are ENC frame statistics data. 1315 // The 3rd CL is for VDL1* stats (hits & misses which doesn't model). 1316 // Hence it's a dummy CL for us. Histogram stats start from 4th CL onwards. 1317 cmd.DW61.WeightsHistogramStreamoutOffset = 3 * MHW_CACHELINE_SIZE; 1318 1319 if (params->presVdencTileRowStoreBuffer != nullptr) 1320 { 1321 cmd.VdencTileRowStoreBuffer.BufferPictureFields.DW0.MemoryObjectControlState = 1322 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VDENC_ROW_STORE_BUFFER_CODEC].Value; 1323 1324 resourceParams.presResource = params->presVdencTileRowStoreBuffer; 1325 resourceParams.dwOffset = 0; 1326 resourceParams.pdwCmd = (uint32_t*)&(cmd.VdencTileRowStoreBuffer.LowerAddress); 1327 resourceParams.dwLocationInCmd = 62; 1328 resourceParams.bIsWritable = true; 1329 1330 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1331 this->m_osInterface, 1332 cmdBuffer, 1333 &resourceParams)); 1334 } 1335 1336 if (params->presVdencCumulativeCuCountStreamoutSurface != nullptr) 1337 { 1338 resourceParams.presResource = params->presVdencCumulativeCuCountStreamoutSurface; 1339 resourceParams.dwOffset = 0; 1340 resourceParams.pdwCmd = (uint32_t*)&(cmd.VdencCumulativeCuCountStreamoutSurface.LowerAddress); 1341 resourceParams.dwLocationInCmd = 65; 1342 resourceParams.bIsWritable = true; 1343 1344 MHW_MI_CHK_STATUS(this->AddResourceToCmd( 1345 this->m_osInterface, 1346 cmdBuffer, 1347 &resourceParams)); 1348 } 1349 1350 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 1351 1352 return MOS_STATUS_SUCCESS; 1353 } 1354 GetHWTileType(MOS_TILE_TYPE tileType,MOS_TILE_MODE_GMM tileModeGMM,bool gmmTileEnabled)1355 uint32_t GetHWTileType(MOS_TILE_TYPE tileType, MOS_TILE_MODE_GMM tileModeGMM, bool gmmTileEnabled) 1356 { 1357 uint32_t tileMode = 0; 1358 1359 if (gmmTileEnabled) 1360 { 1361 return tileModeGMM; 1362 } 1363 1364 switch (tileType) 1365 { 1366 case MOS_TILE_LINEAR: 1367 tileMode = 0; 1368 break; 1369 case MOS_TILE_YS: 1370 tileMode = 1; 1371 break; 1372 case MOS_TILE_X: 1373 tileMode = 2; 1374 break; 1375 default: 1376 tileMode = 3; 1377 break; 1378 } 1379 return tileMode; 1380 } 1381 AddVdencSrcSurfaceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params)1382 MOS_STATUS AddVdencSrcSurfaceStateCmd( 1383 PMOS_COMMAND_BUFFER cmdBuffer, 1384 PMHW_VDBOX_SURFACE_PARAMS params) override 1385 { 1386 MHW_FUNCTION_ENTER; 1387 1388 MHW_MI_CHK_NULL(cmdBuffer); 1389 MHW_MI_CHK_NULL(params); 1390 MHW_MI_CHK_NULL(params->psSurface); 1391 1392 typename TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD cmd; 1393 1394 cmd.Dwords25.DW0.Width = params->dwActualWidth - 1; 1395 cmd.Dwords25.DW0.Height = params->dwActualHeight - 1; 1396 cmd.Dwords25.DW0.ColorSpaceSelection = params->bColorSpaceSelection; 1397 1398 cmd.Dwords25.DW0.CrVCbUPixelOffsetVDirection = params->ucVDirection; 1399 1400 uint32_t tilemode = GetHWTileType(params->psSurface->TileType, params->psSurface->TileModeGMM, params->psSurface->bGMMTileEnabled); 1401 cmd.Dwords25.DW1.TiledSurface = (tilemode & 0x2) >> 1; 1402 cmd.Dwords25.DW1.TileWalk = tilemode & 0x1; 1403 1404 cmd.Dwords25.DW1.SurfaceFormat = MosFormatToVdencSurfaceRawFormat(params->psSurface->Format); 1405 cmd.Dwords25.DW0.SurfaceFormatByteSwizzle = params->bDisplayFormatSwizzle; 1406 cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch - 1; 1407 cmd.Dwords25.DW2.YOffsetForUCb = cmd.Dwords25.DW3.YOffsetForVCr = 1408 MOS_ALIGN_CEIL((params->psSurface->UPlaneOffset.iSurfaceOffset - params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset, MHW_VDBOX_MFX_RAW_UV_PLANE_ALIGNMENT_GEN9); 1409 1410 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 1411 1412 return MOS_STATUS_SUCCESS; 1413 } 1414 AddVdencRefSurfaceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params)1415 MOS_STATUS AddVdencRefSurfaceStateCmd( 1416 PMOS_COMMAND_BUFFER cmdBuffer, 1417 PMHW_VDBOX_SURFACE_PARAMS params) override 1418 { 1419 MHW_FUNCTION_ENTER; 1420 1421 MHW_MI_CHK_NULL(cmdBuffer); 1422 MHW_MI_CHK_NULL(params); 1423 MHW_MI_CHK_NULL(params->psSurface); 1424 1425 typename TVdencCmds::VDENC_REF_SURFACE_STATE_CMD cmd; 1426 1427 if (params->bVdencDynamicScaling) 1428 { 1429 if (params->ucSurfaceStateId == CODECHAL_HCP_LAST_SURFACE_ID) 1430 { 1431 cmd.DW1.SurfaceId = 4; 1432 } 1433 else if (params->ucSurfaceStateId == CODECHAL_HCP_GOLDEN_SURFACE_ID) 1434 { 1435 cmd.DW1.SurfaceId = 5; 1436 } 1437 else if (params->ucSurfaceStateId == CODECHAL_HCP_ALTREF_SURFACE_ID) 1438 { 1439 cmd.DW1.SurfaceId = 6; 1440 } 1441 } 1442 1443 if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_RESERVED_0) 1444 { 1445 cmd.Dwords25.DW0.Width = params->dwActualWidth - 1; 1446 cmd.Dwords25.DW0.Height = params->dwActualHeight - 1; 1447 } 1448 else 1449 { 1450 cmd.Dwords25.DW0.Width = params->psSurface->dwWidth - 1; 1451 cmd.Dwords25.DW0.Height = params->psSurface->dwHeight - 1; 1452 } 1453 1454 cmd.Dwords25.DW0.CrVCbUPixelOffsetVDirection = params->ucVDirection; 1455 1456 uint32_t tilemode = GetHWTileType(params->psSurface->TileType, params->psSurface->TileModeGMM, params->psSurface->bGMMTileEnabled); 1457 cmd.Dwords25.DW1.TiledSurface = (tilemode & 0x2) >> 1; 1458 cmd.Dwords25.DW1.TileWalk = tilemode & 0x1; 1459 1460 cmd.Dwords25.DW1.SurfaceFormat = MosFormatToVdencSurfaceReconFormat(params->psSurface->Format); 1461 1462 if (cmd.Dwords25.DW1.SurfaceFormat == TVdencCmds::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_P010) 1463 { 1464 cmd.Dwords25.DW1.SurfaceFormat = TVdencCmds::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_P010_VARIANT; 1465 } 1466 1467 cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch - 1; 1468 cmd.Dwords25.DW2.YOffsetForUCb = cmd.Dwords25.DW3.YOffsetForVCr = 1469 (params->psSurface->UPlaneOffset.iSurfaceOffset - params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset; 1470 1471 if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatY416Variant || 1472 cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatAyuvVariant) 1473 { 1474 /* Y410/Y416 Reconstructed format handling */ 1475 if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatY416Variant) 1476 cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch / 2 - 1; 1477 /* AYUV Reconstructed format handling */ 1478 if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatAyuvVariant) 1479 cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch / 4 - 1; 1480 1481 cmd.Dwords25.DW2.YOffsetForUCb = params->dwReconSurfHeight; 1482 cmd.Dwords25.DW3.YOffsetForVCr = params->dwReconSurfHeight << 1; 1483 } 1484 else if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatY216Variant || 1485 cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatYuyvVariant) 1486 { 1487 cmd.Dwords25.DW2.YOffsetForUCb = cmd.Dwords25.DW3.YOffsetForVCr = params->dwReconSurfHeight; 1488 } 1489 1490 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 1491 1492 return MOS_STATUS_SUCCESS; 1493 } 1494 AddVdencDsRefSurfaceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params,uint8_t numSurfaces)1495 MOS_STATUS AddVdencDsRefSurfaceStateCmd( 1496 PMOS_COMMAND_BUFFER cmdBuffer, 1497 PMHW_VDBOX_SURFACE_PARAMS params, 1498 uint8_t numSurfaces) override 1499 { 1500 uint32_t tilemode = 0; 1501 MHW_FUNCTION_ENTER; 1502 1503 MHW_MI_CHK_NULL(cmdBuffer); 1504 MHW_MI_CHK_NULL(params); 1505 MHW_MI_CHK_NULL(params->psSurface); 1506 1507 typename TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD cmd; 1508 1509 if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_RESERVED_0) 1510 { 1511 cmd.Dwords25.DW0.Width = params->dwActualWidth - 1; 1512 cmd.Dwords25.DW0.Height = params->dwActualHeight - 1; 1513 } 1514 else 1515 { 1516 cmd.Dwords25.DW0.Width = params->psSurface->dwWidth - 1; 1517 cmd.Dwords25.DW0.Height = params->psSurface->dwHeight - 1; 1518 } 1519 cmd.Dwords25.DW0.CrVCbUPixelOffsetVDirection = params->ucVDirection; 1520 1521 tilemode = GetHWTileType(params->psSurface->TileType, params->psSurface->TileModeGMM, params->psSurface->bGMMTileEnabled); 1522 cmd.Dwords25.DW1.TiledSurface = (tilemode & 0x2) >> 1; 1523 cmd.Dwords25.DW1.TileWalk = tilemode & 0x1; 1524 1525 cmd.Dwords25.DW1.SurfaceFormat = TVdencCmds::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_PLANAR_420_8; 1526 cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch - 1; 1527 cmd.Dwords25.DW2.YOffsetForUCb = cmd.Dwords25.DW3.YOffsetForVCr = 1528 (params->psSurface->UPlaneOffset.iSurfaceOffset - params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset; 1529 1530 // 2nd surface 1531 if (numSurfaces > 1) 1532 { 1533 params = params + 1; // Increment pointer to move from 1st surface to 2nd surface. 1534 MHW_MI_CHK_NULL(params); 1535 MHW_MI_CHK_NULL(params->psSurface); 1536 1537 if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_RESERVED_0) 1538 { 1539 cmd.Dwords69.DW0.Width = params->dwActualWidth - 1; 1540 cmd.Dwords69.DW0.Height = params->dwActualHeight - 1; 1541 } 1542 else 1543 { 1544 cmd.Dwords69.DW0.Width = params->psSurface->dwWidth - 1; 1545 cmd.Dwords69.DW0.Height = params->psSurface->dwHeight - 1; 1546 } 1547 cmd.Dwords69.DW0.CrVCbUPixelOffsetVDirection = params->ucVDirection; 1548 1549 tilemode = GetHWTileType(params->psSurface->TileType, params->psSurface->TileModeGMM, params->psSurface->bGMMTileEnabled); 1550 cmd.Dwords69.DW1.TiledSurface = (tilemode & 0x2) >> 1; 1551 cmd.Dwords69.DW1.TileWalk = tilemode & 0x1; 1552 1553 cmd.Dwords69.DW1.SurfaceFormat = TVdencCmds::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_PLANAR_420_8; 1554 cmd.Dwords69.DW1.SurfacePitch = params->psSurface->dwPitch - 1; 1555 cmd.Dwords69.DW2.YOffsetForUCb = cmd.Dwords69.DW3.YOffsetForVCr = 1556 (params->psSurface->UPlaneOffset.iSurfaceOffset - params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset; 1557 } 1558 1559 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 1560 1561 return MOS_STATUS_SUCCESS; 1562 } 1563 AddVdencImgStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_AVC_IMG_PARAMS params)1564 MOS_STATUS AddVdencImgStateCmd( 1565 PMOS_COMMAND_BUFFER cmdBuffer, 1566 PMHW_BATCH_BUFFER batchBuffer, 1567 PMHW_VDBOX_AVC_IMG_PARAMS params) override 1568 { 1569 MHW_FUNCTION_ENTER; 1570 1571 MHW_MI_CHK_NULL(params); 1572 MHW_MI_CHK_NULL(params->pEncodeAvcSeqParams); 1573 MHW_MI_CHK_NULL(params->pEncodeAvcPicParams); 1574 1575 auto paramsG12 = dynamic_cast<PMHW_VDBOX_AVC_IMG_PARAMS_G12>(params); 1576 MHW_MI_CHK_NULL(paramsG12); 1577 1578 typename TVdencCmds::VDENC_IMG_STATE_CMD cmd; 1579 1580 auto avcSeqParams = params->pEncodeAvcSeqParams; 1581 auto avcPicParams = params->pEncodeAvcPicParams; 1582 auto avcSliceParams = params->pEncodeAvcSliceParams; 1583 1584 // initialize 1585 cmd.DW1.VdencExtendedPakObjCmdEnable = 1; 1586 cmd.DW2.UnidirectionalMixDisable = false; 1587 cmd.DW4.IntraSadMeasureAdjustment = 2; 1588 cmd.DW4.SubMacroblockSubPartitionMask = 0x70; 1589 cmd.DW8.BilinearFilterEnable = false; 1590 cmd.DW9.Mode0Cost = 10; 1591 cmd.DW9.Mode1Cost = 0; 1592 cmd.DW9.Mode2Cost = 3; 1593 cmd.DW9.Mode3Cost = 30; 1594 cmd.DW20.PenaltyForIntra16X16NondcPrediction = 36; 1595 cmd.DW20.PenaltyForIntra8X8NondcPrediction = 12; 1596 cmd.DW20.PenaltyForIntra4X4NondcPrediction = 4; 1597 cmd.DW22.Smallmbsizeinword = 0xff; 1598 cmd.DW22.Largembsizeinword = 0xff; 1599 cmd.DW27.MaxHmvR = 0x2000; 1600 cmd.DW27.MaxVmvR = 0x200; 1601 cmd.DW33.Maxdeltaqp = 0x0f; 1602 1603 // initialize for P frame 1604 if (avcPicParams->CodingType != I_TYPE) 1605 { 1606 cmd.DW2.BidirectionalWeight = 0x20; 1607 cmd.DW4.SubPelMode = (avcPicParams->bEnableSubPelMode) ? avcPicParams->SubPelMode : 3; 1608 cmd.DW4.BmeDisableForFbrMessage = 1; 1609 cmd.DW4.InterSadMeasureAdjustment = 2; 1610 cmd.DW5.CrePrefetchEnable = 1; 1611 cmd.DW8.NonSkipZeroMvCostAdded = 1; 1612 cmd.DW8.NonSkipMbModeCostAdded = 1; 1613 cmd.DW9.Mode0Cost = 7; 1614 cmd.DW9.Mode1Cost = 26; 1615 cmd.DW9.Mode2Cost = 30; 1616 cmd.DW9.Mode3Cost = 57; 1617 cmd.DW10.Mode4Cost = 8; 1618 cmd.DW10.Mode5Cost = 2; 1619 cmd.DW10.Mode6Cost = 4; 1620 cmd.DW10.Mode7Cost = 6; 1621 cmd.DW11.Mode8Cost = 5; 1622 cmd.DW11.Mode9Cost = 0; 1623 cmd.DW11.RefIdCost = 4; 1624 cmd.DW12.MvCost0 = 0; 1625 cmd.DW12.MvCost1 = 6; 1626 cmd.DW12.MvCost2 = 6; 1627 cmd.DW12.MvCost3 = 9; 1628 cmd.DW13.MvCost4 = 10; 1629 cmd.DW13.MvCost5 = 13; 1630 cmd.DW13.MvCost6 = 14; 1631 cmd.DW13.MvCost7 = 24; 1632 cmd.DW31.SadHaarThreshold0 = 800; 1633 cmd.DW32.SadHaarThreshold1 = 1600; 1634 cmd.DW32.SadHaarThreshold2 = 2400; 1635 cmd.DW34.MidpointSadHaar = 0x640; 1636 } 1637 1638 cmd.DW1.VdencPerfmode = params->bVDEncPerfModeEnabled; 1639 cmd.DW1.Transform8X8Flag = avcPicParams->transform_8x8_mode_flag; 1640 cmd.DW3.PictureWidth = params->wPicWidthInMb; 1641 cmd.DW4.ForwardTransformSkipCheckEnable = this->m_vdencFTQEnabled[avcSeqParams->TargetUsage]; 1642 cmd.DW4.BlockBasedSkipEnabled = this->m_vdencBlockBasedSkipEnabled[avcSeqParams->TargetUsage]; 1643 cmd.DW5.CrePrefetchEnable = params->bCrePrefetchEnable; 1644 cmd.DW5.PictureHeightMinusOne = params->wPicHeightInMb - 1; 1645 cmd.DW5.PictureType = avcPicParams->CodingType - 1; 1646 cmd.DW5.ConstrainedIntraPredictionFlag = avcPicParams->constrained_intra_pred_flag; 1647 1648 if (paramsG12->bVDEncUltraModeEnabled) 1649 { 1650 cmd.DW1.VdencPerfmode = true; 1651 cmd.DW1.VdencUltraMode = true; 1652 } 1653 1654 // HME Ref1 Disable should be set as 0 when VDEnc Perf Mode is enabled 1655 if ((avcPicParams->CodingType != I_TYPE) && 1656 (!params->pEncodeAvcSliceParams->num_ref_idx_l0_active_minus1) && 1657 (!params->bVDEncPerfModeEnabled)) 1658 { 1659 cmd.DW5.HmeRef1Disable = true; 1660 } 1661 1662 if (avcSeqParams->EnableSliceLevelRateCtrl) 1663 { 1664 cmd.DW5.MbSliceThresholdValue = params->dwMbSlcThresholdValue; 1665 } 1666 1667 cmd.DW6.SliceMacroblockHeightMinusOne = params->wPicHeightInMb - 1; 1668 1669 cmd.DW8.LumaIntraPartitionMask = avcPicParams->transform_8x8_mode_flag ? 0 : TVdencCmds::VDENC_IMG_STATE_CMD::LUMA_INTRA_PARTITION_MASK_UNNAMED2; 1670 1671 cmd.DW14.QpPrimeY = avcPicParams->QpY + avcSliceParams->slice_qp_delta; 1672 1673 if (params->pVDEncModeCost) 1674 { 1675 cmd.DW9.Mode0Cost = *(params->pVDEncModeCost); 1676 cmd.DW9.Mode1Cost = *(params->pVDEncModeCost + 1); 1677 cmd.DW9.Mode2Cost = *(params->pVDEncModeCost + 2); 1678 cmd.DW9.Mode3Cost = *(params->pVDEncModeCost + 3); 1679 1680 cmd.DW10.Mode4Cost = *(params->pVDEncModeCost + 4); 1681 cmd.DW10.Mode5Cost = *(params->pVDEncModeCost + 5); 1682 cmd.DW10.Mode6Cost = *(params->pVDEncModeCost + 6); 1683 cmd.DW10.Mode7Cost = *(params->pVDEncModeCost + 7); 1684 1685 cmd.DW11.Mode8Cost = *(params->pVDEncModeCost + 8); 1686 cmd.DW11.RefIdCost = *(params->pVDEncModeCost + 10); 1687 } 1688 if (params->pVDEncMvCost) 1689 { 1690 cmd.DW12.MvCost0 = *(params->pVDEncMvCost); 1691 cmd.DW12.MvCost1 = *(params->pVDEncMvCost + 1); 1692 cmd.DW12.MvCost2 = *(params->pVDEncMvCost + 2); 1693 cmd.DW12.MvCost3 = *(params->pVDEncMvCost + 3); 1694 cmd.DW13.MvCost4 = *(params->pVDEncMvCost + 4); 1695 cmd.DW13.MvCost5 = *(params->pVDEncMvCost + 5); 1696 cmd.DW13.MvCost6 = *(params->pVDEncMvCost + 6); 1697 cmd.DW13.MvCost7 = *(params->pVDEncMvCost + 7); 1698 } 1699 1700 cmd.DW27.MaxVmvR = params->dwMaxVmvR; 1701 1702 if (params->pVDEncHmeMvCost) 1703 { 1704 cmd.DW28.HmeMvCost0 = *(params->pVDEncHmeMvCost); 1705 cmd.DW28.HmeMvCost1 = *(params->pVDEncHmeMvCost + 1); 1706 cmd.DW28.HmeMvCost2 = *(params->pVDEncHmeMvCost + 2); 1707 cmd.DW28.HmeMvCost3 = *(params->pVDEncHmeMvCost + 3); 1708 cmd.DW29.HmeMvCost4 = *(params->pVDEncHmeMvCost + 4); 1709 cmd.DW29.HmeMvCost5 = *(params->pVDEncHmeMvCost + 5); 1710 cmd.DW29.HmeMvCost6 = *(params->pVDEncHmeMvCost + 6); 1711 cmd.DW29.HmeMvCost7 = *(params->pVDEncHmeMvCost + 7); 1712 } 1713 1714 // HMEOffset is in range of -128 to 127, clip value to within range 1715 if (avcPicParams->bEnableHMEOffset) 1716 { 1717 cmd.DW7.Hme0XOffset = MOS_CLAMP_MIN_MAX(avcPicParams->HMEOffset[0][0][0], -128, 127); 1718 cmd.DW7.Hme0YOffset = MOS_CLAMP_MIN_MAX(avcPicParams->HMEOffset[0][0][1], -128, 127); 1719 cmd.DW7.Hme1XOffset = MOS_CLAMP_MIN_MAX(avcPicParams->HMEOffset[1][0][0], -128, 127); 1720 cmd.DW7.Hme1YOffset = MOS_CLAMP_MIN_MAX(avcPicParams->HMEOffset[1][0][1], -128, 127); 1721 } 1722 1723 // Rolling-I settings 1724 if ((avcPicParams->CodingType != I_TYPE) && (avcPicParams->EnableRollingIntraRefresh != ROLLING_I_DISABLED)) 1725 { 1726 cmd.DW21.IntraRefreshEnableRollingIEnable = avcPicParams->EnableRollingIntraRefresh != ROLLING_I_DISABLED ? 1 : 0; 1727 cmd.DW21.IntraRefreshMode = avcPicParams->EnableRollingIntraRefresh == ROLLING_I_ROW ? 0 : 1; // 0->Row based ; 1->Column based 1728 cmd.DW21.IntraRefreshMBPos = avcPicParams->IntraRefreshMBNum; 1729 cmd.DW21.IntraRefreshMBSizeMinusOne = avcPicParams->IntraRefreshUnitinMB; 1730 cmd.DW21.QpAdjustmentForRollingI = avcPicParams->IntraRefreshQPDelta; 1731 1732 auto waTable = this->m_osInterface->pfnGetWaTable(this->m_osInterface); 1733 MHW_MI_CHK_NULL(waTable); 1734 1735 // WA to prevent error propagation from top-right direction. 1736 // Disable prediction modes 3, 7 for 4x4 1737 // and modes 0, 2, 3, 4, 5, 7 for 8x8 (due to filtering) 1738 if (avcPicParams->EnableRollingIntraRefresh == ROLLING_I_COLUMN && 1739 MEDIA_IS_WA(waTable, Wa_18011246551)) 1740 { 1741 cmd.DW17.AvcIntra4X4ModeMask = 0x88; 1742 cmd.DW17.AvcIntra8X8ModeMask = 0xBD; 1743 } 1744 } 1745 1746 // Setting MinMaxQP values if they are presented 1747 if (avcPicParams->ucMaximumQP && avcPicParams->ucMinimumQP) 1748 { 1749 cmd.DW33.MaxQp = avcPicParams->ucMaximumQP; 1750 cmd.DW33.MinQp = avcPicParams->ucMinimumQP; 1751 } 1752 else 1753 { 1754 // Set default values 1755 cmd.DW33.MaxQp = 0x33; 1756 cmd.DW33.MinQp = 0x0a; 1757 } 1758 1759 // VDEnc CQP case ROI settings, BRC ROI will be handled in HuC FW 1760 if (!params->bVdencBRCEnabled && avcPicParams->NumROI) 1761 { 1762 MHW_ASSERT(avcPicParams->NumROI < 4); 1763 1764 int8_t priorityLevelOrDQp[ENCODE_VDENC_AVC_MAX_ROI_NUMBER_G9] = { 0 }; 1765 1766 for (uint8_t i = 0; i < avcPicParams->NumROI; i++) 1767 { 1768 int8_t dQpRoi = avcPicParams->ROIDistinctDeltaQp[i]; 1769 1770 // clip delta qp roi to VDEnc supported range 1771 priorityLevelOrDQp[i] = (char)CodecHal_Clip3( 1772 ENCODE_VDENC_AVC_MIN_ROI_DELTA_QP_G9, ENCODE_VDENC_AVC_MAX_ROI_DELTA_QP_G9, dQpRoi); 1773 } 1774 1775 cmd.DW34.RoiEnable = true; 1776 1777 // Zone0 is reserved for non-ROI region 1778 cmd.DW30.RoiQpAdjustmentForZone1 = priorityLevelOrDQp[0]; 1779 cmd.DW30.RoiQpAdjustmentForZone2 = priorityLevelOrDQp[1]; 1780 cmd.DW30.RoiQpAdjustmentForZone3 = priorityLevelOrDQp[2]; 1781 } 1782 1783 if (avcSeqParams->RateControlMethod != RATECONTROL_CQP) 1784 { 1785 cmd.DW30.QpAdjustmentForShapeBestIntra4X4Winner = 0; 1786 cmd.DW30.QpAdjustmentForShapeBestIntra8X8Winner = 0; 1787 cmd.DW30.QpAdjustmentForShapeBestIntra16X16Winner = 0; 1788 1789 cmd.DW31.BestdistortionQpAdjustmentForZone0 = 0; 1790 cmd.DW31.BestdistortionQpAdjustmentForZone1 = 1; 1791 cmd.DW31.BestdistortionQpAdjustmentForZone2 = 2; 1792 cmd.DW31.BestdistortionQpAdjustmentForZone3 = 3; 1793 } 1794 1795 if (avcPicParams->EnableRollingIntraRefresh == ROLLING_I_DISABLED && params->bVdencStreamInEnabled && 1796 (avcPicParams->NumDirtyROI && params->bVdencBRCEnabled || avcPicParams->NumROI && avcPicParams->bNativeROI || 1797 (avcPicParams->TargetFrameSize > 0 && !avcSeqParams->LookaheadDepth))) // TCBRC (for AdaptiveRegionBoost) 1798 { 1799 cmd.DW34.RoiEnable = true; 1800 } 1801 1802 if (params->bVdencStreamInEnabled) 1803 { 1804 cmd.DW34.FwdPredictor0MvEnable = 1; 1805 cmd.DW34.PpmvDisable = 1; 1806 1807 // non-native ROI in ForceQP mode (VDEnc StreamIn filled by HuC in BRC mode and by UMD driver in CQP) or MBQP 1808 if (avcPicParams->EnableRollingIntraRefresh == ROLLING_I_DISABLED && 1809 ((avcPicParams->NumROI && !avcPicParams->bNativeROI) || paramsG12->bStreamInMbQpEnabled)) 1810 { 1811 cmd.DW34.MbLevelQpEnable = 1; 1812 } 1813 } 1814 1815 if (cmdBuffer == nullptr && batchBuffer == nullptr) 1816 { 1817 MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to."); 1818 return MOS_STATUS_NULL_POINTER; 1819 } 1820 1821 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(cmdBuffer, batchBuffer, &cmd, sizeof(cmd))); 1822 1823 return MOS_STATUS_SUCCESS; 1824 } 1825 AddVdencWalkerStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS params)1826 MOS_STATUS AddVdencWalkerStateCmd( 1827 PMOS_COMMAND_BUFFER cmdBuffer, 1828 PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS params) override 1829 { 1830 MHW_FUNCTION_ENTER; 1831 1832 MHW_MI_CHK_NULL(cmdBuffer); 1833 MHW_MI_CHK_NULL(params); 1834 1835 typename TVdencCmds::VDENC_WALKER_STATE_CMD cmd; 1836 1837 if (params->Mode == CODECHAL_ENCODE_MODE_AVC) 1838 { 1839 MHW_MI_CHK_NULL(params->pAvcSeqParams); 1840 MHW_MI_CHK_NULL(params->pAvcSlcParams); 1841 1842 auto avcSeqParams = params->pAvcSeqParams; 1843 auto avcSlcParams = params->pAvcSlcParams; 1844 1845 cmd.DW1.MbLcuStartYPosition = avcSlcParams->first_mb_in_slice / CODECHAL_GET_WIDTH_IN_MACROBLOCKS(avcSeqParams->FrameWidth); 1846 1847 cmd.DW2.NextsliceMbStartYPosition = (avcSlcParams->first_mb_in_slice + avcSlcParams->NumMbsForSlice) / CODECHAL_GET_WIDTH_IN_MACROBLOCKS(avcSeqParams->FrameWidth); 1848 1849 if (cmd.DW2.NextsliceMbStartYPosition > (uint32_t)CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(avcSeqParams->FrameHeight)) 1850 { 1851 cmd.DW2.NextsliceMbStartYPosition = (uint32_t)CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(avcSeqParams->FrameHeight); 1852 } 1853 1854 cmd.DW3.Log2WeightDenomLuma = avcSlcParams->luma_log2_weight_denom; 1855 1856 cmd.DW5.TileWidth = avcSeqParams->FrameWidth - 1; 1857 } 1858 else if (params->Mode == CODECHAL_ENCODE_MODE_HEVC) 1859 { 1860 auto paramsG12 = dynamic_cast<PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12>(params); 1861 MHW_MI_CHK_NULL(paramsG12); 1862 1863 MHW_MI_CHK_NULL(params->pHevcEncSeqParams); 1864 MHW_MI_CHK_NULL(params->pHevcEncPicParams); 1865 MHW_MI_CHK_NULL(params->pEncodeHevcSliceParams); 1866 1867 auto seqParams = params->pHevcEncSeqParams; 1868 auto picParams = params->pHevcEncPicParams; 1869 auto sliceParams = params->pEncodeHevcSliceParams; 1870 1871 uint32_t ctbSize = 1 << (seqParams->log2_max_coding_block_size_minus3 + 3); 1872 uint32_t widthInPix = (1 << (seqParams->log2_min_coding_block_size_minus3 + 3)) * (seqParams->wFrameWidthInMinCbMinus1 + 1); 1873 uint32_t widthInCtb = (widthInPix / ctbSize) + ((widthInPix % ctbSize) ? 1 : 0); // round up 1874 uint32_t heightInPix = (1 << (seqParams->log2_min_coding_block_size_minus3 + 3)) * (seqParams->wFrameHeightInMinCbMinus1 + 1); 1875 uint32_t heightInCtb = (heightInPix / ctbSize) + ((heightInPix % ctbSize) ? 1 : 0); // round up 1876 uint32_t shift = seqParams->log2_max_coding_block_size_minus3 - seqParams->log2_min_coding_block_size_minus3; 1877 1878 cmd.DW3.Log2WeightDenomLuma = cmd.DW3.HevcLog2WeightDemonLuma = 1879 (picParams->weighted_pred_flag || picParams->weighted_bipred_flag) ? (picParams->bEnableGPUWeightedPrediction ? 6 : sliceParams->luma_log2_weight_denom) : 0; 1880 1881 if (paramsG12->pTileCodingParams == nullptr) 1882 { 1883 // No tiling support 1884 cmd.DW1.MbLcuStartYPosition = sliceParams->slice_segment_address / widthInCtb; 1885 cmd.DW2.NextsliceMbLcuStartXPosition = (sliceParams->slice_segment_address + sliceParams->NumLCUsInSlice) / heightInCtb; 1886 cmd.DW2.NextsliceMbStartYPosition = (sliceParams->slice_segment_address + sliceParams->NumLCUsInSlice) / widthInCtb; 1887 cmd.DW5.TileWidth = widthInPix - 1; 1888 cmd.DW5.TileHeight = heightInPix - 1; 1889 } 1890 else 1891 { 1892 cmd.DW1.MbLcuStartXPosition = paramsG12->pTileCodingParams->TileStartLCUX; 1893 cmd.DW1.MbLcuStartYPosition = paramsG12->pTileCodingParams->TileStartLCUY; 1894 1895 cmd.DW2.NextsliceMbLcuStartXPosition = paramsG12->pTileCodingParams->TileStartLCUX + (paramsG12->pTileCodingParams->TileWidthInMinCbMinus1 >> shift) + 1; 1896 cmd.DW2.NextsliceMbStartYPosition = paramsG12->pTileCodingParams->TileStartLCUY + (paramsG12->pTileCodingParams->TileHeightInMinCbMinus1 >> shift) + 1; 1897 1898 cmd.DW4.TileStartCtbX = paramsG12->pTileCodingParams->TileStartLCUX * ctbSize; 1899 cmd.DW4.TileStartCtbY = paramsG12->pTileCodingParams->TileStartLCUY * ctbSize; 1900 1901 cmd.DW5.TileWidth = ((paramsG12->pTileCodingParams->TileWidthInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) - 1; 1902 cmd.DW5.TileHeight = ((paramsG12->pTileCodingParams->TileHeightInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) - 1; 1903 cmd.DW1.FirstSuperSlice = 1; 1904 cmd.DW3.NumParEngine = paramsG12->dwNumberOfPipes; 1905 cmd.DW3.TileNumber = paramsG12->dwTileId; 1906 cmd.DW3.TileRowStoreSelect = paramsG12->pTileCodingParams->TileRowStoreSelect; 1907 cmd.DW8.TileStreamoutOffsetEnable = 1; 1908 cmd.DW8.TileStreamoutOffset = paramsG12->dwTileId * 19; 1909 1910 cmd.DW6.StreaminOffsetEnable = 1; 1911 cmd.DW6.TileStreaminOffset = paramsG12->pTileCodingParams->TileStreaminOffset; 1912 1913 // PAK Object StreamOut Offset Computation 1914 uint32_t tileLCUStreamOutByteOffset = 0; 1915 if (paramsG12->pTileCodingParams->TileStartLCUX != 0 || paramsG12->pTileCodingParams->TileStartLCUY != 0) 1916 { 1917 uint32_t ctbSize = 1 << (seqParams->log2_max_coding_block_size_minus3 + 3); 1918 uint32_t NumOfCUInLCU = (ctbSize >> 3) * (ctbSize >> 3); // Min CU size is 8 1919 uint32_t ImgWidthInLCU = (((seqParams->wFrameWidthInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) + ctbSize - 1) / ctbSize; 1920 uint32_t ImgHeightInLCU = (((seqParams->wFrameHeightInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) + ctbSize - 1) / ctbSize; 1921 uint32_t NumLCUsCurLocation = paramsG12->pTileCodingParams->TileStartLCUY * ImgWidthInLCU + paramsG12->pTileCodingParams->TileStartLCUX * 1922 ((((paramsG12->pTileCodingParams->TileHeightInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) + ctbSize - 1) / ctbSize); 1923 //For PAKObject Surface 1924 tileLCUStreamOutByteOffset = 2 * BYTES_PER_DWORD * NumLCUsCurLocation * (NUM_PAK_DWS_PER_LCU + NumOfCUInLCU * NUM_DWS_PER_CU); 1925 //Add 1 CL for size info at the beginning of each tile 1926 tileLCUStreamOutByteOffset += MHW_CACHELINE_SIZE; 1927 //CL alignment at end of every tile 1928 tileLCUStreamOutByteOffset = MOS_ROUNDUP_DIVIDE(tileLCUStreamOutByteOffset, MHW_CACHELINE_SIZE); 1929 } 1930 1931 cmd.DW9.TileLcuStreamOutOffset = tileLCUStreamOutByteOffset; 1932 cmd.DW9.LcuStreamOutOffsetEnable = 0x1; 1933 1934 if (cmd.DW4.TileStartCtbY == 0) 1935 { 1936 //RowStore Offset Computation 1937 uint32_t num32x32InX = (cmd.DW4.TileStartCtbX) / 32; 1938 cmd.DW7.RowStoreOffsetEnable = 1; 1939 cmd.DW7.TileRowstoreOffset = num32x32InX; 1940 } 1941 } 1942 1943 // for IBC 1944 cmd.DW11.Value &= 0xfffc00ff; 1945 cmd.DW12.Value = (cmd.DW12.Value & 0xfcffffff) | 0x1000000; 1946 cmd.DW12.IbcControl = params->pHevcEncPicParams->pps_curr_pic_ref_enabled_flag ? 1947 paramsG12->IBCControl : VDENC_WALKER_STATE_COMMAND_IBC_CONTROL_IBC_DISABLED_G12; 1948 1949 cmd.DW12.PaletteModeEnable = (seqParams->palette_mode_enabled_flag != 0) ? 1 : 0; 1950 uint32_t sliceQP = picParams->QpY + sliceParams->slice_qp_delta; 1951 uint32_t index; 1952 if (sliceQP <= 12) 1953 { 1954 index = 0; 1955 } 1956 else if (sliceQP > 12 && sliceQP <= 47) 1957 { 1958 index = (sliceQP - 8) / 5; 1959 } 1960 else if (sliceQP > 47 && sliceQP <= 49) 1961 { 1962 index = 8; 1963 } 1964 else 1965 { 1966 index = 9; 1967 } 1968 const uint32_t table1[10] = {0x50001,0x50001,0x50001,0x50002,0x90002,0x90002,0x90002,0xd0002,0x190002,0x210003}; 1969 cmd.DW12.Value = (cmd.DW12.Value & 0xff80fff8) | table1[index]; 1970 const uint32_t table2[10] = {0x2000a,0x2000a,0x2000a,0x4000a,0x8000a,0xc0010,0xc0018,0xc0018,0x100020,0x180030}; 1971 cmd.DW13.Value = table2[index]; 1972 const uint32_t table3[10] = {0x101004,0x101004,0x101004,0xc1008,0x42004,0x42006,0x13f06,0x13f06,0x13f0c,0x13006}; 1973 cmd.DW14.Value = (cmd.DW14.Value & 0xffe0c0c0) | table3[index]; 1974 const uint32_t table4[10] = {0x100004,0x100004,0x100004,0x100004,0x200004,0x300004,0x400004,0x600004,0x800004,0x1000004}; 1975 cmd.DW15.Value = (cmd.DW15.Value & 0xfc00) | table4[index]; 1976 1977 if (seqParams->bit_depth_luma_minus8 > 0 && seqParams->palette_mode_enabled_flag) 1978 { 1979 1980 const uint32_t table1[10] = {0x3,0x3,0x3,0x4,0x4,0x4,0x4,0x4,0x4,0x5}; 1981 cmd.DW12.Value = (cmd.DW12.Value & 0xfffffff8) | table1[index]; 1982 const uint32_t table2[10] = {0x80028,0x80028,0x80028,0x100028,0x200028,0x300040,0x300060,0x300060,0x400080,0x6000c0}; 1983 cmd.DW13.Value = table2[index]; 1984 const uint32_t table3[10] = {0x400000,0x400000,0x400000,0x400000,0x800000,0xc00000,0x1000000,0x1800000,0x2000000,0x4000000}; 1985 cmd.DW15.Value = (cmd.DW15.Value & 0xffff) | table3[index]; 1986 } 1987 1988 cmd.DW12.Value &= 0xffff00ff; 1989 cmd.DW14.Value = (cmd.DW14.Value & 0x9fffff) | 0xc8400000; 1990 cmd.DW16.Value = (cmd.DW16.Value & 0xffffff) | 0xa6000000; 1991 if (seqParams->TargetUsage == 7) 1992 { 1993 cmd.DW16.Value = (cmd.DW16.Value & 0xffc0c0c0) | 0x313131; 1994 } 1995 else 1996 { 1997 cmd.DW16.Value = (cmd.DW16.Value & 0xffc0c0c0) | 0x3f3f3f; 1998 } 1999 } 2000 else if (params->Mode == CODECHAL_ENCODE_MODE_VP9) 2001 { 2002 auto paramsG12 = dynamic_cast<PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12>(params); 2003 MHW_MI_CHK_NULL(paramsG12); 2004 MHW_MI_CHK_NULL(params->pVp9EncPicParams); 2005 auto vp9PicParams = params->pVp9EncPicParams; 2006 auto tileCodingParams = paramsG12->pTileCodingParams; 2007 2008 if (tileCodingParams == nullptr) 2009 { 2010 cmd.DW2.NextsliceMbLcuStartXPosition = CODECHAL_GET_WIDTH_IN_BLOCKS(vp9PicParams->SrcFrameWidthMinus1, CODEC_VP9_SUPER_BLOCK_WIDTH); 2011 cmd.DW2.NextsliceMbStartYPosition = CODECHAL_GET_HEIGHT_IN_BLOCKS(vp9PicParams->SrcFrameHeightMinus1, CODEC_VP9_SUPER_BLOCK_HEIGHT); 2012 cmd.DW5.TileWidth = vp9PicParams->SrcFrameWidthMinus1; 2013 cmd.DW5.TileHeight = vp9PicParams->SrcFrameHeightMinus1; 2014 cmd.DW1.FirstSuperSlice = 1; 2015 } 2016 else 2017 { 2018 cmd.DW1.MbLcuStartXPosition = tileCodingParams->TileStartLCUX; 2019 cmd.DW1.MbLcuStartYPosition = tileCodingParams->TileStartLCUY; 2020 2021 cmd.DW5.TileWidth = ((tileCodingParams->TileWidthInMinCbMinus1 + 1) * CODEC_VP9_MIN_BLOCK_WIDTH) - 1; 2022 cmd.DW5.TileHeight = ((tileCodingParams->TileHeightInMinCbMinus1 + 1) * CODEC_VP9_MIN_BLOCK_HEIGHT) - 1; 2023 2024 cmd.DW4.TileStartCtbX = tileCodingParams->TileStartLCUX * CODEC_VP9_SUPER_BLOCK_WIDTH; 2025 cmd.DW4.TileStartCtbY = tileCodingParams->TileStartLCUY * CODEC_VP9_SUPER_BLOCK_HEIGHT; 2026 2027 cmd.DW2.NextsliceMbLcuStartXPosition = CODECHAL_GET_WIDTH_IN_BLOCKS((cmd.DW4.TileStartCtbX + cmd.DW5.TileWidth + 1), CODEC_VP9_SUPER_BLOCK_WIDTH); 2028 cmd.DW2.NextsliceMbStartYPosition = CODECHAL_GET_HEIGHT_IN_BLOCKS((cmd.DW4.TileStartCtbY + cmd.DW5.TileHeight + 1), CODEC_VP9_SUPER_BLOCK_HEIGHT); 2029 2030 cmd.DW1.FirstSuperSlice = 1; 2031 cmd.DW3.NumParEngine = paramsG12->dwNumberOfPipes; 2032 cmd.DW3.TileNumber = paramsG12->dwTileId; 2033 2034 //Frame Stats Offset 2035 cmd.DW8.TileStreamoutOffsetEnable = 1; 2036 cmd.DW8.TileStreamoutOffset = (paramsG12->dwTileId * 19); // 3 CLs or 48 DWs of statistics data + 16CLs or 256 DWs of Histogram data 2037 2038 uint32_t tileStartXInSBs = (cmd.DW4.TileStartCtbX / CODEC_VP9_SUPER_BLOCK_WIDTH); 2039 uint32_t tileStartYInSBs = (cmd.DW4.TileStartCtbY / CODEC_VP9_SUPER_BLOCK_HEIGHT); 2040 //Aligned Tile height & frame width 2041 uint32_t tileHeightInSBs = (cmd.DW5.TileHeight + 1 + (CODEC_VP9_SUPER_BLOCK_HEIGHT - 1)) / CODEC_VP9_SUPER_BLOCK_HEIGHT; 2042 uint32_t frameWidthInSBs = (vp9PicParams->SrcFrameWidthMinus1 + 1 + (CODEC_VP9_SUPER_BLOCK_WIDTH - 1)) / CODEC_VP9_SUPER_BLOCK_WIDTH; 2043 2044 cmd.DW6.StreaminOffsetEnable = 1; 2045 //StreamIn data is 4 CLs per LCU 2046 cmd.DW6.TileStreaminOffset = (tileStartYInSBs * frameWidthInSBs + tileStartXInSBs * tileHeightInSBs) * (4); 2047 2048 //Compute PAK Object StreamOut Offsets 2049 uint32_t tileLCUStreamOutOffsetInCachelines = 0; 2050 if (cmd.DW4.TileStartCtbY != 0 || cmd.DW4.TileStartCtbX != 0) 2051 { 2052 //Aligned Tile width & frame height 2053 uint32_t numOfSBs = tileStartYInSBs * frameWidthInSBs + tileStartXInSBs * tileHeightInSBs; 2054 //max LCU size is 64, min Cu size is 8 2055 uint32_t maxNumOfCUInSB = (CODEC_VP9_SUPER_BLOCK_HEIGHT / CODEC_VP9_MIN_BLOCK_HEIGHT) * (CODEC_VP9_SUPER_BLOCK_WIDTH / CODEC_VP9_MIN_BLOCK_WIDTH); 2056 //(num of SBs in a tile) * (num of cachelines needed per SB) 2057 tileLCUStreamOutOffsetInCachelines = numOfSBs * (MOS_ROUNDUP_DIVIDE((2 * BYTES_PER_DWORD * (NUM_PAK_DWS_PER_LCU + maxNumOfCUInSB * NUM_DWS_PER_CU)), MHW_CACHELINE_SIZE)); 2058 } 2059 2060 cmd.DW9.LcuStreamOutOffsetEnable = 1; 2061 cmd.DW9.TileLcuStreamOutOffset = tileLCUStreamOutOffsetInCachelines; 2062 2063 if (cmd.DW4.TileStartCtbY == 0) 2064 { 2065 //RowStore Offset Computation 2066 uint32_t num32x32sInX = (cmd.DW4.TileStartCtbX) / 32; 2067 cmd.DW7.RowStoreOffsetEnable = 1; 2068 cmd.DW7.TileRowstoreOffset = num32x32sInX; 2069 } 2070 } 2071 } 2072 2073 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 2074 2075 return MOS_STATUS_SUCCESS; 2076 } 2077 AddVdencAvcWeightsOffsetsStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_AVC_WEIGHTOFFSET_PARAMS params)2078 MOS_STATUS AddVdencAvcWeightsOffsetsStateCmd( 2079 PMOS_COMMAND_BUFFER cmdBuffer, 2080 PMHW_VDBOX_AVC_WEIGHTOFFSET_PARAMS params) override 2081 { 2082 MHW_FUNCTION_ENTER; 2083 2084 MHW_MI_CHK_NULL(cmdBuffer); 2085 MHW_MI_CHK_NULL(params); 2086 MHW_MI_CHK_NULL(params->pAvcPicParams); 2087 2088 typename TVdencCmds::VDENC_WEIGHTSOFFSETS_STATE_CMD cmd; 2089 2090 auto avcPicParams = params->pAvcPicParams; 2091 2092 if (avcPicParams->weighted_pred_flag == 1) 2093 { 2094 cmd.DW1.WeightsForwardReference0 = params->Weights[0][0][0][0]; 2095 cmd.DW1.OffsetForwardReference0 = params->Weights[0][0][0][1]; 2096 cmd.DW1.WeightsForwardReference1 = params->Weights[0][1][0][0]; 2097 cmd.DW1.OffsetForwardReference1 = params->Weights[0][1][0][1]; 2098 cmd.DW2.WeightsForwardReference2 = params->Weights[0][2][0][0]; 2099 cmd.DW2.OffsetForwardReference2 = params->Weights[0][2][0][1]; 2100 } 2101 //set to default value when weighted prediction not enabled 2102 else 2103 { 2104 cmd.DW1.WeightsForwardReference0 = 1; 2105 cmd.DW1.OffsetForwardReference0 = 0; 2106 cmd.DW1.WeightsForwardReference1 = 1; 2107 cmd.DW1.OffsetForwardReference1 = 0; 2108 cmd.DW2.WeightsForwardReference2 = 1; 2109 cmd.DW2.OffsetForwardReference2 = 0; 2110 } 2111 2112 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 2113 2114 return MOS_STATUS_SUCCESS; 2115 } 2116 AddVdencWeightsOffsetsStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_WEIGHT_OFFSET_PARAMS params)2117 MOS_STATUS AddVdencWeightsOffsetsStateCmd( 2118 PMOS_COMMAND_BUFFER cmdBuffer, 2119 PMHW_BATCH_BUFFER batchBuffer, 2120 PMHW_VDBOX_VDENC_WEIGHT_OFFSET_PARAMS params) override 2121 { 2122 MHW_FUNCTION_ENTER; 2123 2124 MHW_MI_CHK_NULL(params); 2125 2126 typename TVdencCmds::VDENC_WEIGHTSOFFSETS_STATE_CMD cmd; 2127 2128 cmd.DW1.WeightsForwardReference0 = 1; 2129 cmd.DW1.OffsetForwardReference0 = 0; 2130 cmd.DW1.WeightsForwardReference1 = 1; 2131 cmd.DW1.OffsetForwardReference1 = 0; 2132 cmd.DW2.WeightsForwardReference2 = 1; 2133 cmd.DW2.OffsetForwardReference2 = 0; 2134 cmd.DW2.HevcVp9WeightsBackwardReference0 = 1; 2135 cmd.DW2.HevcVp9OffsetBackwardReference0 = 0; 2136 2137 // Luma Offsets and Weights 2138 if (params->bWeightedPredEnabled) 2139 { 2140 uint32_t refPicListNum = 0; 2141 // DWORD 1 2142 cmd.DW1.WeightsForwardReference0 = CodecHal_Clip3(-128, 127, 2143 params->LumaWeights[refPicListNum][0] + params->dwDenom); 2144 cmd.DW1.OffsetForwardReference0 = params->LumaOffsets[refPicListNum][0]; 2145 cmd.DW1.WeightsForwardReference1 = CodecHal_Clip3(-128, 127, 2146 params->LumaWeights[refPicListNum][1] + params->dwDenom); 2147 cmd.DW1.OffsetForwardReference1 = params->LumaOffsets[refPicListNum][1]; 2148 2149 // DWORD 2 2150 cmd.DW2.WeightsForwardReference2 = CodecHal_Clip3(-128, 127, 2151 params->LumaWeights[refPicListNum][2] + params->dwDenom); 2152 cmd.DW2.OffsetForwardReference2 = params->LumaOffsets[refPicListNum][2]; 2153 if (!params->isLowDelay) 2154 { 2155 refPicListNum = 1; 2156 cmd.DW2.HevcVp9WeightsBackwardReference0 = CodecHal_Clip3(-128, 127, 2157 params->LumaWeights[refPicListNum][0] + params->dwDenom); 2158 cmd.DW2.HevcVp9OffsetBackwardReference0 = params->LumaOffsets[refPicListNum][0]; 2159 } 2160 else 2161 { 2162 cmd.DW2.HevcVp9WeightsBackwardReference0 = cmd.DW1.WeightsForwardReference0; 2163 cmd.DW2.HevcVp9OffsetBackwardReference0 = cmd.DW1.OffsetForwardReference0; 2164 } 2165 } 2166 2167 if (cmdBuffer == nullptr && batchBuffer == nullptr) 2168 { 2169 MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to."); 2170 return MOS_STATUS_NULL_POINTER; 2171 } 2172 2173 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(cmdBuffer, batchBuffer, &cmd, sizeof(cmd))); 2174 2175 return MOS_STATUS_SUCCESS; 2176 } 2177 AddVdencCmd1Cmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_CMD1_PARAMS params)2178 MOS_STATUS AddVdencCmd1Cmd( 2179 PMOS_COMMAND_BUFFER cmdBuffer, 2180 PMHW_BATCH_BUFFER batchBuffer, 2181 PMHW_VDBOX_VDENC_CMD1_PARAMS params) override 2182 { 2183 return MOS_STATUS_SUCCESS; 2184 } 2185 AddVdencCmd2Cmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_CMD2_STATE params)2186 MOS_STATUS AddVdencCmd2Cmd( 2187 PMOS_COMMAND_BUFFER cmdBuffer, 2188 PMHW_BATCH_BUFFER batchBuffer, 2189 PMHW_VDBOX_VDENC_CMD2_STATE params) override 2190 { 2191 return MOS_STATUS_SUCCESS; 2192 } 2193 2194 //! 2195 //! \brief Adds VDEnc Pipe Control State command in command buffer 2196 //! \details Client facing function to add VDEnc Pipe Control State command in command buffer 2197 //! \param PMOS_COMMAND_BUFFER cmdBuffer 2198 //! [in] Command buffer to which HW command is added 2199 //! \param PMHW_VDBOX_VDENC_CONTROL_STATE_PARAMS params 2200 //! [in] Params structure used to populate the HW command 2201 //! \return MOS_STATUS 2202 //! MOS_STATUS_SUCCESS if success, else fail reason 2203 //! AddVdencControlStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VDENC_CONTROL_STATE_PARAMS params)2204 MOS_STATUS AddVdencControlStateCmd( 2205 PMOS_COMMAND_BUFFER cmdBuffer, 2206 PMHW_VDBOX_VDENC_CONTROL_STATE_PARAMS params) 2207 { 2208 MHW_FUNCTION_ENTER; 2209 2210 MHW_MI_CHK_NULL(cmdBuffer); 2211 MHW_MI_CHK_NULL(params); 2212 2213 typename TVdencCmds::VDENC_CONTROL_STATE_CMD cmd; 2214 2215 2216 if (params->bVdencInitialization) 2217 { 2218 cmd.DW1.VdencInitialization = 1; 2219 } 2220 else 2221 { 2222 MHW_ASSERTMESSAGE("Invalid parameter for VDENC_CONTROL_STATE."); 2223 return MOS_STATUS_INVALID_PARAMETER; 2224 } 2225 2226 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd))); 2227 2228 return MOS_STATUS_SUCCESS; 2229 } 2230 CreateMhwVdboxPipeModeSelectParams()2231 PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS CreateMhwVdboxPipeModeSelectParams() override 2232 { 2233 auto pipeModeSelectParams = MOS_New(MHW_VDBOX_PIPE_MODE_SELECT_PARAMS_G12); 2234 2235 return pipeModeSelectParams; 2236 } 2237 ReleaseMhwVdboxPipeModeSelectParams(PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS pipeModeSelectParams)2238 void ReleaseMhwVdboxPipeModeSelectParams(PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS pipeModeSelectParams) override 2239 { 2240 MOS_Delete(pipeModeSelectParams); 2241 } 2242 }; 2243 2244 //! MHW Vdbox Vdenc interface for Gen12 X 2245 /*! 2246 This class defines the Vdenc command construction functions for Gen12 common platforms 2247 */ 2248 class MhwVdboxVdencInterfaceG12X : public MhwVdboxVdencInterfaceG12<mhw_vdbox_vdenc_g12_X> 2249 { 2250 public: 2251 //! 2252 //! \brief Constructor 2253 //! MhwVdboxVdencInterfaceG12X(PMOS_INTERFACE osInterface)2254 MhwVdboxVdencInterfaceG12X(PMOS_INTERFACE osInterface) : MhwVdboxVdencInterfaceG12(osInterface) 2255 { 2256 MHW_FUNCTION_ENTER; 2257 } 2258 GetVdencCmd1Size()2259 inline uint32_t GetVdencCmd1Size() override 2260 { 2261 return mhw_vdbox_vdenc_g12_X::VDENC_CMD1_CMD::byteSize; 2262 } 2263 GetVdencCmd2Size()2264 inline uint32_t GetVdencCmd2Size() override 2265 { 2266 return mhw_vdbox_vdenc_g12_X::VDENC_CMD2_CMD::byteSize; 2267 } 2268 2269 //! 2270 //! \brief Destructor 2271 //! ~MhwVdboxVdencInterfaceG12X()2272 virtual ~MhwVdboxVdencInterfaceG12X() 2273 { 2274 MHW_FUNCTION_ENTER; 2275 } 2276 AddVdencCmd1Cmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_CMD1_PARAMS params)2277 MOS_STATUS AddVdencCmd1Cmd( 2278 PMOS_COMMAND_BUFFER cmdBuffer, 2279 PMHW_BATCH_BUFFER batchBuffer, 2280 PMHW_VDBOX_VDENC_CMD1_PARAMS params) override 2281 { 2282 MHW_FUNCTION_ENTER; 2283 2284 MHW_MI_CHK_NULL(params); 2285 2286 typename mhw_vdbox_vdenc_g12_X::VDENC_CMD1_CMD cmd; 2287 2288 cmd.DW22.Value = 0x10101010; 2289 cmd.DW23.Value = 0x10101010; 2290 cmd.DW24.Value = 0x10101010; 2291 cmd.DW25.Value = 0x10101010; 2292 cmd.DW26.Value = 0x10101010; 2293 cmd.DW27.Value = 0x10101010; 2294 cmd.DW28.Value = 0x10101010; 2295 cmd.DW29.Value = 0x10101010; 2296 if (params->Mode == CODECHAL_ENCODE_MODE_HEVC) 2297 { 2298 MHW_MI_CHK_NULL(params->pHevcEncPicParams); 2299 auto hevcPicParams = params->pHevcEncPicParams; 2300 MHW_MI_CHK_NULL(params->pHevcEncSlcParams); 2301 auto hevcSlcParams = params->pHevcEncSlcParams; 2302 2303 const uint32_t table1[3] = {0x5030200,0x5030200,0x5030200}; 2304 const uint8_t indexTable1[3] = {0,1,2}; 2305 cmd.DW1.Value = table1[indexTable1[hevcPicParams->CodingType - 1]]; 2306 const uint32_t table2[3] = {0xb090806,0xb090806,0xb090806}; 2307 const uint8_t indexTable2[3] = {0,1,2}; 2308 cmd.DW2.Value = table2[indexTable2[hevcPicParams->CodingType - 1]]; 2309 2310 cmd.DW3.Value = 0x1c140c04; 2311 cmd.DW4.Value = 0x3c342c24; 2312 cmd.DW5.Value = 0x5c544c44; 2313 cmd.DW6.Value = 0x1c140c04; 2314 cmd.DW7.Value = 0x3c342c24; 2315 cmd.DW8.Value = 0x5c544c44; 2316 cmd.DW14.Value = 0x0; 2317 cmd.DW15.Value = 0x0; 2318 cmd.DW16.Value &= 0xffff0000; 2319 cmd.DW19.Value = (cmd.DW19.Value & 0xff0000ff) | 0x140400; 2320 cmd.DW20.Value = 0x14141414; 2321 cmd.DW21.Value = 0x14141414; 2322 if (params->bHevcVisualQualityImprovement) 2323 { 2324 auto qpPrimeYac = CodecHal_Clip3(10, 51, hevcPicParams->QpY + hevcSlcParams->slice_qp_delta); 2325 if (qpPrimeYac >= 22 && qpPrimeYac <= 51) 2326 { 2327 const uint32_t table3[30] = {0x0,0x60000,0xc0000,0x120000,0x190000,0x1f0000,0x250000,0x2c0000,0x320000,0x380000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000}; 2328 cmd.DW14.Value = (cmd.DW14.Value & 0xff00ffff) |table3[qpPrimeYac - 22]; 2329 } 2330 } 2331 2332 if (params->pHevcEncPicParams->CodingType == I_TYPE) 2333 { 2334 cmd.DW10.Value = 0x23131f0f; 2335 cmd.DW11.Value = (cmd.DW11.Value & 0xffff0000) | 0x2313; 2336 cmd.DW12.Value = 0x3e5c445c; 2337 cmd.DW13.Value = (cmd.DW13.Value & 0xff00) | 0x1e040044; 2338 cmd.DW16.Value = (cmd.DW16.Value & 0xffff) | 0x70000; 2339 cmd.DW17.Value = 0xd0e1007; 2340 cmd.DW18.Value = (cmd.DW18.Value & 0xffffff00) | 0x32; 2341 cmd.DW18.Value = (cmd.DW18.Value & 0xffff00ff) | (hevcPicParams->NumROI ? 0 : 0x1e00); 2342 cmd.DW30.Value = (cmd.DW30.Value & 0xff000000) | 0x101010; 2343 } 2344 else if (params->pHevcEncPicParams->CodingType == B_TYPE) 2345 { 2346 cmd.DW10.Value = 0x23131f0f; 2347 cmd.DW11.Value = 0x331b2313; 2348 cmd.DW12.Value = 0x476e4d6e; 2349 cmd.DW13.Value = 0x3604004d; 2350 cmd.DW16.Value = (cmd.DW16.Value & 0xffff) | 0x4150000; 2351 cmd.DW17.Value = 0x23231415; 2352 cmd.DW18.Value = (cmd.DW18.Value & 0xffffff00) | 0x3f; 2353 cmd.DW18.Value = (cmd.DW18.Value & 0xffff00ff) | (hevcPicParams->NumROI ? 0 : 0x4400); 2354 cmd.DW30.Value = (cmd.DW30.Value & 0xff000000) | 0x232323; 2355 } 2356 } 2357 else if (params->Mode == CODECHAL_ENCODE_MODE_VP9) 2358 { 2359 MHW_MI_CHK_NULL(params->pVp9EncPicParams); 2360 2361 auto vp9PicParams = params->pVp9EncPicParams; 2362 auto qp = vp9PicParams->LumaACQIndex; 2363 auto vp9FrameType = vp9PicParams->PicFlags.fields.frame_type; 2364 2365 const uint32_t table1[2][256] = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 2366 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; 2367 const uint8_t indexTable1[2] = {0,1}; 2368 cmd.DW1.Value = table1[indexTable1[vp9FrameType]][qp]; 2369 const uint32_t table2[2][256] = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 2370 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; 2371 const uint8_t indexTable2[2] = {0,1}; 2372 cmd.DW2.Value = table2[indexTable2[vp9FrameType]][qp]; 2373 2374 cmd.DW3.Value = 0x1a130b04; 2375 cmd.DW4.Value = 0x3f312922; 2376 cmd.DW5.Value = 0x7164584b; 2377 cmd.DW6.Value = 0x1a130b04; 2378 cmd.DW7.Value = 0x3f312922; 2379 cmd.DW8.Value = 0x7164584b; 2380 cmd.DW20.Value = 0xc0c0c0c; 2381 cmd.DW21.Value = 0xc0c0c0c; 2382 cmd.DW22.Value = 0x10101010; 2383 cmd.DW23.Value = 0x10101010; 2384 cmd.DW24.Value = 0x10101010; 2385 cmd.DW25.Value = 0x10101010; 2386 cmd.DW26.Value = 0x10101010; 2387 cmd.DW27.Value = 0x10101010; 2388 cmd.DW28.Value = 0x10101010; 2389 cmd.DW29.Value = 0x10101010; 2390 if(vp9FrameType == CODEC_VP9_KEY_FRAME) 2391 { 2392 cmd.DW9.Value &= 0xff000000; 2393 cmd.DW10.Value = 0x0; 2394 cmd.DW11.Value = 0x0; 2395 cmd.DW12.Value = 0x0; 2396 cmd.DW13.Value = 0x32000000; 2397 cmd.DW14.Value = 0x1f5e0000; 2398 cmd.DW15.Value = 0x1f5e0000; 2399 cmd.DW16.Value = (cmd.DW16.Value & 0xff000000) | 0x4b0000; 2400 cmd.DW17.Value = 0x3219194b; 2401 cmd.DW18.Value = 0x4b5e0026; 2402 cmd.DW19.Value = (cmd.DW19.Value & 0xff) | 0x7d7d0000; 2403 } 2404 else 2405 { 2406 cmd.DW9.Value = (cmd.DW9.Value & 0xff000000) | 0x26191f; 2407 cmd.DW10.Value = 0x1e0b1e0b; 2408 cmd.DW11.Value = 0x19001e0b; 2409 cmd.DW12.Value = 0x19321f4b; 2410 cmd.DW13.Value = 0x4404001f; 2411 cmd.DW14.Value = 0x30900000; 2412 cmd.DW15.Value = 0x30900000; 2413 cmd.DW16.Value = (cmd.DW16.Value & 0xff000000) | 0x260000; 2414 cmd.DW17.Value = 0x13194b26; 2415 cmd.DW18.Value = 0x3f5e0d5e; 2416 cmd.DW19.Value = (cmd.DW19.Value & 0xff) | 0x4e320f00; 2417 } 2418 } 2419 2420 if (cmdBuffer == nullptr && batchBuffer == nullptr) 2421 { 2422 MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to."); 2423 return MOS_STATUS_NULL_POINTER; 2424 } 2425 2426 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(cmdBuffer, batchBuffer, &cmd, sizeof(cmd))); 2427 2428 return MOS_STATUS_SUCCESS; 2429 } 2430 AddVdencCmd2Cmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_CMD2_STATE params)2431 MOS_STATUS AddVdencCmd2Cmd( 2432 PMOS_COMMAND_BUFFER cmdBuffer, 2433 PMHW_BATCH_BUFFER batchBuffer, 2434 PMHW_VDBOX_VDENC_CMD2_STATE params) override 2435 { 2436 MHW_FUNCTION_ENTER; 2437 2438 MHW_MI_CHK_NULL(params); 2439 auto extParams = std::static_pointer_cast<MHW_VDBOX_VDENC_CMD2_STATE>(params); 2440 MHW_MI_CHK_NULL(extParams); 2441 2442 typename mhw_vdbox_vdenc_g12_X::VDENC_CMD2_CMD cmd; 2443 2444 cmd.DW2.Value = (cmd.DW2.Value & 0xdff00000) | 0x2005aff3; 2445 cmd.DW3.Value = 0xfe02ff01; 2446 cmd.DW4.Value = 0xfc04fd03; 2447 cmd.DW5.Value = (cmd.DW5.Value & 0xff7e03ff) | 0x80ac00; 2448 cmd.DW7.Value = (cmd.DW7.Value & 0xffd90ff0) | 0x62003; 2449 cmd.DW9.Value = (cmd.DW9.Value & 0xffff) | 0x43840000; 2450 cmd.DW12.Value = 0xffffffff; 2451 cmd.DW15.Value = 0x4e201f40; 2452 cmd.DW16.Value = (cmd.DW16.Value & 0xf0ff0000) | 0xf003300; 2453 cmd.DW17.Value = (cmd.DW17.Value & 0xfff00000) | 0x2710; 2454 cmd.DW19.Value = (cmd.DW19.Value & 0x80ffffff) | 0x18000000; 2455 cmd.DW21.Value &= 0xfffffff; 2456 cmd.DW22.Value = 0x1f001102; 2457 cmd.DW23.Value = 0xaaaa1f00; 2458 cmd.DW27.Value = (cmd.DW27.Value & 0xffff0000) | 0x1a1a; 2459 if (params->pHevcEncPicParams && params->pHevcEncSeqParams) 2460 { 2461 MHW_MI_CHK_NULL(params->pHevcEncSeqParams); 2462 MHW_MI_CHK_NULL(params->pHevcEncPicParams); 2463 MHW_MI_CHK_NULL(params->pHevcEncSlcParams); 2464 auto hevcSeqParams = params->pHevcEncSeqParams; 2465 auto hevcPicParams = params->pHevcEncPicParams; 2466 auto hevcSlcParams = params->pHevcEncSlcParams; 2467 2468 bool vdencROIEnabled = params->bROIStreamInEnabled; 2469 bool vdencStreamInEnabled = params->bStreamInEnabled; 2470 2471 cmd.DW1.FrameWidthInPixelsMinusOne = ((hevcSeqParams->wFrameWidthInMinCbMinus1 + 1) << 2472 (hevcSeqParams->log2_min_coding_block_size_minus3 + 3)) - 1; 2473 cmd.DW1.FrameHeightInPixelsMinusOne = ((hevcSeqParams->wFrameHeightInMinCbMinus1 + 1) << 2474 (hevcSeqParams->log2_min_coding_block_size_minus3 + 3)) - 1; 2475 2476 cmd.DW2.PictureType = (hevcPicParams->CodingType == I_TYPE) ? 0 : (extParams->bIsLowDelayB ? 3 : 2); 2477 cmd.DW2.TemporalMvpEnableFlag = (hevcPicParams->CodingType == I_TYPE) ? 0 : params->pHevcEncSeqParams->sps_temporal_mvp_enable_flag; 2478 cmd.DW2.TransformSkip = hevcPicParams->transform_skip_enabled_flag; 2479 2480 cmd.DW5.NumRefIdxL0Minus1 = hevcSlcParams->num_ref_idx_l0_active_minus1; 2481 cmd.DW5.NumRefIdxL1Minus1 = hevcSlcParams->num_ref_idx_l1_active_minus1; 2482 2483 cmd.DW5.Value = (cmd.DW5.Value & 0xff83ffff) | 0x400000; 2484 cmd.DW14.Value = (cmd.DW14.Value & 0xffff) | 0x7d00000; 2485 cmd.DW15.Value = 0x4e201f40; 2486 cmd.DW17.Value = (cmd.DW17.Value & 0xfff00000) | 0x2710; 2487 cmd.DW18.Value = (cmd.DW18.Value & 0xffff) | 0x600000; 2488 cmd.DW19.Value = (cmd.DW19.Value & 0xffff0000) | 0xc0; 2489 cmd.DW20.Value &= 0xfffeffff; 2490 cmd.DW7.TilingEnable = hevcPicParams->tiles_enabled_flag; 2491 cmd.DW37.TileReplayEnable = extParams->bTileReplayEnable; 2492 2493 if (hevcPicParams->CodingType != I_TYPE) 2494 { 2495 uint8_t refFrameId; 2496 int8_t diffPoc; 2497 2498 refFrameId = hevcSlcParams->RefPicList[0][0].FrameIdx; 2499 diffPoc = ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0x0 : hevcPicParams->RefFramePOCList[refFrameId]) - hevcPicParams->CurrPicOrderCnt; 2500 cmd.DW3.PocNumberForRefid0InL0 = CodecHal_Clip3(-16, 16, -diffPoc); 2501 cmd.DW2.LongTermReferenceFlagsL0 = (refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0 : CodecHal_PictureIsLongTermRef(hevcPicParams->RefFrameList[refFrameId]); 2502 refFrameId = hevcSlcParams->RefPicList[0][1].FrameIdx; 2503 diffPoc = ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0x0 : hevcPicParams->RefFramePOCList[refFrameId]) - hevcPicParams->CurrPicOrderCnt; 2504 cmd.DW3.PocNumberForRefid1InL0 = CodecHal_Clip3(-16, 16, -diffPoc); 2505 cmd.DW2.LongTermReferenceFlagsL0 |= ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0 : CodecHal_PictureIsLongTermRef(hevcPicParams->RefFrameList[refFrameId])) << 1; 2506 refFrameId = hevcSlcParams->RefPicList[0][2].FrameIdx; 2507 diffPoc = ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0x0 : hevcPicParams->RefFramePOCList[refFrameId]) - hevcPicParams->CurrPicOrderCnt; 2508 cmd.DW4.PocNumberForRefid2InL0 = CodecHal_Clip3(-16, 16, -diffPoc); 2509 cmd.DW2.LongTermReferenceFlagsL0 |= ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0 : CodecHal_PictureIsLongTermRef(hevcPicParams->RefFrameList[refFrameId])) << 2; 2510 2511 refFrameId = hevcSlcParams->RefPicList[1][0].FrameIdx; 2512 diffPoc = ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0x0 : hevcPicParams->RefFramePOCList[refFrameId]) - hevcPicParams->CurrPicOrderCnt; 2513 cmd.DW3.PocNumberForRefid0InL1 = CodecHal_Clip3(-16, 16, -diffPoc); 2514 cmd.DW2.LongTermReferenceFlagsL1 = CodecHal_PictureIsLongTermRef(hevcPicParams->RefFrameList[refFrameId]); 2515 2516 cmd.DW3.PocNumberForRefid1InL1 = cmd.DW3.PocNumberForRefid1InL0; 2517 cmd.DW4.PocNumberForRefid2InL1 = cmd.DW4.PocNumberForRefid2InL0; 2518 } 2519 else 2520 { 2521 cmd.DW3.Value = cmd.DW4.Value = 0; 2522 } 2523 2524 switch (hevcSeqParams->TargetUsage) 2525 { 2526 case 1: // Quality mode 2527 cmd.DW2.Value &= 0xdfffffff; 2528 cmd.DW2.Value = (cmd.DW2.Value & 0xfffffffc) | (hevcPicParams->CodingType == I_TYPE ? 2 : 3); 2529 cmd.DW7.Value &= 0xfffffeff; 2530 cmd.DW7.Value = (cmd.DW7.Value & 0xfffff7ff) | (hevcPicParams->CodingType == I_TYPE ? 0x800 : 0); 2531 cmd.DW9.Value = (cmd.DW9.Value & 0xfffff) | 0x43800000; 2532 cmd.DW12.Value = 0xffffffff; 2533 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x21000000; 2534 break; 2535 case 4: // Normal mode 2536 cmd.DW2.Value &= 0xdfffffff; 2537 cmd.DW7.Value &= 0xfffffeff; 2538 cmd.DW9.Value = (cmd.DW9.Value & 0xfffff) | 0x43800000; 2539 cmd.DW12.Value = 0xce4014a0; 2540 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x21000000; 2541 break; 2542 case 7: // Speed mode 2543 cmd.DW2.Value = (cmd.DW2.Value & 0xdfffffff) | 0x20000000; 2544 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7feff) | 0x80100; 2545 cmd.DW9.Value = (cmd.DW9.Value & 0xffff) | 0x22420000; 2546 cmd.DW12.Value = 0x89800dc0; 2547 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x20000000; 2548 break; 2549 default: 2550 MHW_ASSERTMESSAGE("Invalid TU provided!"); 2551 return MOS_STATUS_INVALID_PARAMETER; 2552 } 2553 2554 if (hevcSlcParams->num_ref_idx_l0_active_minus1 == 0) 2555 { 2556 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7ffff) | 0x80000; 2557 } 2558 2559 if (!extParams->bIsLowDelayB) 2560 { 2561 cmd.DW7.Value &= 0xfff7feff; 2562 } 2563 2564 cmd.DW7.VdencStreamInEnable = vdencStreamInEnabled; 2565 cmd.DW7.PakOnlyMultiPassEnable = params->bPakOnlyMultipassEnable; 2566 2567 if (extParams->bIsLowDelayB) 2568 { 2569 cmd.DW8.Value = 0; 2570 cmd.DW9.Value &= 0xffff0000; 2571 } 2572 else 2573 { 2574 cmd.DW8.Value = 0x54555555; 2575 cmd.DW9.Value = (cmd.DW9.Value & 0xffff0000) | 0x5555; 2576 } 2577 2578 cmd.DW16.MinQp = hevcPicParams->BRCMinQp < 0x0a ? 10 : hevcPicParams->BRCMinQp; 2579 cmd.DW16.MaxQp = hevcPicParams->BRCMaxQp < 0x0a ? 51 : (hevcPicParams->BRCMaxQp > 0x33 ? 0x33 : hevcPicParams->BRCMaxQp); 2580 cmd.DW17.TemporalMVEnableForIntegerSearch = cmd.DW2.TemporalMvpEnableFlag & extParams->bIsLowDelayB; 2581 2582 if (vdencROIEnabled) 2583 { 2584 int8_t priorityLevelOrDQp[ENCODE_VDENC_HEVC_MAX_STREAMINROI_G10] = { 0 }; 2585 2586 cmd.DW5.StreaminRoiEnable = vdencROIEnabled; 2587 2588 for (uint8_t i = 0; i < ENCODE_VDENC_HEVC_MAX_STREAMINROI_G10; i++) 2589 { 2590 priorityLevelOrDQp[i] = (int8_t)CodecHal_Clip3( 2591 ENCODE_VDENC_HEVC_MIN_ROI_DELTA_QP_G10, ENCODE_VDENC_HEVC_MAX_ROI_DELTA_QP_G10, hevcPicParams->ROIDistinctDeltaQp[i]); 2592 } 2593 2594 cmd.DW13.RoiQpAdjustmentForZone1Stage3 = priorityLevelOrDQp[0]; 2595 cmd.DW13.RoiQpAdjustmentForZone2Stage3 = priorityLevelOrDQp[1]; 2596 cmd.DW13.RoiQpAdjustmentForZone3Stage3 = priorityLevelOrDQp[2]; 2597 } 2598 2599 if ((hevcPicParams->bEnableRollingIntraRefresh) && (hevcPicParams->CodingType != I_TYPE)) 2600 { 2601 uint32_t rollingILimit = (hevcPicParams->bEnableRollingIntraRefresh == ROLLING_I_ROW) ? 2602 MOS_ROUNDUP_DIVIDE(cmd.DW1.FrameHeightInPixelsMinusOne + 1, 32) : 2603 MOS_ROUNDUP_DIVIDE(cmd.DW1.FrameWidthInPixelsMinusOne + 1, 32); 2604 2605 cmd.DW7.Value = (cmd.DW7.Value & 0xfffffbff) | 0x400; 2606 cmd.DW7.Value = (cmd.DW7.Value & 0xfffffbff) | ((hevcSeqParams->TargetUsage == 1) ? 0x400 : 0); 2607 cmd.DW21.Value = (cmd.DW21.Value & 0xfdffffff) | 0x2000000; 2608 cmd.DW21.QpAdjustmentForRollingI = MOS_CLAMP_MIN_MAX(hevcPicParams->QpDeltaForInsertedIntra, -8, 7); 2609 cmd.DW21.IntraRefreshMode = (hevcPicParams->bEnableRollingIntraRefresh == ROLLING_I_ROW) ? 0 : 1; 2610 cmd.DW21.IntraRefreshMBSizeMinusOne = hevcPicParams->IntraInsertionSize - 1; 2611 cmd.DW21.IntraRefreshPos = hevcPicParams->IntraInsertionLocation; 2612 cmd.DW36.IntraRefreshBoundaryRef0 = CodecHal_Clip3(0, rollingILimit, hevcPicParams->RollingIntraReferenceLocation[0] - 1); 2613 cmd.DW36.IntraRefreshBoundaryRef1 = CodecHal_Clip3(0, rollingILimit, hevcPicParams->RollingIntraReferenceLocation[1] - 1); 2614 cmd.DW36.IntraRefreshBoundaryRef2 = CodecHal_Clip3(0, rollingILimit, hevcPicParams->RollingIntraReferenceLocation[2] - 1); 2615 } 2616 2617 const uint32_t table1[3][42] = {0x30002,0x30002,0x30002,0x30003,0x40004,0x40005,0x50006,0x60008,0x6000a,0x7000c,0x8000f,0x90013,0xa0018,0xb001e,0xc0026,0xe0030,0x10003d,0x12004d,0x140061,0x16007a,0x19009a,0x1c00c2,0x1f00f4,0x230133,0x270183,0x2c01e8,0x320266,0x380306,0x3e03cf,0x4604cd,0x4f060c,0x58079f,0x63099a,0x6f0c18,0x7d0f3d,0x8c1333,0x9d1831,0xb11e7a,0xc62666,0xdf3062,0xfa3cf5,0x1184ccd, 2618 0x30003,0x30003,0x30003,0x40003,0x40004,0x50005,0x50007,0x60008,0x6000a,0x7000d,0x80011,0x90015,0xa001a,0xb0021,0xd002a,0xe0034,0x100042,0x120053,0x140069,0x170084,0x1a00a6,0x1d00d2,0x210108,0x24014d,0x2901a3,0x2e0210,0x34029a,0x3a0347,0x410421,0x490533,0x52068d,0x5c0841,0x670a66,0x740d1a,0x821082,0x9214cd,0xa41a35,0xb82105,0xce299a,0xe8346a,0x1044209,0x1245333, 2619 0x30003,0x30003,0x30003,0x40003,0x40004,0x50005,0x50007,0x60008,0x6000a,0x7000d,0x80011,0x90015,0xa001a,0xb0021,0xd002a,0xe0034,0x100042,0x120053,0x140069,0x170084,0x1a00a6,0x1d00d2,0x210108,0x24014d,0x2901a3,0x2e0210,0x34029a,0x3a0347,0x410421,0x490533,0x52068d,0x5c0841,0x670a66,0x740d1a,0x821082,0x9214cd,0xa41a35,0xb82105,0xce299a,0xe8346a,0x1044209,0x1245333}; 2620 const uint8_t indexTable1[3] = {0,1,2}; 2621 cmd.DW26.Value = (cmd.DW26.Value & 0xfe000000) | table1[indexTable1[hevcPicParams->CodingType - 1]][hevcPicParams->QpY + hevcSlcParams->slice_qp_delta - 10]; 2622 2623 if (params->bHevcVisualQualityImprovement) 2624 { 2625 auto qpPrimeYac = CodecHal_Clip3(10, 51, hevcPicParams->QpY + hevcSlcParams->slice_qp_delta); 2626 if (qpPrimeYac >= 22 && qpPrimeYac <= 51 && hevcSlcParams->slice_type == SLICE_I) 2627 { 2628 const uint32_t table2[3][30] = {0xa,0xb,0xd,0xf,0x11,0x14,0x17,0x1a,0x1e,0x22,0x27,0x2d,0x33,0x3b,0x43,0x4d,0x57,0x64,0x72,0x82,0x95,0xa7,0xbb,0xd2,0xec,0x109,0x129,0x14e,0x177,0x1a5, 2629 0xa,0xc,0xe,0x10,0x12,0x15,0x18,0x1b,0x1f,0x23,0x29,0x2f,0x35,0x3d,0x46,0x50,0x5b,0x68,0x77,0x88,0x9b,0xae,0xc3,0xdb,0xf6,0x114,0x136,0x15c,0x186,0x1b6, 2630 0xa,0xc,0xe,0x10,0x12,0x15,0x18,0x1b,0x1f,0x23,0x29,0x2f,0x35,0x3d,0x46,0x50,0x5b,0x68,0x77,0x88,0x9b,0xae,0xc3,0xdb,0xf6,0x114,0x136,0x15c,0x186,0x1b6}; 2631 const uint8_t indexTable2[3] = {0,1,2}; 2632 cmd.DW26.SadQpLambda = table2[indexTable2[hevcPicParams->CodingType - 1]][qpPrimeYac - 22]; 2633 } 2634 2635 if (hevcPicParams->QpY >= 22 && hevcPicParams->QpY <= 51) 2636 { 2637 cmd.DW6.Value = (cmd.DW6.Value & 0xc00fffff) | 0x1fb00000; 2638 } 2639 } 2640 cmd.DW27.QpPrimeYAc = hevcPicParams->QpY + hevcSlcParams->slice_qp_delta; 2641 cmd.DW27.Value &= 0xffffff00; 2642 cmd.DW35.Value = (cmd.DW35.Value & 0xfffff0ff) | 0x700; 2643 2644 if (params->bUseDefaultQpDeltas) 2645 { 2646 cmd.DW13.Value = (cmd.DW13.Value & 0xffff) | 0xf0120000; 2647 if (hevcPicParams->CodingType == I_TYPE) 2648 { 2649 cmd.DW14.Value = (cmd.DW14.Value & 0xffff0000) | 0x21db; 2650 cmd.DW16.Value = (cmd.DW16.Value & 0xf00ffff) | 0x10000; 2651 cmd.DW18.Value = 0x600000; 2652 cmd.DW19.Value = (cmd.DW19.Value & 0xffff0000) | 0xc0; 2653 } 2654 else // LDB frames 2655 { 2656 cmd.DW14.Value = (cmd.DW14.Value & 0xffff0000) | 0x21ed; 2657 cmd.DW16.Value = (cmd.DW16.Value & 0xf00ffff) | 0xd0010000; 2658 cmd.DW18.Value = 0x60010f; 2659 cmd.DW19.Value = (cmd.DW19.Value & 0xffff0000) | 0xc0; 2660 } 2661 } 2662 2663 if (params->bRoundingEnabled) 2664 { 2665 cmd.DW28.Value = 0x7d00fa0; 2666 cmd.DW29.Value = 0x2bc0bb8; 2667 cmd.DW30.Value = 0x32003e8; 2668 cmd.DW31.Value = 0x1f4012c; 2669 cmd.DW32.Value = (cmd.DW32.Value & 0xffff0000) | 0x190; 2670 2671 const uint32_t table3[3][3] = {0x88220000,0x99220000,0xaa220000, 2672 0x88330000,0x99330000,0xaa330000, 2673 0x88440000,0x99440000,0xaa440000}; 2674 cmd.DW32.Value = (cmd.DW32.Value & 0xffff) | table3[params->roundInterValue - 2][params->roundIntraValue - 8]; 2675 2676 const uint32_t table4[3][3] = {0x22882222,0x22992222,0x22aa2222, 2677 0x33883333,0x33993333,0x33aa3333, 2678 0x44884444,0x44994444,0x44aa4444}; 2679 cmd.DW33.Value = table4[params->roundInterValue - 2][params->roundIntraValue - 8]; 2680 2681 const uint32_t table5[3][3] = {0x228822,0x229922,0x22aa22, 2682 0x338833,0x339933,0x33aa33, 2683 0x448844,0x449944,0x44aa44}; 2684 cmd.DW34.Value = (cmd.DW34.Value & 0xff000000) | table5[params->roundInterValue - 2][params->roundIntraValue - 8]; 2685 } 2686 2687 if (hevcPicParams->pps_curr_pic_ref_enabled_flag) 2688 { 2689 cmd.DW5.NumRefIdxL0Minus1++; 2690 cmd.DW35.Value &= 0xffff1fff; 2691 cmd.DW37.Value = (cmd.DW37.Value & 0xffffff9f) | 0x40; 2692 2693 if (hevcPicParams->CodingType == I_TYPE) 2694 { 2695 cmd.DW2.Value = (cmd.DW2.Value & 0xf8fffffc) | 0x1000002; 2696 cmd.DW3.Value &= 0xffffff00; 2697 cmd.DW5.Value &= 0xf0ffffff; 2698 } 2699 else 2700 { 2701 switch (cmd.DW5.NumRefIdxL0Minus1) 2702 { 2703 case 0: 2704 cmd.DW2.Value |= 0x1000000; 2705 cmd.DW3.Value &= 0xffffff00; 2706 break; 2707 case 1: 2708 cmd.DW2.Value |= 0x2000000; 2709 cmd.DW3.Value &= 0xff00ffff; 2710 break; 2711 case 2: 2712 cmd.DW2.Value |= 0x4000000; 2713 cmd.DW4.Value &= 0xffffff00; 2714 break; 2715 case 3: 2716 cmd.DW2.Value |= 0x0; 2717 cmd.DW4.Value &= 0xff00ffff; 2718 break; 2719 default: 2720 MHW_ASSERTMESSAGE("Invalid NumRefIdxL0"); 2721 return MOS_STATUS_INVALID_PARAMETER; 2722 } 2723 } 2724 } 2725 if (hevcSeqParams->palette_mode_enabled_flag) 2726 { 2727 cmd.DW37.Value &= 0xffe0ffe0; 2728 cmd.DW38.Value &= 0xffffffbf; 2729 uint32_t index = hevcSeqParams->bit_depth_luma_minus8 == 0 ? 0 : 1; 2730 const uint32_t table1[2] = {0x8000fc,0x20003f0}; 2731 cmd.DW39.Value = table1[index]; 2732 2733 const uint32_t table2[2] = {0xb10080,0x2c40200}; 2734 cmd.DW40.Value = table2[index]; 2735 2736 const uint32_t table3[2] = {0x300aa,0xc02a8}; 2737 cmd.DW41.Value = table3[index]; 2738 2739 const uint32_t table4[2] = {0xd30069,0x34c01a4}; 2740 cmd.DW42.Value = table4[index]; 2741 const uint32_t table5[2] = {0xe000e9,0x38003a4}; 2742 cmd.DW43.Value = table5[index]; 2743 2744 const uint32_t table6[2] = {0x940003,0x250000c}; 2745 cmd.DW44.Value = table6[index]; 2746 2747 const uint32_t table7[2] = {0x56004d,0x1580134}; 2748 cmd.DW45.Value = table7[index]; 2749 const uint32_t table8[2] = {0x9500fd,0x25403f4}; 2750 cmd.DW46.Value = table8[index]; 2751 2752 const uint32_t table9[2] = {0x17002d,0x5c00b4}; 2753 cmd.DW47.Value = table9[index]; 2754 2755 const uint32_t table10[2] = {0xfd001f,0x3f4007c}; 2756 cmd.DW48.Value = table10[index]; 2757 const uint32_t table11[2] = {0x2006c,0x801b0}; 2758 cmd.DW49.Value = table11[index]; 2759 2760 const uint32_t table12[2] = {0x800080,0x2000200}; 2761 cmd.DW50.Value = table12[index]; 2762 } 2763 2764 MHW_MI_CHK_NULL(extParams->pRefIdxMapping); 2765 for (int i = 0; i < params->ucNumRefIdxL0ActiveMinus1 + 1; i++) 2766 { 2767 uint8_t refFrameIDx = hevcSlcParams->RefPicList[0][i].FrameIdx; 2768 if (refFrameIDx < CODEC_MAX_NUM_REF_FRAME_HEVC) 2769 { 2770 *((uint8_t *)&cmd.DW11.Value + i) = *(extParams->pRefIdxMapping + refFrameIDx); 2771 } 2772 } 2773 for (int i = params->ucNumRefIdxL0ActiveMinus1 + 1; i < 3; i++) 2774 { 2775 *((uint8_t *)&cmd.DW11.Value + i) = 0x7; 2776 } 2777 if (hevcPicParams->pps_curr_pic_ref_enabled_flag) 2778 { 2779 *((uint8_t *)&cmd.DW11.Value + params->ucNumRefIdxL0ActiveMinus1 + 1) = extParams->recNotFilteredID; 2780 } 2781 if (!extParams->bIsLowDelayB) 2782 { 2783 uint8_t refFrameIDx = hevcSlcParams->RefPicList[1][0].FrameIdx; 2784 if (refFrameIDx < CODEC_MAX_NUM_REF_FRAME_HEVC) 2785 { 2786 const uint8_t bwdOffset = 3; 2787 *((uint8_t *)&cmd.DW11.Value + bwdOffset) = *(extParams->pRefIdxMapping + refFrameIDx); 2788 } 2789 } 2790 cmd.DW11.Value = (cmd.DW11.Value & 0x7fffffff) | 0x80000000; 2791 } 2792 else if (params->pVp9EncPicParams) 2793 { 2794 MHW_MI_CHK_NULL(params->pVp9EncPicParams); 2795 auto vp9PicParams = params->pVp9EncPicParams; 2796 MHW_MI_CHK_NULL(params->pVp9EncSeqParams); 2797 auto vp9SeqParams = params->pVp9EncSeqParams; 2798 2799 cmd.DW1.FrameWidthInPixelsMinusOne = MOS_ALIGN_CEIL(vp9PicParams->SrcFrameWidthMinus1 + 1, CODEC_VP9_MIN_BLOCK_WIDTH) - 1; 2800 cmd.DW1.FrameHeightInPixelsMinusOne = MOS_ALIGN_CEIL(vp9PicParams->SrcFrameHeightMinus1 + 1, CODEC_VP9_MIN_BLOCK_WIDTH) - 1; 2801 2802 cmd.DW2.Value = (cmd.DW2.Value & 0x8ff00000) | 0x5aff3; 2803 cmd.DW5.Value = (cmd.DW5.Value & 0xf000300) | 0x80ac00; 2804 cmd.DW6.Value = 0x20080200; 2805 cmd.DW7.Value = (cmd.DW7.Value & 0x190fd0) | 0x62003; 2806 cmd.DW9.Value = (cmd.DW9.Value & 0xfff0ffff) | 0x40000; 2807 cmd.DW14.Value = (cmd.DW14.Value & 0xffff) | 0x1f40000; 2808 cmd.DW15.Value = 0x138807d0; 2809 cmd.DW16.Value = (cmd.DW16.Value & 0xff0000) | 0xf00ff00; 2810 cmd.DW17.Value = (cmd.DW17.Value & 0xfff00000) | 0x2710; 2811 cmd.DW18.Value = 0x80000; 2812 cmd.DW19.Value = (cmd.DW19.Value & 0xffff0000) | 0x40; 2813 cmd.DW22.Value = 0x1f001f00; 2814 cmd.DW23.Value = 0x6a1a1f00; 2815 cmd.DW28.Value = 0x7d00fa0; 2816 cmd.DW29.Value = 0x2bc0bb8; 2817 cmd.DW30.Value = 0x32003e8; 2818 cmd.DW31.Value = 0x1f4012c; 2819 cmd.DW32.Value = 0x55220190; 2820 cmd.DW33.Value = 0x22552222; 2821 cmd.DW34.Value = 0x21225522; 2822 cmd.DW2.PictureType = vp9PicParams->PicFlags.fields.frame_type; 2823 cmd.DW2.TemporalMvpEnableFlag = params->temporalMVpEnable; 2824 2825 if (vp9PicParams->PicFlags.fields.frame_type) // P_FRAME 2826 { 2827 cmd.DW5.NumRefIdxL0Minus1 = params->ucNumRefIdxL0ActiveMinus1; 2828 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7ffff) | 0x80000; 2829 } 2830 else // I_FRAME 2831 { 2832 cmd.DW5.Value &= 0xf0ffffff; 2833 cmd.DW7.Value &= 0xfff7ffff; 2834 } 2835 2836 cmd.DW7.SegmentationEnable = (vp9PicParams->PicFlags.fields.frame_type == 0) ? 0 : vp9PicParams->PicFlags.fields.segmentation_enabled; 2837 cmd.DW7.TilingEnable = (vp9PicParams->log2_tile_columns != 0) || (vp9PicParams->log2_tile_rows != 0); 2838 cmd.DW7.PakOnlyMultiPassEnable = params->bPakOnlyMultipassEnable; 2839 cmd.DW7.VdencStreamInEnable = params->bStreamInEnabled; 2840 2841 if (params->bSegmentationEnabled) 2842 { 2843 cmd.DW7.SegmentationEnable = true; 2844 cmd.DW7.SegmentationMapTemporalPredictionEnable = vp9PicParams->PicFlags.fields.frame_type ? (params->bPrevFrameSegEnabled ? 1 : 0) : 0; 2845 cmd.DW7.VdencStreamInEnable = params->bStreamInEnabled; 2846 2847 MHW_MI_CHK_NULL(params->pVp9SegmentState); 2848 MHW_MI_CHK_NULL(params->pVp9SegmentState->pVp9EncodeSegmentParams); 2849 2850 cmd.DW24.QpForSeg0 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[0].SegmentQIndexDelta; 2851 cmd.DW24.QpForSeg1 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[1].SegmentQIndexDelta; 2852 cmd.DW24.QpForSeg2 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[2].SegmentQIndexDelta; 2853 cmd.DW24.QpForSeg3 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[3].SegmentQIndexDelta; 2854 2855 cmd.DW25.QpForSeg4 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[4].SegmentQIndexDelta; 2856 cmd.DW25.QpForSeg5 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[5].SegmentQIndexDelta; 2857 cmd.DW25.QpForSeg6 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[6].SegmentQIndexDelta; 2858 cmd.DW25.QpForSeg7 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[7].SegmentQIndexDelta; 2859 } 2860 else 2861 { 2862 cmd.DW24.QpForSeg0 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta; 2863 cmd.DW24.QpForSeg1 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta; 2864 cmd.DW24.QpForSeg2 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta; 2865 cmd.DW24.QpForSeg3 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta; 2866 2867 cmd.DW25.QpForSeg4 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta; 2868 cmd.DW25.QpForSeg5 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta; 2869 cmd.DW25.QpForSeg6 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta; 2870 cmd.DW25.QpForSeg7 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta; 2871 } 2872 2873 cmd.DW26.SadQpLambda = params->usSADQPLambda; 2874 cmd.DW26.RdQpLambda = params->usRDQPLambda; 2875 cmd.DW26.Vp9DynamicSliceEnable = params->bDynamicScalingEnabled; 2876 2877 cmd.DW27.QpPrimeYAc = vp9PicParams->LumaACQIndex; 2878 cmd.DW27.QpPrimeYDc = cmd.DW27.QpPrimeYAc + vp9PicParams->LumaDCQIndexDelta; 2879 2880 switch (vp9SeqParams->TargetUsage) 2881 { 2882 case 1: // Quality mode 2883 case 4: // Normal mode 2884 cmd.DW2.Value &= 0xdfffffff; 2885 cmd.DW7.Value &= 0xfff7feff; 2886 cmd.DW9.Value = (cmd.DW9.Value & 0xfffff) | 0x43800000; 2887 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x21000000; 2888 break; 2889 case 7: // Speed mode 2890 cmd.DW2.Value = (cmd.DW2.Value & 0xdfffffff) | 0x20000000; 2891 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7feff) | 0x80100; 2892 cmd.DW9.Value = (cmd.DW9.Value & 0xffff) | 0x22420000; 2893 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x20000000; 2894 break; 2895 default: 2896 MHW_ASSERTMESSAGE("Invalid TU provided!"); 2897 return MOS_STATUS_INVALID_PARAMETER; 2898 } 2899 2900 if (params->ucNumRefIdxL0ActiveMinus1 == 0) 2901 { 2902 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7ffff) | 0x80000; 2903 } 2904 } 2905 2906 if (cmdBuffer == nullptr && batchBuffer == nullptr) 2907 { 2908 MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to."); 2909 return MOS_STATUS_NULL_POINTER; 2910 } 2911 2912 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(cmdBuffer, batchBuffer, &cmd, sizeof(cmd))); 2913 2914 return MOS_STATUS_SUCCESS; 2915 } 2916 }; 2917 2918 #endif // __MHW_VDBOX_VDENC_G12_X_H__ 2919