1 /*
2 * Copyright (c) 2017, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file      cm_hal_g9.h
24 //! \brief     Common HAL CM Gen9 functions
25 //!
26 
27 #ifndef __CM_HAL_G9_H__
28 #define __CM_HAL_G9_H__
29 
30 #include "cm_hal.h"
31 #include "mos_os.h"
32 #include "renderhal.h"
33 #include "cm_def.h"
34 #include "mhw_vebox_hwcmd_g9_X.h"
35 #include "mhw_render_hwcmd_g9_X.h"
36 #include "mhw_state_heap_hwcmd_g9_X.h"
37 #include "mhw_mmio_g9.h"
38 
39 #define CM_NUM_HW_POLYPHASE_TABLES_G9            17
40 #define CM_NUM_HW_POLYPHASE_EXTRA_TABLES_G9      15
41 
42 #define VEBOX_SURFACE_NUMBER_G9                 (16)        //SKL
43 
44 #define CM_MAX_THREADSPACE_WIDTH_SKLUP_FOR_MW   2047
45 #define CM_MAX_THREADSPACE_HEIGHT_SKLUP_FOR_MW  2047
46 
47 // The defines for the CM VEBOX usage
48 
49 typedef struct __CM_VEBOX_PARAM_G9
50 {
51     unsigned char                padding1[4024];
52     unsigned char                padding2[3732];
53     unsigned char                padding3[3936];
54     unsigned char                padding4[2048];
55 
56     mhw_vebox_g9_X::VEBOX_GAMUT_STATE_CMD        *pGamutState;
57     mhw_vebox_g9_X::VEBOX_VERTEX_TABLE_CMD       *pVertexTable;
58     mhw_vebox_g9_X::VEBOX_CAPTURE_PIPE_STATE_CMD *pCapturePipe;
59     mhw_vebox_g9_X::VEBOX_DNDI_STATE_CMD         *pDndiState;
60     mhw_vebox_g9_X::VEBOX_IECP_STATE_CMD         *pIecpState;
61 }CM_VEBOX_PARAM_G9, PCM_VEBOX_PARAM_G9;
62 
63 #define CM_SKL_L3_CONFIG_NUM 8
64 static const L3_CONFIG SKL_L3[CM_SKL_L3_CONFIG_NUM]  =
65 {  //8k unit
66     {256,    128,    384,    0,    0,    0,    0,    0,    0}
67 };
68 
69 static const L3ConfigRegisterValues SKL_L3_PLANE[CM_SKL_L3_CONFIG_NUM] =
70 {                                                         // SLM    URB   Rest   DC    RO    I/S    C     T     Sum
71     { 0x00000000, 0x00000000, 0x00000000, 0x60000060 },   //{0,     48,    48,    0,    0,    0,    0,    0,    96},
72     { 0x00000000, 0x00000000, 0x00000000, 0x00808060 },   //{0,     48,    0,    16,   32,    0,    0,    0,    96},
73     { 0x00000000, 0x00000000, 0x00000000, 0x00818040 },   //{0,     32,    0,    16,   48,    0,    0,    0,    96},
74     { 0x00000000, 0x00000000, 0x00000000, 0x00030040 },   //{0,     32,    0,     0,   64,    0,    0,    0,    96},
75     { 0x00000000, 0x00000000, 0x00000000, 0x80000040 },   //{0,     32,    64,    0,    0,    0,    0,    0,    96},
76     { 0x00000000, 0x00000000, 0x00000000, 0x60000121 },   //{32,    16,    48,    0,    0,    0,    0,    0,    96},
77     { 0x00000000, 0x00000000, 0x00000000, 0x00410121 },   //{32,    16,    0,    16,   32,    0,    0,    0,    96},
78     { 0x00000000, 0x00000000, 0x00000000, 0x00808121 }    //{32,    16,    0,    32,   16,    0,    0,    0,    96}
79 };
80 
81 struct CM_HAL_G9_X:public CM_HAL_GENERIC
82 {
83 
84 public:
CM_HAL_G9_XCM_HAL_G9_X85     CM_HAL_G9_X(PCM_HAL_STATE cmState):
86         CM_HAL_GENERIC(cmState){};
87 
~CM_HAL_G9_XCM_HAL_G9_X88     ~CM_HAL_G9_X(){};
89 
90     MOS_STATUS GetCopyKernelIsa(void  *&isa, uint32_t &isaSize);
91 
92     MOS_STATUS GetInitKernelIsa(void  *&isa, uint32_t &isaSize);
93 
94     MOS_STATUS SetMediaWalkerParams(
95                         CM_WALKING_PARAMETERS          engineeringParams,
96                         PCM_HAL_WALKER_PARAMS          walkerParams);
97 
98     MOS_STATUS HwSetSurfaceMemoryObjectControl(
99                         uint16_t                        memObjCtl,
100                         PRENDERHAL_SURFACE_STATE_PARAMS surfStateParams);
101 
102     MOS_STATUS RegisterSampler8x8(
103                         PCM_HAL_SAMPLER_8X8_PARAM    param);
104 
105     MOS_STATUS SubmitCommands(
106                         PMHW_BATCH_BUFFER       batchBuffer,
107                         int32_t                 taskId,
108                         PCM_HAL_KERNEL_PARAM    *kernelParam,
109                         void                    **cmdBuffer);
110 #if (_RELEASE_INTERNAL ||_DEBUG)
111 #if defined (CM_DIRECT_GUC_SUPPORT)
112     MOS_STATUS SubmitDummyCommands(
113         PMHW_BATCH_BUFFER       batchBuffer,
114         int32_t                 taskId,
115         PCM_HAL_KERNEL_PARAM    *kernelParam,
116         void                    **cmdBuffer);
117 #endif
118 #endif
119     MOS_STATUS UpdatePlatformInfoFromPower(
120                         PCM_PLATFORM_INFO platformInfo,
121                         bool              euSaturated);
122 
123     uint32_t   GetMediaWalkerMaxThreadWidth();
124 
125     uint32_t   GetMediaWalkerMaxThreadHeight();
126 
127     MOS_STATUS GetHwSurfaceBTIInfo(
128                    PCM_SURFACE_BTI_INFO btiInfo);
129 
130     MOS_STATUS SetSuggestedL3Conf(
131                   L3_SUGGEST_CONFIG l3Config);
132 
133     MOS_STATUS AllocateSIPCSRResource();
134 
135     MOS_STATUS GetGenStepInfo(char*& stepInfoStr);
136 
137     int32_t ColorCountSanityCheck(uint32_t colorCount);
138 
IsP010SinglePassSupportedCM_HAL_G9_X139     bool IsP010SinglePassSupported() { return false; };
140 
141     bool MemoryObjectCtrlPolicyCheck(uint32_t memCtrl);
142 
143     int32_t GetConvSamplerIndex(
144             PMHW_SAMPLER_STATE_PARAM  samplerParam,
145             char                     *samplerIndexTable,
146             int32_t                   nSamp8X8Num,
147             int32_t                   nSampConvNum);
148 
149     MOS_STATUS SetL3CacheConfig(
150             const L3ConfigRegisterValues *values,
151             PCmHalL3Settings cmHalL3Setting);
152 
153     MOS_STATUS GetSamplerParamInfoForSamplerType(
154             PMHW_SAMPLER_STATE_PARAM mhwSamplerParam,
155             SamplerParam  &samplerParam);
156 
OverwriteSteppingTableCM_HAL_G9_X157     void OverwriteSteppingTable(const char **newTable, int len)
158     {
159         m_steppingTable.clear();
160         for (int i = 0; i < len; i ++)
161         {
162             m_steppingTable.push_back(newTable[i]);
163         }
164     }
165 
166     MOS_STATUS GetExpectedGtSystemConfig(
167         PCM_EXPECTED_GT_SYSTEM_INFO expectedConfig);
168 
169     uint64_t ConverTicksToNanoSecondsDefault(uint64_t ticks);
170 
171 private:
172     MOS_STATUS RegisterSampler8x8AVSTable(
173                        PCM_HAL_SAMPLER_8X8_TABLE  sampler8x8AvsTable,
174                        PCM_AVS_TABLE_STATE_PARAMS avsTable);
175 
176     MOS_STATUS SetupHwDebugControl(
177                         PRENDERHAL_INTERFACE   renderHal,
178                         PMOS_COMMAND_BUFFER    cmdBuffer);
179 
180     std::vector<const char *> m_steppingTable;
181 
182 };
183 
184 
185 
186 #endif  // __CM_HAL_G9_H__