1 /* 2 * mmx.h 3 * Copyright (C) 1997-2001 H. Dietz and R. Fisher 4 */ 5 #ifndef I386MMX_H 6 #define I386MMX_H 7 8 /* 9 * The type of an value that fits in an MMX register (note that long 10 * long constant values MUST be suffixed by LL and unsigned long long 11 * values by ULL, lest they be truncated by the compiler) 12 */ 13 14 typedef union { 15 long long q; /* Quadword (64-bit) value */ 16 unsigned long long uq; /* Unsigned Quadword */ 17 int d[2]; /* 2 Doubleword (32-bit) values */ 18 unsigned int ud[2]; /* 2 Unsigned Doubleword */ 19 short w[4]; /* 4 Word (16-bit) values */ 20 unsigned short uw[4]; /* 4 Unsigned Word */ 21 char b[8]; /* 8 Byte (8-bit) values */ 22 unsigned char ub[8]; /* 8 Unsigned Byte */ 23 float s[2]; /* Single-precision (32-bit) value */ 24 } mmx_t; /* On an 8-byte (64-bit) boundary */ 25 26 27 #define mmx_i2r(op,imm,reg) \ 28 __asm__ __volatile__ (#op " %0, %%" #reg \ 29 : /* nothing */ \ 30 : "i" (imm)) 31 32 #define mmx_m2r(op,mem,reg) \ 33 __asm__ __volatile__ (#op " %0, %%" #reg \ 34 : /* nothing */ \ 35 : "m" (mem)) 36 37 #define mmx_r2m(op,reg,mem) \ 38 __asm__ __volatile__ (#op " %%" #reg ", %0" \ 39 : "=m" (mem) \ 40 : /* nothing */ ) 41 42 #define mmx_r2r(op,regs,regd) \ 43 __asm__ __volatile__ (#op " %" #regs ", %" #regd) 44 45 46 #define emms() __asm__ __volatile__ ("emms") 47 48 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg) 49 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var) 50 #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd) 51 52 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg) 53 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var) 54 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd) 55 56 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg) 57 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd) 58 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg) 59 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd) 60 61 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg) 62 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd) 63 64 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg) 65 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd) 66 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg) 67 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd) 68 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg) 69 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd) 70 71 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg) 72 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd) 73 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg) 74 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd) 75 76 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg) 77 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd) 78 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg) 79 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd) 80 81 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg) 82 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd) 83 84 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg) 85 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd) 86 87 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg) 88 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd) 89 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg) 90 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd) 91 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg) 92 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd) 93 94 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg) 95 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd) 96 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg) 97 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd) 98 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg) 99 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd) 100 101 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg) 102 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd) 103 104 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg) 105 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd) 106 107 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg) 108 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd) 109 110 #define por_m2r(var,reg) mmx_m2r (por, var, reg) 111 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd) 112 113 #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg) 114 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg) 115 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd) 116 #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg) 117 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg) 118 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd) 119 #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg) 120 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg) 121 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd) 122 123 #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg) 124 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg) 125 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd) 126 #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg) 127 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg) 128 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd) 129 130 #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg) 131 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg) 132 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd) 133 #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg) 134 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg) 135 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd) 136 #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg) 137 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg) 138 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd) 139 140 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg) 141 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd) 142 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg) 143 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd) 144 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg) 145 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd) 146 147 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg) 148 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd) 149 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg) 150 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd) 151 152 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg) 153 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd) 154 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg) 155 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd) 156 157 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg) 158 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd) 159 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg) 160 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd) 161 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg) 162 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd) 163 164 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg) 165 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd) 166 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg) 167 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd) 168 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg) 169 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd) 170 171 #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg) 172 #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd) 173 174 175 /* 3DNOW extensions */ 176 177 #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg) 178 #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd) 179 180 181 /* AMD MMX extensions - also available in intel SSE */ 182 183 184 #define mmx_m2ri(op,mem,reg,imm) \ 185 __asm__ __volatile__ (#op " %1, %0, %%" #reg \ 186 : /* nothing */ \ 187 : "X" (mem), "X" (imm)) 188 #define mmx_r2ri(op,regs,regd,imm) \ 189 __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \ 190 : /* nothing */ \ 191 : "X" (imm)) 192 193 #define mmx_fetch(mem,hint) \ 194 __asm__ __volatile__ ("prefetch" #hint " %0" \ 195 : /* nothing */ \ 196 : "X" (mem)) 197 198 199 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg) 200 201 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var) 202 203 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg) 204 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd) 205 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg) 206 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd) 207 208 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm) 209 210 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm) 211 212 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg) 213 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd) 214 215 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg) 216 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd) 217 218 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg) 219 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd) 220 221 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg) 222 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd) 223 224 #define pmovmskb(mmreg,reg) \ 225 __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg) 226 227 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg) 228 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd) 229 230 #define prefetcht0(mem) mmx_fetch (mem, t0) 231 #define prefetcht1(mem) mmx_fetch (mem, t1) 232 #define prefetcht2(mem) mmx_fetch (mem, t2) 233 #define prefetchnta(mem) mmx_fetch (mem, nta) 234 235 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg) 236 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd) 237 238 #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm) 239 #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm) 240 241 #define sfence() __asm__ __volatile__ ("sfence\n\t") 242 243 /* SSE2 */ 244 #define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm) 245 #define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm) 246 #define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm) 247 #define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm) 248 249 #define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm) 250 251 #define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg) 252 #define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var) 253 #define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd) 254 #define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg) 255 #define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var) 256 #define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd) 257 258 #define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var) 259 260 #define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg) 261 #define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg) 262 263 #define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd) 264 #define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd) 265 266 267 #endif /* I386MMX_H */ 268