1 /*********************************************************************/ 2 /* Copyright 2009, 2010 The University of Texas at Austin. */ 3 /* All rights reserved. */ 4 /* */ 5 /* Redistribution and use in source and binary forms, with or */ 6 /* without modification, are permitted provided that the following */ 7 /* conditions are met: */ 8 /* */ 9 /* 1. Redistributions of source code must retain the above */ 10 /* copyright notice, this list of conditions and the following */ 11 /* disclaimer. */ 12 /* */ 13 /* 2. Redistributions in binary form must reproduce the above */ 14 /* copyright notice, this list of conditions and the following */ 15 /* disclaimer in the documentation and/or other materials */ 16 /* provided with the distribution. */ 17 /* */ 18 /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */ 19 /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */ 20 /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ 21 /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */ 22 /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */ 23 /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ 24 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */ 25 /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */ 26 /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */ 27 /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ 28 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ 29 /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */ 30 /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ 31 /* POSSIBILITY OF SUCH DAMAGE. */ 32 /* */ 33 /* The views and conclusions contained in the software and */ 34 /* documentation are those of the authors and should not be */ 35 /* interpreted as representing official policies, either expressed */ 36 /* or implied, of The University of Texas at Austin. */ 37 /*********************************************************************/ 38 39 #ifndef CPUID_H 40 #define CPUID_H 41 42 #define VENDOR_INTEL 1 43 #define VENDOR_UMC 2 44 #define VENDOR_AMD 3 45 #define VENDOR_CYRIX 4 46 #define VENDOR_NEXGEN 5 47 #define VENDOR_CENTAUR 6 48 #define VENDOR_RISE 7 49 #define VENDOR_SIS 8 50 #define VENDOR_TRANSMETA 9 51 #define VENDOR_NSC 10 52 #define VENDOR_UNKNOWN 99 53 54 #define BITMASK(a, b, c) ((((a) >> (b)) & (c))) 55 56 #define FAMILY_80486 4 57 #define FAMILY_P5 5 58 #define FAMILY_P6 6 59 #define FAMILY_PM 7 60 #define FAMILY_IA64 8 61 62 #if defined(__i386__) || defined(__x86_64__) 63 #define GET_EXFAMILY 1 64 #define GET_EXMODEL 2 65 #define GET_TYPE 3 66 #define GET_FAMILY 4 67 #define GET_MODEL 5 68 #define GET_APICID 6 69 #define GET_LCOUNT 7 70 #define GET_CHUNKS 8 71 #define GET_STEPPING 9 72 #define GET_BLANDID 10 73 #define GET_FEATURE 11 74 #define GET_NUMSHARE 12 75 #define GET_NUMCORES 13 76 #endif 77 78 #ifdef __ia64__ 79 #define GET_ARCHREV 1 80 #define GET_FAMILY 2 81 #define GET_MODEL 3 82 #define GET_REVISION 4 83 #define GET_NUMBER 5 84 #endif 85 86 #define CORE_UNKNOWN 0 87 #define CORE_80486 1 88 #define CORE_P5 2 89 #define CORE_P6 3 90 #define CORE_KATMAI 4 91 #define CORE_COPPERMINE 5 92 #define CORE_NORTHWOOD 6 93 #define CORE_PRESCOTT 7 94 #define CORE_BANIAS 8 95 #define CORE_ATHLON 9 96 #define CORE_OPTERON 10 97 #define CORE_BARCELONA 11 98 #define CORE_VIAC3 12 99 #define CORE_YONAH 13 100 #define CORE_CORE2 14 101 #define CORE_PENRYN 15 102 #define CORE_DUNNINGTON 16 103 #define CORE_NEHALEM 17 104 #define CORE_ATOM 18 105 #define CORE_NANO 19 106 107 #define HAVE_SSE (1 << 0) 108 #define HAVE_SSE2 (1 << 1) 109 #define HAVE_SSE3 (1 << 2) 110 #define HAVE_SSSE3 (1 << 3) 111 #define HAVE_SSE4_1 (1 << 4) 112 #define HAVE_SSE4_2 (1 << 5) 113 #define HAVE_SSE4A (1 << 6) 114 #define HAVE_SSE5 (1 << 7) 115 #define HAVE_MMX (1 << 8) 116 #define HAVE_3DNOW (1 << 9) 117 #define HAVE_3DNOWEX (1 << 10) 118 #define HAVE_CMOV (1 << 11) 119 #define HAVE_PSE (1 << 12) 120 #define HAVE_CFLUSH (1 << 13) 121 #define HAVE_HIT (1 << 14) 122 #define HAVE_MISALIGNSSE (1 << 15) 123 #define HAVE_128BITFPU (1 << 16) 124 #define HAVE_FASTMOVU (1 << 17) 125 126 #define CACHE_INFO_L1_I 1 127 #define CACHE_INFO_L1_D 2 128 #define CACHE_INFO_L2 3 129 #define CACHE_INFO_L3 4 130 #define CACHE_INFO_L1_ITB 5 131 #define CACHE_INFO_L1_DTB 6 132 #define CACHE_INFO_L1_LITB 7 133 #define CACHE_INFO_L1_LDTB 8 134 #define CACHE_INFO_L2_ITB 9 135 #define CACHE_INFO_L2_DTB 10 136 #define CACHE_INFO_L2_LITB 11 137 #define CACHE_INFO_L2_LDTB 12 138 139 typedef struct { 140 int size; 141 int associative; 142 int linesize; 143 int shared; 144 } cache_info_t; 145 146 #define CPUTYPE_UNKNOWN 0 147 #define CPUTYPE_INTEL_UNKNOWN 1 148 #define CPUTYPE_UMC_UNKNOWN 2 149 #define CPUTYPE_AMD_UNKNOWN 3 150 #define CPUTYPE_CYRIX_UNKNOWN 4 151 #define CPUTYPE_NEXGEN_UNKNOWN 5 152 #define CPUTYPE_CENTAUR_UNKNOWN 6 153 #define CPUTYPE_RISE_UNKNOWN 7 154 #define CPUTYPE_SIS_UNKNOWN 8 155 #define CPUTYPE_TRANSMETA_UNKNOWN 9 156 #define CPUTYPE_NSC_UNKNOWN 10 157 158 #define CPUTYPE_80386 11 159 #define CPUTYPE_80486 12 160 #define CPUTYPE_PENTIUM 13 161 #define CPUTYPE_PENTIUM2 14 162 #define CPUTYPE_PENTIUM3 15 163 #define CPUTYPE_PENTIUMM 16 164 #define CPUTYPE_PENTIUM4 17 165 #define CPUTYPE_CORE2 18 166 #define CPUTYPE_PENRYN 19 167 #define CPUTYPE_DUNNINGTON 20 168 #define CPUTYPE_NEHALEM 21 169 #define CPUTYPE_ATOM 22 170 #define CPUTYPE_ITANIUM 23 171 #define CPUTYPE_ITANIUM2 24 172 #define CPUTYPE_AMD5X86 25 173 #define CPUTYPE_AMDK6 26 174 #define CPUTYPE_ATHLON 27 175 #define CPUTYPE_DURON 28 176 #define CPUTYPE_OPTERON 29 177 #define CPUTYPE_BARCELONA 30 178 #define CPUTYPE_SHANGHAI 31 179 #define CPUTYPE_ISTANBUL 32 180 #define CPUTYPE_CYRIX5X86 33 181 #define CPUTYPE_CYRIXM1 34 182 #define CPUTYPE_CYRIXM2 35 183 #define CPUTYPE_NEXGENNX586 36 184 #define CPUTYPE_CENTAURC6 37 185 #define CPUTYPE_RISEMP6 38 186 #define CPUTYPE_SYS55X 39 187 #define CPUTYPE_CRUSOETM3X 40 188 #define CPUTYPE_NSGEODE 41 189 #define CPUTYPE_VIAC3 42 190 #define CPUTYPE_NANO 43 191 #endif 192