1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2002 Intersil Americas Inc.
4 * Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
5 * Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
6 */
7
8 #include <linux/hardirq.h>
9 #include <linux/module.h>
10 #include <linux/slab.h>
11
12 #include <linux/netdevice.h>
13 #include <linux/ethtool.h>
14 #include <linux/pci.h>
15 #include <linux/sched.h>
16 #include <linux/etherdevice.h>
17 #include <linux/delay.h>
18 #include <linux/if_arp.h>
19
20 #include <asm/io.h>
21
22 #include "prismcompat.h"
23 #include "isl_38xx.h"
24 #include "isl_ioctl.h"
25 #include "islpci_dev.h"
26 #include "islpci_mgt.h"
27 #include "islpci_eth.h"
28 #include "oid_mgt.h"
29
30 #define ISL3877_IMAGE_FILE "isl3877"
31 #define ISL3886_IMAGE_FILE "isl3886"
32 #define ISL3890_IMAGE_FILE "isl3890"
33 MODULE_FIRMWARE(ISL3877_IMAGE_FILE);
34 MODULE_FIRMWARE(ISL3886_IMAGE_FILE);
35 MODULE_FIRMWARE(ISL3890_IMAGE_FILE);
36
37 static int prism54_bring_down(islpci_private *);
38 static int islpci_alloc_memory(islpci_private *);
39
40 /* Temporary dummy MAC address to use until firmware is loaded.
41 * The idea there is that some tools (such as nameif) may query
42 * the MAC address before the netdev is 'open'. By using a valid
43 * OUI prefix, they can process the netdev properly.
44 * Of course, this is not the final/real MAC address. It doesn't
45 * matter, as you are suppose to be able to change it anytime via
46 * ndev->set_mac_address. Jean II */
47 static const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
48
49 static int
isl_upload_firmware(islpci_private * priv)50 isl_upload_firmware(islpci_private *priv)
51 {
52 u32 reg, rc;
53 void __iomem *device_base = priv->device_base;
54
55 /* clear the RAMBoot and the Reset bit */
56 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
57 reg &= ~ISL38XX_CTRL_STAT_RESET;
58 reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
59 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
60 wmb();
61 udelay(ISL38XX_WRITEIO_DELAY);
62
63 /* set the Reset bit without reading the register ! */
64 reg |= ISL38XX_CTRL_STAT_RESET;
65 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
66 wmb();
67 udelay(ISL38XX_WRITEIO_DELAY);
68
69 /* clear the Reset bit */
70 reg &= ~ISL38XX_CTRL_STAT_RESET;
71 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
72 wmb();
73
74 /* wait a while for the device to reboot */
75 mdelay(50);
76
77 {
78 const struct firmware *fw_entry = NULL;
79 long fw_len;
80 const u32 *fw_ptr;
81
82 rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
83 if (rc) {
84 printk(KERN_ERR
85 "%s: request_firmware() failed for '%s'\n",
86 "prism54", priv->firmware);
87 return rc;
88 }
89 /* prepare the Direct Memory Base register */
90 reg = ISL38XX_DEV_FIRMWARE_ADDRES;
91
92 fw_ptr = (u32 *) fw_entry->data;
93 fw_len = fw_entry->size;
94
95 if (fw_len % 4) {
96 printk(KERN_ERR
97 "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
98 "prism54", priv->firmware);
99 release_firmware(fw_entry);
100 return -EILSEQ; /* Illegal byte sequence */;
101 }
102
103 while (fw_len > 0) {
104 long _fw_len =
105 (fw_len >
106 ISL38XX_MEMORY_WINDOW_SIZE) ?
107 ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
108 u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
109
110 /* set the card's base address for writing the data */
111 isl38xx_w32_flush(device_base, reg,
112 ISL38XX_DIR_MEM_BASE_REG);
113 wmb(); /* be paranoid */
114
115 /* increment the write address for next iteration */
116 reg += _fw_len;
117 fw_len -= _fw_len;
118
119 /* write the data to the Direct Memory Window 32bit-wise */
120 /* memcpy_toio() doesn't guarantee 32bit writes :-| */
121 while (_fw_len > 0) {
122 /* use non-swapping writel() */
123 __raw_writel(*fw_ptr, dev_fw_ptr);
124 fw_ptr++, dev_fw_ptr++;
125 _fw_len -= 4;
126 }
127
128 /* flush PCI posting */
129 (void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
130 wmb(); /* be paranoid again */
131
132 BUG_ON(_fw_len != 0);
133 }
134
135 BUG_ON(fw_len != 0);
136
137 /* Firmware version is at offset 40 (also for "newmac") */
138 printk(KERN_DEBUG "%s: firmware version: %.8s\n",
139 priv->ndev->name, fw_entry->data + 40);
140
141 release_firmware(fw_entry);
142 }
143
144 /* now reset the device
145 * clear the Reset & ClkRun bit, set the RAMBoot bit */
146 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
147 reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
148 reg &= ~ISL38XX_CTRL_STAT_RESET;
149 reg |= ISL38XX_CTRL_STAT_RAMBOOT;
150 isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
151 wmb();
152 udelay(ISL38XX_WRITEIO_DELAY);
153
154 /* set the reset bit latches the host override and RAMBoot bits
155 * into the device for operation when the reset bit is reset */
156 reg |= ISL38XX_CTRL_STAT_RESET;
157 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
158 /* don't do flush PCI posting here! */
159 wmb();
160 udelay(ISL38XX_WRITEIO_DELAY);
161
162 /* clear the reset bit should start the whole circus */
163 reg &= ~ISL38XX_CTRL_STAT_RESET;
164 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
165 /* don't do flush PCI posting here! */
166 wmb();
167 udelay(ISL38XX_WRITEIO_DELAY);
168
169 return 0;
170 }
171
172 /******************************************************************************
173 Device Interrupt Handler
174 ******************************************************************************/
175
176 irqreturn_t
islpci_interrupt(int irq,void * config)177 islpci_interrupt(int irq, void *config)
178 {
179 u32 reg;
180 islpci_private *priv = config;
181 struct net_device *ndev = priv->ndev;
182 void __iomem *device = priv->device_base;
183 int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
184
185 /* lock the interrupt handler */
186 spin_lock(&priv->slock);
187
188 /* received an interrupt request on a shared IRQ line
189 * first check whether the device is in sleep mode */
190 reg = readl(device + ISL38XX_CTRL_STAT_REG);
191 if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
192 /* device is in sleep mode, IRQ was generated by someone else */
193 {
194 #if VERBOSE > SHOW_ERROR_MESSAGES
195 DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
196 #endif
197 spin_unlock(&priv->slock);
198 return IRQ_NONE;
199 }
200
201
202 /* check whether there is any source of interrupt on the device */
203 reg = readl(device + ISL38XX_INT_IDENT_REG);
204
205 /* also check the contents of the Interrupt Enable Register, because this
206 * will filter out interrupt sources from other devices on the same irq ! */
207 reg &= readl(device + ISL38XX_INT_EN_REG);
208 reg &= ISL38XX_INT_SOURCES;
209
210 if (reg != 0) {
211 if (islpci_get_state(priv) != PRV_STATE_SLEEP)
212 powerstate = ISL38XX_PSM_ACTIVE_STATE;
213
214 /* reset the request bits in the Identification register */
215 isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
216
217 #if VERBOSE > SHOW_ERROR_MESSAGES
218 DEBUG(SHOW_FUNCTION_CALLS,
219 "IRQ: Identification register 0x%p 0x%x\n", device, reg);
220 #endif
221
222 /* check for each bit in the register separately */
223 if (reg & ISL38XX_INT_IDENT_UPDATE) {
224 #if VERBOSE > SHOW_ERROR_MESSAGES
225 /* Queue has been updated */
226 DEBUG(SHOW_TRACING, "IRQ: Update flag\n");
227
228 DEBUG(SHOW_QUEUE_INDEXES,
229 "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
230 le32_to_cpu(priv->control_block->
231 driver_curr_frag[0]),
232 le32_to_cpu(priv->control_block->
233 driver_curr_frag[1]),
234 le32_to_cpu(priv->control_block->
235 driver_curr_frag[2]),
236 le32_to_cpu(priv->control_block->
237 driver_curr_frag[3]),
238 le32_to_cpu(priv->control_block->
239 driver_curr_frag[4]),
240 le32_to_cpu(priv->control_block->
241 driver_curr_frag[5])
242 );
243
244 DEBUG(SHOW_QUEUE_INDEXES,
245 "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
246 le32_to_cpu(priv->control_block->
247 device_curr_frag[0]),
248 le32_to_cpu(priv->control_block->
249 device_curr_frag[1]),
250 le32_to_cpu(priv->control_block->
251 device_curr_frag[2]),
252 le32_to_cpu(priv->control_block->
253 device_curr_frag[3]),
254 le32_to_cpu(priv->control_block->
255 device_curr_frag[4]),
256 le32_to_cpu(priv->control_block->
257 device_curr_frag[5])
258 );
259 #endif
260
261 /* cleanup the data low transmit queue */
262 islpci_eth_cleanup_transmit(priv, priv->control_block);
263
264 /* device is in active state, update the
265 * powerstate flag if necessary */
266 powerstate = ISL38XX_PSM_ACTIVE_STATE;
267
268 /* check all three queues in priority order
269 * call the PIMFOR receive function until the
270 * queue is empty */
271 if (isl38xx_in_queue(priv->control_block,
272 ISL38XX_CB_RX_MGMTQ) != 0) {
273 #if VERBOSE > SHOW_ERROR_MESSAGES
274 DEBUG(SHOW_TRACING,
275 "Received frame in Management Queue\n");
276 #endif
277 islpci_mgt_receive(ndev);
278
279 islpci_mgt_cleanup_transmit(ndev);
280
281 /* Refill slots in receive queue */
282 islpci_mgmt_rx_fill(ndev);
283
284 /* no need to trigger the device, next
285 islpci_mgt_transaction does it */
286 }
287
288 while (isl38xx_in_queue(priv->control_block,
289 ISL38XX_CB_RX_DATA_LQ) != 0) {
290 #if VERBOSE > SHOW_ERROR_MESSAGES
291 DEBUG(SHOW_TRACING,
292 "Received frame in Data Low Queue\n");
293 #endif
294 islpci_eth_receive(priv);
295 }
296
297 /* check whether the data transmit queues were full */
298 if (priv->data_low_tx_full) {
299 /* check whether the transmit is not full anymore */
300 if (ISL38XX_CB_TX_QSIZE -
301 isl38xx_in_queue(priv->control_block,
302 ISL38XX_CB_TX_DATA_LQ) >=
303 ISL38XX_MIN_QTHRESHOLD) {
304 /* nope, the driver is ready for more network frames */
305 netif_wake_queue(priv->ndev);
306
307 /* reset the full flag */
308 priv->data_low_tx_full = 0;
309 }
310 }
311 }
312
313 if (reg & ISL38XX_INT_IDENT_INIT) {
314 /* Device has been initialized */
315 #if VERBOSE > SHOW_ERROR_MESSAGES
316 DEBUG(SHOW_TRACING,
317 "IRQ: Init flag, device initialized\n");
318 #endif
319 wake_up(&priv->reset_done);
320 }
321
322 if (reg & ISL38XX_INT_IDENT_SLEEP) {
323 /* Device intends to move to powersave state */
324 #if VERBOSE > SHOW_ERROR_MESSAGES
325 DEBUG(SHOW_TRACING, "IRQ: Sleep flag\n");
326 #endif
327 isl38xx_handle_sleep_request(priv->control_block,
328 &powerstate,
329 priv->device_base);
330 }
331
332 if (reg & ISL38XX_INT_IDENT_WAKEUP) {
333 /* Device has been woken up to active state */
334 #if VERBOSE > SHOW_ERROR_MESSAGES
335 DEBUG(SHOW_TRACING, "IRQ: Wakeup flag\n");
336 #endif
337
338 isl38xx_handle_wakeup(priv->control_block,
339 &powerstate, priv->device_base);
340 }
341 } else {
342 #if VERBOSE > SHOW_ERROR_MESSAGES
343 DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
344 #endif
345 spin_unlock(&priv->slock);
346 return IRQ_NONE;
347 }
348
349 /* sleep -> ready */
350 if (islpci_get_state(priv) == PRV_STATE_SLEEP
351 && powerstate == ISL38XX_PSM_ACTIVE_STATE)
352 islpci_set_state(priv, PRV_STATE_READY);
353
354 /* !sleep -> sleep */
355 if (islpci_get_state(priv) != PRV_STATE_SLEEP
356 && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
357 islpci_set_state(priv, PRV_STATE_SLEEP);
358
359 /* unlock the interrupt handler */
360 spin_unlock(&priv->slock);
361
362 return IRQ_HANDLED;
363 }
364
365 /******************************************************************************
366 Network Interface Control & Statistical functions
367 ******************************************************************************/
368 static int
islpci_open(struct net_device * ndev)369 islpci_open(struct net_device *ndev)
370 {
371 u32 rc;
372 islpci_private *priv = netdev_priv(ndev);
373
374 /* reset data structures, upload firmware and reset device */
375 rc = islpci_reset(priv,1);
376 if (rc) {
377 prism54_bring_down(priv);
378 return rc; /* Returns informative message */
379 }
380
381 netif_start_queue(ndev);
382
383 /* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
384 * once the firmware receives a trap of being associated
385 * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
386 * should just leave the carrier on as its expected the firmware
387 * won't send us a trigger. */
388 if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
389 netif_carrier_off(ndev);
390 else
391 netif_carrier_on(ndev);
392
393 return 0;
394 }
395
396 static int
islpci_close(struct net_device * ndev)397 islpci_close(struct net_device *ndev)
398 {
399 islpci_private *priv = netdev_priv(ndev);
400
401 printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
402
403 netif_stop_queue(ndev);
404
405 return prism54_bring_down(priv);
406 }
407
408 static int
prism54_bring_down(islpci_private * priv)409 prism54_bring_down(islpci_private *priv)
410 {
411 void __iomem *device_base = priv->device_base;
412 u32 reg;
413 /* we are going to shutdown the device */
414 islpci_set_state(priv, PRV_STATE_PREBOOT);
415
416 /* disable all device interrupts in case they weren't */
417 isl38xx_disable_interrupts(priv->device_base);
418
419 /* For safety reasons, we may want to ensure that no DMA transfer is
420 * currently in progress by emptying the TX and RX queues. */
421
422 /* wait until interrupts have finished executing on other CPUs */
423 synchronize_irq(priv->pdev->irq);
424
425 reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
426 reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
427 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
428 wmb();
429 udelay(ISL38XX_WRITEIO_DELAY);
430
431 reg |= ISL38XX_CTRL_STAT_RESET;
432 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
433 wmb();
434 udelay(ISL38XX_WRITEIO_DELAY);
435
436 /* clear the Reset bit */
437 reg &= ~ISL38XX_CTRL_STAT_RESET;
438 writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
439 wmb();
440
441 /* wait a while for the device to reset */
442 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
443
444 return 0;
445 }
446
447 static int
islpci_upload_fw(islpci_private * priv)448 islpci_upload_fw(islpci_private *priv)
449 {
450 islpci_state_t old_state;
451 u32 rc;
452
453 old_state = islpci_set_state(priv, PRV_STATE_BOOT);
454
455 printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
456
457 rc = isl_upload_firmware(priv);
458 if (rc) {
459 /* error uploading the firmware */
460 printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
461 priv->ndev->name, priv->firmware);
462
463 islpci_set_state(priv, old_state);
464 return rc;
465 }
466
467 printk(KERN_DEBUG "%s: firmware upload complete\n",
468 priv->ndev->name);
469
470 islpci_set_state(priv, PRV_STATE_POSTBOOT);
471
472 return 0;
473 }
474
475 static int
islpci_reset_if(islpci_private * priv)476 islpci_reset_if(islpci_private *priv)
477 {
478 long remaining;
479 int result = -ETIME;
480 int count;
481
482 DEFINE_WAIT(wait);
483 prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
484
485 /* now the last step is to reset the interface */
486 isl38xx_interface_reset(priv->device_base, priv->device_host_address);
487 islpci_set_state(priv, PRV_STATE_PREINIT);
488
489 for(count = 0; count < 2 && result; count++) {
490 /* The software reset acknowledge needs about 220 msec here.
491 * Be conservative and wait for up to one second. */
492
493 remaining = schedule_timeout_uninterruptible(HZ);
494
495 if(remaining > 0) {
496 result = 0;
497 break;
498 }
499
500 /* If we're here it's because our IRQ hasn't yet gone through.
501 * Retry a bit more...
502 */
503 printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
504 priv->ndev->name);
505 }
506
507 finish_wait(&priv->reset_done, &wait);
508
509 if (result) {
510 printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
511 return result;
512 }
513
514 islpci_set_state(priv, PRV_STATE_INIT);
515
516 /* Now that the device is 100% up, let's allow
517 * for the other interrupts --
518 * NOTE: this is not *yet* true since we've only allowed the
519 * INIT interrupt on the IRQ line. We can perhaps poll
520 * the IRQ line until we know for sure the reset went through */
521 isl38xx_enable_common_interrupts(priv->device_base);
522
523 down_write(&priv->mib_sem);
524 result = mgt_commit(priv);
525 if (result) {
526 printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
527 up_write(&priv->mib_sem);
528 return result;
529 }
530 up_write(&priv->mib_sem);
531
532 islpci_set_state(priv, PRV_STATE_READY);
533
534 printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
535 return 0;
536 }
537
538 int
islpci_reset(islpci_private * priv,int reload_firmware)539 islpci_reset(islpci_private *priv, int reload_firmware)
540 {
541 isl38xx_control_block *cb = /* volatile not needed */
542 (isl38xx_control_block *) priv->control_block;
543 unsigned counter;
544 int rc;
545
546 if (reload_firmware)
547 islpci_set_state(priv, PRV_STATE_PREBOOT);
548 else
549 islpci_set_state(priv, PRV_STATE_POSTBOOT);
550
551 printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
552
553 /* disable all device interrupts in case they weren't */
554 isl38xx_disable_interrupts(priv->device_base);
555
556 /* flush all management queues */
557 priv->index_mgmt_tx = 0;
558 priv->index_mgmt_rx = 0;
559
560 /* clear the indexes in the frame pointer */
561 for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
562 cb->driver_curr_frag[counter] = cpu_to_le32(0);
563 cb->device_curr_frag[counter] = cpu_to_le32(0);
564 }
565
566 /* reset the mgmt receive queue */
567 for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
568 isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
569 frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
570 frag->flags = 0;
571 frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
572 }
573
574 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
575 cb->rx_data_low[counter].address =
576 cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
577 }
578
579 /* since the receive queues are filled with empty fragments, now we can
580 * set the corresponding indexes in the Control Block */
581 priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
582 cpu_to_le32(ISL38XX_CB_RX_QSIZE);
583 priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
584 cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
585
586 /* reset the remaining real index registers and full flags */
587 priv->free_data_rx = 0;
588 priv->free_data_tx = 0;
589 priv->data_low_tx_full = 0;
590
591 if (reload_firmware) { /* Should we load the firmware ? */
592 /* now that the data structures are cleaned up, upload
593 * firmware and reset interface */
594 rc = islpci_upload_fw(priv);
595 if (rc) {
596 printk(KERN_ERR "%s: islpci_reset: failure\n",
597 priv->ndev->name);
598 return rc;
599 }
600 }
601
602 /* finally reset interface */
603 rc = islpci_reset_if(priv);
604 if (rc)
605 printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
606 return rc;
607 }
608
609 /******************************************************************************
610 Network device configuration functions
611 ******************************************************************************/
612 static int
islpci_alloc_memory(islpci_private * priv)613 islpci_alloc_memory(islpci_private *priv)
614 {
615 int counter;
616
617 #if VERBOSE > SHOW_ERROR_MESSAGES
618 printk(KERN_DEBUG "islpci_alloc_memory\n");
619 #endif
620
621 /* remap the PCI device base address to accessible */
622 if (!(priv->device_base =
623 ioremap(pci_resource_start(priv->pdev, 0),
624 ISL38XX_PCI_MEM_SIZE))) {
625 /* error in remapping the PCI device memory address range */
626 printk(KERN_ERR "PCI memory remapping failed\n");
627 return -1;
628 }
629
630 /* memory layout for consistent DMA region:
631 *
632 * Area 1: Control Block for the device interface
633 * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
634 * the number of supported stations in the AP determines the minimal
635 * size of the buffer !
636 */
637
638 /* perform the allocation */
639 priv->driver_mem_address = dma_alloc_coherent(&priv->pdev->dev,
640 HOST_MEM_BLOCK,
641 &priv->device_host_address,
642 GFP_KERNEL);
643
644 if (!priv->driver_mem_address) {
645 /* error allocating the block of PCI memory */
646 printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
647 "prism54");
648 return -1;
649 }
650
651 /* assign the Control Block to the first address of the allocated area */
652 priv->control_block =
653 (isl38xx_control_block *) priv->driver_mem_address;
654
655 /* set the Power Save Buffer pointer directly behind the CB */
656 priv->device_psm_buffer =
657 priv->device_host_address + CONTROL_BLOCK_SIZE;
658
659 /* make sure all buffer pointers are initialized */
660 for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
661 priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
662 priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
663 }
664
665 priv->index_mgmt_rx = 0;
666 memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
667 memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
668
669 /* allocate rx queue for management frames */
670 if (islpci_mgmt_rx_fill(priv->ndev) < 0)
671 goto out_free;
672
673 /* now get the data rx skb's */
674 memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
675 memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
676
677 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
678 struct sk_buff *skb;
679
680 /* allocate an sk_buff for received data frames storage
681 * each frame on receive size consists of 1 fragment
682 * include any required allignment operations */
683 if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
684 /* error allocating an sk_buff structure elements */
685 printk(KERN_ERR "Error allocating skb.\n");
686 skb = NULL;
687 goto out_free;
688 }
689 skb_reserve(skb, (4 - (long) skb->data) & 0x03);
690 /* add the new allocated sk_buff to the buffer array */
691 priv->data_low_rx[counter] = skb;
692
693 /* map the allocated skb data area to pci */
694 priv->pci_map_rx_address[counter] =
695 dma_map_single(&priv->pdev->dev, (void *)skb->data,
696 MAX_FRAGMENT_SIZE_RX + 2, DMA_FROM_DEVICE);
697 if (dma_mapping_error(&priv->pdev->dev, priv->pci_map_rx_address[counter])) {
698 priv->pci_map_rx_address[counter] = 0;
699 /* error mapping the buffer to device
700 accessible memory address */
701 printk(KERN_ERR "failed to map skb DMA'able\n");
702 goto out_free;
703 }
704 }
705
706 prism54_acl_init(&priv->acl);
707 prism54_wpa_bss_ie_init(priv);
708 if (mgt_init(priv))
709 goto out_free;
710
711 return 0;
712 out_free:
713 islpci_free_memory(priv);
714 return -1;
715 }
716
717 int
islpci_free_memory(islpci_private * priv)718 islpci_free_memory(islpci_private *priv)
719 {
720 int counter;
721
722 if (priv->device_base)
723 iounmap(priv->device_base);
724 priv->device_base = NULL;
725
726 /* free consistent DMA area... */
727 if (priv->driver_mem_address)
728 dma_free_coherent(&priv->pdev->dev, HOST_MEM_BLOCK,
729 priv->driver_mem_address,
730 priv->device_host_address);
731
732 /* clear some dangling pointers */
733 priv->driver_mem_address = NULL;
734 priv->device_host_address = 0;
735 priv->device_psm_buffer = 0;
736 priv->control_block = NULL;
737
738 /* clean up mgmt rx buffers */
739 for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
740 struct islpci_membuf *buf = &priv->mgmt_rx[counter];
741 if (buf->pci_addr)
742 dma_unmap_single(&priv->pdev->dev, buf->pci_addr,
743 buf->size, DMA_FROM_DEVICE);
744 buf->pci_addr = 0;
745 kfree(buf->mem);
746 buf->size = 0;
747 buf->mem = NULL;
748 }
749
750 /* clean up data rx buffers */
751 for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
752 if (priv->pci_map_rx_address[counter])
753 dma_unmap_single(&priv->pdev->dev,
754 priv->pci_map_rx_address[counter],
755 MAX_FRAGMENT_SIZE_RX + 2,
756 DMA_FROM_DEVICE);
757 priv->pci_map_rx_address[counter] = 0;
758
759 if (priv->data_low_rx[counter])
760 dev_kfree_skb(priv->data_low_rx[counter]);
761 priv->data_low_rx[counter] = NULL;
762 }
763
764 /* Free the access control list and the WPA list */
765 prism54_acl_clean(&priv->acl);
766 prism54_wpa_bss_ie_clean(priv);
767 mgt_clean(priv);
768
769 return 0;
770 }
771
772 #if 0
773 static void
774 islpci_set_multicast_list(struct net_device *dev)
775 {
776 /* put device into promisc mode and let network layer handle it */
777 }
778 #endif
779
islpci_ethtool_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * info)780 static void islpci_ethtool_get_drvinfo(struct net_device *dev,
781 struct ethtool_drvinfo *info)
782 {
783 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
784 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
785 }
786
787 static const struct ethtool_ops islpci_ethtool_ops = {
788 .get_drvinfo = islpci_ethtool_get_drvinfo,
789 };
790
791 static const struct net_device_ops islpci_netdev_ops = {
792 .ndo_open = islpci_open,
793 .ndo_stop = islpci_close,
794 .ndo_start_xmit = islpci_eth_transmit,
795 .ndo_tx_timeout = islpci_eth_tx_timeout,
796 .ndo_set_mac_address = prism54_set_mac_address,
797 .ndo_validate_addr = eth_validate_addr,
798 };
799
800 static struct device_type wlan_type = {
801 .name = "wlan",
802 };
803
804 struct net_device *
islpci_setup(struct pci_dev * pdev)805 islpci_setup(struct pci_dev *pdev)
806 {
807 islpci_private *priv;
808 struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
809
810 if (!ndev)
811 return ndev;
812
813 pci_set_drvdata(pdev, ndev);
814 SET_NETDEV_DEV(ndev, &pdev->dev);
815 SET_NETDEV_DEVTYPE(ndev, &wlan_type);
816
817 /* setup the structure members */
818 ndev->base_addr = pci_resource_start(pdev, 0);
819 ndev->irq = pdev->irq;
820
821 /* initialize the function pointers */
822 ndev->netdev_ops = &islpci_netdev_ops;
823 ndev->wireless_handlers = &prism54_handler_def;
824 ndev->ethtool_ops = &islpci_ethtool_ops;
825
826 /* ndev->set_multicast_list = &islpci_set_multicast_list; */
827 ndev->addr_len = ETH_ALEN;
828 /* Get a non-zero dummy MAC address for nameif. Jean II */
829 memcpy(ndev->dev_addr, dummy_mac, ETH_ALEN);
830
831 ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
832
833 /* allocate a private device structure to the network device */
834 priv = netdev_priv(ndev);
835 priv->ndev = ndev;
836 priv->pdev = pdev;
837 priv->monitor_type = ARPHRD_IEEE80211;
838 priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
839 priv->monitor_type : ARPHRD_ETHER;
840
841 /* Add pointers to enable iwspy support. */
842 priv->wireless_data.spy_data = &priv->spy_data;
843 ndev->wireless_data = &priv->wireless_data;
844
845 /* save the start and end address of the PCI memory area */
846 ndev->mem_start = (unsigned long) priv->device_base;
847 ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
848
849 #if VERBOSE > SHOW_ERROR_MESSAGES
850 DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
851 #endif
852
853 init_waitqueue_head(&priv->reset_done);
854
855 /* init the queue read locks, process wait counter */
856 mutex_init(&priv->mgmt_lock);
857 priv->mgmt_received = NULL;
858 init_waitqueue_head(&priv->mgmt_wqueue);
859 mutex_init(&priv->stats_lock);
860 spin_lock_init(&priv->slock);
861
862 /* init state machine with off#1 state */
863 priv->state = PRV_STATE_OFF;
864 priv->state_off = 1;
865
866 /* initialize workqueue's */
867 INIT_WORK(&priv->stats_work, prism54_update_stats);
868 priv->stats_timestamp = 0;
869
870 INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
871 priv->reset_task_pending = 0;
872
873 /* allocate various memory areas */
874 if (islpci_alloc_memory(priv))
875 goto do_free_netdev;
876
877 /* select the firmware file depending on the device id */
878 switch (pdev->device) {
879 case 0x3877:
880 strcpy(priv->firmware, ISL3877_IMAGE_FILE);
881 break;
882
883 case 0x3886:
884 strcpy(priv->firmware, ISL3886_IMAGE_FILE);
885 break;
886
887 default:
888 strcpy(priv->firmware, ISL3890_IMAGE_FILE);
889 break;
890 }
891
892 if (register_netdev(ndev)) {
893 DEBUG(SHOW_ERROR_MESSAGES,
894 "ERROR: register_netdev() failed\n");
895 goto do_islpci_free_memory;
896 }
897
898 return ndev;
899
900 do_islpci_free_memory:
901 islpci_free_memory(priv);
902 do_free_netdev:
903 free_netdev(ndev);
904 priv = NULL;
905 return NULL;
906 }
907
908 islpci_state_t
islpci_set_state(islpci_private * priv,islpci_state_t new_state)909 islpci_set_state(islpci_private *priv, islpci_state_t new_state)
910 {
911 islpci_state_t old_state;
912
913 /* lock */
914 old_state = priv->state;
915
916 /* this means either a race condition or some serious error in
917 * the driver code */
918 switch (new_state) {
919 case PRV_STATE_OFF:
920 priv->state_off++;
921 fallthrough;
922 default:
923 priv->state = new_state;
924 break;
925
926 case PRV_STATE_PREBOOT:
927 /* there are actually many off-states, enumerated by
928 * state_off */
929 if (old_state == PRV_STATE_OFF)
930 priv->state_off--;
931
932 /* only if hw_unavailable is zero now it means we either
933 * were in off#1 state, or came here from
934 * somewhere else */
935 if (!priv->state_off)
936 priv->state = new_state;
937 break;
938 }
939 #if 0
940 printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
941 priv->ndev->name, old_state, new_state, priv->state_off);
942 #endif
943
944 /* invariants */
945 BUG_ON(priv->state_off < 0);
946 BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
947 BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));
948
949 /* unlock */
950 return old_state;
951 }
952