1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * vDSO provided cache flush routines
4 *
5 * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org),
6 *                    IBM Corp.
7 */
8#include <asm/processor.h>
9#include <asm/ppc_asm.h>
10#include <asm/vdso.h>
11#include <asm/vdso_datapage.h>
12#include <asm/asm-offsets.h>
13
14	.text
15
16/*
17 * Default "generic" version of __kernel_sync_dicache.
18 *
19 * void __kernel_sync_dicache(unsigned long start, unsigned long end)
20 *
21 * Flushes the data cache & invalidate the instruction cache for the
22 * provided range [start, end[
23 */
24V_FUNCTION_BEGIN(__kernel_sync_dicache)
25  .cfi_startproc
26BEGIN_FTR_SECTION
27	b	3f
28END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
29	mflr	r12
30  .cfi_register lr,r12
31	get_datapage	r10
32	mtlr	r12
33  .cfi_restore lr
34
35	lwz	r7,CFG_DCACHE_BLOCKSZ(r10)
36	addi	r5,r7,-1
37	andc	r6,r3,r5		/* round low to line bdy */
38	subf	r8,r6,r4		/* compute length */
39	add	r8,r8,r5		/* ensure we get enough */
40	lwz	r9,CFG_DCACHE_LOGBLOCKSZ(r10)
41	srd.	r8,r8,r9		/* compute line count */
42	crclr	cr0*4+so
43	beqlr				/* nothing to do? */
44	mtctr	r8
451:	dcbst	0,r6
46	add	r6,r6,r7
47	bdnz	1b
48	sync
49
50/* Now invalidate the instruction cache */
51
52	lwz	r7,CFG_ICACHE_BLOCKSZ(r10)
53	addi	r5,r7,-1
54	andc	r6,r3,r5		/* round low to line bdy */
55	subf	r8,r6,r4		/* compute length */
56	add	r8,r8,r5
57	lwz	r9,CFG_ICACHE_LOGBLOCKSZ(r10)
58	srd.	r8,r8,r9		/* compute line count */
59	crclr	cr0*4+so
60	beqlr				/* nothing to do? */
61	mtctr	r8
622:	icbi	0,r6
63	add	r6,r6,r7
64	bdnz	2b
65	isync
66	li	r3,0
67	blr
683:
69	crclr	cr0*4+so
70	sync
71	isync
72	li	r3,0
73	blr
74  .cfi_endproc
75V_FUNCTION_END(__kernel_sync_dicache)
76