1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner driver
4
5 Copyright (C) 2008 Patrick Boettcher <pb@linuxtv.org>
6 Copyright (C) 2009 Sergey Tyurin <forum.free-x.de>
7 Updated 2012 by Jannis Achstetter <jannis_achstetter@web.de>
8 Copyright (C) 2015 Jemma Denson <jdenson@gmail.com>
9 April 2015
10 Refactored & simplified driver
11 Updated to work with delivery system supplied by DVBv5
12 Add frequency, fec & pilot to get_frontend
13
14 Cards supported: Technisat Skystar S2
15
16 */
17
18 #include <linux/slab.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/moduleparam.h>
22 #include <linux/init.h>
23 #include <linux/firmware.h>
24 #include <media/dvb_frontend.h>
25 #include "cx24120.h"
26
27 #define CX24120_SEARCH_RANGE_KHZ 5000
28 #define CX24120_FIRMWARE "dvb-fe-cx24120-1.20.58.2.fw"
29
30 /* cx24120 i2c registers */
31 #define CX24120_REG_CMD_START 0x00 /* write cmd_id */
32 #define CX24120_REG_CMD_ARGS 0x01 /* write command arguments */
33 #define CX24120_REG_CMD_END 0x1f /* write 0x01 for end */
34
35 #define CX24120_REG_MAILBOX 0x33
36 #define CX24120_REG_FREQ3 0x34 /* frequency */
37 #define CX24120_REG_FREQ2 0x35
38 #define CX24120_REG_FREQ1 0x36
39
40 #define CX24120_REG_FECMODE 0x39 /* FEC status */
41 #define CX24120_REG_STATUS 0x3a /* Tuner status */
42 #define CX24120_REG_SIGSTR_H 0x3a /* Signal strength high */
43 #define CX24120_REG_SIGSTR_L 0x3b /* Signal strength low byte */
44 #define CX24120_REG_QUALITY_H 0x40 /* SNR high byte */
45 #define CX24120_REG_QUALITY_L 0x41 /* SNR low byte */
46
47 #define CX24120_REG_BER_HH 0x47 /* BER high byte of high word */
48 #define CX24120_REG_BER_HL 0x48 /* BER low byte of high word */
49 #define CX24120_REG_BER_LH 0x49 /* BER high byte of low word */
50 #define CX24120_REG_BER_LL 0x4a /* BER low byte of low word */
51
52 #define CX24120_REG_UCB_H 0x50 /* UCB high byte */
53 #define CX24120_REG_UCB_L 0x51 /* UCB low byte */
54
55 #define CX24120_REG_CLKDIV 0xe6
56 #define CX24120_REG_RATEDIV 0xf0
57
58 #define CX24120_REG_REVISION 0xff /* Chip revision (ro) */
59
60 /* Command messages */
61 enum command_message_id {
62 CMD_VCO_SET = 0x10, /* cmd.len = 12; */
63 CMD_TUNEREQUEST = 0x11, /* cmd.len = 15; */
64
65 CMD_MPEG_ONOFF = 0x13, /* cmd.len = 4; */
66 CMD_MPEG_INIT = 0x14, /* cmd.len = 7; */
67 CMD_BANDWIDTH = 0x15, /* cmd.len = 12; */
68 CMD_CLOCK_READ = 0x16, /* read clock */
69 CMD_CLOCK_SET = 0x17, /* cmd.len = 10; */
70
71 CMD_DISEQC_MSG1 = 0x20, /* cmd.len = 11; */
72 CMD_DISEQC_MSG2 = 0x21, /* cmd.len = d->msg_len + 6; */
73 CMD_SETVOLTAGE = 0x22, /* cmd.len = 2; */
74 CMD_SETTONE = 0x23, /* cmd.len = 4; */
75 CMD_DISEQC_BURST = 0x24, /* cmd.len not used !!! */
76
77 CMD_READ_SNR = 0x1a, /* Read signal strength */
78 CMD_START_TUNER = 0x1b, /* ??? */
79
80 CMD_FWVERSION = 0x35,
81
82 CMD_BER_CTRL = 0x3c, /* cmd.len = 0x03; */
83 };
84
85 #define CX24120_MAX_CMD_LEN 30
86
87 /* pilot mask */
88 #define CX24120_PILOT_OFF 0x00
89 #define CX24120_PILOT_ON 0x40
90 #define CX24120_PILOT_AUTO 0x80
91
92 /* signal status */
93 #define CX24120_HAS_SIGNAL 0x01
94 #define CX24120_HAS_CARRIER 0x02
95 #define CX24120_HAS_VITERBI 0x04
96 #define CX24120_HAS_LOCK 0x08
97 #define CX24120_HAS_UNK1 0x10
98 #define CX24120_HAS_UNK2 0x20
99 #define CX24120_STATUS_MASK 0x0f
100 #define CX24120_SIGNAL_MASK 0xc0
101
102 /* ber window */
103 #define CX24120_BER_WINDOW 16
104 #define CX24120_BER_WSIZE ((1 << CX24120_BER_WINDOW) * 208 * 8)
105
106 #undef info
107 #undef err
108 #define info(args...) pr_info("cx24120: " args)
109 #define err(args...) pr_err("cx24120: ### ERROR: " args)
110
111 /* The Demod/Tuner can't easily provide these, we cache them */
112 struct cx24120_tuning {
113 u32 frequency;
114 u32 symbol_rate;
115 enum fe_spectral_inversion inversion;
116 enum fe_code_rate fec;
117
118 enum fe_delivery_system delsys;
119 enum fe_modulation modulation;
120 enum fe_pilot pilot;
121
122 /* Demod values */
123 u8 fec_val;
124 u8 fec_mask;
125 u8 clkdiv;
126 u8 ratediv;
127 u8 inversion_val;
128 u8 pilot_val;
129 };
130
131 /* Private state */
132 struct cx24120_state {
133 struct i2c_adapter *i2c;
134 const struct cx24120_config *config;
135 struct dvb_frontend frontend;
136
137 u8 cold_init;
138 u8 mpeg_enabled;
139 u8 need_clock_set;
140
141 /* current and next tuning parameters */
142 struct cx24120_tuning dcur;
143 struct cx24120_tuning dnxt;
144
145 enum fe_status fe_status;
146
147 /* dvbv5 stats calculations */
148 u32 bitrate;
149 u32 berw_usecs;
150 u32 ber_prev;
151 u32 ucb_offset;
152 unsigned long ber_jiffies_stats;
153 unsigned long per_jiffies_stats;
154 };
155
156 /* Command message to firmware */
157 struct cx24120_cmd {
158 u8 id;
159 u8 len;
160 u8 arg[CX24120_MAX_CMD_LEN];
161 };
162
163 /* Read single register */
cx24120_readreg(struct cx24120_state * state,u8 reg)164 static int cx24120_readreg(struct cx24120_state *state, u8 reg)
165 {
166 int ret;
167 u8 buf = 0;
168 struct i2c_msg msg[] = {
169 {
170 .addr = state->config->i2c_addr,
171 .flags = 0,
172 .len = 1,
173 .buf = ®
174 }, {
175 .addr = state->config->i2c_addr,
176 .flags = I2C_M_RD,
177 .len = 1,
178 .buf = &buf
179 }
180 };
181
182 ret = i2c_transfer(state->i2c, msg, 2);
183 if (ret != 2) {
184 err("Read error: reg=0x%02x, ret=%i)\n", reg, ret);
185 return ret;
186 }
187
188 dev_dbg(&state->i2c->dev, "reg=0x%02x; data=0x%02x\n", reg, buf);
189
190 return buf;
191 }
192
193 /* Write single register */
cx24120_writereg(struct cx24120_state * state,u8 reg,u8 data)194 static int cx24120_writereg(struct cx24120_state *state, u8 reg, u8 data)
195 {
196 u8 buf[] = { reg, data };
197 struct i2c_msg msg = {
198 .addr = state->config->i2c_addr,
199 .flags = 0,
200 .buf = buf,
201 .len = 2
202 };
203 int ret;
204
205 ret = i2c_transfer(state->i2c, &msg, 1);
206 if (ret != 1) {
207 err("Write error: i2c_write error(err == %i, 0x%02x: 0x%02x)\n",
208 ret, reg, data);
209 return ret;
210 }
211
212 dev_dbg(&state->i2c->dev, "reg=0x%02x; data=0x%02x\n", reg, data);
213
214 return 0;
215 }
216
217 /* Write multiple registers in chunks of i2c_wr_max-sized buffers */
cx24120_writeregs(struct cx24120_state * state,u8 reg,const u8 * values,u16 len,u8 incr)218 static int cx24120_writeregs(struct cx24120_state *state,
219 u8 reg, const u8 *values, u16 len, u8 incr)
220 {
221 int ret;
222 u16 max = state->config->i2c_wr_max > 0 ?
223 state->config->i2c_wr_max :
224 len;
225
226 struct i2c_msg msg = {
227 .addr = state->config->i2c_addr,
228 .flags = 0,
229 };
230
231 msg.buf = kmalloc(max + 1, GFP_KERNEL);
232 if (!msg.buf)
233 return -ENOMEM;
234
235 while (len) {
236 msg.buf[0] = reg;
237 msg.len = len > max ? max : len;
238 memcpy(&msg.buf[1], values, msg.len);
239
240 len -= msg.len; /* data length revers counter */
241 values += msg.len; /* incr data pointer */
242
243 if (incr)
244 reg += msg.len;
245 msg.len++; /* don't forget the addr byte */
246
247 ret = i2c_transfer(state->i2c, &msg, 1);
248 if (ret != 1) {
249 err("i2c_write error(err == %i, 0x%02x)\n", ret, reg);
250 goto out;
251 }
252
253 dev_dbg(&state->i2c->dev, "reg=0x%02x; data=%*ph\n",
254 reg, msg.len - 1, msg.buf + 1);
255 }
256
257 ret = 0;
258
259 out:
260 kfree(msg.buf);
261 return ret;
262 }
263
264 static const struct dvb_frontend_ops cx24120_ops;
265
cx24120_attach(const struct cx24120_config * config,struct i2c_adapter * i2c)266 struct dvb_frontend *cx24120_attach(const struct cx24120_config *config,
267 struct i2c_adapter *i2c)
268 {
269 struct cx24120_state *state;
270 int demod_rev;
271
272 info("Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner\n");
273 state = kzalloc(sizeof(*state), GFP_KERNEL);
274 if (!state) {
275 err("Unable to allocate memory for cx24120_state\n");
276 goto error;
277 }
278
279 /* setup the state */
280 state->config = config;
281 state->i2c = i2c;
282
283 /* check if the demod is present and has proper type */
284 demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
285 switch (demod_rev) {
286 case 0x07:
287 info("Demod cx24120 rev. 0x07 detected.\n");
288 break;
289 case 0x05:
290 info("Demod cx24120 rev. 0x05 detected.\n");
291 break;
292 default:
293 err("Unsupported demod revision: 0x%x detected.\n", demod_rev);
294 goto error;
295 }
296
297 /* create dvb_frontend */
298 state->cold_init = 0;
299 memcpy(&state->frontend.ops, &cx24120_ops,
300 sizeof(struct dvb_frontend_ops));
301 state->frontend.demodulator_priv = state;
302
303 info("Conexant cx24120/cx24118 attached.\n");
304 return &state->frontend;
305
306 error:
307 kfree(state);
308 return NULL;
309 }
310 EXPORT_SYMBOL(cx24120_attach);
311
cx24120_test_rom(struct cx24120_state * state)312 static int cx24120_test_rom(struct cx24120_state *state)
313 {
314 int err, ret;
315
316 err = cx24120_readreg(state, 0xfd);
317 if (err & 4) {
318 ret = cx24120_readreg(state, 0xdf) & 0xfe;
319 err = cx24120_writereg(state, 0xdf, ret);
320 }
321 return err;
322 }
323
cx24120_read_snr(struct dvb_frontend * fe,u16 * snr)324 static int cx24120_read_snr(struct dvb_frontend *fe, u16 *snr)
325 {
326 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
327
328 if (c->cnr.stat[0].scale != FE_SCALE_DECIBEL)
329 *snr = 0;
330 else
331 *snr = div_s64(c->cnr.stat[0].svalue, 100);
332
333 return 0;
334 }
335
cx24120_read_ber(struct dvb_frontend * fe,u32 * ber)336 static int cx24120_read_ber(struct dvb_frontend *fe, u32 *ber)
337 {
338 struct cx24120_state *state = fe->demodulator_priv;
339 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
340
341 if (c->post_bit_error.stat[0].scale != FE_SCALE_COUNTER) {
342 *ber = 0;
343 return 0;
344 }
345
346 *ber = c->post_bit_error.stat[0].uvalue - state->ber_prev;
347 state->ber_prev = c->post_bit_error.stat[0].uvalue;
348
349 return 0;
350 }
351
352 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
353 u8 flag);
354
355 /* Check if we're running a command that needs to disable mpeg out */
cx24120_check_cmd(struct cx24120_state * state,u8 id)356 static void cx24120_check_cmd(struct cx24120_state *state, u8 id)
357 {
358 switch (id) {
359 case CMD_TUNEREQUEST:
360 case CMD_CLOCK_READ:
361 case CMD_DISEQC_MSG1:
362 case CMD_DISEQC_MSG2:
363 case CMD_SETVOLTAGE:
364 case CMD_SETTONE:
365 case CMD_DISEQC_BURST:
366 cx24120_msg_mpeg_output_global_config(state, 0);
367 /* Old driver would do a msleep(100) here */
368 return;
369 default:
370 return;
371 }
372 }
373
374 /* Send a message to the firmware */
cx24120_message_send(struct cx24120_state * state,struct cx24120_cmd * cmd)375 static int cx24120_message_send(struct cx24120_state *state,
376 struct cx24120_cmd *cmd)
377 {
378 int ficus;
379
380 if (state->mpeg_enabled) {
381 /* Disable mpeg out on certain commands */
382 cx24120_check_cmd(state, cmd->id);
383 }
384
385 cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
386 cx24120_writeregs(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
387 cmd->len, 1);
388 cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
389
390 ficus = 1000;
391 while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
392 msleep(20);
393 ficus -= 20;
394 if (ficus == 0) {
395 err("Error sending message to firmware\n");
396 return -EREMOTEIO;
397 }
398 }
399 dev_dbg(&state->i2c->dev, "sent message 0x%02x\n", cmd->id);
400
401 return 0;
402 }
403
404 /* Send a message and fill arg[] with the results */
cx24120_message_sendrcv(struct cx24120_state * state,struct cx24120_cmd * cmd,u8 numreg)405 static int cx24120_message_sendrcv(struct cx24120_state *state,
406 struct cx24120_cmd *cmd, u8 numreg)
407 {
408 int ret, i;
409
410 if (numreg > CX24120_MAX_CMD_LEN) {
411 err("Too many registers to read. cmd->reg = %d", numreg);
412 return -EREMOTEIO;
413 }
414
415 ret = cx24120_message_send(state, cmd);
416 if (ret != 0)
417 return ret;
418
419 if (!numreg)
420 return 0;
421
422 /* Read numreg registers starting from register cmd->len */
423 for (i = 0; i < numreg; i++)
424 cmd->arg[i] = cx24120_readreg(state, (cmd->len + i + 1));
425
426 return 0;
427 }
428
cx24120_read_signal_strength(struct dvb_frontend * fe,u16 * signal_strength)429 static int cx24120_read_signal_strength(struct dvb_frontend *fe,
430 u16 *signal_strength)
431 {
432 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
433
434 if (c->strength.stat[0].scale != FE_SCALE_RELATIVE)
435 *signal_strength = 0;
436 else
437 *signal_strength = c->strength.stat[0].uvalue;
438
439 return 0;
440 }
441
cx24120_msg_mpeg_output_global_config(struct cx24120_state * state,u8 enable)442 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
443 u8 enable)
444 {
445 struct cx24120_cmd cmd;
446 int ret;
447
448 cmd.id = CMD_MPEG_ONOFF;
449 cmd.len = 4;
450 cmd.arg[0] = 0x01;
451 cmd.arg[1] = 0x00;
452 cmd.arg[2] = enable ? 0 : (u8)(-1);
453 cmd.arg[3] = 0x01;
454
455 ret = cx24120_message_send(state, &cmd);
456 if (ret != 0) {
457 dev_dbg(&state->i2c->dev, "failed to %s MPEG output\n",
458 enable ? "enable" : "disable");
459 return ret;
460 }
461
462 state->mpeg_enabled = enable;
463 dev_dbg(&state->i2c->dev, "MPEG output %s\n",
464 enable ? "enabled" : "disabled");
465
466 return 0;
467 }
468
cx24120_msg_mpeg_output_config(struct cx24120_state * state,u8 seq)469 static int cx24120_msg_mpeg_output_config(struct cx24120_state *state, u8 seq)
470 {
471 struct cx24120_cmd cmd;
472 struct cx24120_initial_mpeg_config i =
473 state->config->initial_mpeg_config;
474
475 cmd.id = CMD_MPEG_INIT;
476 cmd.len = 7;
477 cmd.arg[0] = seq; /* sequental number - can be 0,1,2 */
478 cmd.arg[1] = ((i.x1 & 0x01) << 1) | ((i.x1 >> 1) & 0x01);
479 cmd.arg[2] = 0x05;
480 cmd.arg[3] = 0x02;
481 cmd.arg[4] = ((i.x2 >> 1) & 0x01);
482 cmd.arg[5] = (i.x2 & 0xf0) | (i.x3 & 0x0f);
483 cmd.arg[6] = 0x10;
484
485 return cx24120_message_send(state, &cmd);
486 }
487
cx24120_diseqc_send_burst(struct dvb_frontend * fe,enum fe_sec_mini_cmd burst)488 static int cx24120_diseqc_send_burst(struct dvb_frontend *fe,
489 enum fe_sec_mini_cmd burst)
490 {
491 struct cx24120_state *state = fe->demodulator_priv;
492 struct cx24120_cmd cmd;
493
494 dev_dbg(&state->i2c->dev, "\n");
495
496 /*
497 * Yes, cmd.len is set to zero. The old driver
498 * didn't specify any len, but also had a
499 * memset 0 before every use of the cmd struct
500 * which would have set it to zero.
501 * This quite probably needs looking into.
502 */
503 cmd.id = CMD_DISEQC_BURST;
504 cmd.len = 0;
505 cmd.arg[0] = 0x00;
506 cmd.arg[1] = (burst == SEC_MINI_B) ? 0x01 : 0x00;
507
508 return cx24120_message_send(state, &cmd);
509 }
510
cx24120_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode tone)511 static int cx24120_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
512 {
513 struct cx24120_state *state = fe->demodulator_priv;
514 struct cx24120_cmd cmd;
515
516 dev_dbg(&state->i2c->dev, "(%d)\n", tone);
517
518 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
519 err("Invalid tone=%d\n", tone);
520 return -EINVAL;
521 }
522
523 cmd.id = CMD_SETTONE;
524 cmd.len = 4;
525 cmd.arg[0] = 0x00;
526 cmd.arg[1] = 0x00;
527 cmd.arg[2] = 0x00;
528 cmd.arg[3] = (tone == SEC_TONE_ON) ? 0x01 : 0x00;
529
530 return cx24120_message_send(state, &cmd);
531 }
532
cx24120_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)533 static int cx24120_set_voltage(struct dvb_frontend *fe,
534 enum fe_sec_voltage voltage)
535 {
536 struct cx24120_state *state = fe->demodulator_priv;
537 struct cx24120_cmd cmd;
538
539 dev_dbg(&state->i2c->dev, "(%d)\n", voltage);
540
541 cmd.id = CMD_SETVOLTAGE;
542 cmd.len = 2;
543 cmd.arg[0] = 0x00;
544 cmd.arg[1] = (voltage == SEC_VOLTAGE_18) ? 0x01 : 0x00;
545
546 return cx24120_message_send(state, &cmd);
547 }
548
cx24120_send_diseqc_msg(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * d)549 static int cx24120_send_diseqc_msg(struct dvb_frontend *fe,
550 struct dvb_diseqc_master_cmd *d)
551 {
552 struct cx24120_state *state = fe->demodulator_priv;
553 struct cx24120_cmd cmd;
554 int back_count;
555
556 dev_dbg(&state->i2c->dev, "\n");
557
558 cmd.id = CMD_DISEQC_MSG1;
559 cmd.len = 11;
560 cmd.arg[0] = 0x00;
561 cmd.arg[1] = 0x00;
562 cmd.arg[2] = 0x03;
563 cmd.arg[3] = 0x16;
564 cmd.arg[4] = 0x28;
565 cmd.arg[5] = 0x01;
566 cmd.arg[6] = 0x01;
567 cmd.arg[7] = 0x14;
568 cmd.arg[8] = 0x19;
569 cmd.arg[9] = 0x14;
570 cmd.arg[10] = 0x1e;
571
572 if (cx24120_message_send(state, &cmd)) {
573 err("send 1st message(0x%x) failed\n", cmd.id);
574 return -EREMOTEIO;
575 }
576
577 cmd.id = CMD_DISEQC_MSG2;
578 cmd.len = d->msg_len + 6;
579 cmd.arg[0] = 0x00;
580 cmd.arg[1] = 0x01;
581 cmd.arg[2] = 0x02;
582 cmd.arg[3] = 0x00;
583 cmd.arg[4] = 0x00;
584 cmd.arg[5] = d->msg_len;
585
586 memcpy(&cmd.arg[6], &d->msg, d->msg_len);
587
588 if (cx24120_message_send(state, &cmd)) {
589 err("send 2nd message(0x%x) failed\n", cmd.id);
590 return -EREMOTEIO;
591 }
592
593 back_count = 500;
594 do {
595 if (!(cx24120_readreg(state, 0x93) & 0x01)) {
596 dev_dbg(&state->i2c->dev, "diseqc sequence sent\n");
597 return 0;
598 }
599 msleep(20);
600 back_count -= 20;
601 } while (back_count);
602
603 err("Too long waiting for diseqc.\n");
604 return -ETIMEDOUT;
605 }
606
cx24120_get_stats(struct cx24120_state * state)607 static void cx24120_get_stats(struct cx24120_state *state)
608 {
609 struct dvb_frontend *fe = &state->frontend;
610 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
611 struct cx24120_cmd cmd;
612 int ret, cnr, msecs;
613 u16 sig, ucb;
614 u32 ber;
615
616 dev_dbg(&state->i2c->dev, "\n");
617
618 /* signal strength */
619 if (state->fe_status & FE_HAS_SIGNAL) {
620 cmd.id = CMD_READ_SNR;
621 cmd.len = 1;
622 cmd.arg[0] = 0x00;
623
624 ret = cx24120_message_send(state, &cmd);
625 if (ret != 0) {
626 err("error reading signal strength\n");
627 return;
628 }
629
630 /* raw */
631 sig = cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6;
632 sig = sig << 8;
633 sig |= cx24120_readreg(state, CX24120_REG_SIGSTR_L);
634 dev_dbg(&state->i2c->dev,
635 "signal strength from firmware = 0x%x\n", sig);
636
637 /* cooked */
638 sig = -100 * sig + 94324;
639
640 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
641 c->strength.stat[0].uvalue = sig;
642 } else {
643 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
644 }
645
646 /* CNR */
647 if (state->fe_status & FE_HAS_VITERBI) {
648 cnr = cx24120_readreg(state, CX24120_REG_QUALITY_H) << 8;
649 cnr |= cx24120_readreg(state, CX24120_REG_QUALITY_L);
650 dev_dbg(&state->i2c->dev, "read SNR index = %d\n", cnr);
651
652 /* guessed - seems about right */
653 cnr = cnr * 100;
654
655 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
656 c->cnr.stat[0].svalue = cnr;
657 } else {
658 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
659 }
660
661 /* BER & UCB require lock */
662 if (!(state->fe_status & FE_HAS_LOCK)) {
663 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
664 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
665 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
666 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
667 return;
668 }
669
670 /* BER */
671 if (time_after(jiffies, state->ber_jiffies_stats)) {
672 msecs = (state->berw_usecs + 500) / 1000;
673 state->ber_jiffies_stats = jiffies + msecs_to_jiffies(msecs);
674
675 ber = cx24120_readreg(state, CX24120_REG_BER_HH) << 24;
676 ber |= cx24120_readreg(state, CX24120_REG_BER_HL) << 16;
677 ber |= cx24120_readreg(state, CX24120_REG_BER_LH) << 8;
678 ber |= cx24120_readreg(state, CX24120_REG_BER_LL);
679 dev_dbg(&state->i2c->dev, "read BER index = %d\n", ber);
680
681 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
682 c->post_bit_error.stat[0].uvalue += ber;
683
684 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
685 c->post_bit_count.stat[0].uvalue += CX24120_BER_WSIZE;
686 }
687
688 /* UCB */
689 if (time_after(jiffies, state->per_jiffies_stats)) {
690 state->per_jiffies_stats = jiffies + msecs_to_jiffies(1000);
691
692 ucb = cx24120_readreg(state, CX24120_REG_UCB_H) << 8;
693 ucb |= cx24120_readreg(state, CX24120_REG_UCB_L);
694 dev_dbg(&state->i2c->dev, "ucblocks = %d\n", ucb);
695
696 /* handle reset */
697 if (ucb < state->ucb_offset)
698 state->ucb_offset = c->block_error.stat[0].uvalue;
699
700 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
701 c->block_error.stat[0].uvalue = ucb + state->ucb_offset;
702
703 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
704 c->block_count.stat[0].uvalue += state->bitrate / 8 / 208;
705 }
706 }
707
708 static void cx24120_set_clock_ratios(struct dvb_frontend *fe);
709
710 /* Read current tuning status */
cx24120_read_status(struct dvb_frontend * fe,enum fe_status * status)711 static int cx24120_read_status(struct dvb_frontend *fe, enum fe_status *status)
712 {
713 struct cx24120_state *state = fe->demodulator_priv;
714 int lock;
715
716 lock = cx24120_readreg(state, CX24120_REG_STATUS);
717
718 dev_dbg(&state->i2c->dev, "status = 0x%02x\n", lock);
719
720 *status = 0;
721
722 if (lock & CX24120_HAS_SIGNAL)
723 *status = FE_HAS_SIGNAL;
724 if (lock & CX24120_HAS_CARRIER)
725 *status |= FE_HAS_CARRIER;
726 if (lock & CX24120_HAS_VITERBI)
727 *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
728 if (lock & CX24120_HAS_LOCK)
729 *status |= FE_HAS_LOCK;
730
731 /*
732 * TODO: is FE_HAS_SYNC in the right place?
733 * Other cx241xx drivers have this slightly
734 * different
735 */
736
737 state->fe_status = *status;
738 cx24120_get_stats(state);
739
740 /* Set the clock once tuned in */
741 if (state->need_clock_set && *status & FE_HAS_LOCK) {
742 /* Set clock ratios */
743 cx24120_set_clock_ratios(fe);
744
745 /* Old driver would do a msleep(200) here */
746
747 /* Renable mpeg output */
748 if (!state->mpeg_enabled)
749 cx24120_msg_mpeg_output_global_config(state, 1);
750
751 state->need_clock_set = 0;
752 }
753
754 return 0;
755 }
756
757 /*
758 * FEC & modulation lookup table
759 * Used for decoding the REG_FECMODE register
760 * once tuned in.
761 */
762 struct cx24120_modfec {
763 enum fe_delivery_system delsys;
764 enum fe_modulation mod;
765 enum fe_code_rate fec;
766 u8 val;
767 };
768
769 static const struct cx24120_modfec modfec_lookup_table[] = {
770 /*delsys mod fec val */
771 { SYS_DVBS, QPSK, FEC_1_2, 0x01 },
772 { SYS_DVBS, QPSK, FEC_2_3, 0x02 },
773 { SYS_DVBS, QPSK, FEC_3_4, 0x03 },
774 { SYS_DVBS, QPSK, FEC_4_5, 0x04 },
775 { SYS_DVBS, QPSK, FEC_5_6, 0x05 },
776 { SYS_DVBS, QPSK, FEC_6_7, 0x06 },
777 { SYS_DVBS, QPSK, FEC_7_8, 0x07 },
778
779 { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
780 { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
781 { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
782 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
783 { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
784 { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
785 { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
786 { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
787
788 { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
789 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
790 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
791 { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
792 { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
793 { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
794 };
795
796 /* Retrieve current fec, modulation & pilot values */
cx24120_get_fec(struct dvb_frontend * fe)797 static int cx24120_get_fec(struct dvb_frontend *fe)
798 {
799 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
800 struct cx24120_state *state = fe->demodulator_priv;
801 int idx;
802 int ret;
803 int fec;
804
805 ret = cx24120_readreg(state, CX24120_REG_FECMODE);
806 fec = ret & 0x3f; /* Lower 6 bits */
807
808 dev_dbg(&state->i2c->dev, "raw fec = %d\n", fec);
809
810 for (idx = 0; idx < ARRAY_SIZE(modfec_lookup_table); idx++) {
811 if (modfec_lookup_table[idx].delsys != state->dcur.delsys)
812 continue;
813 if (modfec_lookup_table[idx].val != fec)
814 continue;
815
816 break; /* found */
817 }
818
819 if (idx >= ARRAY_SIZE(modfec_lookup_table)) {
820 dev_dbg(&state->i2c->dev, "couldn't find fec!\n");
821 return -EINVAL;
822 }
823
824 /* save values back to cache */
825 c->modulation = modfec_lookup_table[idx].mod;
826 c->fec_inner = modfec_lookup_table[idx].fec;
827 c->pilot = (ret & 0x80) ? PILOT_ON : PILOT_OFF;
828
829 dev_dbg(&state->i2c->dev, "mod(%d), fec(%d), pilot(%d)\n",
830 c->modulation, c->fec_inner, c->pilot);
831
832 return 0;
833 }
834
835 /* Calculate ber window time */
cx24120_calculate_ber_window(struct cx24120_state * state,u32 rate)836 static void cx24120_calculate_ber_window(struct cx24120_state *state, u32 rate)
837 {
838 struct dvb_frontend *fe = &state->frontend;
839 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
840 u64 tmp;
841
842 /*
843 * Calculate bitrate from rate in the clock ratios table.
844 * This isn't *exactly* right but close enough.
845 */
846 tmp = (u64)c->symbol_rate * rate;
847 do_div(tmp, 256);
848 state->bitrate = tmp;
849
850 /* usecs per ber window */
851 tmp = 1000000ULL * CX24120_BER_WSIZE;
852 do_div(tmp, state->bitrate);
853 state->berw_usecs = tmp;
854
855 dev_dbg(&state->i2c->dev, "bitrate: %u, berw_usecs: %u\n",
856 state->bitrate, state->berw_usecs);
857 }
858
859 /*
860 * Clock ratios lookup table
861 *
862 * Values obtained from much larger table in old driver
863 * which had numerous entries which would never match.
864 *
865 * There's probably some way of calculating these but I
866 * can't determine the pattern
867 */
868 struct cx24120_clock_ratios_table {
869 enum fe_delivery_system delsys;
870 enum fe_pilot pilot;
871 enum fe_modulation mod;
872 enum fe_code_rate fec;
873 u32 m_rat;
874 u32 n_rat;
875 u32 rate;
876 };
877
878 static const struct cx24120_clock_ratios_table clock_ratios_table[] = {
879 /*delsys pilot mod fec m_rat n_rat rate */
880 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_1_2, 273088, 254505, 274 },
881 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_5, 17272, 13395, 330 },
882 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_2_3, 24344, 16967, 367 },
883 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_4, 410788, 254505, 413 },
884 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_4_5, 438328, 254505, 440 },
885 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_5_6, 30464, 16967, 459 },
886 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_8_9, 487832, 254505, 490 },
887 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_9_10, 493952, 254505, 496 },
888 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_5, 328168, 169905, 494 },
889 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_2_3, 24344, 11327, 550 },
890 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_4, 410788, 169905, 618 },
891 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_5_6, 30464, 11327, 688 },
892 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_8_9, 487832, 169905, 735 },
893 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_9_10, 493952, 169905, 744 },
894 { SYS_DVBS2, PILOT_ON, QPSK, FEC_1_2, 273088, 260709, 268 },
895 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_5, 328168, 260709, 322 },
896 { SYS_DVBS2, PILOT_ON, QPSK, FEC_2_3, 121720, 86903, 358 },
897 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_4, 410788, 260709, 403 },
898 { SYS_DVBS2, PILOT_ON, QPSK, FEC_4_5, 438328, 260709, 430 },
899 { SYS_DVBS2, PILOT_ON, QPSK, FEC_5_6, 152320, 86903, 448 },
900 { SYS_DVBS2, PILOT_ON, QPSK, FEC_8_9, 487832, 260709, 479 },
901 { SYS_DVBS2, PILOT_ON, QPSK, FEC_9_10, 493952, 260709, 485 },
902 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_5, 328168, 173853, 483 },
903 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_2_3, 121720, 57951, 537 },
904 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_4, 410788, 173853, 604 },
905 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_5_6, 152320, 57951, 672 },
906 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_8_9, 487832, 173853, 718 },
907 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_9_10, 493952, 173853, 727 },
908 { SYS_DVBS, PILOT_OFF, QPSK, FEC_1_2, 152592, 152592, 256 },
909 { SYS_DVBS, PILOT_OFF, QPSK, FEC_2_3, 305184, 228888, 341 },
910 { SYS_DVBS, PILOT_OFF, QPSK, FEC_3_4, 457776, 305184, 384 },
911 { SYS_DVBS, PILOT_OFF, QPSK, FEC_5_6, 762960, 457776, 427 },
912 { SYS_DVBS, PILOT_OFF, QPSK, FEC_7_8, 1068144, 610368, 448 },
913 };
914
915 /* Set clock ratio from lookup table */
cx24120_set_clock_ratios(struct dvb_frontend * fe)916 static void cx24120_set_clock_ratios(struct dvb_frontend *fe)
917 {
918 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
919 struct cx24120_state *state = fe->demodulator_priv;
920 struct cx24120_cmd cmd;
921 int ret, idx;
922
923 /* Find fec, modulation, pilot */
924 ret = cx24120_get_fec(fe);
925 if (ret != 0)
926 return;
927
928 /* Find the clock ratios in the lookup table */
929 for (idx = 0; idx < ARRAY_SIZE(clock_ratios_table); idx++) {
930 if (clock_ratios_table[idx].delsys != state->dcur.delsys)
931 continue;
932 if (clock_ratios_table[idx].mod != c->modulation)
933 continue;
934 if (clock_ratios_table[idx].fec != c->fec_inner)
935 continue;
936 if (clock_ratios_table[idx].pilot != c->pilot)
937 continue;
938
939 break; /* found */
940 }
941
942 if (idx >= ARRAY_SIZE(clock_ratios_table)) {
943 info("Clock ratio not found - data reception in danger\n");
944 return;
945 }
946
947 /* Read current values? */
948 cmd.id = CMD_CLOCK_READ;
949 cmd.len = 1;
950 cmd.arg[0] = 0x00;
951 ret = cx24120_message_sendrcv(state, &cmd, 6);
952 if (ret != 0)
953 return;
954 /* in cmd[0]-[5] - result */
955
956 dev_dbg(&state->i2c->dev, "m=%d, n=%d; idx: %d m=%d, n=%d, rate=%d\n",
957 cmd.arg[2] | (cmd.arg[1] << 8) | (cmd.arg[0] << 16),
958 cmd.arg[5] | (cmd.arg[4] << 8) | (cmd.arg[3] << 16),
959 idx,
960 clock_ratios_table[idx].m_rat,
961 clock_ratios_table[idx].n_rat,
962 clock_ratios_table[idx].rate);
963
964 /* Set the clock */
965 cmd.id = CMD_CLOCK_SET;
966 cmd.len = 10;
967 cmd.arg[0] = 0;
968 cmd.arg[1] = 0x10;
969 cmd.arg[2] = (clock_ratios_table[idx].m_rat >> 16) & 0xff;
970 cmd.arg[3] = (clock_ratios_table[idx].m_rat >> 8) & 0xff;
971 cmd.arg[4] = (clock_ratios_table[idx].m_rat >> 0) & 0xff;
972 cmd.arg[5] = (clock_ratios_table[idx].n_rat >> 16) & 0xff;
973 cmd.arg[6] = (clock_ratios_table[idx].n_rat >> 8) & 0xff;
974 cmd.arg[7] = (clock_ratios_table[idx].n_rat >> 0) & 0xff;
975 cmd.arg[8] = (clock_ratios_table[idx].rate >> 8) & 0xff;
976 cmd.arg[9] = (clock_ratios_table[idx].rate >> 0) & 0xff;
977
978 cx24120_message_send(state, &cmd);
979
980 /* Calculate ber window rates for stat work */
981 cx24120_calculate_ber_window(state, clock_ratios_table[idx].rate);
982 }
983
984 /* Set inversion value */
cx24120_set_inversion(struct cx24120_state * state,enum fe_spectral_inversion inversion)985 static int cx24120_set_inversion(struct cx24120_state *state,
986 enum fe_spectral_inversion inversion)
987 {
988 dev_dbg(&state->i2c->dev, "(%d)\n", inversion);
989
990 switch (inversion) {
991 case INVERSION_OFF:
992 state->dnxt.inversion_val = 0x00;
993 break;
994 case INVERSION_ON:
995 state->dnxt.inversion_val = 0x04;
996 break;
997 case INVERSION_AUTO:
998 state->dnxt.inversion_val = 0x0c;
999 break;
1000 default:
1001 return -EINVAL;
1002 }
1003
1004 state->dnxt.inversion = inversion;
1005
1006 return 0;
1007 }
1008
1009 /* FEC lookup table for tuning */
1010 struct cx24120_modfec_table {
1011 enum fe_delivery_system delsys;
1012 enum fe_modulation mod;
1013 enum fe_code_rate fec;
1014 u8 val;
1015 };
1016
1017 static const struct cx24120_modfec_table modfec_table[] = {
1018 /*delsys mod fec val */
1019 { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
1020 { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
1021 { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
1022 { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
1023 { SYS_DVBS, QPSK, FEC_6_7, 0x32 },
1024 { SYS_DVBS, QPSK, FEC_7_8, 0x33 },
1025
1026 { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
1027 { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
1028 { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
1029 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
1030 { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
1031 { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
1032 { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
1033 { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
1034
1035 { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
1036 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
1037 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
1038 { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
1039 { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
1040 { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
1041 };
1042
1043 /* Set fec_val & fec_mask values from delsys, modulation & fec */
cx24120_set_fec(struct cx24120_state * state,enum fe_modulation mod,enum fe_code_rate fec)1044 static int cx24120_set_fec(struct cx24120_state *state, enum fe_modulation mod,
1045 enum fe_code_rate fec)
1046 {
1047 int idx;
1048
1049 dev_dbg(&state->i2c->dev, "(0x%02x,0x%02x)\n", mod, fec);
1050
1051 state->dnxt.fec = fec;
1052
1053 /* Lookup fec_val from modfec table */
1054 for (idx = 0; idx < ARRAY_SIZE(modfec_table); idx++) {
1055 if (modfec_table[idx].delsys != state->dnxt.delsys)
1056 continue;
1057 if (modfec_table[idx].mod != mod)
1058 continue;
1059 if (modfec_table[idx].fec != fec)
1060 continue;
1061
1062 /* found */
1063 state->dnxt.fec_mask = 0x00;
1064 state->dnxt.fec_val = modfec_table[idx].val;
1065 return 0;
1066 }
1067
1068 if (state->dnxt.delsys == SYS_DVBS2) {
1069 /* DVBS2 auto is 0x00/0x00 */
1070 state->dnxt.fec_mask = 0x00;
1071 state->dnxt.fec_val = 0x00;
1072 } else {
1073 /* Set DVB-S to auto */
1074 state->dnxt.fec_val = 0x2e;
1075 state->dnxt.fec_mask = 0xac;
1076 }
1077
1078 return 0;
1079 }
1080
1081 /* Set pilot */
cx24120_set_pilot(struct cx24120_state * state,enum fe_pilot pilot)1082 static int cx24120_set_pilot(struct cx24120_state *state, enum fe_pilot pilot)
1083 {
1084 dev_dbg(&state->i2c->dev, "(%d)\n", pilot);
1085
1086 /* Pilot only valid in DVBS2 */
1087 if (state->dnxt.delsys != SYS_DVBS2) {
1088 state->dnxt.pilot_val = CX24120_PILOT_OFF;
1089 return 0;
1090 }
1091
1092 switch (pilot) {
1093 case PILOT_OFF:
1094 state->dnxt.pilot_val = CX24120_PILOT_OFF;
1095 break;
1096 case PILOT_ON:
1097 state->dnxt.pilot_val = CX24120_PILOT_ON;
1098 break;
1099 case PILOT_AUTO:
1100 default:
1101 state->dnxt.pilot_val = CX24120_PILOT_AUTO;
1102 }
1103
1104 return 0;
1105 }
1106
1107 /* Set symbol rate */
cx24120_set_symbolrate(struct cx24120_state * state,u32 rate)1108 static int cx24120_set_symbolrate(struct cx24120_state *state, u32 rate)
1109 {
1110 dev_dbg(&state->i2c->dev, "(%d)\n", rate);
1111
1112 state->dnxt.symbol_rate = rate;
1113
1114 /* Check symbol rate */
1115 if (rate > 31000000) {
1116 state->dnxt.clkdiv = (-(rate < 31000001) & 3) + 2;
1117 state->dnxt.ratediv = (-(rate < 31000001) & 6) + 4;
1118 } else {
1119 state->dnxt.clkdiv = 3;
1120 state->dnxt.ratediv = 6;
1121 }
1122
1123 return 0;
1124 }
1125
1126 /* Overwrite the current tuning params, we are about to tune */
cx24120_clone_params(struct dvb_frontend * fe)1127 static void cx24120_clone_params(struct dvb_frontend *fe)
1128 {
1129 struct cx24120_state *state = fe->demodulator_priv;
1130
1131 state->dcur = state->dnxt;
1132 }
1133
cx24120_set_frontend(struct dvb_frontend * fe)1134 static int cx24120_set_frontend(struct dvb_frontend *fe)
1135 {
1136 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1137 struct cx24120_state *state = fe->demodulator_priv;
1138 struct cx24120_cmd cmd;
1139 int ret;
1140
1141 switch (c->delivery_system) {
1142 case SYS_DVBS2:
1143 dev_dbg(&state->i2c->dev, "DVB-S2\n");
1144 break;
1145 case SYS_DVBS:
1146 dev_dbg(&state->i2c->dev, "DVB-S\n");
1147 break;
1148 default:
1149 dev_dbg(&state->i2c->dev,
1150 "delivery system(%d) not supported\n",
1151 c->delivery_system);
1152 return -EINVAL;
1153 }
1154
1155 state->dnxt.delsys = c->delivery_system;
1156 state->dnxt.modulation = c->modulation;
1157 state->dnxt.frequency = c->frequency;
1158 state->dnxt.pilot = c->pilot;
1159
1160 ret = cx24120_set_inversion(state, c->inversion);
1161 if (ret != 0)
1162 return ret;
1163
1164 ret = cx24120_set_fec(state, c->modulation, c->fec_inner);
1165 if (ret != 0)
1166 return ret;
1167
1168 ret = cx24120_set_pilot(state, c->pilot);
1169 if (ret != 0)
1170 return ret;
1171
1172 ret = cx24120_set_symbolrate(state, c->symbol_rate);
1173 if (ret != 0)
1174 return ret;
1175
1176 /* discard the 'current' tuning parameters and prepare to tune */
1177 cx24120_clone_params(fe);
1178
1179 dev_dbg(&state->i2c->dev,
1180 "delsys = %d\n", state->dcur.delsys);
1181 dev_dbg(&state->i2c->dev,
1182 "modulation = %d\n", state->dcur.modulation);
1183 dev_dbg(&state->i2c->dev,
1184 "frequency = %d\n", state->dcur.frequency);
1185 dev_dbg(&state->i2c->dev,
1186 "pilot = %d (val = 0x%02x)\n",
1187 state->dcur.pilot, state->dcur.pilot_val);
1188 dev_dbg(&state->i2c->dev,
1189 "symbol_rate = %d (clkdiv/ratediv = 0x%02x/0x%02x)\n",
1190 state->dcur.symbol_rate,
1191 state->dcur.clkdiv, state->dcur.ratediv);
1192 dev_dbg(&state->i2c->dev,
1193 "FEC = %d (mask/val = 0x%02x/0x%02x)\n",
1194 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1195 dev_dbg(&state->i2c->dev,
1196 "Inversion = %d (val = 0x%02x)\n",
1197 state->dcur.inversion, state->dcur.inversion_val);
1198
1199 /* Flag that clock needs to be set after tune */
1200 state->need_clock_set = 1;
1201
1202 /* Tune in */
1203 cmd.id = CMD_TUNEREQUEST;
1204 cmd.len = 15;
1205 cmd.arg[0] = 0;
1206 cmd.arg[1] = (state->dcur.frequency & 0xff0000) >> 16;
1207 cmd.arg[2] = (state->dcur.frequency & 0x00ff00) >> 8;
1208 cmd.arg[3] = (state->dcur.frequency & 0x0000ff);
1209 cmd.arg[4] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8;
1210 cmd.arg[5] = ((state->dcur.symbol_rate / 1000) & 0x00ff);
1211 cmd.arg[6] = state->dcur.inversion;
1212 cmd.arg[7] = state->dcur.fec_val | state->dcur.pilot_val;
1213 cmd.arg[8] = CX24120_SEARCH_RANGE_KHZ >> 8;
1214 cmd.arg[9] = CX24120_SEARCH_RANGE_KHZ & 0xff;
1215 cmd.arg[10] = 0; /* maybe rolloff? */
1216 cmd.arg[11] = state->dcur.fec_mask;
1217 cmd.arg[12] = state->dcur.ratediv;
1218 cmd.arg[13] = state->dcur.clkdiv;
1219 cmd.arg[14] = 0;
1220
1221 /* Send tune command */
1222 ret = cx24120_message_send(state, &cmd);
1223 if (ret != 0)
1224 return ret;
1225
1226 /* Write symbol rate values */
1227 ret = cx24120_writereg(state, CX24120_REG_CLKDIV, state->dcur.clkdiv);
1228 ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
1229 ret &= 0xfffffff0;
1230 ret |= state->dcur.ratediv;
1231 ret = cx24120_writereg(state, CX24120_REG_RATEDIV, ret);
1232
1233 return 0;
1234 }
1235
1236 /* Set vco from config */
cx24120_set_vco(struct cx24120_state * state)1237 static int cx24120_set_vco(struct cx24120_state *state)
1238 {
1239 struct cx24120_cmd cmd;
1240 u32 nxtal_khz, vco;
1241 u64 inv_vco;
1242 u32 xtal_khz = state->config->xtal_khz;
1243
1244 nxtal_khz = xtal_khz * 4;
1245 vco = nxtal_khz * 10;
1246 inv_vco = DIV_ROUND_CLOSEST_ULL(0x400000000ULL, vco);
1247
1248 dev_dbg(&state->i2c->dev, "xtal=%d, vco=%d, inv_vco=%lld\n",
1249 xtal_khz, vco, inv_vco);
1250
1251 cmd.id = CMD_VCO_SET;
1252 cmd.len = 12;
1253 cmd.arg[0] = (vco >> 16) & 0xff;
1254 cmd.arg[1] = (vco >> 8) & 0xff;
1255 cmd.arg[2] = vco & 0xff;
1256 cmd.arg[3] = (inv_vco >> 8) & 0xff;
1257 cmd.arg[4] = (inv_vco) & 0xff;
1258 cmd.arg[5] = 0x03;
1259 cmd.arg[6] = (nxtal_khz >> 8) & 0xff;
1260 cmd.arg[7] = nxtal_khz & 0xff;
1261 cmd.arg[8] = 0x06;
1262 cmd.arg[9] = 0x03;
1263 cmd.arg[10] = (xtal_khz >> 16) & 0xff;
1264 cmd.arg[11] = xtal_khz & 0xff;
1265
1266 return cx24120_message_send(state, &cmd);
1267 }
1268
cx24120_init(struct dvb_frontend * fe)1269 static int cx24120_init(struct dvb_frontend *fe)
1270 {
1271 const struct firmware *fw;
1272 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1273 struct cx24120_state *state = fe->demodulator_priv;
1274 struct cx24120_cmd cmd;
1275 u8 reg;
1276 int ret, i;
1277 unsigned char vers[4];
1278
1279 if (state->cold_init)
1280 return 0;
1281
1282 /* ???? */
1283 cx24120_writereg(state, 0xea, 0x00);
1284 cx24120_test_rom(state);
1285 reg = cx24120_readreg(state, 0xfb) & 0xfe;
1286 cx24120_writereg(state, 0xfb, reg);
1287 reg = cx24120_readreg(state, 0xfc) & 0xfe;
1288 cx24120_writereg(state, 0xfc, reg);
1289 cx24120_writereg(state, 0xc3, 0x04);
1290 cx24120_writereg(state, 0xc4, 0x04);
1291 cx24120_writereg(state, 0xce, 0x00);
1292 cx24120_writereg(state, 0xcf, 0x00);
1293 reg = cx24120_readreg(state, 0xea) & 0xfe;
1294 cx24120_writereg(state, 0xea, reg);
1295 cx24120_writereg(state, 0xeb, 0x0c);
1296 cx24120_writereg(state, 0xec, 0x06);
1297 cx24120_writereg(state, 0xed, 0x05);
1298 cx24120_writereg(state, 0xee, 0x03);
1299 cx24120_writereg(state, 0xef, 0x05);
1300 cx24120_writereg(state, 0xf3, 0x03);
1301 cx24120_writereg(state, 0xf4, 0x44);
1302
1303 for (i = 0; i < 3; i++) {
1304 cx24120_writereg(state, 0xf0 + i, 0x04);
1305 cx24120_writereg(state, 0xe6 + i, 0x02);
1306 }
1307
1308 cx24120_writereg(state, 0xea, (reg | 0x01));
1309 for (i = 0; i < 6; i += 2) {
1310 cx24120_writereg(state, 0xc5 + i, 0x00);
1311 cx24120_writereg(state, 0xc6 + i, 0x00);
1312 }
1313
1314 cx24120_writereg(state, 0xe4, 0x03);
1315 cx24120_writereg(state, 0xeb, 0x0a);
1316
1317 dev_dbg(&state->i2c->dev, "requesting firmware (%s) to download...\n",
1318 CX24120_FIRMWARE);
1319
1320 ret = state->config->request_firmware(fe, &fw, CX24120_FIRMWARE);
1321 if (ret) {
1322 err("Could not load firmware (%s): %d\n", CX24120_FIRMWARE,
1323 ret);
1324 return ret;
1325 }
1326
1327 dev_dbg(&state->i2c->dev,
1328 "Firmware found, size %d bytes (%02x %02x .. %02x %02x)\n",
1329 (int)fw->size, /* firmware_size in bytes */
1330 fw->data[0], /* fw 1st byte */
1331 fw->data[1], /* fw 2d byte */
1332 fw->data[fw->size - 2], /* fw before last byte */
1333 fw->data[fw->size - 1]); /* fw last byte */
1334
1335 cx24120_test_rom(state);
1336 reg = cx24120_readreg(state, 0xfb) & 0xfe;
1337 cx24120_writereg(state, 0xfb, reg);
1338 cx24120_writereg(state, 0xe0, 0x76);
1339 cx24120_writereg(state, 0xf7, 0x81);
1340 cx24120_writereg(state, 0xf8, 0x00);
1341 cx24120_writereg(state, 0xf9, 0x00);
1342 cx24120_writeregs(state, 0xfa, fw->data, (fw->size - 1), 0x00);
1343 cx24120_writereg(state, 0xf7, 0xc0);
1344 cx24120_writereg(state, 0xe0, 0x00);
1345 reg = (fw->size - 2) & 0x00ff;
1346 cx24120_writereg(state, 0xf8, reg);
1347 reg = ((fw->size - 2) >> 8) & 0x00ff;
1348 cx24120_writereg(state, 0xf9, reg);
1349 cx24120_writereg(state, 0xf7, 0x00);
1350 cx24120_writereg(state, 0xdc, 0x00);
1351 cx24120_writereg(state, 0xdc, 0x07);
1352 msleep(500);
1353
1354 /* Check final byte matches final byte of firmware */
1355 reg = cx24120_readreg(state, 0xe1);
1356 if (reg == fw->data[fw->size - 1]) {
1357 dev_dbg(&state->i2c->dev, "Firmware uploaded successfully\n");
1358 ret = 0;
1359 } else {
1360 err("Firmware upload failed. Last byte returned=0x%x\n", ret);
1361 ret = -EREMOTEIO;
1362 }
1363 cx24120_writereg(state, 0xdc, 0x00);
1364 release_firmware(fw);
1365 if (ret != 0)
1366 return ret;
1367
1368 /* Start tuner */
1369 cmd.id = CMD_START_TUNER;
1370 cmd.len = 3;
1371 cmd.arg[0] = 0x00;
1372 cmd.arg[1] = 0x00;
1373 cmd.arg[2] = 0x00;
1374
1375 if (cx24120_message_send(state, &cmd) != 0) {
1376 err("Error tuner start! :(\n");
1377 return -EREMOTEIO;
1378 }
1379
1380 /* Set VCO */
1381 ret = cx24120_set_vco(state);
1382 if (ret != 0) {
1383 err("Error set VCO! :(\n");
1384 return ret;
1385 }
1386
1387 /* set bandwidth */
1388 cmd.id = CMD_BANDWIDTH;
1389 cmd.len = 12;
1390 cmd.arg[0] = 0x00;
1391 cmd.arg[1] = 0x00;
1392 cmd.arg[2] = 0x00;
1393 cmd.arg[3] = 0x00;
1394 cmd.arg[4] = 0x05;
1395 cmd.arg[5] = 0x02;
1396 cmd.arg[6] = 0x02;
1397 cmd.arg[7] = 0x00;
1398 cmd.arg[8] = 0x05;
1399 cmd.arg[9] = 0x02;
1400 cmd.arg[10] = 0x02;
1401 cmd.arg[11] = 0x00;
1402
1403 if (cx24120_message_send(state, &cmd)) {
1404 err("Error set bandwidth!\n");
1405 return -EREMOTEIO;
1406 }
1407
1408 reg = cx24120_readreg(state, 0xba);
1409 if (reg > 3) {
1410 dev_dbg(&state->i2c->dev, "Reset-readreg 0xba: %x\n", ret);
1411 err("Error initialising tuner!\n");
1412 return -EREMOTEIO;
1413 }
1414
1415 dev_dbg(&state->i2c->dev, "Tuner initialised correctly.\n");
1416
1417 /* Initialise mpeg outputs */
1418 cx24120_writereg(state, 0xeb, 0x0a);
1419 if (cx24120_msg_mpeg_output_global_config(state, 0) ||
1420 cx24120_msg_mpeg_output_config(state, 0) ||
1421 cx24120_msg_mpeg_output_config(state, 1) ||
1422 cx24120_msg_mpeg_output_config(state, 2)) {
1423 err("Error initialising mpeg output. :(\n");
1424 return -EREMOTEIO;
1425 }
1426
1427 /* Set size of BER window */
1428 cmd.id = CMD_BER_CTRL;
1429 cmd.len = 3;
1430 cmd.arg[0] = 0x00;
1431 cmd.arg[1] = CX24120_BER_WINDOW;
1432 cmd.arg[2] = CX24120_BER_WINDOW;
1433 if (cx24120_message_send(state, &cmd)) {
1434 err("Error setting ber window\n");
1435 return -EREMOTEIO;
1436 }
1437
1438 /* Firmware CMD 35: Get firmware version */
1439 cmd.id = CMD_FWVERSION;
1440 cmd.len = 1;
1441 for (i = 0; i < 4; i++) {
1442 cmd.arg[0] = i;
1443 ret = cx24120_message_send(state, &cmd);
1444 if (ret != 0)
1445 return ret;
1446 vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
1447 }
1448 info("FW version %i.%i.%i.%i\n", vers[0], vers[1], vers[2], vers[3]);
1449
1450 /* init stats here in order signal app which stats are supported */
1451 c->strength.len = 1;
1452 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1453 c->cnr.len = 1;
1454 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1455 c->post_bit_error.len = 1;
1456 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1457 c->post_bit_count.len = 1;
1458 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1459 c->block_error.len = 1;
1460 c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1461 c->block_count.len = 1;
1462 c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1463
1464 state->cold_init = 1;
1465
1466 return 0;
1467 }
1468
cx24120_tune(struct dvb_frontend * fe,bool re_tune,unsigned int mode_flags,unsigned int * delay,enum fe_status * status)1469 static int cx24120_tune(struct dvb_frontend *fe, bool re_tune,
1470 unsigned int mode_flags, unsigned int *delay,
1471 enum fe_status *status)
1472 {
1473 struct cx24120_state *state = fe->demodulator_priv;
1474 int ret;
1475
1476 dev_dbg(&state->i2c->dev, "(%d)\n", re_tune);
1477
1478 /* TODO: Do we need to set delay? */
1479
1480 if (re_tune) {
1481 ret = cx24120_set_frontend(fe);
1482 if (ret)
1483 return ret;
1484 }
1485
1486 return cx24120_read_status(fe, status);
1487 }
1488
cx24120_get_algo(struct dvb_frontend * fe)1489 static enum dvbfe_algo cx24120_get_algo(struct dvb_frontend *fe)
1490 {
1491 return DVBFE_ALGO_HW;
1492 }
1493
cx24120_sleep(struct dvb_frontend * fe)1494 static int cx24120_sleep(struct dvb_frontend *fe)
1495 {
1496 return 0;
1497 }
1498
cx24120_get_frontend(struct dvb_frontend * fe,struct dtv_frontend_properties * c)1499 static int cx24120_get_frontend(struct dvb_frontend *fe,
1500 struct dtv_frontend_properties *c)
1501 {
1502 struct cx24120_state *state = fe->demodulator_priv;
1503 u8 freq1, freq2, freq3;
1504 int status;
1505
1506 dev_dbg(&state->i2c->dev, "\n");
1507
1508 /* don't return empty data if we're not tuned in */
1509 status = cx24120_readreg(state, CX24120_REG_STATUS);
1510 if (!(status & CX24120_HAS_LOCK))
1511 return 0;
1512
1513 /* Get frequency */
1514 freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
1515 freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
1516 freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);
1517 c->frequency = (freq3 << 16) | (freq2 << 8) | freq1;
1518 dev_dbg(&state->i2c->dev, "frequency = %d\n", c->frequency);
1519
1520 /* Get modulation, fec, pilot */
1521 cx24120_get_fec(fe);
1522
1523 return 0;
1524 }
1525
cx24120_release(struct dvb_frontend * fe)1526 static void cx24120_release(struct dvb_frontend *fe)
1527 {
1528 struct cx24120_state *state = fe->demodulator_priv;
1529
1530 dev_dbg(&state->i2c->dev, "Clear state structure\n");
1531 kfree(state);
1532 }
1533
cx24120_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)1534 static int cx24120_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1535 {
1536 struct cx24120_state *state = fe->demodulator_priv;
1537 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1538
1539 if (c->block_error.stat[0].scale != FE_SCALE_COUNTER) {
1540 *ucblocks = 0;
1541 return 0;
1542 }
1543
1544 *ucblocks = c->block_error.stat[0].uvalue - state->ucb_offset;
1545
1546 return 0;
1547 }
1548
1549 static const struct dvb_frontend_ops cx24120_ops = {
1550 .delsys = { SYS_DVBS, SYS_DVBS2 },
1551 .info = {
1552 .name = "Conexant CX24120/CX24118",
1553 .frequency_min_hz = 950 * MHz,
1554 .frequency_max_hz = 2150 * MHz,
1555 .frequency_stepsize_hz = 1011 * kHz,
1556 .frequency_tolerance_hz = 5 * MHz,
1557 .symbol_rate_min = 1000000,
1558 .symbol_rate_max = 45000000,
1559 .caps = FE_CAN_INVERSION_AUTO |
1560 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1561 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1562 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1563 FE_CAN_2G_MODULATION |
1564 FE_CAN_QPSK | FE_CAN_RECOVER
1565 },
1566 .release = cx24120_release,
1567
1568 .init = cx24120_init,
1569 .sleep = cx24120_sleep,
1570
1571 .tune = cx24120_tune,
1572 .get_frontend_algo = cx24120_get_algo,
1573 .set_frontend = cx24120_set_frontend,
1574
1575 .get_frontend = cx24120_get_frontend,
1576 .read_status = cx24120_read_status,
1577 .read_ber = cx24120_read_ber,
1578 .read_signal_strength = cx24120_read_signal_strength,
1579 .read_snr = cx24120_read_snr,
1580 .read_ucblocks = cx24120_read_ucblocks,
1581
1582 .diseqc_send_master_cmd = cx24120_send_diseqc_msg,
1583
1584 .diseqc_send_burst = cx24120_diseqc_send_burst,
1585 .set_tone = cx24120_set_tone,
1586 .set_voltage = cx24120_set_voltage,
1587 };
1588
1589 MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24120/CX24118 hardware");
1590 MODULE_AUTHOR("Jemma Denson");
1591 MODULE_LICENSE("GPL");
1592